diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-10-21 09:06:51 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2008-12-15 16:51:22 -0500 |
commit | d9b79fb56829de34eaddb01b405216eddd0d3b10 (patch) | |
tree | 3b22ecbb2946d237590f34efd558ac58fb8fc90b /arch/arm | |
parent | d626aeedc96e21a048f1a300cd6360f3a7be10f2 (diff) |
[ARM] S3C64XX: Add VIC0 and VIC1 sourced interripts
Add and initialise the two VIC (PL192) found on
the S3C64XX series CPUs.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-s3c6410/cpu.c | 6 | ||||
-rw-r--r-- | arch/arm/plat-s3c/include/plat/cpu.h | 1 | ||||
-rw-r--r-- | arch/arm/plat-s3c64xx/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/plat-s3c64xx/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/plat-s3c64xx/include/plat/irqs.h | 3 | ||||
-rw-r--r-- | arch/arm/plat-s3c64xx/include/plat/s3c6410.h | 1 | ||||
-rw-r--r-- | arch/arm/plat-s3c64xx/irq.c | 34 |
7 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c6410/cpu.c b/arch/arm/mach-s3c6410/cpu.c index fbca763fa486..c3e317c16502 100644 --- a/arch/arm/mach-s3c6410/cpu.c +++ b/arch/arm/mach-s3c6410/cpu.c | |||
@@ -58,6 +58,12 @@ void __init s3c6410_init_clocks(int xtal) | |||
58 | s3c24xx_register_baseclocks(xtal); | 58 | s3c24xx_register_baseclocks(xtal); |
59 | } | 59 | } |
60 | 60 | ||
61 | void __init s3c6410_init_irq(void) | ||
62 | { | ||
63 | /* VIC0 is missing IRQ7, VIC1 is fully populated. */ | ||
64 | s3c64xx_init_irq(~0 & ~(1 << 7), ~0); | ||
65 | } | ||
66 | |||
61 | struct sysdev_class s3c6410_sysclass = { | 67 | struct sysdev_class s3c6410_sysclass = { |
62 | .name = "s3c6410-core", | 68 | .name = "s3c6410-core", |
63 | }; | 69 | }; |
diff --git a/arch/arm/plat-s3c/include/plat/cpu.h b/arch/arm/plat-s3c/include/plat/cpu.h index 011157ea871a..6d89a4637f30 100644 --- a/arch/arm/plat-s3c/include/plat/cpu.h +++ b/arch/arm/plat-s3c/include/plat/cpu.h | |||
@@ -44,6 +44,7 @@ extern void s3c_init_cpu(unsigned long idcode, | |||
44 | /* core initialisation functions */ | 44 | /* core initialisation functions */ |
45 | 45 | ||
46 | extern void s3c24xx_init_irq(void); | 46 | extern void s3c24xx_init_irq(void); |
47 | extern void s3c64xx_init_irq(u32 vic0, u32 vic1); | ||
47 | 48 | ||
48 | extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); | 49 | extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); |
49 | 50 | ||
diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig index 756c166051bf..14d6343b54e8 100644 --- a/arch/arm/plat-s3c64xx/Kconfig +++ b/arch/arm/plat-s3c64xx/Kconfig | |||
@@ -10,6 +10,7 @@ config PLAT_S3C64XX | |||
10 | bool | 10 | bool |
11 | depends on ARCH_S3C64XX | 11 | depends on ARCH_S3C64XX |
12 | select PLAT_S3C | 12 | select PLAT_S3C |
13 | select ARM_VIC | ||
13 | default y | 14 | default y |
14 | select NO_IOPORT | 15 | select NO_IOPORT |
15 | select ARCH_REQUIRE_GPIOLIB | 16 | select ARCH_REQUIRE_GPIOLIB |
diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/plat-s3c64xx/Makefile index 5d9a1d86ab8e..9be8ed59977f 100644 --- a/arch/arm/plat-s3c64xx/Makefile +++ b/arch/arm/plat-s3c64xx/Makefile | |||
@@ -14,3 +14,4 @@ obj- := | |||
14 | 14 | ||
15 | obj-y += dev-uart.o | 15 | obj-y += dev-uart.o |
16 | obj-y += cpu.o | 16 | obj-y += cpu.o |
17 | obj-y += irq.o | ||
diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h index 0092b5cba4a2..3564dfbec85a 100644 --- a/arch/arm/plat-s3c64xx/include/plat/irqs.h +++ b/arch/arm/plat-s3c64xx/include/plat/irqs.h | |||
@@ -24,6 +24,9 @@ | |||
24 | 24 | ||
25 | #define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET) | 25 | #define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET) |
26 | 26 | ||
27 | #define S3C_VIC0_BASE S3C_IRQ(0) | ||
28 | #define S3C_VIC1_BASE S3C_IRQ(32) | ||
29 | |||
27 | /* UART interrupts, each UART has 4 intterupts per channel so | 30 | /* UART interrupts, each UART has 4 intterupts per channel so |
28 | * use the space between the ISA and S3C main interrupts. Note, these | 31 | * use the space between the ISA and S3C main interrupts. Note, these |
29 | * are not in the same order as the S3C24XX series! */ | 32 | * are not in the same order as the S3C24XX series! */ |
diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h b/arch/arm/plat-s3c64xx/include/plat/s3c6410.h index 56f14b5d454b..50dcdd6f6800 100644 --- a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h +++ b/arch/arm/plat-s3c64xx/include/plat/s3c6410.h | |||
@@ -15,6 +15,7 @@ | |||
15 | #ifdef CONFIG_CPU_S3C6410 | 15 | #ifdef CONFIG_CPU_S3C6410 |
16 | 16 | ||
17 | extern int s3c6410_init(void); | 17 | extern int s3c6410_init(void); |
18 | extern void s3c6410_init_irq(void); | ||
18 | extern void s3c6410_map_io(void); | 19 | extern void s3c6410_map_io(void); |
19 | extern void s3c6410_init_clocks(int xtal); | 20 | extern void s3c6410_init_clocks(int xtal); |
20 | 21 | ||
diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/plat-s3c64xx/irq.c new file mode 100644 index 000000000000..308dc4198a17 --- /dev/null +++ b/arch/arm/plat-s3c64xx/irq.c | |||
@@ -0,0 +1,34 @@ | |||
1 | /* arch/arm/plat-s3c64xx/irq.c | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C64XX - Interrupt handling | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/interrupt.h> | ||
17 | #include <linux/io.h> | ||
18 | |||
19 | #include <asm/hardware/vic.h> | ||
20 | #include <asm/irq.h> | ||
21 | |||
22 | #include <mach/map.h> | ||
23 | #include <plat/cpu.h> | ||
24 | |||
25 | void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) | ||
26 | { | ||
27 | printk(KERN_INFO "%s: initialising interrupts\n", __func__); | ||
28 | |||
29 | /* initialise the pair of VICs */ | ||
30 | vic_init(S3C_VA_VIC0, S3C_VIC0_BASE, vic0_valid); | ||
31 | vic_init(S3C_VA_VIC1, S3C_VIC1_BASE, vic1_valid); | ||
32 | } | ||
33 | |||
34 | |||