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authorLennert Buytenhek <buytenh@wantstofly.org>2008-10-19 19:51:04 -0400
committerNicolas Pitre <nico@cam.org>2008-12-20 12:26:57 -0500
commit4c21343005b6b0d6ef24ab6e6a8f3883ff0cb569 (patch)
tree6a5cab5b87ce81abb3045882e083cccc9e2436eb /arch/arm
parent07332318f33da6acd88abb762a8b6febdfc560a3 (diff)
[ARM] Kirkwood: implement GPIO and GPIO interrupt support
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/mach-kirkwood/include/mach/gpio.h38
-rw-r--r--arch/arm/mach-kirkwood/include/mach/irqs.h4
-rw-r--r--arch/arm/mach-kirkwood/include/mach/kirkwood.h3
-rw-r--r--arch/arm/mach-kirkwood/irq.c35
5 files changed, 75 insertions, 6 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f1a3b10cfa9e..d840a64c6ce6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -386,6 +386,7 @@ config ARCH_KIRKWOOD
386 bool "Marvell Kirkwood" 386 bool "Marvell Kirkwood"
387 select CPU_FEROCEON 387 select CPU_FEROCEON
388 select PCI 388 select PCI
389 select GENERIC_GPIO
389 select GENERIC_TIME 390 select GENERIC_TIME
390 select GENERIC_CLOCKEVENTS 391 select GENERIC_CLOCKEVENTS
391 select PLAT_ORION 392 select PLAT_ORION
diff --git a/arch/arm/mach-kirkwood/include/mach/gpio.h b/arch/arm/mach-kirkwood/include/mach/gpio.h
new file mode 100644
index 000000000000..81b335eb62ec
--- /dev/null
+++ b/arch/arm/mach-kirkwood/include/mach/gpio.h
@@ -0,0 +1,38 @@
1/*
2 * arch/asm-arm/mach-kirkwood/include/mach/gpio.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef __ASM_ARCH_GPIO_H
10#define __ASM_ARCH_GPIO_H
11
12#include <mach/irqs.h>
13#include <plat/gpio.h>
14#include <asm-generic/gpio.h> /* cansleep wrappers */
15
16#define GPIO_MAX 50
17#define GPIO_OFF(pin) (((pin) >> 5) ? 0x0140 : 0x0100)
18#define GPIO_OUT(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x00)
19#define GPIO_IO_CONF(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x04)
20#define GPIO_BLINK_EN(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x08)
21#define GPIO_IN_POL(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x0c)
22#define GPIO_DATA_IN(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x10)
23#define GPIO_EDGE_CAUSE(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x14)
24#define GPIO_EDGE_MASK(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x18)
25#define GPIO_LEVEL_MASK(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x1c)
26
27static inline int gpio_to_irq(int pin)
28{
29 return pin + IRQ_KIRKWOOD_GPIO_START;
30}
31
32static inline int irq_to_gpio(int irq)
33{
34 return irq - IRQ_KIRKWOOD_GPIO_START;
35}
36
37
38#endif
diff --git a/arch/arm/mach-kirkwood/include/mach/irqs.h b/arch/arm/mach-kirkwood/include/mach/irqs.h
index 3a964bb14973..f00a0a45a67e 100644
--- a/arch/arm/mach-kirkwood/include/mach/irqs.h
+++ b/arch/arm/mach-kirkwood/include/mach/irqs.h
@@ -11,8 +11,6 @@
11#ifndef __ASM_ARCH_IRQS_H 11#ifndef __ASM_ARCH_IRQS_H
12#define __ASM_ARCH_IRQS_H 12#define __ASM_ARCH_IRQS_H
13 13
14#include "kirkwood.h" /* need GPIO_MAX */
15
16/* 14/*
17 * Low Interrupt Controller 15 * Low Interrupt Controller
18 */ 16 */
@@ -57,7 +55,7 @@
57 * KIRKWOOD General Purpose Pins 55 * KIRKWOOD General Purpose Pins
58 */ 56 */
59#define IRQ_KIRKWOOD_GPIO_START 64 57#define IRQ_KIRKWOOD_GPIO_START 64
60#define NR_GPIO_IRQS GPIO_MAX 58#define NR_GPIO_IRQS 50
61 59
62#define NR_IRQS (IRQ_KIRKWOOD_GPIO_START + NR_GPIO_IRQS) 60#define NR_IRQS (IRQ_KIRKWOOD_GPIO_START + NR_GPIO_IRQS)
63 61
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index eae42406fd86..ada480c0e197 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -117,7 +117,4 @@
117#define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x80000) 117#define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x80000)
118 118
119 119
120#define GPIO_MAX 50
121
122
123#endif 120#endif
diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c
index 5790643ffe07..efb86b700276 100644
--- a/arch/arm/mach-kirkwood/irq.c
+++ b/arch/arm/mach-kirkwood/irq.c
@@ -13,10 +13,45 @@
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <plat/irq.h> 15#include <plat/irq.h>
16#include <asm/gpio.h>
16#include "common.h" 17#include "common.h"
17 18
19static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
20{
21 BUG_ON(irq < IRQ_KIRKWOOD_GPIO_LOW_0_7);
22 BUG_ON(irq > IRQ_KIRKWOOD_GPIO_HIGH_16_23);
23
24 orion_gpio_irq_handler((irq - IRQ_KIRKWOOD_GPIO_LOW_0_7) << 3);
25}
26
18void __init kirkwood_init_irq(void) 27void __init kirkwood_init_irq(void)
19{ 28{
29 int i;
30
20 orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF)); 31 orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF));
21 orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF)); 32 orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
33
34 /*
35 * Mask and clear GPIO IRQ interrupts.
36 */
37 writel(0, GPIO_LEVEL_MASK(0));
38 writel(0, GPIO_EDGE_MASK(0));
39 writel(0, GPIO_EDGE_CAUSE(0));
40 writel(0, GPIO_LEVEL_MASK(32));
41 writel(0, GPIO_EDGE_MASK(32));
42 writel(0, GPIO_EDGE_CAUSE(32));
43
44 for (i = IRQ_KIRKWOOD_GPIO_START; i < NR_IRQS; i++) {
45 set_irq_chip(i, &orion_gpio_irq_level_chip);
46 set_irq_handler(i, handle_level_irq);
47 irq_desc[i].status |= IRQ_LEVEL;
48 set_irq_flags(i, IRQF_VALID);
49 }
50 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_0_7, gpio_irq_handler);
51 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_8_15, gpio_irq_handler);
52 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_16_23, gpio_irq_handler);
53 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_24_31, gpio_irq_handler);
54 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_0_7, gpio_irq_handler);
55 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_8_15, gpio_irq_handler);
56 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_16_23, gpio_irq_handler);
22} 57}