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authorKevin Hilman <khilman@deeprootsystems.com>2009-01-29 11:57:18 -0500
committerTony Lindgren <tony@atomide.com>2009-01-29 12:27:00 -0500
commit0dc23d704874e892c3fb5f2c0e4dfbef3c9c6edf (patch)
treed60ee6b4945ea88296ce8813dfc6a9127961a164 /arch/arm
parent5461af5af5c6a7fee78978aafe720541bf3a2f55 (diff)
ARM: OMAP: fix fault in enter_full_retention()
In omap24xx_cpu_suspend assembly routine, the r2 register which holds the address of the SDRC_POWER reg is set to zero before the value is written back triggering a fault due to writing to address zero. It's hard to tell where this change was introduced since this file has been moved and merged. While this fix prevents a crash, suspend on my n810 is broken with current kernels. I never come out of suspend. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap2/sleep24xx.S3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/sleep24xx.S b/arch/arm/mach-omap2/sleep24xx.S
index 43336b93b21c..bf9e96105e11 100644
--- a/arch/arm/mach-omap2/sleep24xx.S
+++ b/arch/arm/mach-omap2/sleep24xx.S
@@ -93,9 +93,8 @@ ENTRY(omap24xx_cpu_suspend)
93 orr r4, r4, #0x40 @ enable self refresh on idle req 93 orr r4, r4, #0x40 @ enable self refresh on idle req
94 mov r5, #0x2000 @ set delay (DPLL relock + DLL relock) 94 mov r5, #0x2000 @ set delay (DPLL relock + DLL relock)
95 str r4, [r2] @ make it so 95 str r4, [r2] @ make it so
96 mov r2, #0
97 nop 96 nop
98 mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt 97 mcr p15, 0, r3, c7, c0, 4 @ wait for interrupt
99 nop 98 nop
100loop: 99loop:
101 subs r5, r5, #0x1 @ awake, wait just a bit 100 subs r5, r5, #0x1 @ awake, wait just a bit