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authorBen Dooks <ben@simtec.co.uk>2009-07-30 18:23:23 -0400
committerBen Dooks <ben-linux@fluff.org>2009-07-30 18:22:51 -0400
commitd6fc87d3f7d236892e4d0003a07cd2b5171e5e27 (patch)
tree0828184df7953857a4855ac7cec656cc6a3577d9 /arch/arm
parentea5fe9aedf512d20b75b7dcfd54ab99ae5c0934b (diff)
ARM: S3C: CPUFREQ: Move struct s3c_cpufreq_config to cpu-freq-core.h
Move the structure s3c_cpufreq_config from cpu-freq.h to the less advertised cpu-freq-core.h as it is not needed by anything outside the core drivers. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/plat-s3c/include/plat/cpu-freq.h20
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h25
2 files changed, 25 insertions, 20 deletions
diff --git a/arch/arm/plat-s3c/include/plat/cpu-freq.h b/arch/arm/plat-s3c/include/plat/cpu-freq.h
index 0ba7670fd075..7b982b7f28cd 100644
--- a/arch/arm/plat-s3c/include/plat/cpu-freq.h
+++ b/arch/arm/plat-s3c/include/plat/cpu-freq.h
@@ -98,26 +98,6 @@ struct s3c_pllval {
98}; 98};
99 99
100/** 100/**
101 * struct s3c_cpufreq_config - current cpu frequency configuration
102 * @freq: The current settings for the core clocks.
103 * @pll: The PLL table entry for the current PLL settings.
104 * @divs: The divisor settings for the core clocks.
105 * @info: The current core driver information.
106 * @board: The information for the board we are running on.
107 *
108 * This is for the core drivers that need to know information about
109 * the current settings and values. It should not be needed by any
110 * device drivers.
111*/
112struct s3c_cpufreq_config {
113 struct s3c_freq freq;
114 struct s3c_pllval pll;
115 struct s3c_clkdivs divs;
116 struct s3c_cpufreq_info *info; /* for core, not drivers */
117 struct s3c_cpufreq_board *board;
118};
119
120/**
121 * struct s3c_cpufreq_board - per-board cpu frequency informatin 101 * struct s3c_cpufreq_board - per-board cpu frequency informatin
122 * @refresh: The SDRAM refresh period in nanoseconds. 102 * @refresh: The SDRAM refresh period in nanoseconds.
123 * @auto_io: Set if the IO timing settings should be generated from the 103 * @auto_io: Set if the IO timing settings should be generated from the
diff --git a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
index e078821b3605..7938fb0bc387 100644
--- a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
+++ b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
@@ -65,6 +65,31 @@ struct s3c_plltab {
65}; 65};
66 66
67/** 67/**
68 * struct s3c_cpufreq_config - current cpu frequency configuration
69 * @freq: The current settings for the core clocks.
70 * @max: Maxium settings, derived from core, board and user settings.
71 * @pll: The PLL table entry for the current PLL settings.
72 * @divs: The divisor settings for the core clocks.
73 * @info: The current core driver information.
74 * @board: The information for the board we are running on.
75 * @lock_pll: Set if the PLL settings cannot be changed.
76 *
77 * This is for the core drivers that need to know information about
78 * the current settings and values. It should not be needed by any
79 * device drivers.
80*/
81struct s3c_cpufreq_config {
82 struct s3c_freq freq;
83 struct s3c_freq max;
84 struct cpufreq_frequency_table pll;
85 struct s3c_clkdivs divs;
86 struct s3c_cpufreq_info *info; /* for core, not drivers */
87 struct s3c_cpufreq_board *board;
88
89 unsigned int lock_pll:1;
90};
91
92/**
68 * struct s3c_cpufreq_info - Information for the CPU frequency driver. 93 * struct s3c_cpufreq_info - Information for the CPU frequency driver.
69 * @name: The name of this implementation. 94 * @name: The name of this implementation.
70 * @max: The maximum frequencies for the system. 95 * @max: The maximum frequencies for the system.