diff options
author | Kevin Hilman <khilman@mvista.com> | 2007-05-16 11:52:05 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2007-08-22 03:42:50 -0400 |
commit | 5c5dccad31670faa716cbc9d8a6f918487f60a09 (patch) | |
tree | 417b60bcf822f2ec2e8b32fea1210661d0288190 /arch/arm | |
parent | cb00e99c0abd844b884c64c6b54aa3b7d345ebb1 (diff) |
ARM: OMAP: Fix 32k timer unsupported one-shot mode
Fix unsupported one-shot mode in set_mode hook.
Signed-off-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/plat-omap/common.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/timer32k.c | 10 |
2 files changed, 5 insertions, 7 deletions
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index 7987aa6e95f8..4f0f9c4e938e 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c | |||
@@ -172,7 +172,7 @@ console_initcall(omap_add_serial_console); | |||
172 | #if defined(CONFIG_ARCH_OMAP16XX) | 172 | #if defined(CONFIG_ARCH_OMAP16XX) |
173 | #define TIMER_32K_SYNCHRONIZED 0xfffbc410 | 173 | #define TIMER_32K_SYNCHRONIZED 0xfffbc410 |
174 | #elif defined(CONFIG_ARCH_OMAP24XX) | 174 | #elif defined(CONFIG_ARCH_OMAP24XX) |
175 | #define TIMER_32K_SYNCHRONIZED 0x48004010 | 175 | #define TIMER_32K_SYNCHRONIZED (OMAP24XX_32KSYNCT_BASE + 0x10) |
176 | #endif | 176 | #endif |
177 | 177 | ||
178 | #ifdef TIMER_32K_SYNCHRONIZED | 178 | #ifdef TIMER_32K_SYNCHRONIZED |
diff --git a/arch/arm/plat-omap/timer32k.c b/arch/arm/plat-omap/timer32k.c index b0af014b0e2c..ea76f1979a3d 100644 --- a/arch/arm/plat-omap/timer32k.c +++ b/arch/arm/plat-omap/timer32k.c | |||
@@ -71,7 +71,7 @@ struct sys_timer omap_timer; | |||
71 | #if defined(CONFIG_ARCH_OMAP16XX) | 71 | #if defined(CONFIG_ARCH_OMAP16XX) |
72 | #define TIMER_32K_SYNCHRONIZED 0xfffbc410 | 72 | #define TIMER_32K_SYNCHRONIZED 0xfffbc410 |
73 | #elif defined(CONFIG_ARCH_OMAP24XX) | 73 | #elif defined(CONFIG_ARCH_OMAP24XX) |
74 | #define TIMER_32K_SYNCHRONIZED 0x48004010 | 74 | #define TIMER_32K_SYNCHRONIZED (OMAP24XX_32KSYNCT_BASE + 0x10) |
75 | #else | 75 | #else |
76 | #error OMAP 32KHz timer does not currently work on 15XX! | 76 | #error OMAP 32KHz timer does not currently work on 15XX! |
77 | #endif | 77 | #endif |
@@ -147,14 +147,15 @@ static inline void omap_32k_timer_ack_irq(void) | |||
147 | static void omap_32k_timer_set_mode(enum clock_event_mode mode, | 147 | static void omap_32k_timer_set_mode(enum clock_event_mode mode, |
148 | struct clock_event_device *evt) | 148 | struct clock_event_device *evt) |
149 | { | 149 | { |
150 | omap_32k_timer_stop(); | ||
151 | |||
150 | switch (mode) { | 152 | switch (mode) { |
151 | case CLOCK_EVT_MODE_ONESHOT: | ||
152 | case CLOCK_EVT_MODE_PERIODIC: | 153 | case CLOCK_EVT_MODE_PERIODIC: |
153 | omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); | 154 | omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); |
154 | break; | 155 | break; |
156 | case CLOCK_EVT_MODE_ONESHOT: | ||
155 | case CLOCK_EVT_MODE_UNUSED: | 157 | case CLOCK_EVT_MODE_UNUSED: |
156 | case CLOCK_EVT_MODE_SHUTDOWN: | 158 | case CLOCK_EVT_MODE_SHUTDOWN: |
157 | omap_32k_timer_stop(); | ||
158 | break; | 159 | break; |
159 | case CLOCK_EVT_MODE_RESUME: | 160 | case CLOCK_EVT_MODE_RESUME: |
160 | break; | 161 | break; |
@@ -194,8 +195,6 @@ omap_32k_ticks_to_nsecs(unsigned long ticks_32k) | |||
194 | return (unsigned long long) ticks_32k * 1000 * 5*5*5*5*5*5 >> 9; | 195 | return (unsigned long long) ticks_32k * 1000 * 5*5*5*5*5*5 >> 9; |
195 | } | 196 | } |
196 | 197 | ||
197 | static unsigned long omap_32k_last_tick = 0; | ||
198 | |||
199 | /* | 198 | /* |
200 | * Returns current time from boot in nsecs. It's OK for this to wrap | 199 | * Returns current time from boot in nsecs. It's OK for this to wrap |
201 | * around for now, as it's just a relative time stamp. | 200 | * around for now, as it's just a relative time stamp. |
@@ -225,7 +224,6 @@ static __init void omap_init_32k_timer(void) | |||
225 | { | 224 | { |
226 | if (cpu_class_is_omap1()) | 225 | if (cpu_class_is_omap1()) |
227 | setup_irq(INT_OS_TIMER, &omap_32k_timer_irq); | 226 | setup_irq(INT_OS_TIMER, &omap_32k_timer_irq); |
228 | omap_32k_last_tick = omap_32k_sync_timer_read(); | ||
229 | 227 | ||
230 | #ifdef CONFIG_ARCH_OMAP2 | 228 | #ifdef CONFIG_ARCH_OMAP2 |
231 | /* REVISIT: Check 24xx TIOCP_CFG settings after idle works */ | 229 | /* REVISIT: Check 24xx TIOCP_CFG settings after idle works */ |