diff options
author | Dan Williams <dan.j.williams@intel.com> | 2006-12-14 17:31:20 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-12-19 14:48:53 -0500 |
commit | 3a2aeda86d9af50510b370cb01bc38aef213a36d (patch) | |
tree | 34c84fa3d950048e1874f852ed534219a77686b7 /arch/arm | |
parent | 0f7d667ba341337b77b31ce81be04b16b3964cf6 (diff) |
[ARM] 4022/1: iop13xx: generic irq fixups
* use irq_chip
* use handle_level_irq
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-iop13xx/irq.c | 22 |
1 files changed, 13 insertions, 9 deletions
diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c index c4d9c8c5579c..dbbc07c38b14 100644 --- a/arch/arm/mach-iop13xx/irq.c +++ b/arch/arm/mach-iop13xx/irq.c | |||
@@ -222,25 +222,29 @@ iop13xx_irq_unmask3(unsigned int irq) | |||
222 | iop13xx_cp6_restore(cp_flags); | 222 | iop13xx_cp6_restore(cp_flags); |
223 | } | 223 | } |
224 | 224 | ||
225 | static struct irqchip iop13xx_irqchip0 = { | 225 | static struct irq_chip iop13xx_irqchip1 = { |
226 | .name = "IOP13xx-1", | ||
226 | .ack = iop13xx_irq_mask0, | 227 | .ack = iop13xx_irq_mask0, |
227 | .mask = iop13xx_irq_mask0, | 228 | .mask = iop13xx_irq_mask0, |
228 | .unmask = iop13xx_irq_unmask0, | 229 | .unmask = iop13xx_irq_unmask0, |
229 | }; | 230 | }; |
230 | 231 | ||
231 | static struct irqchip iop13xx_irqchip1 = { | 232 | static struct irq_chip iop13xx_irqchip2 = { |
233 | .name = "IOP13xx-2", | ||
232 | .ack = iop13xx_irq_mask1, | 234 | .ack = iop13xx_irq_mask1, |
233 | .mask = iop13xx_irq_mask1, | 235 | .mask = iop13xx_irq_mask1, |
234 | .unmask = iop13xx_irq_unmask1, | 236 | .unmask = iop13xx_irq_unmask1, |
235 | }; | 237 | }; |
236 | 238 | ||
237 | static struct irqchip iop13xx_irqchip2 = { | 239 | static struct irq_chip iop13xx_irqchip3 = { |
240 | .name = "IOP13xx-3", | ||
238 | .ack = iop13xx_irq_mask2, | 241 | .ack = iop13xx_irq_mask2, |
239 | .mask = iop13xx_irq_mask2, | 242 | .mask = iop13xx_irq_mask2, |
240 | .unmask = iop13xx_irq_unmask2, | 243 | .unmask = iop13xx_irq_unmask2, |
241 | }; | 244 | }; |
242 | 245 | ||
243 | static struct irqchip iop13xx_irqchip3 = { | 246 | static struct irq_chip iop13xx_irqchip4 = { |
247 | .name = "IOP13xx-4", | ||
244 | .ack = iop13xx_irq_mask3, | 248 | .ack = iop13xx_irq_mask3, |
245 | .mask = iop13xx_irq_mask3, | 249 | .mask = iop13xx_irq_mask3, |
246 | .unmask = iop13xx_irq_unmask3, | 250 | .unmask = iop13xx_irq_unmask3, |
@@ -270,15 +274,15 @@ void __init iop13xx_init_irq(void) | |||
270 | 274 | ||
271 | for(i = 0; i < NR_IOP13XX_IRQS; i++) { | 275 | for(i = 0; i < NR_IOP13XX_IRQS; i++) { |
272 | if (i < 32) | 276 | if (i < 32) |
273 | set_irq_chip(i, &iop13xx_irqchip0); | ||
274 | else if (i < 64) | ||
275 | set_irq_chip(i, &iop13xx_irqchip1); | 277 | set_irq_chip(i, &iop13xx_irqchip1); |
276 | else if (i < 96) | 278 | else if (i < 64) |
277 | set_irq_chip(i, &iop13xx_irqchip2); | 279 | set_irq_chip(i, &iop13xx_irqchip2); |
278 | else | 280 | else if (i < 96) |
279 | set_irq_chip(i, &iop13xx_irqchip3); | 281 | set_irq_chip(i, &iop13xx_irqchip3); |
282 | else | ||
283 | set_irq_chip(i, &iop13xx_irqchip4); | ||
280 | 284 | ||
281 | set_irq_handler(i, do_level_IRQ); | 285 | set_irq_handler(i, handle_level_irq); |
282 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); | 286 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); |
283 | } | 287 | } |
284 | 288 | ||