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authorNicolas Pitre <nico@cam.org>2006-05-16 06:29:46 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-05-16 06:39:31 -0400
commit1d6760a3ac6b5691e4914a3333b48fee5c2e275d (patch)
tree02d0296c1155377e79b22760ca9cf9638b223425 /arch/arm
parent2ceec0c8c6e2780d58dece91b4b787729405d9e7 (diff)
[ARM] 3524/1: ARM EABI: more 64-bit aligned stack fixes
Patch from Nicolas Pitre Assembly code that calls C code must ensure the C code sees a 64-bit aligned stack pointer. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/lib/backtrace.S4
-rw-r--r--arch/arm/lib/div64.S4
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/lib/backtrace.S b/arch/arm/lib/backtrace.S
index 3bdc8c6949c5..16153c86c3f8 100644
--- a/arch/arm/lib/backtrace.S
+++ b/arch/arm/lib/backtrace.S
@@ -122,7 +122,7 @@ ENTRY(c_backtrace)
122#define reg r5 122#define reg r5
123#define stack r6 123#define stack r6
124 124
125.Ldumpstm: stmfd sp!, {instr, reg, stack, r7, lr} 125.Ldumpstm: stmfd sp!, {instr, reg, stack, r7, r8, lr}
126 mov stack, r0 126 mov stack, r0
127 mov instr, r1 127 mov instr, r1
128 mov reg, #9 128 mov reg, #9
@@ -145,7 +145,7 @@ ENTRY(c_backtrace)
145 adrne r0, .Lcr 145 adrne r0, .Lcr
146 blne printk 146 blne printk
147 mov r0, stack 147 mov r0, stack
148 LOADREGS(fd, sp!, {instr, reg, stack, r7, pc}) 148 LOADREGS(fd, sp!, {instr, reg, stack, r7, r8, pc})
149 149
150.Lfp: .asciz " r%d = %08X%c" 150.Lfp: .asciz " r%d = %08X%c"
151.Lcr: .asciz "\n" 151.Lcr: .asciz "\n"
diff --git a/arch/arm/lib/div64.S b/arch/arm/lib/div64.S
index ec9a1cd6176f..58eef6607629 100644
--- a/arch/arm/lib/div64.S
+++ b/arch/arm/lib/div64.S
@@ -189,12 +189,12 @@ ENTRY(__do_div64)
189 moveq pc, lr 189 moveq pc, lr
190 190
191 @ Division by 0: 191 @ Division by 0:
192 str lr, [sp, #-4]! 192 str lr, [sp, #-8]!
193 bl __div0 193 bl __div0
194 194
195 @ as wrong as it could be... 195 @ as wrong as it could be...
196 mov yl, #0 196 mov yl, #0
197 mov yh, #0 197 mov yh, #0
198 mov xh, #0 198 mov xh, #0
199 ldr pc, [sp], #4 199 ldr pc, [sp], #8
200 200