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authorArnd Bergmann <arnd@arndb.de>2012-11-16 11:57:23 -0500
committerArnd Bergmann <arnd@arndb.de>2012-11-16 11:57:23 -0500
commite014f774d32b8930215c95fd19307b5395b996e2 (patch)
tree601de96d3011703965da3bc04b311535a9d91556 /arch/arm
parent93363526c8fcd9dbbc0562c0642df6114ed04217 (diff)
parent96efb44e471250592ee865ce5b870bc6f860921f (diff)
Merge tag 'imx-dt-3.8' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
From Shawn Guo <shawn.guo@linaro.org>: It's based on imx/multiplatform branch. Most of them are dts changes. There are also a few imx6 improvement patches in there. * tag 'imx-dt-3.8' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: imx6q: select ARM and PL310 errata ARM: imx6q: print silicon version on boot ARM i.MX dts: Consistently add labels to devicenodes ARM: dts: imx6q-sabresd: add volume up/down gpio keys ARM: dts: imx53: pinctl update ARM: imx: enable cpufreq for imx6q ARM: dts: imx6q: enable snvs lp rtc ARM: dts: imx6q-sabreauto: Add basic support ARM: imx6q: let users input debug uart port number ARM: dts: imx53-qsb: Make DA9053 regulator functional ARM: dts: imx53-qsb: Use pinctrl for gpio-led ARM i.MX dtsi: Add default bus-width property for esdhc controller Signed-off-by: Arnd Bregmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig.debug26
-rw-r--r--arch/arm/boot/dts/Makefile1
-rw-r--r--arch/arm/boot/dts/imx27.dtsi5
-rw-r--r--arch/arm/boot/dts/imx51.dtsi43
-rw-r--r--arch/arm/boot/dts/imx53-qsb.dts62
-rw-r--r--arch/arm/boot/dts/imx53.dtsi92
-rw-r--r--arch/arm/boot/dts/imx6q-sabreauto.dts64
-rw-r--r--arch/arm/boot/dts/imx6q-sabresd.dts18
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi114
-rw-r--r--arch/arm/include/debug/imx.S20
-rw-r--r--arch/arm/mach-imx/Kconfig11
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c1
-rw-r--r--arch/arm/mach-imx/lluart.c28
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c35
-rw-r--r--arch/arm/mach-imx/mx6q.h4
15 files changed, 385 insertions, 139 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 5bbfcf0d35e0..00e9a53888ba 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -226,20 +226,12 @@ choice
226 Say Y here if you want kernel low-level debugging support 226 Say Y here if you want kernel low-level debugging support
227 on i.MX50 or i.MX53. 227 on i.MX50 or i.MX53.
228 228
229 config DEBUG_IMX6Q_UART2 229 config DEBUG_IMX6Q_UART
230 bool "i.MX6Q Debug UART2" 230 bool "i.MX6Q Debug UART"
231 depends on SOC_IMX6Q 231 depends on SOC_IMX6Q
232 help 232 help
233 Say Y here if you want kernel low-level debugging support 233 Say Y here if you want kernel low-level debugging support
234 on i.MX6Q UART2. This is correct for e.g. the SabreLite 234 on i.MX6Q.
235 board.
236
237 config DEBUG_IMX6Q_UART4
238 bool "i.MX6Q Debug UART4"
239 depends on SOC_IMX6Q
240 help
241 Say Y here if you want kernel low-level debugging support
242 on i.MX6Q UART4.
243 235
244 config DEBUG_MMP_UART2 236 config DEBUG_MMP_UART2
245 bool "Kernel low-level debugging message via MMP UART2" 237 bool "Kernel low-level debugging message via MMP UART2"
@@ -426,6 +418,15 @@ choice
426 418
427endchoice 419endchoice
428 420
421config DEBUG_IMX6Q_UART_PORT
422 int "i.MX6Q Debug UART Port (1-5)" if DEBUG_IMX6Q_UART
423 range 1 5
424 default 1
425 depends on SOC_IMX6Q
426 help
427 Choose UART port on which kernel low-level debug messages
428 should be output.
429
429config DEBUG_LL_INCLUDE 430config DEBUG_LL_INCLUDE
430 string 431 string
431 default "debug/icedcc.S" if DEBUG_ICEDCC 432 default "debug/icedcc.S" if DEBUG_ICEDCC
@@ -435,8 +436,7 @@ config DEBUG_LL_INCLUDE
435 DEBUG_IMX31_IMX35_UART || \ 436 DEBUG_IMX31_IMX35_UART || \
436 DEBUG_IMX51_UART || \ 437 DEBUG_IMX51_UART || \
437 DEBUG_IMX50_IMX53_UART ||\ 438 DEBUG_IMX50_IMX53_UART ||\
438 DEBUG_IMX6Q_UART2 || \ 439 DEBUG_IMX6Q_UART
439 DEBUG_IMX6Q_UART4
440 default "debug/highbank.S" if DEBUG_HIGHBANK_UART 440 default "debug/highbank.S" if DEBUG_HIGHBANK_UART
441 default "debug/mvebu.S" if DEBUG_MVEBU_UART 441 default "debug/mvebu.S" if DEBUG_MVEBU_UART
442 default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART 442 default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 1f23acfe5cbc..7fd1336da891 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -51,6 +51,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx51-babbage.dtb \
51 imx53-qsb.dtb \ 51 imx53-qsb.dtb \
52 imx53-smd.dtb \ 52 imx53-smd.dtb \
53 imx6q-arm2.dtb \ 53 imx6q-arm2.dtb \
54 imx6q-sabreauto.dtb \
54 imx6q-sabrelite.dtb \ 55 imx6q-sabrelite.dtb \
55 imx6q-sabresd.dtb 56 imx6q-sabresd.dtb
56dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ 57dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index 67d672792b0d..b8d3905915ac 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -58,7 +58,7 @@
58 reg = <0x10000000 0x10000000>; 58 reg = <0x10000000 0x10000000>;
59 ranges; 59 ranges;
60 60
61 wdog@10002000 { 61 wdog: wdog@10002000 {
62 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt"; 62 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
63 reg = <0x10002000 0x4000>; 63 reg = <0x10002000 0x4000>;
64 interrupts = <27>; 64 interrupts = <27>;
@@ -218,7 +218,8 @@
218 status = "disabled"; 218 status = "disabled";
219 }; 219 };
220 }; 220 };
221 nand@d8000000 { 221
222 nfc: nand@d8000000 {
222 #address-cells = <1>; 223 #address-cells = <1>;
223 #size-cells = <1>; 224 #size-cells = <1>;
224 225
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 54aea74769a1..1fdee31b4909 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -76,17 +76,18 @@
76 reg = <0x70000000 0x40000>; 76 reg = <0x70000000 0x40000>;
77 ranges; 77 ranges;
78 78
79 esdhc@70004000 { /* ESDHC1 */ 79 esdhc1: esdhc@70004000 {
80 compatible = "fsl,imx51-esdhc"; 80 compatible = "fsl,imx51-esdhc";
81 reg = <0x70004000 0x4000>; 81 reg = <0x70004000 0x4000>;
82 interrupts = <1>; 82 interrupts = <1>;
83 status = "disabled"; 83 status = "disabled";
84 }; 84 };
85 85
86 esdhc@70008000 { /* ESDHC2 */ 86 esdhc2: esdhc@70008000 {
87 compatible = "fsl,imx51-esdhc"; 87 compatible = "fsl,imx51-esdhc";
88 reg = <0x70008000 0x4000>; 88 reg = <0x70008000 0x4000>;
89 interrupts = <2>; 89 interrupts = <2>;
90 bus-width = <4>;
90 status = "disabled"; 91 status = "disabled";
91 }; 92 };
92 93
@@ -97,7 +98,7 @@
97 status = "disabled"; 98 status = "disabled";
98 }; 99 };
99 100
100 ecspi@70010000 { /* ECSPI1 */ 101 ecspi1: ecspi@70010000 {
101 #address-cells = <1>; 102 #address-cells = <1>;
102 #size-cells = <0>; 103 #size-cells = <0>;
103 compatible = "fsl,imx51-ecspi"; 104 compatible = "fsl,imx51-ecspi";
@@ -115,43 +116,45 @@
115 status = "disabled"; 116 status = "disabled";
116 }; 117 };
117 118
118 esdhc@70020000 { /* ESDHC3 */ 119 esdhc3: esdhc@70020000 {
119 compatible = "fsl,imx51-esdhc"; 120 compatible = "fsl,imx51-esdhc";
120 reg = <0x70020000 0x4000>; 121 reg = <0x70020000 0x4000>;
121 interrupts = <3>; 122 interrupts = <3>;
123 bus-width = <4>;
122 status = "disabled"; 124 status = "disabled";
123 }; 125 };
124 126
125 esdhc@70024000 { /* ESDHC4 */ 127 esdhc4: esdhc@70024000 {
126 compatible = "fsl,imx51-esdhc"; 128 compatible = "fsl,imx51-esdhc";
127 reg = <0x70024000 0x4000>; 129 reg = <0x70024000 0x4000>;
128 interrupts = <4>; 130 interrupts = <4>;
131 bus-width = <4>;
129 status = "disabled"; 132 status = "disabled";
130 }; 133 };
131 }; 134 };
132 135
133 usb@73f80000 { 136 usbotg: usb@73f80000 {
134 compatible = "fsl,imx51-usb", "fsl,imx27-usb"; 137 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
135 reg = <0x73f80000 0x0200>; 138 reg = <0x73f80000 0x0200>;
136 interrupts = <18>; 139 interrupts = <18>;
137 status = "disabled"; 140 status = "disabled";
138 }; 141 };
139 142
140 usb@73f80200 { 143 usbh1: usb@73f80200 {
141 compatible = "fsl,imx51-usb", "fsl,imx27-usb"; 144 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
142 reg = <0x73f80200 0x0200>; 145 reg = <0x73f80200 0x0200>;
143 interrupts = <14>; 146 interrupts = <14>;
144 status = "disabled"; 147 status = "disabled";
145 }; 148 };
146 149
147 usb@73f80400 { 150 usbh2: usb@73f80400 {
148 compatible = "fsl,imx51-usb", "fsl,imx27-usb"; 151 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
149 reg = <0x73f80400 0x0200>; 152 reg = <0x73f80400 0x0200>;
150 interrupts = <16>; 153 interrupts = <16>;
151 status = "disabled"; 154 status = "disabled";
152 }; 155 };
153 156
154 usb@73f80600 { 157 usbh3: usb@73f80600 {
155 compatible = "fsl,imx51-usb", "fsl,imx27-usb"; 158 compatible = "fsl,imx51-usb", "fsl,imx27-usb";
156 reg = <0x73f80600 0x0200>; 159 reg = <0x73f80600 0x0200>;
157 interrupts = <17>; 160 interrupts = <17>;
@@ -198,20 +201,20 @@
198 #interrupt-cells = <2>; 201 #interrupt-cells = <2>;
199 }; 202 };
200 203
201 wdog@73f98000 { /* WDOG1 */ 204 wdog1: wdog@73f98000 {
202 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; 205 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
203 reg = <0x73f98000 0x4000>; 206 reg = <0x73f98000 0x4000>;
204 interrupts = <58>; 207 interrupts = <58>;
205 }; 208 };
206 209
207 wdog@73f9c000 { /* WDOG2 */ 210 wdog2: wdog@73f9c000 {
208 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; 211 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
209 reg = <0x73f9c000 0x4000>; 212 reg = <0x73f9c000 0x4000>;
210 interrupts = <59>; 213 interrupts = <59>;
211 status = "disabled"; 214 status = "disabled";
212 }; 215 };
213 216
214 iomuxc@73fa8000 { 217 iomuxc: iomuxc@73fa8000 {
215 compatible = "fsl,imx51-iomuxc"; 218 compatible = "fsl,imx51-iomuxc";
216 reg = <0x73fa8000 0x4000>; 219 reg = <0x73fa8000 0x4000>;
217 220
@@ -349,7 +352,7 @@
349 reg = <0x80000000 0x10000000>; 352 reg = <0x80000000 0x10000000>;
350 ranges; 353 ranges;
351 354
352 ecspi@83fac000 { /* ECSPI2 */ 355 ecspi2: ecspi@83fac000 {
353 #address-cells = <1>; 356 #address-cells = <1>;
354 #size-cells = <0>; 357 #size-cells = <0>;
355 compatible = "fsl,imx51-ecspi"; 358 compatible = "fsl,imx51-ecspi";
@@ -358,14 +361,14 @@
358 status = "disabled"; 361 status = "disabled";
359 }; 362 };
360 363
361 sdma@83fb0000 { 364 sdma: sdma@83fb0000 {
362 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; 365 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
363 reg = <0x83fb0000 0x4000>; 366 reg = <0x83fb0000 0x4000>;
364 interrupts = <6>; 367 interrupts = <6>;
365 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin"; 368 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
366 }; 369 };
367 370
368 cspi@83fc0000 { 371 cspi: cspi@83fc0000 {
369 #address-cells = <1>; 372 #address-cells = <1>;
370 #size-cells = <0>; 373 #size-cells = <0>;
371 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; 374 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
@@ -374,7 +377,7 @@
374 status = "disabled"; 377 status = "disabled";
375 }; 378 };
376 379
377 i2c@83fc4000 { /* I2C2 */ 380 i2c2: i2c@83fc4000 {
378 #address-cells = <1>; 381 #address-cells = <1>;
379 #size-cells = <0>; 382 #size-cells = <0>;
380 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; 383 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
@@ -383,7 +386,7 @@
383 status = "disabled"; 386 status = "disabled";
384 }; 387 };
385 388
386 i2c@83fc8000 { /* I2C1 */ 389 i2c1: i2c@83fc8000 {
387 #address-cells = <1>; 390 #address-cells = <1>;
388 #size-cells = <0>; 391 #size-cells = <0>;
389 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; 392 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
@@ -401,13 +404,13 @@
401 status = "disabled"; 404 status = "disabled";
402 }; 405 };
403 406
404 audmux@83fd0000 { 407 audmux: audmux@83fd0000 {
405 compatible = "fsl,imx51-audmux", "fsl,imx31-audmux"; 408 compatible = "fsl,imx51-audmux", "fsl,imx31-audmux";
406 reg = <0x83fd0000 0x4000>; 409 reg = <0x83fd0000 0x4000>;
407 status = "disabled"; 410 status = "disabled";
408 }; 411 };
409 412
410 nand@83fdb000 { 413 nfc: nand@83fdb000 {
411 compatible = "fsl,imx51-nand"; 414 compatible = "fsl,imx51-nand";
412 reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>; 415 reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>;
413 interrupts = <8>; 416 interrupts = <8>;
@@ -423,7 +426,7 @@
423 status = "disabled"; 426 status = "disabled";
424 }; 427 };
425 428
426 ethernet@83fec000 { 429 fec: ethernet@83fec000 {
427 compatible = "fsl,imx51-fec", "fsl,imx27-fec"; 430 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
428 reg = <0x83fec000 0x4000>; 431 reg = <0x83fec000 0x4000>;
429 interrupts = <87>; 432 interrupts = <87>;
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
index 08948af86d1a..b0075537195b 100644
--- a/arch/arm/boot/dts/imx53-qsb.dts
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -60,10 +60,17 @@
60 697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */ 60 697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */
61 701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */ 61 701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
62 868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */ 62 868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
63 1149 0x80000000 /* MX53_PAD_GPIO_16__GPIO7_11 */
64 >;
65 };
66
67 led_pin_gpio7_7: led_gpio7_7@0 {
68 fsl,pins = <
63 873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */ 69 873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */
64 >; 70 >;
65 }; 71 };
66 }; 72 };
73
67 }; 74 };
68 75
69 uart1: serial@53fbc000 { 76 uart1: serial@53fbc000 {
@@ -100,76 +107,93 @@
100 pmic: dialog@48 { 107 pmic: dialog@48 {
101 compatible = "dlg,da9053-aa", "dlg,da9052"; 108 compatible = "dlg,da9053-aa", "dlg,da9052";
102 reg = <0x48>; 109 reg = <0x48>;
110 interrupt-parent = <&gpio7>;
111 interrupts = <11 0x8>; /* low-level active IRQ at GPIO7_11 */
103 112
104 regulators { 113 regulators {
105 buck0 { 114 buck1_reg: buck1 {
106 regulator-min-microvolt = <500000>; 115 regulator-min-microvolt = <500000>;
107 regulator-max-microvolt = <2075000>; 116 regulator-max-microvolt = <2075000>;
117 regulator-always-on;
108 }; 118 };
109 119
110 buck1 { 120 buck2_reg: buck2 {
111 regulator-min-microvolt = <500000>; 121 regulator-min-microvolt = <500000>;
112 regulator-max-microvolt = <2075000>; 122 regulator-max-microvolt = <2075000>;
123 regulator-always-on;
113 }; 124 };
114 125
115 buck2 { 126 buck3_reg: buck3 {
116 regulator-min-microvolt = <925000>; 127 regulator-min-microvolt = <925000>;
117 regulator-max-microvolt = <2500000>; 128 regulator-max-microvolt = <2500000>;
129 regulator-always-on;
118 }; 130 };
119 131
120 buck3 { 132 buck4_reg: buck4 {
121 regulator-min-microvolt = <925000>; 133 regulator-min-microvolt = <925000>;
122 regulator-max-microvolt = <2500000>; 134 regulator-max-microvolt = <2500000>;
135 regulator-always-on;
123 }; 136 };
124 137
125 ldo4 { 138 ldo1_reg: ldo1 {
126 regulator-min-microvolt = <600000>; 139 regulator-min-microvolt = <600000>;
127 regulator-max-microvolt = <1800000>; 140 regulator-max-microvolt = <1800000>;
141 regulator-boot-on;
142 regulator-always-on;
128 }; 143 };
129 144
130 ldo5 { 145 ldo2_reg: ldo2 {
146 regulator-min-microvolt = <600000>;
147 regulator-max-microvolt = <1800000>;
148 regulator-always-on;
149 };
150
151 ldo3_reg: ldo3 {
131 regulator-min-microvolt = <600000>; 152 regulator-min-microvolt = <600000>;
132 regulator-max-microvolt = <1800000>; 153 regulator-max-microvolt = <1800000>;
154 regulator-always-on;
133 }; 155 };
134 156
135 ldo6 { 157 ldo4_reg: ldo4 {
136 regulator-min-microvolt = <1725000>; 158 regulator-min-microvolt = <1725000>;
137 regulator-max-microvolt = <3300000>; 159 regulator-max-microvolt = <3300000>;
160 regulator-always-on;
138 }; 161 };
139 162
140 ldo7 { 163 ldo5_reg: ldo5 {
141 regulator-min-microvolt = <1725000>; 164 regulator-min-microvolt = <1725000>;
142 regulator-max-microvolt = <3300000>; 165 regulator-max-microvolt = <3300000>;
166 regulator-always-on;
143 }; 167 };
144 168
145 ldo8 { 169 ldo6_reg: ldo6 {
146 regulator-min-microvolt = <1200000>; 170 regulator-min-microvolt = <1200000>;
147 regulator-max-microvolt = <3600000>; 171 regulator-max-microvolt = <3600000>;
172 regulator-always-on;
148 }; 173 };
149 174
150 ldo9 { 175 ldo7_reg: ldo7 {
151 regulator-min-microvolt = <1200000>; 176 regulator-min-microvolt = <1200000>;
152 regulator-max-microvolt = <3600000>; 177 regulator-max-microvolt = <3600000>;
178 regulator-always-on;
153 }; 179 };
154 180
155 ldo10 { 181 ldo8_reg: ldo8 {
156 regulator-min-microvolt = <1200000>; 182 regulator-min-microvolt = <1200000>;
157 regulator-max-microvolt = <3600000>; 183 regulator-max-microvolt = <3600000>;
184 regulator-always-on;
158 }; 185 };
159 186
160 ldo11 { 187 ldo9_reg: ldo9 {
161 regulator-min-microvolt = <1200000>; 188 regulator-min-microvolt = <1200000>;
162 regulator-max-microvolt = <3600000>; 189 regulator-max-microvolt = <3600000>;
190 regulator-always-on;
163 }; 191 };
164 192
165 ldo12 { 193 ldo10_reg: ldo10 {
166 regulator-min-microvolt = <1250000>; 194 regulator-min-microvolt = <1250000>;
167 regulator-max-microvolt = <3650000>; 195 regulator-max-microvolt = <3650000>;
168 }; 196 regulator-always-on;
169
170 ldo13 {
171 regulator-min-microvolt = <1200000>;
172 regulator-max-microvolt = <3600000>;
173 }; 197 };
174 }; 198 };
175 }; 199 };
@@ -216,6 +240,8 @@
216 240
217 leds { 241 leds {
218 compatible = "gpio-leds"; 242 compatible = "gpio-leds";
243 pinctrl-names = "default";
244 pinctrl-0 = <&led_pin_gpio7_7>;
219 245
220 user { 246 user {
221 label = "Heartbeat"; 247 label = "Heartbeat";
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index caf09ff73f10..f45d4b1e21b5 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -81,17 +81,19 @@
81 reg = <0x50000000 0x40000>; 81 reg = <0x50000000 0x40000>;
82 ranges; 82 ranges;
83 83
84 esdhc@50004000 { /* ESDHC1 */ 84 esdhc1: esdhc@50004000 {
85 compatible = "fsl,imx53-esdhc"; 85 compatible = "fsl,imx53-esdhc";
86 reg = <0x50004000 0x4000>; 86 reg = <0x50004000 0x4000>;
87 interrupts = <1>; 87 interrupts = <1>;
88 bus-width = <4>;
88 status = "disabled"; 89 status = "disabled";
89 }; 90 };
90 91
91 esdhc@50008000 { /* ESDHC2 */ 92 esdhc2: esdhc@50008000 {
92 compatible = "fsl,imx53-esdhc"; 93 compatible = "fsl,imx53-esdhc";
93 reg = <0x50008000 0x4000>; 94 reg = <0x50008000 0x4000>;
94 interrupts = <2>; 95 interrupts = <2>;
96 bus-width = <4>;
95 status = "disabled"; 97 status = "disabled";
96 }; 98 };
97 99
@@ -102,7 +104,7 @@
102 status = "disabled"; 104 status = "disabled";
103 }; 105 };
104 106
105 ecspi@50010000 { /* ECSPI1 */ 107 ecspi1: ecspi@50010000 {
106 #address-cells = <1>; 108 #address-cells = <1>;
107 #size-cells = <0>; 109 #size-cells = <0>;
108 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; 110 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
@@ -120,43 +122,45 @@
120 status = "disabled"; 122 status = "disabled";
121 }; 123 };
122 124
123 esdhc@50020000 { /* ESDHC3 */ 125 esdhc3: esdhc@50020000 {
124 compatible = "fsl,imx53-esdhc"; 126 compatible = "fsl,imx53-esdhc";
125 reg = <0x50020000 0x4000>; 127 reg = <0x50020000 0x4000>;
126 interrupts = <3>; 128 interrupts = <3>;
129 bus-width = <4>;
127 status = "disabled"; 130 status = "disabled";
128 }; 131 };
129 132
130 esdhc@50024000 { /* ESDHC4 */ 133 esdhc4: esdhc@50024000 {
131 compatible = "fsl,imx53-esdhc"; 134 compatible = "fsl,imx53-esdhc";
132 reg = <0x50024000 0x4000>; 135 reg = <0x50024000 0x4000>;
133 interrupts = <4>; 136 interrupts = <4>;
137 bus-width = <4>;
134 status = "disabled"; 138 status = "disabled";
135 }; 139 };
136 }; 140 };
137 141
138 usb@53f80000 { 142 usbotg: usb@53f80000 {
139 compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 143 compatible = "fsl,imx53-usb", "fsl,imx27-usb";
140 reg = <0x53f80000 0x0200>; 144 reg = <0x53f80000 0x0200>;
141 interrupts = <18>; 145 interrupts = <18>;
142 status = "disabled"; 146 status = "disabled";
143 }; 147 };
144 148
145 usb@53f80200 { 149 usbh1: usb@53f80200 {
146 compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 150 compatible = "fsl,imx53-usb", "fsl,imx27-usb";
147 reg = <0x53f80200 0x0200>; 151 reg = <0x53f80200 0x0200>;
148 interrupts = <14>; 152 interrupts = <14>;
149 status = "disabled"; 153 status = "disabled";
150 }; 154 };
151 155
152 usb@53f80400 { 156 usbh2: usb@53f80400 {
153 compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 157 compatible = "fsl,imx53-usb", "fsl,imx27-usb";
154 reg = <0x53f80400 0x0200>; 158 reg = <0x53f80400 0x0200>;
155 interrupts = <16>; 159 interrupts = <16>;
156 status = "disabled"; 160 status = "disabled";
157 }; 161 };
158 162
159 usb@53f80600 { 163 usbh3: usb@53f80600 {
160 compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 164 compatible = "fsl,imx53-usb", "fsl,imx27-usb";
161 reg = <0x53f80600 0x0200>; 165 reg = <0x53f80600 0x0200>;
162 interrupts = <17>; 166 interrupts = <17>;
@@ -203,20 +207,20 @@
203 #interrupt-cells = <2>; 207 #interrupt-cells = <2>;
204 }; 208 };
205 209
206 wdog@53f98000 { /* WDOG1 */ 210 wdog1: wdog@53f98000 {
207 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; 211 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
208 reg = <0x53f98000 0x4000>; 212 reg = <0x53f98000 0x4000>;
209 interrupts = <58>; 213 interrupts = <58>;
210 }; 214 };
211 215
212 wdog@53f9c000 { /* WDOG2 */ 216 wdog2: wdog@53f9c000 {
213 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; 217 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
214 reg = <0x53f9c000 0x4000>; 218 reg = <0x53f9c000 0x4000>;
215 interrupts = <59>; 219 interrupts = <59>;
216 status = "disabled"; 220 status = "disabled";
217 }; 221 };
218 222
219 iomuxc@53fa8000 { 223 iomuxc: iomuxc@53fa8000 {
220 compatible = "fsl,imx53-iomuxc"; 224 compatible = "fsl,imx53-iomuxc";
221 reg = <0x53fa8000 0x4000>; 225 reg = <0x53fa8000 0x4000>;
222 226
@@ -316,6 +320,24 @@
316 }; 320 };
317 }; 321 };
318 322
323 can1 {
324 pinctrl_can1_1: can1grp-1 {
325 fsl,pins = <
326 847 0x80000000 /* MX53_PAD_PATA_INTRQ__CAN1_TXCAN */
327 853 0x80000000 /* MX53_PAD_PATA_DIOR__CAN1_RXCAN */
328 >;
329 };
330 };
331
332 can2 {
333 pinctrl_can2_1: can2grp-1 {
334 fsl,pins = <
335 67 0x80000000 /* MX53_PAD_KEY_COL4__CAN2_TXCAN */
336 74 0x80000000 /* MX53_PAD_KEY_ROW4__CAN2_RXCAN */
337 >;
338 };
339 };
340
319 i2c1 { 341 i2c1 {
320 pinctrl_i2c1_1: i2c1grp-1 { 342 pinctrl_i2c1_1: i2c1grp-1 {
321 fsl,pins = < 343 fsl,pins = <
@@ -334,6 +356,15 @@
334 }; 356 };
335 }; 357 };
336 358
359 i2c3 {
360 pinctrl_i2c3_1: i2c3grp-1 {
361 fsl,pins = <
362 1102 0xc0000000 /* MX53_PAD_GPIO_6__I2C3_SDA */
363 1130 0xc0000000 /* MX53_PAD_GPIO_5__I2C3_SCL */
364 >;
365 };
366 };
367
337 uart1 { 368 uart1 {
338 pinctrl_uart1_1: uart1grp-1 { 369 pinctrl_uart1_1: uart1grp-1 {
339 fsl,pins = < 370 fsl,pins = <
@@ -369,6 +400,25 @@
369 >; 400 >;
370 }; 401 };
371 }; 402 };
403
404 uart4 {
405 pinctrl_uart4_1: uart4grp-1 {
406 fsl,pins = <
407 11 0x1c5 /* MX53_PAD_KEY_COL0__UART4_TXD_MUX */
408 18 0x1c5 /* MX53_PAD_KEY_ROW0__UART4_RXD_MUX */
409 >;
410 };
411 };
412
413 uart5 {
414 pinctrl_uart5_1: uart5grp-1 {
415 fsl,pins = <
416 24 0x1c5 /* MX53_PAD_KEY_COL1__UART5_TXD_MUX */
417 31 0x1c5 /* MX53_PAD_KEY_ROW1__UART5_RXD_MUX */
418 >;
419 };
420 };
421
372 }; 422 };
373 423
374 uart1: serial@53fbc000 { 424 uart1: serial@53fbc000 {
@@ -429,7 +479,7 @@
429 #interrupt-cells = <2>; 479 #interrupt-cells = <2>;
430 }; 480 };
431 481
432 i2c@53fec000 { /* I2C3 */ 482 i2c3: i2c@53fec000 {
433 #address-cells = <1>; 483 #address-cells = <1>;
434 #size-cells = <0>; 484 #size-cells = <0>;
435 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; 485 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
@@ -460,7 +510,7 @@
460 status = "disabled"; 510 status = "disabled";
461 }; 511 };
462 512
463 ecspi@63fac000 { /* ECSPI2 */ 513 ecspi2: ecspi@63fac000 {
464 #address-cells = <1>; 514 #address-cells = <1>;
465 #size-cells = <0>; 515 #size-cells = <0>;
466 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; 516 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
@@ -469,14 +519,14 @@
469 status = "disabled"; 519 status = "disabled";
470 }; 520 };
471 521
472 sdma@63fb0000 { 522 sdma: sdma@63fb0000 {
473 compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; 523 compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
474 reg = <0x63fb0000 0x4000>; 524 reg = <0x63fb0000 0x4000>;
475 interrupts = <6>; 525 interrupts = <6>;
476 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; 526 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
477 }; 527 };
478 528
479 cspi@63fc0000 { 529 cspi: cspi@63fc0000 {
480 #address-cells = <1>; 530 #address-cells = <1>;
481 #size-cells = <0>; 531 #size-cells = <0>;
482 compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; 532 compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
@@ -485,7 +535,7 @@
485 status = "disabled"; 535 status = "disabled";
486 }; 536 };
487 537
488 i2c@63fc4000 { /* I2C2 */ 538 i2c2: i2c@63fc4000 {
489 #address-cells = <1>; 539 #address-cells = <1>;
490 #size-cells = <0>; 540 #size-cells = <0>;
491 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; 541 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
@@ -494,7 +544,7 @@
494 status = "disabled"; 544 status = "disabled";
495 }; 545 };
496 546
497 i2c@63fc8000 { /* I2C1 */ 547 i2c1: i2c@63fc8000 {
498 #address-cells = <1>; 548 #address-cells = <1>;
499 #size-cells = <0>; 549 #size-cells = <0>;
500 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; 550 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
@@ -512,13 +562,13 @@
512 status = "disabled"; 562 status = "disabled";
513 }; 563 };
514 564
515 audmux@63fd0000 { 565 audmux: audmux@63fd0000 {
516 compatible = "fsl,imx53-audmux", "fsl,imx31-audmux"; 566 compatible = "fsl,imx53-audmux", "fsl,imx31-audmux";
517 reg = <0x63fd0000 0x4000>; 567 reg = <0x63fd0000 0x4000>;
518 status = "disabled"; 568 status = "disabled";
519 }; 569 };
520 570
521 nand@63fdb000 { 571 nfc: nand@63fdb000 {
522 compatible = "fsl,imx53-nand"; 572 compatible = "fsl,imx53-nand";
523 reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>; 573 reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>;
524 interrupts = <8>; 574 interrupts = <8>;
@@ -534,7 +584,7 @@
534 status = "disabled"; 584 status = "disabled";
535 }; 585 };
536 586
537 ethernet@63fec000 { 587 fec: ethernet@63fec000 {
538 compatible = "fsl,imx53-fec", "fsl,imx25-fec"; 588 compatible = "fsl,imx53-fec", "fsl,imx25-fec";
539 reg = <0x63fec000 0x4000>; 589 reg = <0x63fec000 0x4000>;
540 interrupts = <87>; 590 interrupts = <87>;
diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-sabreauto.dts
new file mode 100644
index 000000000000..826e4ad1477e
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-sabreauto.dts
@@ -0,0 +1,64 @@
1/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx6q.dtsi"
15
16/ {
17 model = "Freescale i.MX6 Quad SABRE Automotive Board";
18 compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
19
20 memory {
21 reg = <0x10000000 0x80000000>;
22 };
23
24 soc {
25 aips-bus@02000000 { /* AIPS1 */
26 iomuxc@020e0000 {
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_hog>;
29
30 hog {
31 pinctrl_hog: hoggrp {
32 fsl,pins = <
33 1376 0x80000000 /* MX6Q_PAD_NANDF_CS2__GPIO_6_15 */
34 13 0x80000000 /* MX6Q_PAD_SD2_DAT2__GPIO_1_13 */
35 >;
36 };
37 };
38 };
39 };
40
41 aips-bus@02100000 { /* AIPS2 */
42 uart4: serial@021f0000 {
43 pinctrl-names = "default";
44 pinctrl-0 = <&pinctrl_uart4_1>;
45 status = "okay";
46 };
47
48 ethernet@02188000 {
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_enet_2>;
51 phy-mode = "rgmii";
52 status = "okay";
53 };
54
55 usdhc@02198000 { /* uSDHC3 */
56 pinctrl-names = "default";
57 pinctrl-0 = <&pinctrl_usdhc3_1>;
58 cd-gpios = <&gpio6 15 0>;
59 wp-gpios = <&gpio1 13 0>;
60 status = "okay";
61 };
62 };
63 };
64};
diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts
index e596c28c214d..a42402562b7b 100644
--- a/arch/arm/boot/dts/imx6q-sabresd.dts
+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
@@ -38,6 +38,8 @@
38 hog { 38 hog {
39 pinctrl_hog: hoggrp { 39 pinctrl_hog: hoggrp {
40 fsl,pins = < 40 fsl,pins = <
41 1004 0x80000000 /* MX6Q_PAD_GPIO_4__GPIO_1_4 */
42 1012 0x80000000 /* MX6Q_PAD_GPIO_5__GPIO_1_5 */
41 1402 0x80000000 /* MX6Q_PAD_NANDF_D0__GPIO_2_0 */ 43 1402 0x80000000 /* MX6Q_PAD_NANDF_D0__GPIO_2_0 */
42 1410 0x80000000 /* MX6Q_PAD_NANDF_D1__GPIO_2_1 */ 44 1410 0x80000000 /* MX6Q_PAD_NANDF_D1__GPIO_2_1 */
43 1418 0x80000000 /* MX6Q_PAD_NANDF_D2__GPIO_2_2 */ 45 1418 0x80000000 /* MX6Q_PAD_NANDF_D2__GPIO_2_2 */
@@ -73,4 +75,20 @@
73 }; 75 };
74 }; 76 };
75 }; 77 };
78
79 gpio-keys {
80 compatible = "gpio-keys";
81
82 volume-up {
83 label = "Volume Up";
84 gpios = <&gpio1 4 0>;
85 linux,code = <115>; /* KEY_VOLUMEUP */
86 };
87
88 volume-down {
89 label = "Volume Down";
90 gpios = <&gpio1 5 0>;
91 linux,code = <114>; /* KEY_VOLUMEDOWN */
92 };
93 };
76}; 94};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index f604a44a5c66..6dfeaedef307 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -36,6 +36,14 @@
36 compatible = "arm,cortex-a9"; 36 compatible = "arm,cortex-a9";
37 reg = <0>; 37 reg = <0>;
38 next-level-cache = <&L2>; 38 next-level-cache = <&L2>;
39 operating-points = <
40 /* kHz uV */
41 792000 1100000
42 396000 950000
43 198000 850000
44 >;
45 clock-latency = <61036>; /* two CLK32 periods */
46 cpu0-supply = <&reg_cpu>;
39 }; 47 };
40 48
41 cpu@1 { 49 cpu@1 {
@@ -100,7 +108,7 @@
100 clocks = <&clks 106>; 108 clocks = <&clks 106>;
101 }; 109 };
102 110
103 gpmi-nand@00112000 { 111 nfc: gpmi-nand@00112000 {
104 compatible = "fsl,imx6q-gpmi-nand"; 112 compatible = "fsl,imx6q-gpmi-nand";
105 #address-cells = <1>; 113 #address-cells = <1>;
106 #size-cells = <1>; 114 #size-cells = <1>;
@@ -144,12 +152,12 @@
144 reg = <0x02000000 0x40000>; 152 reg = <0x02000000 0x40000>;
145 ranges; 153 ranges;
146 154
147 spdif@02004000 { 155 spdif: spdif@02004000 {
148 reg = <0x02004000 0x4000>; 156 reg = <0x02004000 0x4000>;
149 interrupts = <0 52 0x04>; 157 interrupts = <0 52 0x04>;
150 }; 158 };
151 159
152 ecspi@02008000 { /* eCSPI1 */ 160 ecspi1: ecspi@02008000 {
153 #address-cells = <1>; 161 #address-cells = <1>;
154 #size-cells = <0>; 162 #size-cells = <0>;
155 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 163 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -160,7 +168,7 @@
160 status = "disabled"; 168 status = "disabled";
161 }; 169 };
162 170
163 ecspi@0200c000 { /* eCSPI2 */ 171 ecspi2: ecspi@0200c000 {
164 #address-cells = <1>; 172 #address-cells = <1>;
165 #size-cells = <0>; 173 #size-cells = <0>;
166 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 174 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -171,7 +179,7 @@
171 status = "disabled"; 179 status = "disabled";
172 }; 180 };
173 181
174 ecspi@02010000 { /* eCSPI3 */ 182 ecspi3: ecspi@02010000 {
175 #address-cells = <1>; 183 #address-cells = <1>;
176 #size-cells = <0>; 184 #size-cells = <0>;
177 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 185 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -182,7 +190,7 @@
182 status = "disabled"; 190 status = "disabled";
183 }; 191 };
184 192
185 ecspi@02014000 { /* eCSPI4 */ 193 ecspi4: ecspi@02014000 {
186 #address-cells = <1>; 194 #address-cells = <1>;
187 #size-cells = <0>; 195 #size-cells = <0>;
188 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 196 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -193,7 +201,7 @@
193 status = "disabled"; 201 status = "disabled";
194 }; 202 };
195 203
196 ecspi@02018000 { /* eCSPI5 */ 204 ecspi5: ecspi@02018000 {
197 #address-cells = <1>; 205 #address-cells = <1>;
198 #size-cells = <0>; 206 #size-cells = <0>;
199 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 207 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -213,7 +221,7 @@
213 status = "disabled"; 221 status = "disabled";
214 }; 222 };
215 223
216 esai@02024000 { 224 esai: esai@02024000 {
217 reg = <0x02024000 0x4000>; 225 reg = <0x02024000 0x4000>;
218 interrupts = <0 51 0x04>; 226 interrupts = <0 51 0x04>;
219 }; 227 };
@@ -248,7 +256,7 @@
248 status = "disabled"; 256 status = "disabled";
249 }; 257 };
250 258
251 asrc@02034000 { 259 asrc: asrc@02034000 {
252 reg = <0x02034000 0x4000>; 260 reg = <0x02034000 0x4000>;
253 interrupts = <0 50 0x04>; 261 interrupts = <0 50 0x04>;
254 }; 262 };
@@ -258,7 +266,7 @@
258 }; 266 };
259 }; 267 };
260 268
261 vpu@02040000 { 269 vpu: vpu@02040000 {
262 reg = <0x02040000 0x3c000>; 270 reg = <0x02040000 0x3c000>;
263 interrupts = <0 3 0x04 0 12 0x04>; 271 interrupts = <0 3 0x04 0 12 0x04>;
264 }; 272 };
@@ -267,37 +275,37 @@
267 reg = <0x0207c000 0x4000>; 275 reg = <0x0207c000 0x4000>;
268 }; 276 };
269 277
270 pwm@02080000 { /* PWM1 */ 278 pwm1: pwm@02080000 {
271 reg = <0x02080000 0x4000>; 279 reg = <0x02080000 0x4000>;
272 interrupts = <0 83 0x04>; 280 interrupts = <0 83 0x04>;
273 }; 281 };
274 282
275 pwm@02084000 { /* PWM2 */ 283 pwm2: pwm@02084000 {
276 reg = <0x02084000 0x4000>; 284 reg = <0x02084000 0x4000>;
277 interrupts = <0 84 0x04>; 285 interrupts = <0 84 0x04>;
278 }; 286 };
279 287
280 pwm@02088000 { /* PWM3 */ 288 pwm3: pwm@02088000 {
281 reg = <0x02088000 0x4000>; 289 reg = <0x02088000 0x4000>;
282 interrupts = <0 85 0x04>; 290 interrupts = <0 85 0x04>;
283 }; 291 };
284 292
285 pwm@0208c000 { /* PWM4 */ 293 pwm4: pwm@0208c000 {
286 reg = <0x0208c000 0x4000>; 294 reg = <0x0208c000 0x4000>;
287 interrupts = <0 86 0x04>; 295 interrupts = <0 86 0x04>;
288 }; 296 };
289 297
290 flexcan@02090000 { /* CAN1 */ 298 can1: flexcan@02090000 {
291 reg = <0x02090000 0x4000>; 299 reg = <0x02090000 0x4000>;
292 interrupts = <0 110 0x04>; 300 interrupts = <0 110 0x04>;
293 }; 301 };
294 302
295 flexcan@02094000 { /* CAN2 */ 303 can2: flexcan@02094000 {
296 reg = <0x02094000 0x4000>; 304 reg = <0x02094000 0x4000>;
297 interrupts = <0 111 0x04>; 305 interrupts = <0 111 0x04>;
298 }; 306 };
299 307
300 gpt@02098000 { 308 gpt: gpt@02098000 {
301 compatible = "fsl,imx6q-gpt"; 309 compatible = "fsl,imx6q-gpt";
302 reg = <0x02098000 0x4000>; 310 reg = <0x02098000 0x4000>;
303 interrupts = <0 55 0x04>; 311 interrupts = <0 55 0x04>;
@@ -373,19 +381,19 @@
373 #interrupt-cells = <2>; 381 #interrupt-cells = <2>;
374 }; 382 };
375 383
376 kpp@020b8000 { 384 kpp: kpp@020b8000 {
377 reg = <0x020b8000 0x4000>; 385 reg = <0x020b8000 0x4000>;
378 interrupts = <0 82 0x04>; 386 interrupts = <0 82 0x04>;
379 }; 387 };
380 388
381 wdog@020bc000 { /* WDOG1 */ 389 wdog1: wdog@020bc000 {
382 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; 390 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
383 reg = <0x020bc000 0x4000>; 391 reg = <0x020bc000 0x4000>;
384 interrupts = <0 80 0x04>; 392 interrupts = <0 80 0x04>;
385 clocks = <&clks 0>; 393 clocks = <&clks 0>;
386 }; 394 };
387 395
388 wdog@020c0000 { /* WDOG2 */ 396 wdog2: wdog@020c0000 {
389 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; 397 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
390 reg = <0x020c0000 0x4000>; 398 reg = <0x020c0000 0x4000>;
391 interrupts = <0 81 0x04>; 399 interrupts = <0 81 0x04>;
@@ -447,7 +455,7 @@
447 anatop-max-voltage = <2750000>; 455 anatop-max-voltage = <2750000>;
448 }; 456 };
449 457
450 regulator-vddcore@140 { 458 reg_cpu: regulator-vddcore@140 {
451 compatible = "fsl,anatop-regulator"; 459 compatible = "fsl,anatop-regulator";
452 regulator-name = "cpu"; 460 regulator-name = "cpu";
453 regulator-min-microvolt = <725000>; 461 regulator-min-microvolt = <725000>;
@@ -505,27 +513,35 @@
505 }; 513 };
506 514
507 snvs@020cc000 { 515 snvs@020cc000 {
508 reg = <0x020cc000 0x4000>; 516 compatible = "fsl,sec-v4.0-mon", "simple-bus";
509 interrupts = <0 19 0x04 0 20 0x04>; 517 #address-cells = <1>;
518 #size-cells = <1>;
519 ranges = <0 0x020cc000 0x4000>;
520
521 snvs-rtc-lp@34 {
522 compatible = "fsl,sec-v4.0-mon-rtc-lp";
523 reg = <0x34 0x58>;
524 interrupts = <0 19 0x04 0 20 0x04>;
525 };
510 }; 526 };
511 527
512 epit@020d0000 { /* EPIT1 */ 528 epit1: epit@020d0000 { /* EPIT1 */
513 reg = <0x020d0000 0x4000>; 529 reg = <0x020d0000 0x4000>;
514 interrupts = <0 56 0x04>; 530 interrupts = <0 56 0x04>;
515 }; 531 };
516 532
517 epit@020d4000 { /* EPIT2 */ 533 epit2: epit@020d4000 { /* EPIT2 */
518 reg = <0x020d4000 0x4000>; 534 reg = <0x020d4000 0x4000>;
519 interrupts = <0 57 0x04>; 535 interrupts = <0 57 0x04>;
520 }; 536 };
521 537
522 src@020d8000 { 538 src: src@020d8000 {
523 compatible = "fsl,imx6q-src"; 539 compatible = "fsl,imx6q-src";
524 reg = <0x020d8000 0x4000>; 540 reg = <0x020d8000 0x4000>;
525 interrupts = <0 91 0x04 0 96 0x04>; 541 interrupts = <0 91 0x04 0 96 0x04>;
526 }; 542 };
527 543
528 gpc@020dc000 { 544 gpc: gpc@020dc000 {
529 compatible = "fsl,imx6q-gpc"; 545 compatible = "fsl,imx6q-gpc";
530 reg = <0x020dc000 0x4000>; 546 reg = <0x020dc000 0x4000>;
531 interrupts = <0 89 0x04 0 90 0x04>; 547 interrupts = <0 89 0x04 0 90 0x04>;
@@ -536,7 +552,7 @@
536 reg = <0x020e0000 0x38>; 552 reg = <0x020e0000 0x38>;
537 }; 553 };
538 554
539 iomuxc@020e0000 { 555 iomuxc: iomuxc@020e0000 {
540 compatible = "fsl,imx6q-iomuxc"; 556 compatible = "fsl,imx6q-iomuxc";
541 reg = <0x020e0000 0x4000>; 557 reg = <0x020e0000 0x4000>;
542 558
@@ -748,17 +764,17 @@
748 }; 764 };
749 }; 765 };
750 766
751 dcic@020e4000 { /* DCIC1 */ 767 dcic1: dcic@020e4000 {
752 reg = <0x020e4000 0x4000>; 768 reg = <0x020e4000 0x4000>;
753 interrupts = <0 124 0x04>; 769 interrupts = <0 124 0x04>;
754 }; 770 };
755 771
756 dcic@020e8000 { /* DCIC2 */ 772 dcic2: dcic@020e8000 {
757 reg = <0x020e8000 0x4000>; 773 reg = <0x020e8000 0x4000>;
758 interrupts = <0 125 0x04>; 774 interrupts = <0 125 0x04>;
759 }; 775 };
760 776
761 sdma@020ec000 { 777 sdma: sdma@020ec000 {
762 compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; 778 compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
763 reg = <0x020ec000 0x4000>; 779 reg = <0x020ec000 0x4000>;
764 interrupts = <0 2 0x04>; 780 interrupts = <0 2 0x04>;
@@ -784,7 +800,7 @@
784 reg = <0x0217c000 0x4000>; 800 reg = <0x0217c000 0x4000>;
785 }; 801 };
786 802
787 usb@02184000 { /* USB OTG */ 803 usbotg: usb@02184000 {
788 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 804 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
789 reg = <0x02184000 0x200>; 805 reg = <0x02184000 0x200>;
790 interrupts = <0 43 0x04>; 806 interrupts = <0 43 0x04>;
@@ -794,7 +810,7 @@
794 status = "disabled"; 810 status = "disabled";
795 }; 811 };
796 812
797 usb@02184200 { /* USB1 */ 813 usbh1: usb@02184200 {
798 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 814 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
799 reg = <0x02184200 0x200>; 815 reg = <0x02184200 0x200>;
800 interrupts = <0 40 0x04>; 816 interrupts = <0 40 0x04>;
@@ -804,7 +820,7 @@
804 status = "disabled"; 820 status = "disabled";
805 }; 821 };
806 822
807 usb@02184400 { /* USB2 */ 823 usbh2: usb@02184400 {
808 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 824 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
809 reg = <0x02184400 0x200>; 825 reg = <0x02184400 0x200>;
810 interrupts = <0 41 0x04>; 826 interrupts = <0 41 0x04>;
@@ -813,7 +829,7 @@
813 status = "disabled"; 829 status = "disabled";
814 }; 830 };
815 831
816 usb@02184600 { /* USB3 */ 832 usbh3: usb@02184600 {
817 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 833 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
818 reg = <0x02184600 0x200>; 834 reg = <0x02184600 0x200>;
819 interrupts = <0 42 0x04>; 835 interrupts = <0 42 0x04>;
@@ -822,14 +838,14 @@
822 status = "disabled"; 838 status = "disabled";
823 }; 839 };
824 840
825 usbmisc: usbmisc@02184800 { 841 usbmisc: usbmisc: usbmisc@02184800 {
826 #index-cells = <1>; 842 #index-cells = <1>;
827 compatible = "fsl,imx6q-usbmisc"; 843 compatible = "fsl,imx6q-usbmisc";
828 reg = <0x02184800 0x200>; 844 reg = <0x02184800 0x200>;
829 clocks = <&clks 162>; 845 clocks = <&clks 162>;
830 }; 846 };
831 847
832 ethernet@02188000 { 848 fec: ethernet@02188000 {
833 compatible = "fsl,imx6q-fec"; 849 compatible = "fsl,imx6q-fec";
834 reg = <0x02188000 0x4000>; 850 reg = <0x02188000 0x4000>;
835 interrupts = <0 118 0x04 0 119 0x04>; 851 interrupts = <0 118 0x04 0 119 0x04>;
@@ -843,43 +859,47 @@
843 interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>; 859 interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>;
844 }; 860 };
845 861
846 usdhc@02190000 { /* uSDHC1 */ 862 usdhc1: usdhc@02190000 {
847 compatible = "fsl,imx6q-usdhc"; 863 compatible = "fsl,imx6q-usdhc";
848 reg = <0x02190000 0x4000>; 864 reg = <0x02190000 0x4000>;
849 interrupts = <0 22 0x04>; 865 interrupts = <0 22 0x04>;
850 clocks = <&clks 163>, <&clks 163>, <&clks 163>; 866 clocks = <&clks 163>, <&clks 163>, <&clks 163>;
851 clock-names = "ipg", "ahb", "per"; 867 clock-names = "ipg", "ahb", "per";
868 bus-width = <4>;
852 status = "disabled"; 869 status = "disabled";
853 }; 870 };
854 871
855 usdhc@02194000 { /* uSDHC2 */ 872 usdhc2: usdhc@02194000 {
856 compatible = "fsl,imx6q-usdhc"; 873 compatible = "fsl,imx6q-usdhc";
857 reg = <0x02194000 0x4000>; 874 reg = <0x02194000 0x4000>;
858 interrupts = <0 23 0x04>; 875 interrupts = <0 23 0x04>;
859 clocks = <&clks 164>, <&clks 164>, <&clks 164>; 876 clocks = <&clks 164>, <&clks 164>, <&clks 164>;
860 clock-names = "ipg", "ahb", "per"; 877 clock-names = "ipg", "ahb", "per";
878 bus-width = <4>;
861 status = "disabled"; 879 status = "disabled";
862 }; 880 };
863 881
864 usdhc@02198000 { /* uSDHC3 */ 882 usdhc3: usdhc@02198000 {
865 compatible = "fsl,imx6q-usdhc"; 883 compatible = "fsl,imx6q-usdhc";
866 reg = <0x02198000 0x4000>; 884 reg = <0x02198000 0x4000>;
867 interrupts = <0 24 0x04>; 885 interrupts = <0 24 0x04>;
868 clocks = <&clks 165>, <&clks 165>, <&clks 165>; 886 clocks = <&clks 165>, <&clks 165>, <&clks 165>;
869 clock-names = "ipg", "ahb", "per"; 887 clock-names = "ipg", "ahb", "per";
888 bus-width = <4>;
870 status = "disabled"; 889 status = "disabled";
871 }; 890 };
872 891
873 usdhc@0219c000 { /* uSDHC4 */ 892 usdhc4: usdhc@0219c000 {
874 compatible = "fsl,imx6q-usdhc"; 893 compatible = "fsl,imx6q-usdhc";
875 reg = <0x0219c000 0x4000>; 894 reg = <0x0219c000 0x4000>;
876 interrupts = <0 25 0x04>; 895 interrupts = <0 25 0x04>;
877 clocks = <&clks 166>, <&clks 166>, <&clks 166>; 896 clocks = <&clks 166>, <&clks 166>, <&clks 166>;
878 clock-names = "ipg", "ahb", "per"; 897 clock-names = "ipg", "ahb", "per";
898 bus-width = <4>;
879 status = "disabled"; 899 status = "disabled";
880 }; 900 };
881 901
882 i2c@021a0000 { /* I2C1 */ 902 i2c1: i2c@021a0000 {
883 #address-cells = <1>; 903 #address-cells = <1>;
884 #size-cells = <0>; 904 #size-cells = <0>;
885 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; 905 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
@@ -889,7 +909,7 @@
889 status = "disabled"; 909 status = "disabled";
890 }; 910 };
891 911
892 i2c@021a4000 { /* I2C2 */ 912 i2c2: i2c@021a4000 {
893 #address-cells = <1>; 913 #address-cells = <1>;
894 #size-cells = <0>; 914 #size-cells = <0>;
895 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; 915 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
@@ -899,7 +919,7 @@
899 status = "disabled"; 919 status = "disabled";
900 }; 920 };
901 921
902 i2c@021a8000 { /* I2C3 */ 922 i2c3: i2c@021a8000 {
903 #address-cells = <1>; 923 #address-cells = <1>;
904 #size-cells = <0>; 924 #size-cells = <0>;
905 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; 925 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
@@ -913,12 +933,12 @@
913 reg = <0x021ac000 0x4000>; 933 reg = <0x021ac000 0x4000>;
914 }; 934 };
915 935
916 mmdc@021b0000 { /* MMDC0 */ 936 mmdc0: mmdc@021b0000 { /* MMDC0 */
917 compatible = "fsl,imx6q-mmdc"; 937 compatible = "fsl,imx6q-mmdc";
918 reg = <0x021b0000 0x4000>; 938 reg = <0x021b0000 0x4000>;
919 }; 939 };
920 940
921 mmdc@021b4000 { /* MMDC1 */ 941 mmdc1: mmdc@021b4000 { /* MMDC1 */
922 reg = <0x021b4000 0x4000>; 942 reg = <0x021b4000 0x4000>;
923 }; 943 };
924 944
@@ -946,7 +966,7 @@
946 interrupts = <0 109 0x04>; 966 interrupts = <0 109 0x04>;
947 }; 967 };
948 968
949 audmux@021d8000 { 969 audmux: audmux@021d8000 {
950 compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux"; 970 compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux";
951 reg = <0x021d8000 0x4000>; 971 reg = <0x021d8000 0x4000>;
952 status = "disabled"; 972 status = "disabled";
diff --git a/arch/arm/include/debug/imx.S b/arch/arm/include/debug/imx.S
index 0b65d792f664..0c4e17d4d359 100644
--- a/arch/arm/include/debug/imx.S
+++ b/arch/arm/include/debug/imx.S
@@ -10,6 +10,20 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 * 11 *
12 */ 12 */
13#define IMX6Q_UART1_BASE_ADDR 0x02020000
14#define IMX6Q_UART2_BASE_ADDR 0x021e8000
15#define IMX6Q_UART3_BASE_ADDR 0x021ec000
16#define IMX6Q_UART4_BASE_ADDR 0x021f0000
17#define IMX6Q_UART5_BASE_ADDR 0x021f4000
18
19/*
20 * IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion
21 * of IMX6Q_UART##n##_BASE_ADDR.
22 */
23#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR
24#define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n)
25#define IMX6Q_DEBUG_UART_BASE IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT)
26
13#ifdef CONFIG_DEBUG_IMX1_UART 27#ifdef CONFIG_DEBUG_IMX1_UART
14#define UART_PADDR 0x00206000 28#define UART_PADDR 0x00206000
15#elif defined (CONFIG_DEBUG_IMX25_UART) 29#elif defined (CONFIG_DEBUG_IMX25_UART)
@@ -22,10 +36,8 @@
22#define UART_PADDR 0x73fbc000 36#define UART_PADDR 0x73fbc000
23#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) 37#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)
24#define UART_PADDR 0x53fbc000 38#define UART_PADDR 0x53fbc000
25#elif defined (CONFIG_DEBUG_IMX6Q_UART2) 39#elif defined (CONFIG_DEBUG_IMX6Q_UART)
26#define UART_PADDR 0x021e8000 40#define UART_PADDR IMX6Q_DEBUG_UART_BASE
27#elif defined (CONFIG_DEBUG_IMX6Q_UART4)
28#define UART_PADDR 0x021f0000
29#endif 41#endif
30 42
31/* 43/*
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index ff702c3f35b7..b09924112f99 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -836,7 +836,14 @@ config SOC_IMX53
836 836
837config SOC_IMX6Q 837config SOC_IMX6Q
838 bool "i.MX6 Quad support" 838 bool "i.MX6 Quad support"
839 select ARCH_HAS_CPUFREQ
840 select ARCH_HAS_OPP
839 select ARM_CPU_SUSPEND if PM 841 select ARM_CPU_SUSPEND if PM
842 select ARM_ERRATA_743622
843 select ARM_ERRATA_751472
844 select ARM_ERRATA_754322
845 select ARM_ERRATA_764369 if SMP
846 select ARM_ERRATA_775420
840 select ARM_GIC 847 select ARM_GIC
841 select COMMON_CLK 848 select COMMON_CLK
842 select CPU_V7 849 select CPU_V7
@@ -848,6 +855,10 @@ config SOC_IMX6Q
848 select MFD_SYSCON 855 select MFD_SYSCON
849 select PINCTRL 856 select PINCTRL
850 select PINCTRL_IMX6Q 857 select PINCTRL_IMX6Q
858 select PL310_ERRATA_588369 if CACHE_PL310
859 select PL310_ERRATA_727915 if CACHE_PL310
860 select PL310_ERRATA_769419 if CACHE_PL310
861 select PM_OPP if PM
851 862
852 help 863 help
853 This enables support for Freescale i.MX6 Quad processor. 864 This enables support for Freescale i.MX6 Quad processor.
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index e5a82bb95b52..5f9f5919dd74 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -406,6 +406,7 @@ int __init mx6q_clocks_init(void)
406 clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL); 406 clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL);
407 clk_register_clkdev(clk[ahb], "ahb", NULL); 407 clk_register_clkdev(clk[ahb], "ahb", NULL);
408 clk_register_clkdev(clk[cko1], "cko1", NULL); 408 clk_register_clkdev(clk[cko1], "cko1", NULL);
409 clk_register_clkdev(clk[arm], NULL, "cpu0");
409 410
410 /* 411 /*
411 * The gpmi needs 100MHz frequency in the EDO/Sync mode, 412 * The gpmi needs 100MHz frequency in the EDO/Sync mode,
diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c
index 5f1510363ee7..2fdc9bf2fb5e 100644
--- a/arch/arm/mach-imx/lluart.c
+++ b/arch/arm/mach-imx/lluart.c
@@ -17,17 +17,25 @@
17 17
18#include "hardware.h" 18#include "hardware.h"
19 19
20#define IMX6Q_UART1_BASE_ADDR 0x02020000
21#define IMX6Q_UART2_BASE_ADDR 0x021e8000
22#define IMX6Q_UART3_BASE_ADDR 0x021ec000
23#define IMX6Q_UART4_BASE_ADDR 0x021f0000
24#define IMX6Q_UART5_BASE_ADDR 0x021f4000
25
26/*
27 * IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion
28 * of IMX6Q_UART##n##_BASE_ADDR.
29 */
30#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR
31#define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n)
32#define IMX6Q_DEBUG_UART_BASE IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT)
33
20static struct map_desc imx_lluart_desc = { 34static struct map_desc imx_lluart_desc = {
21#ifdef CONFIG_DEBUG_IMX6Q_UART2 35#ifdef CONFIG_DEBUG_IMX6Q_UART
22 .virtual = MX6Q_IO_P2V(MX6Q_UART2_BASE_ADDR), 36 .virtual = IMX_IO_P2V(IMX6Q_DEBUG_UART_BASE),
23 .pfn = __phys_to_pfn(MX6Q_UART2_BASE_ADDR), 37 .pfn = __phys_to_pfn(IMX6Q_DEBUG_UART_BASE),
24 .length = MX6Q_UART2_SIZE, 38 .length = 0x4000,
25 .type = MT_DEVICE,
26#endif
27#ifdef CONFIG_DEBUG_IMX6Q_UART4
28 .virtual = MX6Q_IO_P2V(MX6Q_UART4_BASE_ADDR),
29 .pfn = __phys_to_pfn(MX6Q_UART4_BASE_ADDR),
30 .length = MX6Q_UART4_SIZE,
31 .type = MT_DEVICE, 39 .type = MT_DEVICE,
32#endif 40#endif
33}; 41};
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 978b6dd00de4..9511142d436c 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -38,6 +38,40 @@
38#include "cpuidle.h" 38#include "cpuidle.h"
39#include "hardware.h" 39#include "hardware.h"
40 40
41#define IMX6Q_ANALOG_DIGPROG 0x260
42
43static int imx6q_revision(void)
44{
45 struct device_node *np;
46 void __iomem *base;
47 static u32 rev;
48
49 if (!rev) {
50 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
51 if (!np)
52 return IMX_CHIP_REVISION_UNKNOWN;
53 base = of_iomap(np, 0);
54 if (!base) {
55 of_node_put(np);
56 return IMX_CHIP_REVISION_UNKNOWN;
57 }
58 rev = readl_relaxed(base + IMX6Q_ANALOG_DIGPROG);
59 iounmap(base);
60 of_node_put(np);
61 }
62
63 switch (rev & 0xff) {
64 case 0:
65 return IMX_CHIP_REVISION_1_0;
66 case 1:
67 return IMX_CHIP_REVISION_1_1;
68 case 2:
69 return IMX_CHIP_REVISION_1_2;
70 default:
71 return IMX_CHIP_REVISION_UNKNOWN;
72 }
73}
74
41void imx6q_restart(char mode, const char *cmd) 75void imx6q_restart(char mode, const char *cmd)
42{ 76{
43 struct device_node *np; 77 struct device_node *np;
@@ -192,6 +226,7 @@ static void __init imx6q_timer_init(void)
192{ 226{
193 mx6q_clocks_init(); 227 mx6q_clocks_init();
194 twd_local_timer_of_register(); 228 twd_local_timer_of_register();
229 imx_print_silicon_rev("i.MX6Q", imx6q_revision());
195} 230}
196 231
197static struct sys_timer imx6q_timer = { 232static struct sys_timer imx6q_timer = {
diff --git a/arch/arm/mach-imx/mx6q.h b/arch/arm/mach-imx/mx6q.h
index f7e7dbac8f4b..19d3f54db5af 100644
--- a/arch/arm/mach-imx/mx6q.h
+++ b/arch/arm/mach-imx/mx6q.h
@@ -27,9 +27,5 @@
27#define MX6Q_CCM_SIZE 0x4000 27#define MX6Q_CCM_SIZE 0x4000
28#define MX6Q_ANATOP_BASE_ADDR 0x020c8000 28#define MX6Q_ANATOP_BASE_ADDR 0x020c8000
29#define MX6Q_ANATOP_SIZE 0x1000 29#define MX6Q_ANATOP_SIZE 0x1000
30#define MX6Q_UART2_BASE_ADDR 0x021e8000
31#define MX6Q_UART2_SIZE 0x4000
32#define MX6Q_UART4_BASE_ADDR 0x021f0000
33#define MX6Q_UART4_SIZE 0x4000
34 30
35#endif /* __MACH_MX6Q_H__ */ 31#endif /* __MACH_MX6Q_H__ */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-21 12:30:38 -0500