aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
authorPaul Walmsley <paul@pwsan.com>2012-09-27 12:33:34 -0400
committerTony Lindgren <tony@atomide.com>2012-10-18 19:23:20 -0400
commita135eaae524acba1509a3b19c97fae556e4da7cd (patch)
tree275d3c326c45152e7c8fc24d79db5ff3b9f8f338 /arch/arm
parent1fe9be8248ae9a04a09fcec7fed486d31e7f0897 (diff)
ARM: OMAP: remove plat/clock.h
Remove arch/arm/plat-omap/include/plat/clock.h by merging it into arch/arm/mach-omap1/clock.h and arch/arm/mach-omap2/clock.h. The goal here is to facilitate ARM single image kernels by removing includes via the "plat/" symlink. Signed-off-by: Paul Walmsley <paul@pwsan.com> [tony@atomide.com: fixed to remove duplicate clock.h includes] Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap1/board-nokia770.c2
-rw-r--r--arch/arm/mach-omap1/clock.c1
-rw-r--r--arch/arm/mach-omap1/clock.h153
-rw-r--r--arch/arm/mach-omap1/clock_data.c1
-rw-r--r--arch/arm/mach-omap1/pm.c3
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_apll.c1
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_dpll.c2
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_dpllcore.c2
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_osc.c2
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_sys.c2
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c2
-rw-r--r--arch/arm/mach-omap2/clkt34xx_dpll3m2.c2
-rw-r--r--arch/arm/mach-omap2/clkt_clksel.c2
-rw-r--r--arch/arm/mach-omap2/clkt_dpll.c2
-rw-r--r--arch/arm/mach-omap2/clkt_iclk.c1
-rw-r--r--arch/arm/mach-omap2/clock.c1
-rw-r--r--arch/arm/mach-omap2/clock.h284
-rw-r--r--arch/arm/mach-omap2/clock2430.c2
-rw-r--r--arch/arm/mach-omap2/clock2xxx.c2
-rw-r--r--arch/arm/mach-omap2/clock34xx.c2
-rw-r--r--arch/arm/mach-omap2/clock3517.c2
-rw-r--r--arch/arm/mach-omap2/clock36xx.c2
-rw-r--r--arch/arm/mach-omap2/clock3xxx.c2
-rw-r--r--arch/arm/mach-omap2/clockdomain.c2
-rw-r--r--arch/arm/mach-omap2/clockdomain.h2
-rw-r--r--arch/arm/mach-omap2/common.c2
-rw-r--r--arch/arm/mach-omap2/dpll3xxx.c2
-rw-r--r--arch/arm/mach-omap2/dpll44xx.c2
-rw-r--r--arch/arm/mach-omap2/omap_device.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c2
-rw-r--r--arch/arm/mach-omap2/pm-debug.c2
-rw-r--r--arch/arm/mach-omap2/pm24xx.c2
-rw-r--r--arch/arm/mach-omap2/sdram-nokia.c2
-rw-r--r--arch/arm/mach-omap2/sdrc.c4
-rw-r--r--arch/arm/mach-omap2/sdrc2xxx.c2
-rw-r--r--arch/arm/plat-omap/counter_32k.c1
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h309
37 files changed, 445 insertions, 365 deletions
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 8b3b60a215cb..3e8ead67e459 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -29,12 +29,12 @@
29#include <asm/mach/map.h> 29#include <asm/mach/map.h>
30 30
31#include <mach/mux.h> 31#include <mach/mux.h>
32#include <plat/clock.h>
33 32
34#include <mach/hardware.h> 33#include <mach/hardware.h>
35#include <mach/usb.h> 34#include <mach/usb.h>
36 35
37#include "common.h" 36#include "common.h"
37#include "clock.h"
38#include "mmc.h" 38#include "mmc.h"
39 39
40#define ADS7846_PENDOWN_GPIO 15 40#define ADS7846_PENDOWN_GPIO 15
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index f46206eb3a15..306772c1c23c 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -24,7 +24,6 @@
24 24
25#include <plat/cpu.h> 25#include <plat/cpu.h>
26#include <plat/usb.h> 26#include <plat/usb.h>
27#include <plat/clock.h>
28#include <plat/clkdev_omap.h> 27#include <plat/clkdev_omap.h>
29 28
30#include <mach/hardware.h> 29#include <mach/hardware.h>
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index 3d04f4f67676..155ddd922c17 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -14,8 +14,159 @@
14#define __ARCH_ARM_MACH_OMAP1_CLOCK_H 14#define __ARCH_ARM_MACH_OMAP1_CLOCK_H
15 15
16#include <linux/clk.h> 16#include <linux/clk.h>
17#include <linux/list.h>
17 18
18#include <plat/clock.h> 19struct module;
20struct clk;
21
22/* Temporary, needed during the common clock framework conversion */
23#define __clk_get_name(clk) (clk->name)
24#define __clk_get_parent(clk) (clk->parent)
25#define __clk_get_rate(clk) (clk->rate)
26
27/**
28 * struct clkops - some clock function pointers
29 * @enable: fn ptr that enables the current clock in hardware
30 * @disable: fn ptr that enables the current clock in hardware
31 * @find_idlest: function returning the IDLEST register for the clock's IP blk
32 * @find_companion: function returning the "companion" clk reg for the clock
33 * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
34 * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
35 *
36 * A "companion" clk is an accompanying clock to the one being queried
37 * that must be enabled for the IP module connected to the clock to
38 * become accessible by the hardware. Neither @find_idlest nor
39 * @find_companion should be needed; that information is IP
40 * block-specific; the hwmod code has been created to handle this, but
41 * until hwmod data is ready and drivers have been converted to use PM
42 * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
43 * @find_companion must, unfortunately, remain.
44 */
45struct clkops {
46 int (*enable)(struct clk *);
47 void (*disable)(struct clk *);
48 void (*find_idlest)(struct clk *, void __iomem **,
49 u8 *, u8 *);
50 void (*find_companion)(struct clk *, void __iomem **,
51 u8 *);
52 void (*allow_idle)(struct clk *);
53 void (*deny_idle)(struct clk *);
54};
55
56/*
57 * struct clk.flags possibilities
58 *
59 * XXX document the rest of the clock flags here
60 *
61 * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
62 * bits share the same register. This flag allows the
63 * omap4_dpllmx*() code to determine which GATE_CTRL bit field
64 * should be used. This is a temporary solution - a better approach
65 * would be to associate clock type-specific data with the clock,
66 * similar to the struct dpll_data approach.
67 */
68#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
69#define CLOCK_IDLE_CONTROL (1 << 1)
70#define CLOCK_NO_IDLE_PARENT (1 << 2)
71#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
72#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
73#define CLOCK_CLKOUTX2 (1 << 5)
74
75/**
76 * struct clk - OMAP struct clk
77 * @node: list_head connecting this clock into the full clock list
78 * @ops: struct clkops * for this clock
79 * @name: the name of the clock in the hardware (used in hwmod data and debug)
80 * @parent: pointer to this clock's parent struct clk
81 * @children: list_head connecting to the child clks' @sibling list_heads
82 * @sibling: list_head connecting this clk to its parent clk's @children
83 * @rate: current clock rate
84 * @enable_reg: register to write to enable the clock (see @enable_bit)
85 * @recalc: fn ptr that returns the clock's current rate
86 * @set_rate: fn ptr that can change the clock's current rate
87 * @round_rate: fn ptr that can round the clock's current rate
88 * @init: fn ptr to do clock-specific initialization
89 * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
90 * @usecount: number of users that have requested this clock to be enabled
91 * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
92 * @flags: see "struct clk.flags possibilities" above
93 * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
94 * @src_offset: bitshift for source selection bitfield (OMAP1 only)
95 *
96 * XXX @rate_offset, @src_offset should probably be removed and OMAP1
97 * clock code converted to use clksel.
98 *
99 * XXX @usecount is poorly named. It should be "enable_count" or
100 * something similar. "users" in the description refers to kernel
101 * code (core code or drivers) that have called clk_enable() and not
102 * yet called clk_disable(); the usecount of parent clocks is also
103 * incremented by the clock code when clk_enable() is called on child
104 * clocks and decremented by the clock code when clk_disable() is
105 * called on child clocks.
106 *
107 * XXX @clkdm, @usecount, @children, @sibling should be marked for
108 * internal use only.
109 *
110 * @children and @sibling are used to optimize parent-to-child clock
111 * tree traversals. (child-to-parent traversals use @parent.)
112 *
113 * XXX The notion of the clock's current rate probably needs to be
114 * separated from the clock's target rate.
115 */
116struct clk {
117 struct list_head node;
118 const struct clkops *ops;
119 const char *name;
120 struct clk *parent;
121 struct list_head children;
122 struct list_head sibling; /* node for children */
123 unsigned long rate;
124 void __iomem *enable_reg;
125 unsigned long (*recalc)(struct clk *);
126 int (*set_rate)(struct clk *, unsigned long);
127 long (*round_rate)(struct clk *, unsigned long);
128 void (*init)(struct clk *);
129 u8 enable_bit;
130 s8 usecount;
131 u8 fixed_div;
132 u8 flags;
133 u8 rate_offset;
134 u8 src_offset;
135#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
136 struct dentry *dent; /* For visible tree hierarchy */
137#endif
138};
139
140struct clk_functions {
141 int (*clk_enable)(struct clk *clk);
142 void (*clk_disable)(struct clk *clk);
143 long (*clk_round_rate)(struct clk *clk, unsigned long rate);
144 int (*clk_set_rate)(struct clk *clk, unsigned long rate);
145 int (*clk_set_parent)(struct clk *clk, struct clk *parent);
146 void (*clk_allow_idle)(struct clk *clk);
147 void (*clk_deny_idle)(struct clk *clk);
148 void (*clk_disable_unused)(struct clk *clk);
149};
150
151extern int mpurate;
152
153extern int clk_init(struct clk_functions *custom_clocks);
154extern void clk_preinit(struct clk *clk);
155extern int clk_register(struct clk *clk);
156extern void clk_reparent(struct clk *child, struct clk *parent);
157extern void clk_unregister(struct clk *clk);
158extern void propagate_rate(struct clk *clk);
159extern void recalculate_root_clocks(void);
160extern unsigned long followparent_recalc(struct clk *clk);
161extern void clk_enable_init_clocks(void);
162unsigned long omap_fixed_divisor_recalc(struct clk *clk);
163extern struct clk *omap_clk_get_by_name(const char *name);
164extern int omap_clk_enable_autoidle_all(void);
165extern int omap_clk_disable_autoidle_all(void);
166
167extern const struct clkops clkops_null;
168
169extern struct clk dummy_ck;
19 170
20int omap1_clk_init(void); 171int omap1_clk_init(void);
21void omap1_clk_late_init(void); 172void omap1_clk_late_init(void);
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 28e58eb163f2..8f4ae755010d 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -22,7 +22,6 @@
22 22
23#include <asm/mach-types.h> /* for machine_is_* */ 23#include <asm/mach-types.h> /* for machine_is_* */
24 24
25#include <plat/clock.h>
26#include <plat/cpu.h> 25#include <plat/cpu.h>
27#include <plat/clkdev_omap.h> 26#include <plat/clkdev_omap.h>
28 27
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index fa8e672a26c5..b2c2328d7c18 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -49,8 +49,6 @@
49#include <asm/mach/time.h> 49#include <asm/mach/time.h>
50#include <asm/mach/irq.h> 50#include <asm/mach/irq.h>
51 51
52#include <plat/cpu.h>
53#include <plat/clock.h>
54#include <mach/tc.h> 52#include <mach/tc.h>
55#include <mach/mux.h> 53#include <mach/mux.h>
56#include <plat-omap/dma-omap.h> 54#include <plat-omap/dma-omap.h>
@@ -61,6 +59,7 @@
61#include "../plat-omap/sram.h" 59#include "../plat-omap/sram.h"
62 60
63#include "iomap.h" 61#include "iomap.h"
62#include "clock.h"
64#include "pm.h" 63#include "pm.h"
65 64
66static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE]; 65static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE];
diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c
index c2d15212d64d..73a1414b89b0 100644
--- a/arch/arm/mach-omap2/clkt2xxx_apll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_apll.c
@@ -21,7 +21,6 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <plat/clock.h>
25#include <plat/prcm.h> 24#include <plat/prcm.h>
26 25
27#include "clock.h" 26#include "clock.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpll.c b/arch/arm/mach-omap2/clkt2xxx_dpll.c
index 1502a7bc20bb..0890ba94a282 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpll.c
@@ -14,8 +14,6 @@
14#include <linux/clk.h> 14#include <linux/clk.h>
15#include <linux/io.h> 15#include <linux/io.h>
16 16
17#include <plat/clock.h>
18
19#include "clock.h" 17#include "clock.h"
20#include "cm2xxx_3xxx.h" 18#include "cm2xxx_3xxx.h"
21#include "cm-regbits-24xx.h" 19#include "cm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index 6a02f9bcb0f9..3432f913f743 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -25,8 +25,6 @@
25#include <linux/clk.h> 25#include <linux/clk.h>
26#include <linux/io.h> 26#include <linux/io.h>
27 27
28#include <plat/clock.h>
29
30#include "../plat-omap/sram.h" 28#include "../plat-omap/sram.h"
31 29
32#include "clock.h" 30#include "clock.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_osc.c b/arch/arm/mach-omap2/clkt2xxx_osc.c
index c3460928b5e0..e1777371bb5e 100644
--- a/arch/arm/mach-omap2/clkt2xxx_osc.c
+++ b/arch/arm/mach-omap2/clkt2xxx_osc.c
@@ -23,8 +23,6 @@
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/io.h> 24#include <linux/io.h>
25 25
26#include <plat/clock.h>
27
28#include "clock.h" 26#include "clock.h"
29#include "clock2xxx.h" 27#include "clock2xxx.h"
30#include "prm2xxx_3xxx.h" 28#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_sys.c b/arch/arm/mach-omap2/clkt2xxx_sys.c
index 8693cfdac49a..46683b3c2461 100644
--- a/arch/arm/mach-omap2/clkt2xxx_sys.c
+++ b/arch/arm/mach-omap2/clkt2xxx_sys.c
@@ -22,8 +22,6 @@
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/io.h> 23#include <linux/io.h>
24 24
25#include <plat/clock.h>
26
27#include "clock.h" 25#include "clock.h"
28#include "clock2xxx.h" 26#include "clock2xxx.h"
29#include "prm2xxx_3xxx.h" 27#include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index cf16655b2988..c66276b2bf0a 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -33,8 +33,6 @@
33#include <linux/cpufreq.h> 33#include <linux/cpufreq.h>
34#include <linux/slab.h> 34#include <linux/slab.h>
35 35
36#include <plat/clock.h>
37
38#include "../plat-omap/sram.h" 36#include "../plat-omap/sram.h"
39 37
40#include "soc.h" 38#include "soc.h"
diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index da38e7e46d60..5510d92abe6e 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -21,8 +21,6 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <plat/clock.h>
25
26#include "../plat-omap/sram.h" 24#include "../plat-omap/sram.h"
27 25
28#include "clock.h" 26#include "clock.h"
diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach-omap2/clkt_clksel.c
index 3ff22114d702..53646facda45 100644
--- a/arch/arm/mach-omap2/clkt_clksel.c
+++ b/arch/arm/mach-omap2/clkt_clksel.c
@@ -45,8 +45,6 @@
45#include <linux/io.h> 45#include <linux/io.h>
46#include <linux/bug.h> 46#include <linux/bug.h>
47 47
48#include <plat/clock.h>
49
50#include "clock.h" 48#include "clock.h"
51 49
52/* Private functions */ 50/* Private functions */
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index 80411142f482..8463cc356245 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -21,8 +21,6 @@
21 21
22#include <asm/div64.h> 22#include <asm/div64.h>
23 23
24#include <plat/clock.h>
25
26#include "soc.h" 24#include "soc.h"
27#include "clock.h" 25#include "clock.h"
28#include "cm-regbits-24xx.h" 26#include "cm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/clkt_iclk.c b/arch/arm/mach-omap2/clkt_iclk.c
index 3d43fba2542f..7c8d41e49834 100644
--- a/arch/arm/mach-omap2/clkt_iclk.c
+++ b/arch/arm/mach-omap2/clkt_iclk.c
@@ -14,7 +14,6 @@
14#include <linux/clk.h> 14#include <linux/clk.h>
15#include <linux/io.h> 15#include <linux/io.h>
16 16
17#include <plat/clock.h>
18#include <plat/prcm.h> 17#include <plat/prcm.h>
19 18
20#include "clock.h" 19#include "clock.h"
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 33f5b5de86c3..8b30759f8f9e 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -26,7 +26,6 @@
26 26
27#include <asm/cpu.h> 27#include <asm/cpu.h>
28 28
29#include <plat/clock.h>
30#include <plat/prcm.h> 29#include <plat/prcm.h>
31 30
32#include <trace/events/power.h> 31#include <trace/events/power.h>
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 35ec5f3d9a73..c3bf8c2e431d 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -17,8 +17,290 @@
17#define __ARCH_ARM_MACH_OMAP2_CLOCK_H 17#define __ARCH_ARM_MACH_OMAP2_CLOCK_H
18 18
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/list.h>
21
22struct module;
23struct clk;
24struct clockdomain;
25
26/* Temporary, needed during the common clock framework conversion */
27#define __clk_get_name(clk) (clk->name)
28#define __clk_get_parent(clk) (clk->parent)
29#define __clk_get_rate(clk) (clk->rate)
30
31/**
32 * struct clkops - some clock function pointers
33 * @enable: fn ptr that enables the current clock in hardware
34 * @disable: fn ptr that enables the current clock in hardware
35 * @find_idlest: function returning the IDLEST register for the clock's IP blk
36 * @find_companion: function returning the "companion" clk reg for the clock
37 * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
38 * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
39 *
40 * A "companion" clk is an accompanying clock to the one being queried
41 * that must be enabled for the IP module connected to the clock to
42 * become accessible by the hardware. Neither @find_idlest nor
43 * @find_companion should be needed; that information is IP
44 * block-specific; the hwmod code has been created to handle this, but
45 * until hwmod data is ready and drivers have been converted to use PM
46 * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
47 * @find_companion must, unfortunately, remain.
48 */
49struct clkops {
50 int (*enable)(struct clk *);
51 void (*disable)(struct clk *);
52 void (*find_idlest)(struct clk *, void __iomem **,
53 u8 *, u8 *);
54 void (*find_companion)(struct clk *, void __iomem **,
55 u8 *);
56 void (*allow_idle)(struct clk *);
57 void (*deny_idle)(struct clk *);
58};
59
60/* struct clksel_rate.flags possibilities */
61#define RATE_IN_242X (1 << 0)
62#define RATE_IN_243X (1 << 1)
63#define RATE_IN_3430ES1 (1 << 2) /* 3430ES1 rates only */
64#define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */
65#define RATE_IN_36XX (1 << 4)
66#define RATE_IN_4430 (1 << 5)
67#define RATE_IN_TI816X (1 << 6)
68#define RATE_IN_4460 (1 << 7)
69#define RATE_IN_AM33XX (1 << 8)
70#define RATE_IN_TI814X (1 << 9)
71
72#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
73#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
74#define RATE_IN_3XXX (RATE_IN_34XX | RATE_IN_36XX)
75#define RATE_IN_44XX (RATE_IN_4430 | RATE_IN_4460)
76
77/* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */
78#define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX)
79
80
81/**
82 * struct clksel_rate - register bitfield values corresponding to clk divisors
83 * @val: register bitfield value (shifted to bit 0)
84 * @div: clock divisor corresponding to @val
85 * @flags: (see "struct clksel_rate.flags possibilities" above)
86 *
87 * @val should match the value of a read from struct clk.clksel_reg
88 * AND'ed with struct clk.clksel_mask, shifted right to bit 0.
89 *
90 * @div is the divisor that should be applied to the parent clock's rate
91 * to produce the current clock's rate.
92 */
93struct clksel_rate {
94 u32 val;
95 u8 div;
96 u16 flags;
97};
98
99/**
100 * struct clksel - available parent clocks, and a pointer to their divisors
101 * @parent: struct clk * to a possible parent clock
102 * @rates: available divisors for this parent clock
103 *
104 * A struct clksel is always associated with one or more struct clks
105 * and one or more struct clksel_rates.
106 */
107struct clksel {
108 struct clk *parent;
109 const struct clksel_rate *rates;
110};
111
112/**
113 * struct dpll_data - DPLL registers and integration data
114 * @mult_div1_reg: register containing the DPLL M and N bitfields
115 * @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg
116 * @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg
117 * @clk_bypass: struct clk pointer to the clock's bypass clock input
118 * @clk_ref: struct clk pointer to the clock's reference clock input
119 * @control_reg: register containing the DPLL mode bitfield
120 * @enable_mask: mask of the DPLL mode bitfield in @control_reg
121 * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate()
122 * @last_rounded_m: cache of the last M result of omap2_dpll_round_rate()
123 * @max_multiplier: maximum valid non-bypass multiplier value (actual)
124 * @last_rounded_n: cache of the last N result of omap2_dpll_round_rate()
125 * @min_divider: minimum valid non-bypass divider value (actual)
126 * @max_divider: maximum valid non-bypass divider value (actual)
127 * @modes: possible values of @enable_mask
128 * @autoidle_reg: register containing the DPLL autoidle mode bitfield
129 * @idlest_reg: register containing the DPLL idle status bitfield
130 * @autoidle_mask: mask of the DPLL autoidle mode bitfield in @autoidle_reg
131 * @freqsel_mask: mask of the DPLL jitter correction bitfield in @control_reg
132 * @idlest_mask: mask of the DPLL idle status bitfield in @idlest_reg
133 * @auto_recal_bit: bitshift of the driftguard enable bit in @control_reg
134 * @recal_en_bit: bitshift of the PRM_IRQENABLE_* bit for recalibration IRQs
135 * @recal_st_bit: bitshift of the PRM_IRQSTATUS_* bit for recalibration IRQs
136 * @flags: DPLL type/features (see below)
137 *
138 * Possible values for @flags:
139 * DPLL_J_TYPE: "J-type DPLL" (only some 36xx, 4xxx DPLLs)
140 *
141 * @freqsel_mask is only used on the OMAP34xx family and AM35xx.
142 *
143 * XXX Some DPLLs have multiple bypass inputs, so it's not technically
144 * correct to only have one @clk_bypass pointer.
145 *
146 * XXX The runtime-variable fields (@last_rounded_rate, @last_rounded_m,
147 * @last_rounded_n) should be separated from the runtime-fixed fields
148 * and placed into a different structure, so that the runtime-fixed data
149 * can be placed into read-only space.
150 */
151struct dpll_data {
152 void __iomem *mult_div1_reg;
153 u32 mult_mask;
154 u32 div1_mask;
155 struct clk *clk_bypass;
156 struct clk *clk_ref;
157 void __iomem *control_reg;
158 u32 enable_mask;
159 unsigned long last_rounded_rate;
160 u16 last_rounded_m;
161 u16 max_multiplier;
162 u8 last_rounded_n;
163 u8 min_divider;
164 u16 max_divider;
165 u8 modes;
166 void __iomem *autoidle_reg;
167 void __iomem *idlest_reg;
168 u32 autoidle_mask;
169 u32 freqsel_mask;
170 u32 idlest_mask;
171 u32 dco_mask;
172 u32 sddiv_mask;
173 u8 auto_recal_bit;
174 u8 recal_en_bit;
175 u8 recal_st_bit;
176 u8 flags;
177};
178
179/*
180 * struct clk.flags possibilities
181 *
182 * XXX document the rest of the clock flags here
183 *
184 * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
185 * bits share the same register. This flag allows the
186 * omap4_dpllmx*() code to determine which GATE_CTRL bit field
187 * should be used. This is a temporary solution - a better approach
188 * would be to associate clock type-specific data with the clock,
189 * similar to the struct dpll_data approach.
190 */
191#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
192#define CLOCK_IDLE_CONTROL (1 << 1)
193#define CLOCK_NO_IDLE_PARENT (1 << 2)
194#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
195#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
196#define CLOCK_CLKOUTX2 (1 << 5)
197
198/**
199 * struct clk - OMAP struct clk
200 * @node: list_head connecting this clock into the full clock list
201 * @ops: struct clkops * for this clock
202 * @name: the name of the clock in the hardware (used in hwmod data and debug)
203 * @parent: pointer to this clock's parent struct clk
204 * @children: list_head connecting to the child clks' @sibling list_heads
205 * @sibling: list_head connecting this clk to its parent clk's @children
206 * @rate: current clock rate
207 * @enable_reg: register to write to enable the clock (see @enable_bit)
208 * @recalc: fn ptr that returns the clock's current rate
209 * @set_rate: fn ptr that can change the clock's current rate
210 * @round_rate: fn ptr that can round the clock's current rate
211 * @init: fn ptr to do clock-specific initialization
212 * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
213 * @usecount: number of users that have requested this clock to be enabled
214 * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
215 * @flags: see "struct clk.flags possibilities" above
216 * @clksel_reg: for clksel clks, register va containing src/divisor select
217 * @clksel_mask: bitmask in @clksel_reg for the src/divisor selector
218 * @clksel: for clksel clks, pointer to struct clksel for this clock
219 * @dpll_data: for DPLLs, pointer to struct dpll_data for this clock
220 * @clkdm_name: clockdomain name that this clock is contained in
221 * @clkdm: pointer to struct clockdomain, resolved from @clkdm_name at runtime
222 * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
223 * @src_offset: bitshift for source selection bitfield (OMAP1 only)
224 *
225 * XXX @rate_offset, @src_offset should probably be removed and OMAP1
226 * clock code converted to use clksel.
227 *
228 * XXX @usecount is poorly named. It should be "enable_count" or
229 * something similar. "users" in the description refers to kernel
230 * code (core code or drivers) that have called clk_enable() and not
231 * yet called clk_disable(); the usecount of parent clocks is also
232 * incremented by the clock code when clk_enable() is called on child
233 * clocks and decremented by the clock code when clk_disable() is
234 * called on child clocks.
235 *
236 * XXX @clkdm, @usecount, @children, @sibling should be marked for
237 * internal use only.
238 *
239 * @children and @sibling are used to optimize parent-to-child clock
240 * tree traversals. (child-to-parent traversals use @parent.)
241 *
242 * XXX The notion of the clock's current rate probably needs to be
243 * separated from the clock's target rate.
244 */
245struct clk {
246 struct list_head node;
247 const struct clkops *ops;
248 const char *name;
249 struct clk *parent;
250 struct list_head children;
251 struct list_head sibling; /* node for children */
252 unsigned long rate;
253 void __iomem *enable_reg;
254 unsigned long (*recalc)(struct clk *);
255 int (*set_rate)(struct clk *, unsigned long);
256 long (*round_rate)(struct clk *, unsigned long);
257 void (*init)(struct clk *);
258 u8 enable_bit;
259 s8 usecount;
260 u8 fixed_div;
261 u8 flags;
262 void __iomem *clksel_reg;
263 u32 clksel_mask;
264 const struct clksel *clksel;
265 struct dpll_data *dpll_data;
266 const char *clkdm_name;
267 struct clockdomain *clkdm;
268#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
269 struct dentry *dent; /* For visible tree hierarchy */
270#endif
271};
272
273struct clk_functions {
274 int (*clk_enable)(struct clk *clk);
275 void (*clk_disable)(struct clk *clk);
276 long (*clk_round_rate)(struct clk *clk, unsigned long rate);
277 int (*clk_set_rate)(struct clk *clk, unsigned long rate);
278 int (*clk_set_parent)(struct clk *clk, struct clk *parent);
279 void (*clk_allow_idle)(struct clk *clk);
280 void (*clk_deny_idle)(struct clk *clk);
281 void (*clk_disable_unused)(struct clk *clk);
282};
283
284extern int mpurate;
285
286extern int clk_init(struct clk_functions *custom_clocks);
287extern void clk_preinit(struct clk *clk);
288extern int clk_register(struct clk *clk);
289extern void clk_reparent(struct clk *child, struct clk *parent);
290extern void clk_unregister(struct clk *clk);
291extern void propagate_rate(struct clk *clk);
292extern void recalculate_root_clocks(void);
293extern unsigned long followparent_recalc(struct clk *clk);
294extern void clk_enable_init_clocks(void);
295unsigned long omap_fixed_divisor_recalc(struct clk *clk);
296extern struct clk *omap_clk_get_by_name(const char *name);
297extern int omap_clk_enable_autoidle_all(void);
298extern int omap_clk_disable_autoidle_all(void);
299
300extern const struct clkops clkops_null;
301
302extern struct clk dummy_ck;
20 303
21#include <plat/clock.h>
22 304
23/* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */ 305/* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */
24#define CORE_CLK_SRC_32K 0x0 306#define CORE_CLK_SRC_32K 0x0
diff --git a/arch/arm/mach-omap2/clock2430.c b/arch/arm/mach-omap2/clock2430.c
index a8e326177466..850f83e8954f 100644
--- a/arch/arm/mach-omap2/clock2430.c
+++ b/arch/arm/mach-omap2/clock2430.c
@@ -21,8 +21,6 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <plat/clock.h>
25
26#include "soc.h" 24#include "soc.h"
27#include "iomap.h" 25#include "iomap.h"
28#include "clock.h" 26#include "clock.h"
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index e92be1fc1a00..5feee16fee0e 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -22,8 +22,6 @@
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/io.h> 23#include <linux/io.h>
24 24
25#include <plat/clock.h>
26
27#include "soc.h" 25#include "soc.h"
28#include "clock.h" 26#include "clock.h"
29#include "clock2xxx.h" 27#include "clock2xxx.h"
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 1fc96b9ee330..baaaa4258708 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -21,8 +21,6 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <plat/clock.h>
25
26#include "clock.h" 24#include "clock.h"
27#include "clock34xx.h" 25#include "clock34xx.h"
28#include "cm2xxx_3xxx.h" 26#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clock3517.c b/arch/arm/mach-omap2/clock3517.c
index 2e97d08f0e56..80209050cd7a 100644
--- a/arch/arm/mach-omap2/clock3517.c
+++ b/arch/arm/mach-omap2/clock3517.c
@@ -21,8 +21,6 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <plat/clock.h>
25
26#include "clock.h" 24#include "clock.h"
27#include "clock3517.h" 25#include "clock3517.h"
28#include "cm2xxx_3xxx.h" 26#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clock36xx.c b/arch/arm/mach-omap2/clock36xx.c
index 0c5e25ed8879..0e1e9e4e2fa4 100644
--- a/arch/arm/mach-omap2/clock36xx.c
+++ b/arch/arm/mach-omap2/clock36xx.c
@@ -22,8 +22,6 @@
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/io.h> 23#include <linux/io.h>
24 24
25#include <plat/clock.h>
26
27#include "clock.h" 25#include "clock.h"
28#include "clock36xx.h" 26#include "clock36xx.h"
29 27
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c
index 83bb01427d40..3e8aca2b1b61 100644
--- a/arch/arm/mach-omap2/clock3xxx.c
+++ b/arch/arm/mach-omap2/clock3xxx.c
@@ -21,8 +21,6 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <plat/clock.h>
25
26#include "soc.h" 24#include "soc.h"
27#include "clock.h" 25#include "clock.h"
28#include "clock3xxx.h" 26#include "clock3xxx.h"
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index cbb879139c51..32dbcbc3ee6d 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -27,7 +27,7 @@
27 27
28#include <linux/bitops.h> 28#include <linux/bitops.h>
29 29
30#include <plat/clock.h> 30#include "clock.h"
31#include "clockdomain.h" 31#include "clockdomain.h"
32 32
33/* clkdm_list contains all registered struct clockdomains */ 33/* clkdm_list contains all registered struct clockdomains */
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index a868c0296265..53e8ba06620b 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -18,7 +18,7 @@
18#include <linux/spinlock.h> 18#include <linux/spinlock.h>
19 19
20#include "powerdomain.h" 20#include "powerdomain.h"
21#include <plat/clock.h> 21#include "clock.h"
22#include "omap_hwmod.h" 22#include "omap_hwmod.h"
23#include <plat/cpu.h> 23#include <plat/cpu.h>
24 24
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index b0f21b7d3760..34fb5b95859b 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -18,12 +18,12 @@
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/platform_data/dsp-omap.h> 19#include <linux/platform_data/dsp-omap.h>
20 20
21#include <plat/clock.h>
22#include <plat/vram.h> 21#include <plat/vram.h>
23 22
24#include "soc.h" 23#include "soc.h"
25#include "iomap.h" 24#include "iomap.h"
26#include "common.h" 25#include "common.h"
26#include "clock.h"
27#include "sdrc.h" 27#include "sdrc.h"
28#include "control.h" 28#include "control.h"
29#include "omap-secure.h" 29#include "omap-secure.h"
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 814e1808e158..eacf51f2bc27 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -28,8 +28,6 @@
28#include <linux/bitops.h> 28#include <linux/bitops.h>
29#include <linux/clkdev.h> 29#include <linux/clkdev.h>
30 30
31#include <plat/clock.h>
32
33#include "soc.h" 31#include "soc.h"
34#include "clock.h" 32#include "clock.h"
35#include "cm2xxx_3xxx.h" 33#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c
index 09d0ccccb861..5854da168a9c 100644
--- a/arch/arm/mach-omap2/dpll44xx.c
+++ b/arch/arm/mach-omap2/dpll44xx.c
@@ -15,8 +15,6 @@
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/bitops.h> 16#include <linux/bitops.h>
17 17
18#include <plat/clock.h>
19
20#include "soc.h" 18#include "soc.h"
21#include "clock.h" 19#include "clock.h"
22#include "clock44xx.h" 20#include "clock44xx.h"
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index 2e6d33730b25..0ef934fec364 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -91,7 +91,6 @@
91 91
92#include "omap_device.h" 92#include "omap_device.h"
93#include "omap_hwmod.h" 93#include "omap_hwmod.h"
94#include <plat/clock.h>
95 94
96/* These parameters are passed to _omap_device_{de,}activate() */ 95/* These parameters are passed to _omap_device_{de,}activate() */
97#define USE_WAKEUP_LAT 0 96#define USE_WAKEUP_LAT 0
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 3dc482a1a75f..87eee3b62a3c 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -139,7 +139,7 @@
139#include <linux/slab.h> 139#include <linux/slab.h>
140#include <linux/bootmem.h> 140#include <linux/bootmem.h>
141 141
142#include <plat/clock.h> 142#include "clock.h"
143#include "omap_hwmod.h" 143#include "omap_hwmod.h"
144#include <plat/prcm.h> 144#include <plat/prcm.h>
145 145
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index b91283edf415..140eb7939e60 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -27,7 +27,7 @@
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/slab.h> 28#include <linux/slab.h>
29 29
30#include <plat/clock.h> 30#include "clock.h"
31#include "powerdomain.h" 31#include "powerdomain.h"
32#include "clockdomain.h" 32#include "clockdomain.h"
33#include <plat/dmtimer.h> 33#include <plat/dmtimer.h>
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 94c838e0175b..be8989e6d78c 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -36,12 +36,12 @@
36#include <asm/mach-types.h> 36#include <asm/mach-types.h>
37#include <asm/system_misc.h> 37#include <asm/system_misc.h>
38 38
39#include <plat/clock.h>
40#include <plat-omap/dma-omap.h> 39#include <plat-omap/dma-omap.h>
41 40
42#include "../plat-omap/sram.h" 41#include "../plat-omap/sram.h"
43 42
44#include "common.h" 43#include "common.h"
44#include "clock.h"
45#include "prm2xxx_3xxx.h" 45#include "prm2xxx_3xxx.h"
46#include "prm-regbits-24xx.h" 46#include "prm-regbits-24xx.h"
47#include "cm2xxx_3xxx.h" 47#include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c
index 5e5702cd410d..0fa7ffa9b5ed 100644
--- a/arch/arm/mach-omap2/sdram-nokia.c
+++ b/arch/arm/mach-omap2/sdram-nokia.c
@@ -18,8 +18,6 @@
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include "common.h" 20#include "common.h"
21#include <plat/clock.h>
22
23#include "sdram-nokia.h" 21#include "sdram-nokia.h"
24#include "sdrc.h" 22#include "sdrc.h"
25 23
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index c55543729863..94d4082f87ed 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -23,10 +23,10 @@
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/io.h> 24#include <linux/io.h>
25 25
26#include "common.h"
27#include <plat/clock.h>
28#include "../plat-omap/sram.h" 26#include "../plat-omap/sram.h"
29 27
28#include "common.h"
29#include "clock.h"
30#include "sdrc.h" 30#include "sdrc.h"
31 31
32static struct omap_sdrc_params *sdrc_init_params_cs0, *sdrc_init_params_cs1; 32static struct omap_sdrc_params *sdrc_init_params_cs0, *sdrc_init_params_cs1;
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c
index c131f1ee6eff..3b8bfdf848d5 100644
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@ -24,8 +24,6 @@
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/io.h> 25#include <linux/io.h>
26 26
27#include <plat/clock.h>
28
29#include "../plat-omap/sram.h" 27#include "../plat-omap/sram.h"
30 28
31#include "soc.h" 29#include "soc.h"
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 8e847de4c744..66bf3f9324fe 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -23,7 +23,6 @@
23#include <asm/sched_clock.h> 23#include <asm/sched_clock.h>
24 24
25#include "common.h" 25#include "common.h"
26#include <plat/clock.h>
27 26
28/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */ 27/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
29#define OMAP2_32KSYNCNT_REV_OFF 0x0 28#define OMAP2_32KSYNCNT_REV_OFF 0x0
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
deleted file mode 100644
index e2e2d045e428..000000000000
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ /dev/null
@@ -1,309 +0,0 @@
1/*
2 * OMAP clock: data structure definitions, function prototypes, shared macros
3 *
4 * Copyright (C) 2004-2005, 2008-2010 Nokia Corporation
5 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
6 * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ARCH_ARM_OMAP_CLOCK_H
14#define __ARCH_ARM_OMAP_CLOCK_H
15
16#include <linux/list.h>
17
18struct module;
19struct clk;
20struct clockdomain;
21
22/* Temporary, needed during the common clock framework conversion */
23#define __clk_get_name(clk) (clk->name)
24#define __clk_get_parent(clk) (clk->parent)
25#define __clk_get_rate(clk) (clk->rate)
26
27/**
28 * struct clkops - some clock function pointers
29 * @enable: fn ptr that enables the current clock in hardware
30 * @disable: fn ptr that enables the current clock in hardware
31 * @find_idlest: function returning the IDLEST register for the clock's IP blk
32 * @find_companion: function returning the "companion" clk reg for the clock
33 * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
34 * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
35 *
36 * A "companion" clk is an accompanying clock to the one being queried
37 * that must be enabled for the IP module connected to the clock to
38 * become accessible by the hardware. Neither @find_idlest nor
39 * @find_companion should be needed; that information is IP
40 * block-specific; the hwmod code has been created to handle this, but
41 * until hwmod data is ready and drivers have been converted to use PM
42 * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
43 * @find_companion must, unfortunately, remain.
44 */
45struct clkops {
46 int (*enable)(struct clk *);
47 void (*disable)(struct clk *);
48 void (*find_idlest)(struct clk *, void __iomem **,
49 u8 *, u8 *);
50 void (*find_companion)(struct clk *, void __iomem **,
51 u8 *);
52 void (*allow_idle)(struct clk *);
53 void (*deny_idle)(struct clk *);
54};
55
56#ifdef CONFIG_ARCH_OMAP2PLUS
57
58/* struct clksel_rate.flags possibilities */
59#define RATE_IN_242X (1 << 0)
60#define RATE_IN_243X (1 << 1)
61#define RATE_IN_3430ES1 (1 << 2) /* 3430ES1 rates only */
62#define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */
63#define RATE_IN_36XX (1 << 4)
64#define RATE_IN_4430 (1 << 5)
65#define RATE_IN_TI816X (1 << 6)
66#define RATE_IN_4460 (1 << 7)
67#define RATE_IN_AM33XX (1 << 8)
68#define RATE_IN_TI814X (1 << 9)
69
70#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
71#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
72#define RATE_IN_3XXX (RATE_IN_34XX | RATE_IN_36XX)
73#define RATE_IN_44XX (RATE_IN_4430 | RATE_IN_4460)
74
75/* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */
76#define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX)
77
78
79/**
80 * struct clksel_rate - register bitfield values corresponding to clk divisors
81 * @val: register bitfield value (shifted to bit 0)
82 * @div: clock divisor corresponding to @val
83 * @flags: (see "struct clksel_rate.flags possibilities" above)
84 *
85 * @val should match the value of a read from struct clk.clksel_reg
86 * AND'ed with struct clk.clksel_mask, shifted right to bit 0.
87 *
88 * @div is the divisor that should be applied to the parent clock's rate
89 * to produce the current clock's rate.
90 */
91struct clksel_rate {
92 u32 val;
93 u8 div;
94 u16 flags;
95};
96
97/**
98 * struct clksel - available parent clocks, and a pointer to their divisors
99 * @parent: struct clk * to a possible parent clock
100 * @rates: available divisors for this parent clock
101 *
102 * A struct clksel is always associated with one or more struct clks
103 * and one or more struct clksel_rates.
104 */
105struct clksel {
106 struct clk *parent;
107 const struct clksel_rate *rates;
108};
109
110/**
111 * struct dpll_data - DPLL registers and integration data
112 * @mult_div1_reg: register containing the DPLL M and N bitfields
113 * @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg
114 * @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg
115 * @clk_bypass: struct clk pointer to the clock's bypass clock input
116 * @clk_ref: struct clk pointer to the clock's reference clock input
117 * @control_reg: register containing the DPLL mode bitfield
118 * @enable_mask: mask of the DPLL mode bitfield in @control_reg
119 * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate()
120 * @last_rounded_m: cache of the last M result of omap2_dpll_round_rate()
121 * @max_multiplier: maximum valid non-bypass multiplier value (actual)
122 * @last_rounded_n: cache of the last N result of omap2_dpll_round_rate()
123 * @min_divider: minimum valid non-bypass divider value (actual)
124 * @max_divider: maximum valid non-bypass divider value (actual)
125 * @modes: possible values of @enable_mask
126 * @autoidle_reg: register containing the DPLL autoidle mode bitfield
127 * @idlest_reg: register containing the DPLL idle status bitfield
128 * @autoidle_mask: mask of the DPLL autoidle mode bitfield in @autoidle_reg
129 * @freqsel_mask: mask of the DPLL jitter correction bitfield in @control_reg
130 * @idlest_mask: mask of the DPLL idle status bitfield in @idlest_reg
131 * @auto_recal_bit: bitshift of the driftguard enable bit in @control_reg
132 * @recal_en_bit: bitshift of the PRM_IRQENABLE_* bit for recalibration IRQs
133 * @recal_st_bit: bitshift of the PRM_IRQSTATUS_* bit for recalibration IRQs
134 * @flags: DPLL type/features (see below)
135 *
136 * Possible values for @flags:
137 * DPLL_J_TYPE: "J-type DPLL" (only some 36xx, 4xxx DPLLs)
138 *
139 * @freqsel_mask is only used on the OMAP34xx family and AM35xx.
140 *
141 * XXX Some DPLLs have multiple bypass inputs, so it's not technically
142 * correct to only have one @clk_bypass pointer.
143 *
144 * XXX The runtime-variable fields (@last_rounded_rate, @last_rounded_m,
145 * @last_rounded_n) should be separated from the runtime-fixed fields
146 * and placed into a different structure, so that the runtime-fixed data
147 * can be placed into read-only space.
148 */
149struct dpll_data {
150 void __iomem *mult_div1_reg;
151 u32 mult_mask;
152 u32 div1_mask;
153 struct clk *clk_bypass;
154 struct clk *clk_ref;
155 void __iomem *control_reg;
156 u32 enable_mask;
157 unsigned long last_rounded_rate;
158 u16 last_rounded_m;
159 u16 max_multiplier;
160 u8 last_rounded_n;
161 u8 min_divider;
162 u16 max_divider;
163 u8 modes;
164 void __iomem *autoidle_reg;
165 void __iomem *idlest_reg;
166 u32 autoidle_mask;
167 u32 freqsel_mask;
168 u32 idlest_mask;
169 u32 dco_mask;
170 u32 sddiv_mask;
171 u8 auto_recal_bit;
172 u8 recal_en_bit;
173 u8 recal_st_bit;
174 u8 flags;
175};
176
177#endif
178
179/*
180 * struct clk.flags possibilities
181 *
182 * XXX document the rest of the clock flags here
183 *
184 * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
185 * bits share the same register. This flag allows the
186 * omap4_dpllmx*() code to determine which GATE_CTRL bit field
187 * should be used. This is a temporary solution - a better approach
188 * would be to associate clock type-specific data with the clock,
189 * similar to the struct dpll_data approach.
190 */
191#define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
192#define CLOCK_IDLE_CONTROL (1 << 1)
193#define CLOCK_NO_IDLE_PARENT (1 << 2)
194#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
195#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
196#define CLOCK_CLKOUTX2 (1 << 5)
197
198/**
199 * struct clk - OMAP struct clk
200 * @node: list_head connecting this clock into the full clock list
201 * @ops: struct clkops * for this clock
202 * @name: the name of the clock in the hardware (used in hwmod data and debug)
203 * @parent: pointer to this clock's parent struct clk
204 * @children: list_head connecting to the child clks' @sibling list_heads
205 * @sibling: list_head connecting this clk to its parent clk's @children
206 * @rate: current clock rate
207 * @enable_reg: register to write to enable the clock (see @enable_bit)
208 * @recalc: fn ptr that returns the clock's current rate
209 * @set_rate: fn ptr that can change the clock's current rate
210 * @round_rate: fn ptr that can round the clock's current rate
211 * @init: fn ptr to do clock-specific initialization
212 * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
213 * @usecount: number of users that have requested this clock to be enabled
214 * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
215 * @flags: see "struct clk.flags possibilities" above
216 * @clksel_reg: for clksel clks, register va containing src/divisor select
217 * @clksel_mask: bitmask in @clksel_reg for the src/divisor selector
218 * @clksel: for clksel clks, pointer to struct clksel for this clock
219 * @dpll_data: for DPLLs, pointer to struct dpll_data for this clock
220 * @clkdm_name: clockdomain name that this clock is contained in
221 * @clkdm: pointer to struct clockdomain, resolved from @clkdm_name at runtime
222 * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
223 * @src_offset: bitshift for source selection bitfield (OMAP1 only)
224 *
225 * XXX @rate_offset, @src_offset should probably be removed and OMAP1
226 * clock code converted to use clksel.
227 *
228 * XXX @usecount is poorly named. It should be "enable_count" or
229 * something similar. "users" in the description refers to kernel
230 * code (core code or drivers) that have called clk_enable() and not
231 * yet called clk_disable(); the usecount of parent clocks is also
232 * incremented by the clock code when clk_enable() is called on child
233 * clocks and decremented by the clock code when clk_disable() is
234 * called on child clocks.
235 *
236 * XXX @clkdm, @usecount, @children, @sibling should be marked for
237 * internal use only.
238 *
239 * @children and @sibling are used to optimize parent-to-child clock
240 * tree traversals. (child-to-parent traversals use @parent.)
241 *
242 * XXX The notion of the clock's current rate probably needs to be
243 * separated from the clock's target rate.
244 */
245struct clk {
246 struct list_head node;
247 const struct clkops *ops;
248 const char *name;
249 struct clk *parent;
250 struct list_head children;
251 struct list_head sibling; /* node for children */
252 unsigned long rate;
253 void __iomem *enable_reg;
254 unsigned long (*recalc)(struct clk *);
255 int (*set_rate)(struct clk *, unsigned long);
256 long (*round_rate)(struct clk *, unsigned long);
257 void (*init)(struct clk *);
258 u8 enable_bit;
259 s8 usecount;
260 u8 fixed_div;
261 u8 flags;
262#ifdef CONFIG_ARCH_OMAP2PLUS
263 void __iomem *clksel_reg;
264 u32 clksel_mask;
265 const struct clksel *clksel;
266 struct dpll_data *dpll_data;
267 const char *clkdm_name;
268 struct clockdomain *clkdm;
269#else
270 u8 rate_offset;
271 u8 src_offset;
272#endif
273#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
274 struct dentry *dent; /* For visible tree hierarchy */
275#endif
276};
277
278struct clk_functions {
279 int (*clk_enable)(struct clk *clk);
280 void (*clk_disable)(struct clk *clk);
281 long (*clk_round_rate)(struct clk *clk, unsigned long rate);
282 int (*clk_set_rate)(struct clk *clk, unsigned long rate);
283 int (*clk_set_parent)(struct clk *clk, struct clk *parent);
284 void (*clk_allow_idle)(struct clk *clk);
285 void (*clk_deny_idle)(struct clk *clk);
286 void (*clk_disable_unused)(struct clk *clk);
287};
288
289extern int mpurate;
290
291extern int clk_init(struct clk_functions *custom_clocks);
292extern void clk_preinit(struct clk *clk);
293extern int clk_register(struct clk *clk);
294extern void clk_reparent(struct clk *child, struct clk *parent);
295extern void clk_unregister(struct clk *clk);
296extern void propagate_rate(struct clk *clk);
297extern void recalculate_root_clocks(void);
298extern unsigned long followparent_recalc(struct clk *clk);
299extern void clk_enable_init_clocks(void);
300unsigned long omap_fixed_divisor_recalc(struct clk *clk);
301extern struct clk *omap_clk_get_by_name(const char *name);
302extern int omap_clk_enable_autoidle_all(void);
303extern int omap_clk_disable_autoidle_all(void);
304
305extern const struct clkops clkops_null;
306
307extern struct clk dummy_ck;
308
309#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 10:10:26 -0500