aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2011-03-16 18:04:26 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-03-16 18:04:26 -0400
commit971f115a50afbe409825c9f3399d5a3b9aca4381 (patch)
treecb42dc07a032e325f22b64d961587c081225c6d6 /arch/arm
parent2e270d84223262a38d4755c61d55f5c73ea89e56 (diff)
parent500132a0f26ad7d9916102193cbc6c1b1becb373 (diff)
Merge branch 'usb-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6
* 'usb-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6: (172 commits) USB: Add support for SuperSpeed isoc endpoints xhci: Clean up cycle bit math used during stalls. xhci: Fix cycle bit calculation during stall handling. xhci: Update internal dequeue pointers after stalls. USB: Disable auto-suspend for USB 3.0 hubs. USB: Remove bogus USB_PORT_STAT_SUPER_SPEED symbol. xhci: Return canceled URBs immediately when host is halted. xhci: Fixes for suspend/resume of shared HCDs. xhci: Fix re-init on power loss after resume. xhci: Make roothub functions deal with device removal. xhci: Limit roothub ports to 15 USB3 & 31 USB2 ports. xhci: Return a USB 3.0 hub descriptor for USB3 roothub. xhci: Register second xHCI roothub. xhci: Change xhci_find_slot_id_by_port() API. xhci: Refactor bus suspend state into a struct. xhci: Index with a port array instead of PORTSC addresses. USB: Set usb_hcd->state and flags for shared roothubs. usb: Make core allocate resources per PCI-device. usb: Store bus type in usb_hcd, not in driver flags. usb: Change usb_hcd->bandwidth_mutex to a pointer. ...
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap2/Makefile2
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c10
-rw-r--r--arch/arm/mach-omap2/board-3630sdp.c10
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c20
-rw-r--r--arch/arm/mach-omap2/board-am3517crane.c10
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c12
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c10
-rw-r--r--arch/arm/mach-omap2/board-cm-t3517.c10
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c10
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c10
-rw-r--r--arch/arm/mach-omap2/board-igep0030.c10
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c10
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c14
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c10
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c10
-rw-r--r--arch/arm/mach-omap2/board-omap3touchbook.c10
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c11
-rw-r--r--arch/arm/mach-omap2/board-overo.c10
-rw-r--r--arch/arm/mach-omap2/board-zoom.c10
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c19
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c10
-rw-r--r--arch/arm/mach-omap2/omap_phy_internal.c29
-rw-r--r--arch/arm/mach-omap2/usb-host.c (renamed from arch/arm/mach-omap2/usb-ehci.c)306
-rw-r--r--arch/arm/mach-omap2/usb-musb.c4
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c24
-rw-r--r--arch/arm/mach-s3c2410/mach-n30.c21
-rw-r--r--arch/arm/mach-s3c2412/mach-smdk2413.c24
-rw-r--r--arch/arm/mach-s3c2440/mach-gta02.c22
-rw-r--r--arch/arm/mach-s3c2440/mach-mini2440.c24
-rw-r--r--arch/arm/mach-s3c2440/mach-rx1950.c21
-rw-r--r--arch/arm/mach-tegra/Kconfig3
-rw-r--r--arch/arm/mach-tegra/Makefile1
-rw-r--r--arch/arm/mach-tegra/include/mach/usb_phy.h86
-rw-r--r--arch/arm/mach-tegra/usb_phy.c795
-rw-r--r--arch/arm/plat-omap/include/plat/usb.h56
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/udc.h4
36 files changed, 1248 insertions, 400 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 1c0c2b02d870..64dc4176407b 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -229,7 +229,7 @@ usbfs-$(CONFIG_ARCH_OMAP_OTG) := usb-fs.o
229obj-y += $(usbfs-m) $(usbfs-y) 229obj-y += $(usbfs-m) $(usbfs-y)
230obj-y += usb-musb.o 230obj-y += usb-musb.o
231obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o 231obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o
232obj-y += usb-ehci.o 232obj-y += usb-host.o
233 233
234onenand-$(CONFIG_MTD_ONENAND_OMAP2) := gpmc-onenand.o 234onenand-$(CONFIG_MTD_ONENAND_OMAP2) := gpmc-onenand.o
235obj-y += $(onenand-m) $(onenand-y) 235obj-y += $(onenand-m) $(onenand-y)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index d4e41ef86aa5..7542ba59f2b8 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -653,11 +653,11 @@ static void enable_board_wakeup_source(void)
653 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP); 653 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
654} 654}
655 655
656static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 656static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
657 657
658 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, 658 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
659 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, 659 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
660 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 660 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
661 661
662 .phy_reset = true, 662 .phy_reset = true,
663 .reset_gpio_port[0] = 57, 663 .reset_gpio_port[0] = 57,
@@ -816,7 +816,7 @@ static void __init omap_3430sdp_init(void)
816 board_flash_init(sdp_flash_partitions, chip_sel_3430); 816 board_flash_init(sdp_flash_partitions, chip_sel_3430);
817 sdp3430_display_init(); 817 sdp3430_display_init();
818 enable_board_wakeup_source(); 818 enable_board_wakeup_source();
819 usb_ehci_init(&ehci_pdata); 819 usbhs_init(&usbhs_bdata);
820} 820}
821 821
822MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") 822MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index 62645640f5e4..deed2db32c53 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -54,11 +54,11 @@ static void enable_board_wakeup_source(void)
54 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP); 54 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
55} 55}
56 56
57static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 57static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
58 58
59 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, 59 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
60 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, 60 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
61 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 61 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
62 62
63 .phy_reset = true, 63 .phy_reset = true,
64 .reset_gpio_port[0] = 126, 64 .reset_gpio_port[0] = 126,
@@ -211,7 +211,7 @@ static void __init omap_sdp_init(void)
211 board_smc91x_init(); 211 board_smc91x_init();
212 board_flash_init(sdp_flash_partitions, chip_sel_sdp); 212 board_flash_init(sdp_flash_partitions, chip_sel_sdp);
213 enable_board_wakeup_source(); 213 enable_board_wakeup_source();
214 usb_ehci_init(&ehci_pdata); 214 usbhs_init(&usbhs_bdata);
215} 215}
216 216
217MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") 217MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 07d1b20b1148..f603f3b04cb8 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -44,7 +44,6 @@
44#define ETH_KS8851_IRQ 34 44#define ETH_KS8851_IRQ 34
45#define ETH_KS8851_POWER_ON 48 45#define ETH_KS8851_POWER_ON 48
46#define ETH_KS8851_QUART 138 46#define ETH_KS8851_QUART 138
47#define OMAP4SDP_MDM_PWR_EN_GPIO 157
48#define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184 47#define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184
49#define OMAP4_SFH7741_ENABLE_GPIO 188 48#define OMAP4_SFH7741_ENABLE_GPIO 188
50 49
@@ -251,16 +250,6 @@ static void __init omap_4430sdp_init_irq(void)
251 gic_init_irq(); 250 gic_init_irq();
252} 251}
253 252
254static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
255 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
256 .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,
257 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
258 .phy_reset = false,
259 .reset_gpio_port[0] = -EINVAL,
260 .reset_gpio_port[1] = -EINVAL,
261 .reset_gpio_port[2] = -EINVAL,
262};
263
264static struct omap_musb_board_data musb_board_data = { 253static struct omap_musb_board_data musb_board_data = {
265 .interface_type = MUSB_INTERFACE_UTMI, 254 .interface_type = MUSB_INTERFACE_UTMI,
266 .mode = MUSB_OTG, 255 .mode = MUSB_OTG,
@@ -272,6 +261,7 @@ static struct twl4030_usb_data omap4_usbphy_data = {
272 .phy_exit = omap4430_phy_exit, 261 .phy_exit = omap4430_phy_exit,
273 .phy_power = omap4430_phy_power, 262 .phy_power = omap4430_phy_power,
274 .phy_set_clock = omap4430_phy_set_clk, 263 .phy_set_clock = omap4430_phy_set_clk,
264 .phy_suspend = omap4430_phy_suspend,
275}; 265};
276 266
277static struct omap2_hsmmc_info mmc[] = { 267static struct omap2_hsmmc_info mmc[] = {
@@ -576,14 +566,6 @@ static void __init omap_4430sdp_init(void)
576 omap_serial_init(); 566 omap_serial_init();
577 omap4_twl6030_hsmmc_init(mmc); 567 omap4_twl6030_hsmmc_init(mmc);
578 568
579 /* Power on the ULPI PHY */
580 status = gpio_request(OMAP4SDP_MDM_PWR_EN_GPIO, "USBB1 PHY VMDM_3V3");
581 if (status)
582 pr_err("%s: Could not get USBB1 PHY GPIO\n", __func__);
583 else
584 gpio_direction_output(OMAP4SDP_MDM_PWR_EN_GPIO, 1);
585
586 usb_ehci_init(&ehci_pdata);
587 usb_musb_init(&musb_board_data); 569 usb_musb_init(&musb_board_data);
588 570
589 status = omap_ethernet_init(); 571 status = omap_ethernet_init();
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 71acb5ab281c..e3a194f6b13f 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -59,10 +59,10 @@ static void __init am3517_crane_init_irq(void)
59 omap_init_irq(); 59 omap_init_irq();
60} 60}
61 61
62static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = { 62static struct usbhs_omap_board_data usbhs_bdata __initdata = {
63 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, 63 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
64 .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN, 64 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
65 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 65 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
66 66
67 .phy_reset = true, 67 .phy_reset = true,
68 .reset_gpio_port[0] = GPIO_USB_NRESET, 68 .reset_gpio_port[0] = GPIO_USB_NRESET,
@@ -103,7 +103,7 @@ static void __init am3517_crane_init(void)
103 return; 103 return;
104 } 104 }
105 105
106 usb_ehci_init(&ehci_pdata); 106 usbhs_init(&usbhs_bdata);
107} 107}
108 108
109MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") 109MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 10d60b7743cf..913538ad17d8 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -430,15 +430,15 @@ static __init void am3517_evm_musb_init(void)
430 usb_musb_init(&musb_board_data); 430 usb_musb_init(&musb_board_data);
431} 431}
432 432
433static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 433static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
434 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, 434 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
435#if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \ 435#if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \
436 defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE) 436 defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE)
437 .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN, 437 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
438#else 438#else
439 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, 439 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
440#endif 440#endif
441 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 441 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
442 442
443 .phy_reset = true, 443 .phy_reset = true,
444 .reset_gpio_port[0] = 57, 444 .reset_gpio_port[0] = 57,
@@ -502,7 +502,7 @@ static void __init am3517_evm_init(void)
502 502
503 /* Configure GPIO for EHCI port */ 503 /* Configure GPIO for EHCI port */
504 omap_mux_init_gpio(57, OMAP_PIN_OUTPUT); 504 omap_mux_init_gpio(57, OMAP_PIN_OUTPUT);
505 usb_ehci_init(&ehci_pdata); 505 usbhs_init(&usbhs_bdata);
506 am3517_evm_hecc_init(&am3517_evm_hecc_pdata); 506 am3517_evm_hecc_init(&am3517_evm_hecc_pdata);
507 /* DSS */ 507 /* DSS */
508 am3517_evm_display_init(); 508 am3517_evm_display_init();
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index dac141610666..9be7289cbb56 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -605,10 +605,10 @@ static struct omap2_hsmmc_info mmc[] = {
605 {} /* Terminator */ 605 {} /* Terminator */
606}; 606};
607 607
608static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = { 608static struct usbhs_omap_board_data usbhs_bdata __initdata = {
609 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, 609 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
610 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, 610 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
611 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 611 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
612 612
613 .phy_reset = true, 613 .phy_reset = true,
614 .reset_gpio_port[0] = OMAP_MAX_GPIO_LINES + 6, 614 .reset_gpio_port[0] = OMAP_MAX_GPIO_LINES + 6,
@@ -810,7 +810,7 @@ static void __init cm_t35_init(void)
810 cm_t35_init_display(); 810 cm_t35_init_display();
811 811
812 usb_musb_init(&musb_board_data); 812 usb_musb_init(&musb_board_data);
813 usb_ehci_init(&ehci_pdata); 813 usbhs_init(&usbhs_bdata);
814} 814}
815 815
816MACHINE_START(CM_T35, "Compulab CM-T35") 816MACHINE_START(CM_T35, "Compulab CM-T35")
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 8f9a64d650ee..8e18dc76b11e 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -167,10 +167,10 @@ static inline void cm_t3517_init_rtc(void) {}
167#define HSUSB2_RESET_GPIO (147) 167#define HSUSB2_RESET_GPIO (147)
168#define USB_HUB_RESET_GPIO (152) 168#define USB_HUB_RESET_GPIO (152)
169 169
170static struct ehci_hcd_omap_platform_data cm_t3517_ehci_pdata __initdata = { 170static struct usbhs_omap_board_data cm_t3517_ehci_pdata __initdata = {
171 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, 171 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
172 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, 172 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
173 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 173 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
174 174
175 .phy_reset = true, 175 .phy_reset = true,
176 .reset_gpio_port[0] = HSUSB1_RESET_GPIO, 176 .reset_gpio_port[0] = HSUSB1_RESET_GPIO,
@@ -192,7 +192,7 @@ static int cm_t3517_init_usbh(void)
192 msleep(1); 192 msleep(1);
193 } 193 }
194 194
195 usb_ehci_init(&cm_t3517_ehci_pdata); 195 usbhs_init(&cm_t3517_ehci_pdata);
196 196
197 return 0; 197 return 0;
198} 198}
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 9a2a31e011ce..bc0141b98694 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -620,11 +620,11 @@ static struct omap_musb_board_data musb_board_data = {
620 .power = 100, 620 .power = 100,
621}; 621};
622 622
623static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 623static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
624 624
625 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, 625 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
626 .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN, 626 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
627 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 627 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
628 628
629 .phy_reset = true, 629 .phy_reset = true,
630 .reset_gpio_port[0] = -EINVAL, 630 .reset_gpio_port[0] = -EINVAL,
@@ -803,7 +803,7 @@ static void __init devkit8000_init(void)
803 devkit8000_ads7846_init(); 803 devkit8000_ads7846_init();
804 804
805 usb_musb_init(&musb_board_data); 805 usb_musb_init(&musb_board_data);
806 usb_ehci_init(&ehci_pdata); 806 usbhs_init(&usbhs_bdata);
807 devkit8000_flash_init(); 807 devkit8000_flash_init();
808 808
809 /* Ensure SDRC pins are mux'd for self-refresh */ 809 /* Ensure SDRC pins are mux'd for self-refresh */
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 3be85a1f55f4..f9f534419311 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -627,10 +627,10 @@ static struct omap_musb_board_data musb_board_data = {
627 .power = 100, 627 .power = 100,
628}; 628};
629 629
630static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 630static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
631 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, 631 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
632 .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN, 632 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
633 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 633 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
634 634
635 .phy_reset = true, 635 .phy_reset = true,
636 .reset_gpio_port[0] = IGEP2_GPIO_USBH_NRESET, 636 .reset_gpio_port[0] = IGEP2_GPIO_USBH_NRESET,
@@ -699,7 +699,7 @@ static void __init igep2_init(void)
699 platform_add_devices(igep2_devices, ARRAY_SIZE(igep2_devices)); 699 platform_add_devices(igep2_devices, ARRAY_SIZE(igep2_devices));
700 omap_serial_init(); 700 omap_serial_init();
701 usb_musb_init(&musb_board_data); 701 usb_musb_init(&musb_board_data);
702 usb_ehci_init(&ehci_pdata); 702 usbhs_init(&usbhs_bdata);
703 703
704 igep2_flash_init(); 704 igep2_flash_init();
705 igep2_leds_init(); 705 igep2_leds_init();
diff --git a/arch/arm/mach-omap2/board-igep0030.c b/arch/arm/mach-omap2/board-igep0030.c
index 4dc62a9b9cb2..579fc2d2525f 100644
--- a/arch/arm/mach-omap2/board-igep0030.c
+++ b/arch/arm/mach-omap2/board-igep0030.c
@@ -408,10 +408,10 @@ static void __init igep3_wifi_bt_init(void)
408void __init igep3_wifi_bt_init(void) {} 408void __init igep3_wifi_bt_init(void) {}
409#endif 409#endif
410 410
411static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 411static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
412 .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN, 412 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
413 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, 413 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
414 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 414 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
415 415
416 .phy_reset = true, 416 .phy_reset = true,
417 .reset_gpio_port[0] = -EINVAL, 417 .reset_gpio_port[0] = -EINVAL,
@@ -435,7 +435,7 @@ static void __init igep3_init(void)
435 platform_add_devices(igep3_devices, ARRAY_SIZE(igep3_devices)); 435 platform_add_devices(igep3_devices, ARRAY_SIZE(igep3_devices));
436 omap_serial_init(); 436 omap_serial_init();
437 usb_musb_init(&musb_board_data); 437 usb_musb_init(&musb_board_data);
438 usb_ehci_init(&ehci_pdata); 438 usbhs_init(&usbhs_bdata);
439 439
440 igep3_flash_init(); 440 igep3_flash_init();
441 igep3_leds_init(); 441 igep3_leds_init();
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 46d814ab5656..f0963b6e4627 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -586,11 +586,11 @@ static void __init omap3beagle_flash_init(void)
586 } 586 }
587} 587}
588 588
589static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 589static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
590 590
591 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, 591 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
592 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, 592 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
593 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 593 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
594 594
595 .phy_reset = true, 595 .phy_reset = true,
596 .reset_gpio_port[0] = -EINVAL, 596 .reset_gpio_port[0] = -EINVAL,
@@ -625,7 +625,7 @@ static void __init omap3_beagle_init(void)
625 gpio_direction_output(170, true); 625 gpio_direction_output(170, true);
626 626
627 usb_musb_init(&musb_board_data); 627 usb_musb_init(&musb_board_data);
628 usb_ehci_init(&ehci_pdata); 628 usbhs_init(&usbhs_bdata);
629 omap3beagle_flash_init(); 629 omap3beagle_flash_init();
630 630
631 /* Ensure SDRC pins are mux'd for self-refresh */ 631 /* Ensure SDRC pins are mux'd for self-refresh */
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 323c3809ce39..38a2d91790c0 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -638,11 +638,11 @@ static struct platform_device *omap3_evm_devices[] __initdata = {
638 &omap3_evm_dss_device, 638 &omap3_evm_dss_device,
639}; 639};
640 640
641static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = { 641static struct usbhs_omap_board_data usbhs_bdata __initdata = {
642 642
643 .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN, 643 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
644 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, 644 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
645 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 645 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
646 646
647 .phy_reset = true, 647 .phy_reset = true,
648 /* PHY reset GPIO will be runtime programmed based on EVM version */ 648 /* PHY reset GPIO will be runtime programmed based on EVM version */
@@ -700,7 +700,7 @@ static void __init omap3_evm_init(void)
700 700
701 /* setup EHCI phy reset config */ 701 /* setup EHCI phy reset config */
702 omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP); 702 omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP);
703 ehci_pdata.reset_gpio_port[1] = 21; 703 usbhs_bdata.reset_gpio_port[1] = 21;
704 704
705 /* EVM REV >= E can supply 500mA with EXTVBUS programming */ 705 /* EVM REV >= E can supply 500mA with EXTVBUS programming */
706 musb_board_data.power = 500; 706 musb_board_data.power = 500;
@@ -708,10 +708,10 @@ static void __init omap3_evm_init(void)
708 } else { 708 } else {
709 /* setup EHCI phy reset on MDC */ 709 /* setup EHCI phy reset on MDC */
710 omap_mux_init_gpio(135, OMAP_PIN_OUTPUT); 710 omap_mux_init_gpio(135, OMAP_PIN_OUTPUT);
711 ehci_pdata.reset_gpio_port[1] = 135; 711 usbhs_bdata.reset_gpio_port[1] = 135;
712 } 712 }
713 usb_musb_init(&musb_board_data); 713 usb_musb_init(&musb_board_data);
714 usb_ehci_init(&ehci_pdata); 714 usbhs_init(&usbhs_bdata);
715 ads7846_dev_init(); 715 ads7846_dev_init();
716 omap3evm_init_smsc911x(); 716 omap3evm_init_smsc911x();
717 omap3_evm_display_init(); 717 omap3_evm_display_init();
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 0b34beded11f..aa05f2e46a61 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -681,11 +681,11 @@ static struct platform_device *omap3pandora_devices[] __initdata = {
681 &pandora_vwlan_device, 681 &pandora_vwlan_device,
682}; 682};
683 683
684static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 684static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
685 685
686 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, 686 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
687 .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN, 687 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
688 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 688 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
689 689
690 .phy_reset = true, 690 .phy_reset = true,
691 .reset_gpio_port[0] = 16, 691 .reset_gpio_port[0] = 16,
@@ -716,7 +716,7 @@ static void __init omap3pandora_init(void)
716 spi_register_board_info(omap3pandora_spi_board_info, 716 spi_register_board_info(omap3pandora_spi_board_info,
717 ARRAY_SIZE(omap3pandora_spi_board_info)); 717 ARRAY_SIZE(omap3pandora_spi_board_info));
718 omap3pandora_ads7846_init(); 718 omap3pandora_ads7846_init();
719 usb_ehci_init(&ehci_pdata); 719 usbhs_init(&usbhs_bdata);
720 usb_musb_init(&musb_board_data); 720 usb_musb_init(&musb_board_data);
721 gpmc_nand_init(&pandora_nand_data); 721 gpmc_nand_init(&pandora_nand_data);
722 722
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 2a2dad447e86..f6c87787cd4f 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -608,10 +608,10 @@ static struct platform_device *omap3_stalker_devices[] __initdata = {
608 &keys_gpio, 608 &keys_gpio,
609}; 609};
610 610
611static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 611static struct usbhs_omap_board_data usbhs_bdata __initconst = {
612 .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN, 612 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
613 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, 613 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
614 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 614 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
615 615
616 .phy_reset = true, 616 .phy_reset = true,
617 .reset_gpio_port[0] = -EINVAL, 617 .reset_gpio_port[0] = -EINVAL,
@@ -649,7 +649,7 @@ static void __init omap3_stalker_init(void)
649 649
650 omap_serial_init(); 650 omap_serial_init();
651 usb_musb_init(&musb_board_data); 651 usb_musb_init(&musb_board_data);
652 usb_ehci_init(&ehci_pdata); 652 usbhs_init(&usbhs_bdata);
653 ads7846_dev_init(); 653 ads7846_dev_init();
654 654
655 omap_mux_init_gpio(21, OMAP_PIN_OUTPUT); 655 omap_mux_init_gpio(21, OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index db1f74fe6c4f..84cfddb19a74 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -468,11 +468,11 @@ static void __init omap3touchbook_flash_init(void)
468 } 468 }
469} 469}
470 470
471static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 471static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
472 472
473 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, 473 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
474 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, 474 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
475 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 475 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
476 476
477 .phy_reset = true, 477 .phy_reset = true,
478 .reset_gpio_port[0] = -EINVAL, 478 .reset_gpio_port[0] = -EINVAL,
@@ -527,7 +527,7 @@ static void __init omap3_touchbook_init(void)
527 ARRAY_SIZE(omap3_ads7846_spi_board_info)); 527 ARRAY_SIZE(omap3_ads7846_spi_board_info));
528 omap3_ads7846_init(); 528 omap3_ads7846_init();
529 usb_musb_init(&musb_board_data); 529 usb_musb_init(&musb_board_data);
530 usb_ehci_init(&ehci_pdata); 530 usbhs_init(&usbhs_bdata);
531 omap3touchbook_flash_init(); 531 omap3touchbook_flash_init();
532 532
533 /* Ensure SDRC pins are mux'd for self-refresh */ 533 /* Ensure SDRC pins are mux'd for self-refresh */
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index e944025d5ef8..ed61c1f5d5e6 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -83,10 +83,10 @@ static void __init omap4_panda_init_irq(void)
83 gic_init_irq(); 83 gic_init_irq();
84} 84}
85 85
86static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 86static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
87 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, 87 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
88 .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN, 88 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
89 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 89 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
90 .phy_reset = false, 90 .phy_reset = false,
91 .reset_gpio_port[0] = -EINVAL, 91 .reset_gpio_port[0] = -EINVAL,
92 .reset_gpio_port[1] = -EINVAL, 92 .reset_gpio_port[1] = -EINVAL,
@@ -128,7 +128,7 @@ static void __init omap4_ehci_init(void)
128 gpio_set_value(GPIO_HUB_NRESET, 0); 128 gpio_set_value(GPIO_HUB_NRESET, 0);
129 gpio_set_value(GPIO_HUB_NRESET, 1); 129 gpio_set_value(GPIO_HUB_NRESET, 1);
130 130
131 usb_ehci_init(&ehci_pdata); 131 usbhs_init(&usbhs_bdata);
132 132
133 /* enable power to hub */ 133 /* enable power to hub */
134 gpio_set_value(GPIO_HUB_POWER, 1); 134 gpio_set_value(GPIO_HUB_POWER, 1);
@@ -153,6 +153,7 @@ static struct twl4030_usb_data omap4_usbphy_data = {
153 .phy_exit = omap4430_phy_exit, 153 .phy_exit = omap4430_phy_exit,
154 .phy_power = omap4430_phy_power, 154 .phy_power = omap4430_phy_power,
155 .phy_set_clock = omap4430_phy_set_clk, 155 .phy_set_clock = omap4430_phy_set_clk,
156 .phy_suspend = omap4430_phy_suspend,
156}; 157};
157 158
158static struct omap2_hsmmc_info mmc[] = { 159static struct omap2_hsmmc_info mmc[] = {
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index cb26e5d8268d..08770ccec0f3 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -423,10 +423,10 @@ static struct platform_device *overo_devices[] __initdata = {
423 &overo_lcd_device, 423 &overo_lcd_device,
424}; 424};
425 425
426static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 426static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
427 .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN, 427 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
428 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, 428 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
429 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 429 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
430 430
431 .phy_reset = true, 431 .phy_reset = true,
432 .reset_gpio_port[0] = -EINVAL, 432 .reset_gpio_port[0] = -EINVAL,
@@ -454,7 +454,7 @@ static void __init overo_init(void)
454 omap_serial_init(); 454 omap_serial_init();
455 overo_flash_init(); 455 overo_flash_init();
456 usb_musb_init(&musb_board_data); 456 usb_musb_init(&musb_board_data);
457 usb_ehci_init(&ehci_pdata); 457 usbhs_init(&usbhs_bdata);
458 overo_ads7846_init(); 458 overo_ads7846_init();
459 overo_init_smsc911x(); 459 overo_init_smsc911x();
460 460
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index e26754c24ee8..1dd195afa396 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -106,10 +106,10 @@ static struct mtd_partition zoom_nand_partitions[] = {
106 }, 106 },
107}; 107};
108 108
109static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 109static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
110 .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN, 110 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
111 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, 111 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
112 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 112 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
113 .phy_reset = true, 113 .phy_reset = true,
114 .reset_gpio_port[0] = -EINVAL, 114 .reset_gpio_port[0] = -EINVAL,
115 .reset_gpio_port[1] = ZOOM3_EHCI_RESET_GPIO, 115 .reset_gpio_port[1] = ZOOM3_EHCI_RESET_GPIO,
@@ -123,7 +123,7 @@ static void __init omap_zoom_init(void)
123 } else if (machine_is_omap_zoom3()) { 123 } else if (machine_is_omap_zoom3()) {
124 omap3_mux_init(board_mux, OMAP_PACKAGE_CBP); 124 omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
125 omap_mux_init_gpio(ZOOM3_EHCI_RESET_GPIO, OMAP_PIN_OUTPUT); 125 omap_mux_init_gpio(ZOOM3_EHCI_RESET_GPIO, OMAP_PIN_OUTPUT);
126 usb_ehci_init(&ehci_pdata); 126 usbhs_init(&usbhs_bdata);
127 } 127 }
128 128
129 board_nand_init(zoom_nand_partitions, 129 board_nand_init(zoom_nand_partitions,
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 403a4a1d3f9c..fbb1e30a73dc 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3286,7 +3286,7 @@ static struct omap_clk omap3xxx_clks[] = {
3286 CLK(NULL, "cpefuse_fck", &cpefuse_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3286 CLK(NULL, "cpefuse_fck", &cpefuse_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3287 CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3287 CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3288 CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3288 CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3289 CLK("ehci-omap.0", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3289 CLK("usbhs-omap.0", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3290 CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX), 3290 CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX),
3291 CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX), 3291 CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX),
3292 CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX), 3292 CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX),
@@ -3322,7 +3322,7 @@ static struct omap_clk omap3xxx_clks[] = {
3322 CLK(NULL, "pka_ick", &pka_ick, CK_34XX | CK_36XX), 3322 CLK(NULL, "pka_ick", &pka_ick, CK_34XX | CK_36XX),
3323 CLK(NULL, "core_l4_ick", &core_l4_ick, CK_3XXX), 3323 CLK(NULL, "core_l4_ick", &core_l4_ick, CK_3XXX),
3324 CLK(NULL, "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3324 CLK(NULL, "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3325 CLK("ehci-omap.0", "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3325 CLK("usbhs-omap.0", "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3326 CLK("mmci-omap-hs.2", "ick", &mmchs3_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3326 CLK("mmci-omap-hs.2", "ick", &mmchs3_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3327 CLK(NULL, "icr_ick", &icr_ick, CK_34XX | CK_36XX), 3327 CLK(NULL, "icr_ick", &icr_ick, CK_34XX | CK_36XX),
3328 CLK("omap-aes", "ick", &aes2_ick, CK_34XX | CK_36XX), 3328 CLK("omap-aes", "ick", &aes2_ick, CK_34XX | CK_36XX),
@@ -3368,11 +3368,20 @@ static struct omap_clk omap3xxx_clks[] = {
3368 CLK(NULL, "cam_ick", &cam_ick, CK_34XX | CK_36XX), 3368 CLK(NULL, "cam_ick", &cam_ick, CK_34XX | CK_36XX),
3369 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_34XX | CK_36XX), 3369 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_34XX | CK_36XX),
3370 CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3370 CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3371 CLK("ehci-omap.0", "hs_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3371 CLK("usbhs-omap.0", "hs_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3372 CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3372 CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3373 CLK("ehci-omap.0", "fs_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3373 CLK("usbhs-omap.0", "fs_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3374 CLK(NULL, "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3374 CLK(NULL, "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3375 CLK("ehci-omap.0", "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3375 CLK("usbhs-omap.0", "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3376 CLK("usbhs-omap.0", "utmi_p1_gfclk", &dummy_ck, CK_3XXX),
3377 CLK("usbhs-omap.0", "utmi_p2_gfclk", &dummy_ck, CK_3XXX),
3378 CLK("usbhs-omap.0", "xclk60mhsp1_ck", &dummy_ck, CK_3XXX),
3379 CLK("usbhs-omap.0", "xclk60mhsp2_ck", &dummy_ck, CK_3XXX),
3380 CLK("usbhs-omap.0", "usb_host_hs_utmi_p1_clk", &dummy_ck, CK_3XXX),
3381 CLK("usbhs-omap.0", "usb_host_hs_utmi_p2_clk", &dummy_ck, CK_3XXX),
3382 CLK("usbhs-omap.0", "usb_tll_hs_usb_ch0_clk", &dummy_ck, CK_3XXX),
3383 CLK("usbhs-omap.0", "usb_tll_hs_usb_ch1_clk", &dummy_ck, CK_3XXX),
3384 CLK("usbhs-omap.0", "init_60m_fclk", &dummy_ck, CK_3XXX),
3376 CLK(NULL, "usim_fck", &usim_fck, CK_3430ES2PLUS | CK_36XX), 3385 CLK(NULL, "usim_fck", &usim_fck, CK_3430ES2PLUS | CK_36XX),
3377 CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX), 3386 CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX),
3378 CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_3XXX), 3387 CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_3XXX),
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index de9ec8ddd2ae..46fd3f674cac 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3197,7 +3197,7 @@ static struct omap_clk omap44xx_clks[] = {
3197 CLK(NULL, "uart3_fck", &uart3_fck, CK_443X), 3197 CLK(NULL, "uart3_fck", &uart3_fck, CK_443X),
3198 CLK(NULL, "uart4_fck", &uart4_fck, CK_443X), 3198 CLK(NULL, "uart4_fck", &uart4_fck, CK_443X),
3199 CLK(NULL, "usb_host_fs_fck", &usb_host_fs_fck, CK_443X), 3199 CLK(NULL, "usb_host_fs_fck", &usb_host_fs_fck, CK_443X),
3200 CLK("ehci-omap.0", "fs_fck", &usb_host_fs_fck, CK_443X), 3200 CLK("usbhs-omap.0", "fs_fck", &usb_host_fs_fck, CK_443X),
3201 CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X), 3201 CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X),
3202 CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X), 3202 CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X),
3203 CLK(NULL, "utmi_p2_gfclk", &utmi_p2_gfclk, CK_443X), 3203 CLK(NULL, "utmi_p2_gfclk", &utmi_p2_gfclk, CK_443X),
@@ -3209,8 +3209,8 @@ static struct omap_clk omap44xx_clks[] = {
3209 CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X), 3209 CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X),
3210 CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X), 3210 CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X),
3211 CLK(NULL, "usb_host_hs_fck", &usb_host_hs_fck, CK_443X), 3211 CLK(NULL, "usb_host_hs_fck", &usb_host_hs_fck, CK_443X),
3212 CLK("ehci-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X), 3212 CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X),
3213 CLK("ehci-omap.0", "usbhost_ick", &dummy_ck, CK_443X), 3213 CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X),
3214 CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X), 3214 CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X),
3215 CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X), 3215 CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X),
3216 CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X), 3216 CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X),
@@ -3219,8 +3219,8 @@ static struct omap_clk omap44xx_clks[] = {
3219 CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X), 3219 CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X),
3220 CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X), 3220 CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X),
3221 CLK(NULL, "usb_tll_hs_ick", &usb_tll_hs_ick, CK_443X), 3221 CLK(NULL, "usb_tll_hs_ick", &usb_tll_hs_ick, CK_443X),
3222 CLK("ehci-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X), 3222 CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X),
3223 CLK("ehci-omap.0", "usbtll_fck", &dummy_ck, CK_443X), 3223 CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X),
3224 CLK(NULL, "usim_ck", &usim_ck, CK_443X), 3224 CLK(NULL, "usim_ck", &usim_ck, CK_443X),
3225 CLK(NULL, "usim_fclk", &usim_fclk, CK_443X), 3225 CLK(NULL, "usim_fclk", &usim_fclk, CK_443X),
3226 CLK(NULL, "usim_fck", &usim_fck, CK_443X), 3226 CLK(NULL, "usim_fck", &usim_fck, CK_443X),
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 745252c60e32..ebe33df708bd 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -43,6 +43,7 @@
43 43
44static struct clk *phyclk, *clk48m, *clk32k; 44static struct clk *phyclk, *clk48m, *clk32k;
45static void __iomem *ctrl_base; 45static void __iomem *ctrl_base;
46static int usbotghs_control;
46 47
47int omap4430_phy_init(struct device *dev) 48int omap4430_phy_init(struct device *dev)
48{ 49{
@@ -103,13 +104,6 @@ int omap4430_phy_set_clk(struct device *dev, int on)
103int omap4430_phy_power(struct device *dev, int ID, int on) 104int omap4430_phy_power(struct device *dev, int ID, int on)
104{ 105{
105 if (on) { 106 if (on) {
106 /* enabled the clocks */
107 omap4430_phy_set_clk(dev, 1);
108 /* power on the phy */
109 if (__raw_readl(ctrl_base + CONTROL_DEV_CONF) & PHY_PD) {
110 __raw_writel(~PHY_PD, ctrl_base + CONTROL_DEV_CONF);
111 mdelay(200);
112 }
113 if (ID) 107 if (ID)
114 /* enable VBUS valid, IDDIG groung */ 108 /* enable VBUS valid, IDDIG groung */
115 __raw_writel(AVALID | VBUSVALID, ctrl_base + 109 __raw_writel(AVALID | VBUSVALID, ctrl_base +
@@ -125,10 +119,31 @@ int omap4430_phy_power(struct device *dev, int ID, int on)
125 /* Enable session END and IDIG to high impedence. */ 119 /* Enable session END and IDIG to high impedence. */
126 __raw_writel(SESSEND | IDDIG, ctrl_base + 120 __raw_writel(SESSEND | IDDIG, ctrl_base +
127 USBOTGHS_CONTROL); 121 USBOTGHS_CONTROL);
122 }
123 return 0;
124}
125
126int omap4430_phy_suspend(struct device *dev, int suspend)
127{
128 if (suspend) {
128 /* Disable the clocks */ 129 /* Disable the clocks */
129 omap4430_phy_set_clk(dev, 0); 130 omap4430_phy_set_clk(dev, 0);
130 /* Power down the phy */ 131 /* Power down the phy */
131 __raw_writel(PHY_PD, ctrl_base + CONTROL_DEV_CONF); 132 __raw_writel(PHY_PD, ctrl_base + CONTROL_DEV_CONF);
133
134 /* save the context */
135 usbotghs_control = __raw_readl(ctrl_base + USBOTGHS_CONTROL);
136 } else {
137 /* Enable the internel phy clcoks */
138 omap4430_phy_set_clk(dev, 1);
139 /* power on the phy */
140 if (__raw_readl(ctrl_base + CONTROL_DEV_CONF) & PHY_PD) {
141 __raw_writel(~PHY_PD, ctrl_base + CONTROL_DEV_CONF);
142 mdelay(200);
143 }
144
145 /* restore the context */
146 __raw_writel(usbotghs_control, ctrl_base + USBOTGHS_CONTROL);
132 } 147 }
133 148
134 return 0; 149 return 0;
diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-host.c
index 25eeadabc39b..89ae29847c59 100644
--- a/arch/arm/mach-omap2/usb-ehci.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -1,14 +1,15 @@
1/* 1/*
2 * linux/arch/arm/mach-omap2/usb-ehci.c 2 * usb-host.c - OMAP USB Host
3 * 3 *
4 * This file will contain the board specific details for the 4 * This file will contain the board specific details for the
5 * Synopsys EHCI host controller on OMAP3430 5 * Synopsys EHCI/OHCI host controller on OMAP3430 and onwards
6 * 6 *
7 * Copyright (C) 2007 Texas Instruments 7 * Copyright (C) 2007-2011 Texas Instruments
8 * Author: Vikram Pandita <vikram.pandita@ti.com> 8 * Author: Vikram Pandita <vikram.pandita@ti.com>
9 * Author: Keshava Munegowda <keshava_mgowda@ti.com>
9 * 10 *
10 * Generalization by: 11 * Generalization by:
11 * Felipe Balbi <felipe.balbi@nokia.com> 12 * Felipe Balbi <balbi@ti.com>
12 * 13 *
13 * This program is free software; you can redistribute it and/or modify 14 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as 15 * it under the terms of the GNU General Public License version 2 as
@@ -19,7 +20,7 @@
19#include <linux/errno.h> 20#include <linux/errno.h>
20#include <linux/delay.h> 21#include <linux/delay.h>
21#include <linux/platform_device.h> 22#include <linux/platform_device.h>
22#include <linux/clk.h> 23#include <linux/slab.h>
23#include <linux/dma-mapping.h> 24#include <linux/dma-mapping.h>
24 25
25#include <asm/io.h> 26#include <asm/io.h>
@@ -30,44 +31,56 @@
30 31
31#include "mux.h" 32#include "mux.h"
32 33
33#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE) 34#ifdef CONFIG_MFD_OMAP_USB_HOST
34 35
35static struct resource ehci_resources[] = { 36#define OMAP_USBHS_DEVICE "usbhs-omap"
37
38static struct resource usbhs_resources[] = {
39 {
40 .name = "uhh",
41 .flags = IORESOURCE_MEM,
42 },
36 { 43 {
44 .name = "tll",
37 .flags = IORESOURCE_MEM, 45 .flags = IORESOURCE_MEM,
38 }, 46 },
39 { 47 {
48 .name = "ehci",
40 .flags = IORESOURCE_MEM, 49 .flags = IORESOURCE_MEM,
41 }, 50 },
42 { 51 {
52 .name = "ehci-irq",
53 .flags = IORESOURCE_IRQ,
54 },
55 {
56 .name = "ohci",
43 .flags = IORESOURCE_MEM, 57 .flags = IORESOURCE_MEM,
44 }, 58 },
45 { /* general IRQ */ 59 {
46 .flags = IORESOURCE_IRQ, 60 .name = "ohci-irq",
61 .flags = IORESOURCE_IRQ,
47 } 62 }
48}; 63};
49 64
50static u64 ehci_dmamask = ~(u32)0; 65static struct platform_device usbhs_device = {
51static struct platform_device ehci_device = { 66 .name = OMAP_USBHS_DEVICE,
52 .name = "ehci-omap", 67 .id = 0,
53 .id = 0, 68 .num_resources = ARRAY_SIZE(usbhs_resources),
54 .dev = { 69 .resource = usbhs_resources,
55 .dma_mask = &ehci_dmamask,
56 .coherent_dma_mask = 0xffffffff,
57 .platform_data = NULL,
58 },
59 .num_resources = ARRAY_SIZE(ehci_resources),
60 .resource = ehci_resources,
61}; 70};
62 71
72static struct usbhs_omap_platform_data usbhs_data;
73static struct ehci_hcd_omap_platform_data ehci_data;
74static struct ohci_hcd_omap_platform_data ohci_data;
75
63/* MUX settings for EHCI pins */ 76/* MUX settings for EHCI pins */
64/* 77/*
65 * setup_ehci_io_mux - initialize IO pad mux for USBHOST 78 * setup_ehci_io_mux - initialize IO pad mux for USBHOST
66 */ 79 */
67static void setup_ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode) 80static void setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
68{ 81{
69 switch (port_mode[0]) { 82 switch (port_mode[0]) {
70 case EHCI_HCD_OMAP_MODE_PHY: 83 case OMAP_EHCI_PORT_MODE_PHY:
71 omap_mux_init_signal("hsusb1_stp", OMAP_PIN_OUTPUT); 84 omap_mux_init_signal("hsusb1_stp", OMAP_PIN_OUTPUT);
72 omap_mux_init_signal("hsusb1_clk", OMAP_PIN_OUTPUT); 85 omap_mux_init_signal("hsusb1_clk", OMAP_PIN_OUTPUT);
73 omap_mux_init_signal("hsusb1_dir", OMAP_PIN_INPUT_PULLDOWN); 86 omap_mux_init_signal("hsusb1_dir", OMAP_PIN_INPUT_PULLDOWN);
@@ -81,7 +94,7 @@ static void setup_ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
81 omap_mux_init_signal("hsusb1_data6", OMAP_PIN_INPUT_PULLDOWN); 94 omap_mux_init_signal("hsusb1_data6", OMAP_PIN_INPUT_PULLDOWN);
82 omap_mux_init_signal("hsusb1_data7", OMAP_PIN_INPUT_PULLDOWN); 95 omap_mux_init_signal("hsusb1_data7", OMAP_PIN_INPUT_PULLDOWN);
83 break; 96 break;
84 case EHCI_HCD_OMAP_MODE_TLL: 97 case OMAP_EHCI_PORT_MODE_TLL:
85 omap_mux_init_signal("hsusb1_tll_stp", 98 omap_mux_init_signal("hsusb1_tll_stp",
86 OMAP_PIN_INPUT_PULLUP); 99 OMAP_PIN_INPUT_PULLUP);
87 omap_mux_init_signal("hsusb1_tll_clk", 100 omap_mux_init_signal("hsusb1_tll_clk",
@@ -107,14 +120,14 @@ static void setup_ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
107 omap_mux_init_signal("hsusb1_tll_data7", 120 omap_mux_init_signal("hsusb1_tll_data7",
108 OMAP_PIN_INPUT_PULLDOWN); 121 OMAP_PIN_INPUT_PULLDOWN);
109 break; 122 break;
110 case EHCI_HCD_OMAP_MODE_UNKNOWN: 123 case OMAP_USBHS_PORT_MODE_UNUSED:
111 /* FALLTHROUGH */ 124 /* FALLTHROUGH */
112 default: 125 default:
113 break; 126 break;
114 } 127 }
115 128
116 switch (port_mode[1]) { 129 switch (port_mode[1]) {
117 case EHCI_HCD_OMAP_MODE_PHY: 130 case OMAP_EHCI_PORT_MODE_PHY:
118 omap_mux_init_signal("hsusb2_stp", OMAP_PIN_OUTPUT); 131 omap_mux_init_signal("hsusb2_stp", OMAP_PIN_OUTPUT);
119 omap_mux_init_signal("hsusb2_clk", OMAP_PIN_OUTPUT); 132 omap_mux_init_signal("hsusb2_clk", OMAP_PIN_OUTPUT);
120 omap_mux_init_signal("hsusb2_dir", OMAP_PIN_INPUT_PULLDOWN); 133 omap_mux_init_signal("hsusb2_dir", OMAP_PIN_INPUT_PULLDOWN);
@@ -136,7 +149,7 @@ static void setup_ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
136 omap_mux_init_signal("hsusb2_data7", 149 omap_mux_init_signal("hsusb2_data7",
137 OMAP_PIN_INPUT_PULLDOWN); 150 OMAP_PIN_INPUT_PULLDOWN);
138 break; 151 break;
139 case EHCI_HCD_OMAP_MODE_TLL: 152 case OMAP_EHCI_PORT_MODE_TLL:
140 omap_mux_init_signal("hsusb2_tll_stp", 153 omap_mux_init_signal("hsusb2_tll_stp",
141 OMAP_PIN_INPUT_PULLUP); 154 OMAP_PIN_INPUT_PULLUP);
142 omap_mux_init_signal("hsusb2_tll_clk", 155 omap_mux_init_signal("hsusb2_tll_clk",
@@ -162,17 +175,17 @@ static void setup_ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
162 omap_mux_init_signal("hsusb2_tll_data7", 175 omap_mux_init_signal("hsusb2_tll_data7",
163 OMAP_PIN_INPUT_PULLDOWN); 176 OMAP_PIN_INPUT_PULLDOWN);
164 break; 177 break;
165 case EHCI_HCD_OMAP_MODE_UNKNOWN: 178 case OMAP_USBHS_PORT_MODE_UNUSED:
166 /* FALLTHROUGH */ 179 /* FALLTHROUGH */
167 default: 180 default:
168 break; 181 break;
169 } 182 }
170 183
171 switch (port_mode[2]) { 184 switch (port_mode[2]) {
172 case EHCI_HCD_OMAP_MODE_PHY: 185 case OMAP_EHCI_PORT_MODE_PHY:
173 printk(KERN_WARNING "Port3 can't be used in PHY mode\n"); 186 printk(KERN_WARNING "Port3 can't be used in PHY mode\n");
174 break; 187 break;
175 case EHCI_HCD_OMAP_MODE_TLL: 188 case OMAP_EHCI_PORT_MODE_TLL:
176 omap_mux_init_signal("hsusb3_tll_stp", 189 omap_mux_init_signal("hsusb3_tll_stp",
177 OMAP_PIN_INPUT_PULLUP); 190 OMAP_PIN_INPUT_PULLUP);
178 omap_mux_init_signal("hsusb3_tll_clk", 191 omap_mux_init_signal("hsusb3_tll_clk",
@@ -198,7 +211,7 @@ static void setup_ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
198 omap_mux_init_signal("hsusb3_tll_data7", 211 omap_mux_init_signal("hsusb3_tll_data7",
199 OMAP_PIN_INPUT_PULLDOWN); 212 OMAP_PIN_INPUT_PULLDOWN);
200 break; 213 break;
201 case EHCI_HCD_OMAP_MODE_UNKNOWN: 214 case OMAP_USBHS_PORT_MODE_UNUSED:
202 /* FALLTHROUGH */ 215 /* FALLTHROUGH */
203 default: 216 default:
204 break; 217 break;
@@ -207,10 +220,10 @@ static void setup_ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
207 return; 220 return;
208} 221}
209 222
210static void setup_4430ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode) 223static void setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
211{ 224{
212 switch (port_mode[0]) { 225 switch (port_mode[0]) {
213 case EHCI_HCD_OMAP_MODE_PHY: 226 case OMAP_EHCI_PORT_MODE_PHY:
214 omap_mux_init_signal("usbb1_ulpiphy_stp", 227 omap_mux_init_signal("usbb1_ulpiphy_stp",
215 OMAP_PIN_OUTPUT); 228 OMAP_PIN_OUTPUT);
216 omap_mux_init_signal("usbb1_ulpiphy_clk", 229 omap_mux_init_signal("usbb1_ulpiphy_clk",
@@ -236,7 +249,7 @@ static void setup_4430ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
236 omap_mux_init_signal("usbb1_ulpiphy_dat7", 249 omap_mux_init_signal("usbb1_ulpiphy_dat7",
237 OMAP_PIN_INPUT_PULLDOWN); 250 OMAP_PIN_INPUT_PULLDOWN);
238 break; 251 break;
239 case EHCI_HCD_OMAP_MODE_TLL: 252 case OMAP_EHCI_PORT_MODE_TLL:
240 omap_mux_init_signal("usbb1_ulpitll_stp", 253 omap_mux_init_signal("usbb1_ulpitll_stp",
241 OMAP_PIN_INPUT_PULLUP); 254 OMAP_PIN_INPUT_PULLUP);
242 omap_mux_init_signal("usbb1_ulpitll_clk", 255 omap_mux_init_signal("usbb1_ulpitll_clk",
@@ -262,12 +275,12 @@ static void setup_4430ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
262 omap_mux_init_signal("usbb1_ulpitll_dat7", 275 omap_mux_init_signal("usbb1_ulpitll_dat7",
263 OMAP_PIN_INPUT_PULLDOWN); 276 OMAP_PIN_INPUT_PULLDOWN);
264 break; 277 break;
265 case EHCI_HCD_OMAP_MODE_UNKNOWN: 278 case OMAP_USBHS_PORT_MODE_UNUSED:
266 default: 279 default:
267 break; 280 break;
268 } 281 }
269 switch (port_mode[1]) { 282 switch (port_mode[1]) {
270 case EHCI_HCD_OMAP_MODE_PHY: 283 case OMAP_EHCI_PORT_MODE_PHY:
271 omap_mux_init_signal("usbb2_ulpiphy_stp", 284 omap_mux_init_signal("usbb2_ulpiphy_stp",
272 OMAP_PIN_OUTPUT); 285 OMAP_PIN_OUTPUT);
273 omap_mux_init_signal("usbb2_ulpiphy_clk", 286 omap_mux_init_signal("usbb2_ulpiphy_clk",
@@ -293,7 +306,7 @@ static void setup_4430ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
293 omap_mux_init_signal("usbb2_ulpiphy_dat7", 306 omap_mux_init_signal("usbb2_ulpiphy_dat7",
294 OMAP_PIN_INPUT_PULLDOWN); 307 OMAP_PIN_INPUT_PULLDOWN);
295 break; 308 break;
296 case EHCI_HCD_OMAP_MODE_TLL: 309 case OMAP_EHCI_PORT_MODE_TLL:
297 omap_mux_init_signal("usbb2_ulpitll_stp", 310 omap_mux_init_signal("usbb2_ulpitll_stp",
298 OMAP_PIN_INPUT_PULLUP); 311 OMAP_PIN_INPUT_PULLUP);
299 omap_mux_init_signal("usbb2_ulpitll_clk", 312 omap_mux_init_signal("usbb2_ulpitll_clk",
@@ -319,90 +332,13 @@ static void setup_4430ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
319 omap_mux_init_signal("usbb2_ulpitll_dat7", 332 omap_mux_init_signal("usbb2_ulpitll_dat7",
320 OMAP_PIN_INPUT_PULLDOWN); 333 OMAP_PIN_INPUT_PULLDOWN);
321 break; 334 break;
322 case EHCI_HCD_OMAP_MODE_UNKNOWN: 335 case OMAP_USBHS_PORT_MODE_UNUSED:
323 default: 336 default:
324 break; 337 break;
325 } 338 }
326} 339}
327 340
328void __init usb_ehci_init(const struct ehci_hcd_omap_platform_data *pdata) 341static void setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
329{
330 platform_device_add_data(&ehci_device, pdata, sizeof(*pdata));
331
332 /* Setup Pin IO MUX for EHCI */
333 if (cpu_is_omap34xx()) {
334 ehci_resources[0].start = OMAP34XX_EHCI_BASE;
335 ehci_resources[0].end = OMAP34XX_EHCI_BASE + SZ_1K - 1;
336 ehci_resources[1].start = OMAP34XX_UHH_CONFIG_BASE;
337 ehci_resources[1].end = OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1;
338 ehci_resources[2].start = OMAP34XX_USBTLL_BASE;
339 ehci_resources[2].end = OMAP34XX_USBTLL_BASE + SZ_4K - 1;
340 ehci_resources[3].start = INT_34XX_EHCI_IRQ;
341 setup_ehci_io_mux(pdata->port_mode);
342 } else if (cpu_is_omap44xx()) {
343 ehci_resources[0].start = OMAP44XX_HSUSB_EHCI_BASE;
344 ehci_resources[0].end = OMAP44XX_HSUSB_EHCI_BASE + SZ_1K - 1;
345 ehci_resources[1].start = OMAP44XX_UHH_CONFIG_BASE;
346 ehci_resources[1].end = OMAP44XX_UHH_CONFIG_BASE + SZ_2K - 1;
347 ehci_resources[2].start = OMAP44XX_USBTLL_BASE;
348 ehci_resources[2].end = OMAP44XX_USBTLL_BASE + SZ_4K - 1;
349 ehci_resources[3].start = OMAP44XX_IRQ_EHCI;
350 setup_4430ehci_io_mux(pdata->port_mode);
351 }
352
353 if (platform_device_register(&ehci_device) < 0) {
354 printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n");
355 return;
356 }
357}
358
359#else
360
361void __init usb_ehci_init(const struct ehci_hcd_omap_platform_data *pdata)
362
363{
364}
365
366#endif /* CONFIG_USB_EHCI_HCD */
367
368#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
369
370static struct resource ohci_resources[] = {
371 {
372 .start = OMAP34XX_OHCI_BASE,
373 .end = OMAP34XX_OHCI_BASE + SZ_1K - 1,
374 .flags = IORESOURCE_MEM,
375 },
376 {
377 .start = OMAP34XX_UHH_CONFIG_BASE,
378 .end = OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1,
379 .flags = IORESOURCE_MEM,
380 },
381 {
382 .start = OMAP34XX_USBTLL_BASE,
383 .end = OMAP34XX_USBTLL_BASE + SZ_4K - 1,
384 .flags = IORESOURCE_MEM,
385 },
386 { /* general IRQ */
387 .start = INT_34XX_OHCI_IRQ,
388 .flags = IORESOURCE_IRQ,
389 }
390};
391
392static u64 ohci_dmamask = DMA_BIT_MASK(32);
393
394static struct platform_device ohci_device = {
395 .name = "ohci-omap3",
396 .id = 0,
397 .dev = {
398 .dma_mask = &ohci_dmamask,
399 .coherent_dma_mask = 0xffffffff,
400 },
401 .num_resources = ARRAY_SIZE(ohci_resources),
402 .resource = ohci_resources,
403};
404
405static void setup_ohci_io_mux(const enum ohci_omap3_port_mode *port_mode)
406{ 342{
407 switch (port_mode[0]) { 343 switch (port_mode[0]) {
408 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: 344 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
@@ -430,7 +366,7 @@ static void setup_ohci_io_mux(const enum ohci_omap3_port_mode *port_mode)
430 omap_mux_init_signal("mm1_txdat", 366 omap_mux_init_signal("mm1_txdat",
431 OMAP_PIN_INPUT_PULLDOWN); 367 OMAP_PIN_INPUT_PULLDOWN);
432 break; 368 break;
433 case OMAP_OHCI_PORT_MODE_UNUSED: 369 case OMAP_USBHS_PORT_MODE_UNUSED:
434 /* FALLTHROUGH */ 370 /* FALLTHROUGH */
435 default: 371 default:
436 break; 372 break;
@@ -461,7 +397,7 @@ static void setup_ohci_io_mux(const enum ohci_omap3_port_mode *port_mode)
461 omap_mux_init_signal("mm2_txdat", 397 omap_mux_init_signal("mm2_txdat",
462 OMAP_PIN_INPUT_PULLDOWN); 398 OMAP_PIN_INPUT_PULLDOWN);
463 break; 399 break;
464 case OMAP_OHCI_PORT_MODE_UNUSED: 400 case OMAP_USBHS_PORT_MODE_UNUSED:
465 /* FALLTHROUGH */ 401 /* FALLTHROUGH */
466 default: 402 default:
467 break; 403 break;
@@ -492,31 +428,147 @@ static void setup_ohci_io_mux(const enum ohci_omap3_port_mode *port_mode)
492 omap_mux_init_signal("mm3_txdat", 428 omap_mux_init_signal("mm3_txdat",
493 OMAP_PIN_INPUT_PULLDOWN); 429 OMAP_PIN_INPUT_PULLDOWN);
494 break; 430 break;
495 case OMAP_OHCI_PORT_MODE_UNUSED: 431 case OMAP_USBHS_PORT_MODE_UNUSED:
496 /* FALLTHROUGH */ 432 /* FALLTHROUGH */
497 default: 433 default:
498 break; 434 break;
499 } 435 }
500} 436}
501 437
502void __init usb_ohci_init(const struct ohci_hcd_omap_platform_data *pdata) 438static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
503{ 439{
504 platform_device_add_data(&ohci_device, pdata, sizeof(*pdata)); 440 switch (port_mode[0]) {
441 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
442 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
443 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
444 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
445 omap_mux_init_signal("usbb1_mm_rxdp",
446 OMAP_PIN_INPUT_PULLDOWN);
447 omap_mux_init_signal("usbb1_mm_rxdm",
448 OMAP_PIN_INPUT_PULLDOWN);
505 449
506 /* Setup Pin IO MUX for OHCI */ 450 case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
507 if (cpu_is_omap34xx()) 451 case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
452 omap_mux_init_signal("usbb1_mm_rxrcv",
453 OMAP_PIN_INPUT_PULLDOWN);
454
455 case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
456 case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
457 omap_mux_init_signal("usbb1_mm_txen",
458 OMAP_PIN_INPUT_PULLDOWN);
459
460
461 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
462 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
463 omap_mux_init_signal("usbb1_mm_txdat",
464 OMAP_PIN_INPUT_PULLDOWN);
465 omap_mux_init_signal("usbb1_mm_txse0",
466 OMAP_PIN_INPUT_PULLDOWN);
467 break;
468
469 case OMAP_USBHS_PORT_MODE_UNUSED:
470 default:
471 break;
472 }
473
474 switch (port_mode[1]) {
475 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
476 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
477 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
478 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
479 omap_mux_init_signal("usbb2_mm_rxdp",
480 OMAP_PIN_INPUT_PULLDOWN);
481 omap_mux_init_signal("usbb2_mm_rxdm",
482 OMAP_PIN_INPUT_PULLDOWN);
483
484 case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
485 case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
486 omap_mux_init_signal("usbb2_mm_rxrcv",
487 OMAP_PIN_INPUT_PULLDOWN);
488
489 case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
490 case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
491 omap_mux_init_signal("usbb2_mm_txen",
492 OMAP_PIN_INPUT_PULLDOWN);
493
494
495 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
496 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
497 omap_mux_init_signal("usbb2_mm_txdat",
498 OMAP_PIN_INPUT_PULLDOWN);
499 omap_mux_init_signal("usbb2_mm_txse0",
500 OMAP_PIN_INPUT_PULLDOWN);
501 break;
502
503 case OMAP_USBHS_PORT_MODE_UNUSED:
504 default:
505 break;
506 }
507}
508
509void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
510{
511 int i;
512
513 for (i = 0; i < OMAP3_HS_USB_PORTS; i++) {
514 usbhs_data.port_mode[i] = pdata->port_mode[i];
515 ohci_data.port_mode[i] = pdata->port_mode[i];
516 ehci_data.port_mode[i] = pdata->port_mode[i];
517 ehci_data.reset_gpio_port[i] = pdata->reset_gpio_port[i];
518 ehci_data.regulator[i] = pdata->regulator[i];
519 }
520 ehci_data.phy_reset = pdata->phy_reset;
521 ohci_data.es2_compatibility = pdata->es2_compatibility;
522 usbhs_data.ehci_data = &ehci_data;
523 usbhs_data.ohci_data = &ohci_data;
524
525 if (cpu_is_omap34xx()) {
526 usbhs_resources[0].start = OMAP34XX_UHH_CONFIG_BASE;
527 usbhs_resources[0].end = OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1;
528 usbhs_resources[1].start = OMAP34XX_USBTLL_BASE;
529 usbhs_resources[1].end = OMAP34XX_USBTLL_BASE + SZ_4K - 1;
530 usbhs_resources[2].start = OMAP34XX_EHCI_BASE;
531 usbhs_resources[2].end = OMAP34XX_EHCI_BASE + SZ_1K - 1;
532 usbhs_resources[3].start = INT_34XX_EHCI_IRQ;
533 usbhs_resources[4].start = OMAP34XX_OHCI_BASE;
534 usbhs_resources[4].end = OMAP34XX_OHCI_BASE + SZ_1K - 1;
535 usbhs_resources[5].start = INT_34XX_OHCI_IRQ;
536 setup_ehci_io_mux(pdata->port_mode);
508 setup_ohci_io_mux(pdata->port_mode); 537 setup_ohci_io_mux(pdata->port_mode);
538 } else if (cpu_is_omap44xx()) {
539 usbhs_resources[0].start = OMAP44XX_UHH_CONFIG_BASE;
540 usbhs_resources[0].end = OMAP44XX_UHH_CONFIG_BASE + SZ_1K - 1;
541 usbhs_resources[1].start = OMAP44XX_USBTLL_BASE;
542 usbhs_resources[1].end = OMAP44XX_USBTLL_BASE + SZ_4K - 1;
543 usbhs_resources[2].start = OMAP44XX_HSUSB_EHCI_BASE;
544 usbhs_resources[2].end = OMAP44XX_HSUSB_EHCI_BASE + SZ_1K - 1;
545 usbhs_resources[3].start = OMAP44XX_IRQ_EHCI;
546 usbhs_resources[4].start = OMAP44XX_HSUSB_OHCI_BASE;
547 usbhs_resources[4].end = OMAP44XX_HSUSB_OHCI_BASE + SZ_1K - 1;
548 usbhs_resources[5].start = OMAP44XX_IRQ_OHCI;
549 setup_4430ehci_io_mux(pdata->port_mode);
550 setup_4430ohci_io_mux(pdata->port_mode);
551 }
509 552
510 if (platform_device_register(&ohci_device) < 0) { 553 if (platform_device_add_data(&usbhs_device,
511 pr_err("Unable to register FS-USB (OHCI) device\n"); 554 &usbhs_data, sizeof(usbhs_data)) < 0) {
512 return; 555 printk(KERN_ERR "USBHS platform_device_add_data failed\n");
556 goto init_end;
513 } 557 }
558
559 if (platform_device_register(&usbhs_device) < 0)
560 printk(KERN_ERR "USBHS platform_device_register failed\n");
561
562init_end:
563 return;
514} 564}
515 565
516#else 566#else
517 567
518void __init usb_ohci_init(const struct ohci_hcd_omap_platform_data *pdata) 568void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
519{ 569{
520} 570}
521 571
522#endif /* CONFIG_USB_OHCI_HCD */ 572#endif
573
574
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 5298949d4b11..241fc94b4116 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -214,6 +214,10 @@ void __init usb_musb_init(struct omap_musb_board_data *board_data)
214 214
215 if (platform_device_register(&musb_device) < 0) 215 if (platform_device_register(&musb_device) < 0)
216 printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n"); 216 printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n");
217
218 if (cpu_is_omap44xx())
219 omap4430_phy_init(dev);
220
217} 221}
218 222
219#else 223#else
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 1a81fe12ccd7..1e93f176c1de 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -162,29 +162,10 @@ struct gpio_chip h1940_latch_gpiochip = {
162 .get = h1940_gpiolib_latch_get, 162 .get = h1940_gpiolib_latch_get,
163}; 163};
164 164
165static void h1940_udc_pullup(enum s3c2410_udc_cmd_e cmd)
166{
167 printk(KERN_DEBUG "udc: pullup(%d)\n",cmd);
168
169 switch (cmd)
170 {
171 case S3C2410_UDC_P_ENABLE :
172 gpio_set_value(H1940_LATCH_USB_DP, 1);
173 break;
174 case S3C2410_UDC_P_DISABLE :
175 gpio_set_value(H1940_LATCH_USB_DP, 0);
176 break;
177 case S3C2410_UDC_P_RESET :
178 break;
179 default:
180 break;
181 }
182}
183
184static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = { 165static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = {
185 .udc_command = h1940_udc_pullup,
186 .vbus_pin = S3C2410_GPG(5), 166 .vbus_pin = S3C2410_GPG(5),
187 .vbus_pin_inverted = 1, 167 .vbus_pin_inverted = 1,
168 .pullup_pin = H1940_LATCH_USB_DP,
188}; 169};
189 170
190static struct s3c2410_ts_mach_info h1940_ts_cfg __initdata = { 171static struct s3c2410_ts_mach_info h1940_ts_cfg __initdata = {
@@ -475,9 +456,6 @@ static void __init h1940_init(void)
475 gpio_direction_output(H1940_LATCH_LCD_P4, 0); 456 gpio_direction_output(H1940_LATCH_LCD_P4, 0);
476 gpio_direction_output(H1940_LATCH_MAX1698_nSHUTDOWN, 0); 457 gpio_direction_output(H1940_LATCH_MAX1698_nSHUTDOWN, 0);
477 458
478 gpio_request(H1940_LATCH_USB_DP, "USB pullup");
479 gpio_direction_output(H1940_LATCH_USB_DP, 0);
480
481 gpio_request(H1940_LATCH_SD_POWER, "SD power"); 459 gpio_request(H1940_LATCH_SD_POWER, "SD power");
482 gpio_direction_output(H1940_LATCH_SD_POWER, 0); 460 gpio_direction_output(H1940_LATCH_SD_POWER, 0);
483 461
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 271b9aa6d40a..66f44440d5d3 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -84,26 +84,10 @@ static struct s3c2410_uartcfg n30_uartcfgs[] = {
84 }, 84 },
85}; 85};
86 86
87static void n30_udc_pullup(enum s3c2410_udc_cmd_e cmd)
88{
89 switch (cmd) {
90 case S3C2410_UDC_P_ENABLE :
91 gpio_set_value(S3C2410_GPB(3), 1);
92 break;
93 case S3C2410_UDC_P_DISABLE :
94 gpio_set_value(S3C2410_GPB(3), 0);
95 break;
96 case S3C2410_UDC_P_RESET :
97 break;
98 default:
99 break;
100 }
101}
102
103static struct s3c2410_udc_mach_info n30_udc_cfg __initdata = { 87static struct s3c2410_udc_mach_info n30_udc_cfg __initdata = {
104 .udc_command = n30_udc_pullup,
105 .vbus_pin = S3C2410_GPG(1), 88 .vbus_pin = S3C2410_GPG(1),
106 .vbus_pin_inverted = 0, 89 .vbus_pin_inverted = 0,
90 .pullup_pin = S3C2410_GPB(3),
107}; 91};
108 92
109static struct gpio_keys_button n30_buttons[] = { 93static struct gpio_keys_button n30_buttons[] = {
@@ -596,9 +580,6 @@ static void __init n30_init(void)
596 580
597 platform_add_devices(n35_devices, ARRAY_SIZE(n35_devices)); 581 platform_add_devices(n35_devices, ARRAY_SIZE(n35_devices));
598 } 582 }
599
600 WARN_ON(gpio_request(S3C2410_GPB(3), "udc pup"));
601 gpio_direction_output(S3C2410_GPB(3), 0);
602} 583}
603 584
604MACHINE_START(N30, "Acer-N30") 585MACHINE_START(N30, "Acer-N30")
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index 8e5758bdd666..834cfb61bcfe 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -78,28 +78,9 @@ static struct s3c2410_uartcfg smdk2413_uartcfgs[] __initdata = {
78 } 78 }
79}; 79};
80 80
81static void smdk2413_udc_pullup(enum s3c2410_udc_cmd_e cmd)
82{
83 printk(KERN_DEBUG "udc: pullup(%d)\n",cmd);
84
85 switch (cmd)
86 {
87 case S3C2410_UDC_P_ENABLE :
88 gpio_set_value(S3C2410_GPF(2), 1);
89 break;
90 case S3C2410_UDC_P_DISABLE :
91 gpio_set_value(S3C2410_GPF(2), 0);
92 break;
93 case S3C2410_UDC_P_RESET :
94 break;
95 default:
96 break;
97 }
98}
99
100 81
101static struct s3c2410_udc_mach_info smdk2413_udc_cfg __initdata = { 82static struct s3c2410_udc_mach_info smdk2413_udc_cfg __initdata = {
102 .udc_command = smdk2413_udc_pullup, 83 .pullup_pin = S3C2410_GPF(2),
103}; 84};
104 85
105 86
@@ -133,9 +114,6 @@ static void __init smdk2413_machine_init(void)
133{ /* Turn off suspend on both USB ports, and switch the 114{ /* Turn off suspend on both USB ports, and switch the
134 * selectable USB port to USB device mode. */ 115 * selectable USB port to USB device mode. */
135 116
136 WARN_ON(gpio_request(S3C2410_GPF(2), "udc pull"));
137 gpio_direction_output(S3C2410_GPF(2), 0);
138
139 s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | 117 s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST |
140 S3C2410_MISCCR_USBSUSPND0 | 118 S3C2410_MISCCR_USBSUSPND0 |
141 S3C2410_MISCCR_USBSUSPND1, 0x0); 119 S3C2410_MISCCR_USBSUSPND1, 0x0);
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index 9f2c14ec7181..37405d9abe32 100644
--- a/arch/arm/mach-s3c2440/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -455,28 +455,10 @@ static struct s3c2410_platform_nand __initdata gta02_nand_info = {
455}; 455};
456 456
457 457
458static void gta02_udc_command(enum s3c2410_udc_cmd_e cmd)
459{
460 switch (cmd) {
461 case S3C2410_UDC_P_ENABLE:
462 pr_debug("%s S3C2410_UDC_P_ENABLE\n", __func__);
463 gpio_direction_output(GTA02_GPIO_USB_PULLUP, 1);
464 break;
465 case S3C2410_UDC_P_DISABLE:
466 pr_debug("%s S3C2410_UDC_P_DISABLE\n", __func__);
467 gpio_direction_output(GTA02_GPIO_USB_PULLUP, 0);
468 break;
469 case S3C2410_UDC_P_RESET:
470 pr_debug("%s S3C2410_UDC_P_RESET\n", __func__);
471 /* FIXME: Do something here. */
472 }
473}
474
475/* Get PMU to set USB current limit accordingly. */ 458/* Get PMU to set USB current limit accordingly. */
476static struct s3c2410_udc_mach_info gta02_udc_cfg = { 459static struct s3c2410_udc_mach_info gta02_udc_cfg __initdata = {
477 .vbus_draw = gta02_udc_vbus_draw, 460 .vbus_draw = gta02_udc_vbus_draw,
478 .udc_command = gta02_udc_command, 461 .pullup_pin = GTA02_GPIO_USB_PULLUP,
479
480}; 462};
481 463
482/* USB */ 464/* USB */
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index f62bb4c793bd..d80f129bca94 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -97,26 +97,8 @@ static struct s3c2410_uartcfg mini2440_uartcfgs[] __initdata = {
97 97
98/* USB device UDC support */ 98/* USB device UDC support */
99 99
100static void mini2440_udc_pullup(enum s3c2410_udc_cmd_e cmd)
101{
102 pr_debug("udc: pullup(%d)\n", cmd);
103
104 switch (cmd) {
105 case S3C2410_UDC_P_ENABLE :
106 gpio_set_value(S3C2410_GPC(5), 1);
107 break;
108 case S3C2410_UDC_P_DISABLE :
109 gpio_set_value(S3C2410_GPC(5), 0);
110 break;
111 case S3C2410_UDC_P_RESET :
112 break;
113 default:
114 break;
115 }
116}
117
118static struct s3c2410_udc_mach_info mini2440_udc_cfg __initdata = { 100static struct s3c2410_udc_mach_info mini2440_udc_cfg __initdata = {
119 .udc_command = mini2440_udc_pullup, 101 .pullup_pin = S3C2410_GPC(5),
120}; 102};
121 103
122 104
@@ -644,10 +626,6 @@ static void __init mini2440_init(void)
644 s3c2410_gpio_setpin(S3C2410_GPB(1), 0); 626 s3c2410_gpio_setpin(S3C2410_GPB(1), 0);
645 s3c_gpio_cfgpin(S3C2410_GPB(1), S3C2410_GPIO_INPUT); 627 s3c_gpio_cfgpin(S3C2410_GPB(1), S3C2410_GPIO_INPUT);
646 628
647 /* Make sure the D+ pullup pin is output */
648 WARN_ON(gpio_request(S3C2410_GPC(5), "udc pup"));
649 gpio_direction_output(S3C2410_GPC(5), 0);
650
651 /* mark the key as input, without pullups (there is one on the board) */ 629 /* mark the key as input, without pullups (there is one on the board) */
652 for (i = 0; i < ARRAY_SIZE(mini2440_buttons); i++) { 630 for (i = 0; i < ARRAY_SIZE(mini2440_buttons); i++) {
653 s3c_gpio_setpull(mini2440_buttons[i].gpio, S3C_GPIO_PULL_UP); 631 s3c_gpio_setpull(mini2440_buttons[i].gpio, S3C_GPIO_PULL_UP);
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c
index eab6ae50683c..86bbc233b31c 100644
--- a/arch/arm/mach-s3c2440/mach-rx1950.c
+++ b/arch/arm/mach-s3c2440/mach-rx1950.c
@@ -566,26 +566,10 @@ static struct s3c2410_platform_nand rx1950_nand_info = {
566 .sets = rx1950_nand_sets, 566 .sets = rx1950_nand_sets,
567}; 567};
568 568
569static void rx1950_udc_pullup(enum s3c2410_udc_cmd_e cmd)
570{
571 switch (cmd) {
572 case S3C2410_UDC_P_ENABLE:
573 gpio_direction_output(S3C2410_GPJ(5), 1);
574 break;
575 case S3C2410_UDC_P_DISABLE:
576 gpio_direction_output(S3C2410_GPJ(5), 0);
577 break;
578 case S3C2410_UDC_P_RESET:
579 break;
580 default:
581 break;
582 }
583}
584
585static struct s3c2410_udc_mach_info rx1950_udc_cfg __initdata = { 569static struct s3c2410_udc_mach_info rx1950_udc_cfg __initdata = {
586 .udc_command = rx1950_udc_pullup,
587 .vbus_pin = S3C2410_GPG(5), 570 .vbus_pin = S3C2410_GPG(5),
588 .vbus_pin_inverted = 1, 571 .vbus_pin_inverted = 1,
572 .pullup_pin = S3C2410_GPJ(5),
589}; 573};
590 574
591static struct s3c2410_ts_mach_info rx1950_ts_cfg __initdata = { 575static struct s3c2410_ts_mach_info rx1950_ts_cfg __initdata = {
@@ -750,9 +734,6 @@ static void __init rx1950_init_machine(void)
750 S3C2410_MISCCR_USBSUSPND0 | 734 S3C2410_MISCCR_USBSUSPND0 |
751 S3C2410_MISCCR_USBSUSPND1, 0x0); 735 S3C2410_MISCCR_USBSUSPND1, 0x0);
752 736
753 WARN_ON(gpio_request(S3C2410_GPJ(5), "UDC pullup"));
754 gpio_direction_output(S3C2410_GPJ(5), 0);
755
756 /* mmc power is disabled by default */ 737 /* mmc power is disabled by default */
757 WARN_ON(gpio_request(S3C2410_GPJ(1), "MMC power")); 738 WARN_ON(gpio_request(S3C2410_GPJ(1), "MMC power"));
758 gpio_direction_output(S3C2410_GPJ(1), 0); 739 gpio_direction_output(S3C2410_GPJ(1), 0);
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index b94e52df0d8e..622a9ec1ff08 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -10,6 +10,9 @@ config ARCH_TEGRA_2x_SOC
10 select CPU_V7 10 select CPU_V7
11 select ARM_GIC 11 select ARM_GIC
12 select ARCH_REQUIRE_GPIOLIB 12 select ARCH_REQUIRE_GPIOLIB
13 select USB_ARCH_HAS_EHCI if USB_SUPPORT
14 select USB_ULPI if USB_SUPPORT
15 select USB_ULPI_VIEWPORT if USB_SUPPORT
13 help 16 help
14 Support for NVIDIA Tegra AP20 and T20 processors, based on the 17 Support for NVIDIA Tegra AP20 and T20 processors, based on the
15 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 18 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 9bf39fa34d85..9f7a7e1e0c38 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
17obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o 17obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o
18obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o 18obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o
19obj-$(CONFIG_TEGRA_PCI) += pcie.o 19obj-$(CONFIG_TEGRA_PCI) += pcie.o
20obj-$(CONFIG_USB_SUPPORT) += usb_phy.o
20 21
21obj-${CONFIG_MACH_HARMONY} += board-harmony.o 22obj-${CONFIG_MACH_HARMONY} += board-harmony.o
22obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o 23obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o
diff --git a/arch/arm/mach-tegra/include/mach/usb_phy.h b/arch/arm/mach-tegra/include/mach/usb_phy.h
new file mode 100644
index 000000000000..d4b8f9e298a8
--- /dev/null
+++ b/arch/arm/mach-tegra/include/mach/usb_phy.h
@@ -0,0 +1,86 @@
1/*
2 * arch/arm/mach-tegra/include/mach/usb_phy.h
3 *
4 * Copyright (C) 2010 Google, Inc.
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#ifndef __MACH_USB_PHY_H
18#define __MACH_USB_PHY_H
19
20#include <linux/clk.h>
21#include <linux/usb/otg.h>
22
23struct tegra_utmip_config {
24 u8 hssync_start_delay;
25 u8 elastic_limit;
26 u8 idle_wait_delay;
27 u8 term_range_adj;
28 u8 xcvr_setup;
29 u8 xcvr_lsfslew;
30 u8 xcvr_lsrslew;
31};
32
33struct tegra_ulpi_config {
34 int reset_gpio;
35 const char *clk;
36};
37
38enum tegra_usb_phy_port_speed {
39 TEGRA_USB_PHY_PORT_SPEED_FULL = 0,
40 TEGRA_USB_PHY_PORT_SPEED_LOW,
41 TEGRA_USB_PHY_PORT_SPEED_HIGH,
42};
43
44enum tegra_usb_phy_mode {
45 TEGRA_USB_PHY_MODE_DEVICE,
46 TEGRA_USB_PHY_MODE_HOST,
47};
48
49struct tegra_xtal_freq;
50
51struct tegra_usb_phy {
52 int instance;
53 const struct tegra_xtal_freq *freq;
54 void __iomem *regs;
55 void __iomem *pad_regs;
56 struct clk *clk;
57 struct clk *pll_u;
58 struct clk *pad_clk;
59 enum tegra_usb_phy_mode mode;
60 void *config;
61 struct otg_transceiver *ulpi;
62};
63
64struct tegra_usb_phy *tegra_usb_phy_open(int instance, void __iomem *regs,
65 void *config, enum tegra_usb_phy_mode phy_mode);
66
67int tegra_usb_phy_power_on(struct tegra_usb_phy *phy);
68
69void tegra_usb_phy_clk_disable(struct tegra_usb_phy *phy);
70
71void tegra_usb_phy_clk_enable(struct tegra_usb_phy *phy);
72
73void tegra_usb_phy_power_off(struct tegra_usb_phy *phy);
74
75void tegra_usb_phy_preresume(struct tegra_usb_phy *phy);
76
77void tegra_usb_phy_postresume(struct tegra_usb_phy *phy);
78
79void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy,
80 enum tegra_usb_phy_port_speed port_speed);
81
82void tegra_ehci_phy_restore_end(struct tegra_usb_phy *phy);
83
84void tegra_usb_phy_close(struct tegra_usb_phy *phy);
85
86#endif /* __MACH_USB_PHY_H */
diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c
new file mode 100644
index 000000000000..88081bb3ec52
--- /dev/null
+++ b/arch/arm/mach-tegra/usb_phy.c
@@ -0,0 +1,795 @@
1/*
2 * arch/arm/mach-tegra/usb_phy.c
3 *
4 * Copyright (C) 2010 Google, Inc.
5 *
6 * Author:
7 * Erik Gilling <konkers@google.com>
8 * Benoit Goby <benoit@android.com>
9 *
10 * This software is licensed under the terms of the GNU General Public
11 * License version 2, as published by the Free Software Foundation, and
12 * may be copied, distributed, and modified under those terms.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21#include <linux/resource.h>
22#include <linux/delay.h>
23#include <linux/slab.h>
24#include <linux/err.h>
25#include <linux/platform_device.h>
26#include <linux/io.h>
27#include <linux/gpio.h>
28#include <linux/usb/otg.h>
29#include <linux/usb/ulpi.h>
30#include <asm/mach-types.h>
31#include <mach/usb_phy.h>
32#include <mach/iomap.h>
33
34#define ULPI_VIEWPORT 0x170
35
36#define USB_PORTSC1 0x184
37#define USB_PORTSC1_PTS(x) (((x) & 0x3) << 30)
38#define USB_PORTSC1_PSPD(x) (((x) & 0x3) << 26)
39#define USB_PORTSC1_PHCD (1 << 23)
40#define USB_PORTSC1_WKOC (1 << 22)
41#define USB_PORTSC1_WKDS (1 << 21)
42#define USB_PORTSC1_WKCN (1 << 20)
43#define USB_PORTSC1_PTC(x) (((x) & 0xf) << 16)
44#define USB_PORTSC1_PP (1 << 12)
45#define USB_PORTSC1_SUSP (1 << 7)
46#define USB_PORTSC1_PE (1 << 2)
47#define USB_PORTSC1_CCS (1 << 0)
48
49#define USB_SUSP_CTRL 0x400
50#define USB_WAKE_ON_CNNT_EN_DEV (1 << 3)
51#define USB_WAKE_ON_DISCON_EN_DEV (1 << 4)
52#define USB_SUSP_CLR (1 << 5)
53#define USB_PHY_CLK_VALID (1 << 7)
54#define UTMIP_RESET (1 << 11)
55#define UHSIC_RESET (1 << 11)
56#define UTMIP_PHY_ENABLE (1 << 12)
57#define ULPI_PHY_ENABLE (1 << 13)
58#define USB_SUSP_SET (1 << 14)
59#define USB_WAKEUP_DEBOUNCE_COUNT(x) (((x) & 0x7) << 16)
60
61#define USB1_LEGACY_CTRL 0x410
62#define USB1_NO_LEGACY_MODE (1 << 0)
63#define USB1_VBUS_SENSE_CTL_MASK (3 << 1)
64#define USB1_VBUS_SENSE_CTL_VBUS_WAKEUP (0 << 1)
65#define USB1_VBUS_SENSE_CTL_AB_SESS_VLD_OR_VBUS_WAKEUP \
66 (1 << 1)
67#define USB1_VBUS_SENSE_CTL_AB_SESS_VLD (2 << 1)
68#define USB1_VBUS_SENSE_CTL_A_SESS_VLD (3 << 1)
69
70#define ULPI_TIMING_CTRL_0 0x424
71#define ULPI_OUTPUT_PINMUX_BYP (1 << 10)
72#define ULPI_CLKOUT_PINMUX_BYP (1 << 11)
73
74#define ULPI_TIMING_CTRL_1 0x428
75#define ULPI_DATA_TRIMMER_LOAD (1 << 0)
76#define ULPI_DATA_TRIMMER_SEL(x) (((x) & 0x7) << 1)
77#define ULPI_STPDIRNXT_TRIMMER_LOAD (1 << 16)
78#define ULPI_STPDIRNXT_TRIMMER_SEL(x) (((x) & 0x7) << 17)
79#define ULPI_DIR_TRIMMER_LOAD (1 << 24)
80#define ULPI_DIR_TRIMMER_SEL(x) (((x) & 0x7) << 25)
81
82#define UTMIP_PLL_CFG1 0x804
83#define UTMIP_XTAL_FREQ_COUNT(x) (((x) & 0xfff) << 0)
84#define UTMIP_PLLU_ENABLE_DLY_COUNT(x) (((x) & 0x1f) << 27)
85
86#define UTMIP_XCVR_CFG0 0x808
87#define UTMIP_XCVR_SETUP(x) (((x) & 0xf) << 0)
88#define UTMIP_XCVR_LSRSLEW(x) (((x) & 0x3) << 8)
89#define UTMIP_XCVR_LSFSLEW(x) (((x) & 0x3) << 10)
90#define UTMIP_FORCE_PD_POWERDOWN (1 << 14)
91#define UTMIP_FORCE_PD2_POWERDOWN (1 << 16)
92#define UTMIP_FORCE_PDZI_POWERDOWN (1 << 18)
93#define UTMIP_XCVR_HSSLEW_MSB(x) (((x) & 0x7f) << 25)
94
95#define UTMIP_BIAS_CFG0 0x80c
96#define UTMIP_OTGPD (1 << 11)
97#define UTMIP_BIASPD (1 << 10)
98
99#define UTMIP_HSRX_CFG0 0x810
100#define UTMIP_ELASTIC_LIMIT(x) (((x) & 0x1f) << 10)
101#define UTMIP_IDLE_WAIT(x) (((x) & 0x1f) << 15)
102
103#define UTMIP_HSRX_CFG1 0x814
104#define UTMIP_HS_SYNC_START_DLY(x) (((x) & 0x1f) << 1)
105
106#define UTMIP_TX_CFG0 0x820
107#define UTMIP_FS_PREABMLE_J (1 << 19)
108#define UTMIP_HS_DISCON_DISABLE (1 << 8)
109
110#define UTMIP_MISC_CFG0 0x824
111#define UTMIP_DPDM_OBSERVE (1 << 26)
112#define UTMIP_DPDM_OBSERVE_SEL(x) (((x) & 0xf) << 27)
113#define UTMIP_DPDM_OBSERVE_SEL_FS_J UTMIP_DPDM_OBSERVE_SEL(0xf)
114#define UTMIP_DPDM_OBSERVE_SEL_FS_K UTMIP_DPDM_OBSERVE_SEL(0xe)
115#define UTMIP_DPDM_OBSERVE_SEL_FS_SE1 UTMIP_DPDM_OBSERVE_SEL(0xd)
116#define UTMIP_DPDM_OBSERVE_SEL_FS_SE0 UTMIP_DPDM_OBSERVE_SEL(0xc)
117#define UTMIP_SUSPEND_EXIT_ON_EDGE (1 << 22)
118
119#define UTMIP_MISC_CFG1 0x828
120#define UTMIP_PLL_ACTIVE_DLY_COUNT(x) (((x) & 0x1f) << 18)
121#define UTMIP_PLLU_STABLE_COUNT(x) (((x) & 0xfff) << 6)
122
123#define UTMIP_DEBOUNCE_CFG0 0x82c
124#define UTMIP_BIAS_DEBOUNCE_A(x) (((x) & 0xffff) << 0)
125
126#define UTMIP_BAT_CHRG_CFG0 0x830
127#define UTMIP_PD_CHRG (1 << 0)
128
129#define UTMIP_SPARE_CFG0 0x834
130#define FUSE_SETUP_SEL (1 << 3)
131
132#define UTMIP_XCVR_CFG1 0x838
133#define UTMIP_FORCE_PDDISC_POWERDOWN (1 << 0)
134#define UTMIP_FORCE_PDCHRP_POWERDOWN (1 << 2)
135#define UTMIP_FORCE_PDDR_POWERDOWN (1 << 4)
136#define UTMIP_XCVR_TERM_RANGE_ADJ(x) (((x) & 0xf) << 18)
137
138#define UTMIP_BIAS_CFG1 0x83c
139#define UTMIP_BIAS_PDTRK_COUNT(x) (((x) & 0x1f) << 3)
140
141static DEFINE_SPINLOCK(utmip_pad_lock);
142static int utmip_pad_count;
143
144struct tegra_xtal_freq {
145 int freq;
146 u8 enable_delay;
147 u8 stable_count;
148 u8 active_delay;
149 u8 xtal_freq_count;
150 u16 debounce;
151};
152
153static const struct tegra_xtal_freq tegra_freq_table[] = {
154 {
155 .freq = 12000000,
156 .enable_delay = 0x02,
157 .stable_count = 0x2F,
158 .active_delay = 0x04,
159 .xtal_freq_count = 0x76,
160 .debounce = 0x7530,
161 },
162 {
163 .freq = 13000000,
164 .enable_delay = 0x02,
165 .stable_count = 0x33,
166 .active_delay = 0x05,
167 .xtal_freq_count = 0x7F,
168 .debounce = 0x7EF4,
169 },
170 {
171 .freq = 19200000,
172 .enable_delay = 0x03,
173 .stable_count = 0x4B,
174 .active_delay = 0x06,
175 .xtal_freq_count = 0xBB,
176 .debounce = 0xBB80,
177 },
178 {
179 .freq = 26000000,
180 .enable_delay = 0x04,
181 .stable_count = 0x66,
182 .active_delay = 0x09,
183 .xtal_freq_count = 0xFE,
184 .debounce = 0xFDE8,
185 },
186};
187
188static struct tegra_utmip_config utmip_default[] = {
189 [0] = {
190 .hssync_start_delay = 9,
191 .idle_wait_delay = 17,
192 .elastic_limit = 16,
193 .term_range_adj = 6,
194 .xcvr_setup = 9,
195 .xcvr_lsfslew = 1,
196 .xcvr_lsrslew = 1,
197 },
198 [2] = {
199 .hssync_start_delay = 9,
200 .idle_wait_delay = 17,
201 .elastic_limit = 16,
202 .term_range_adj = 6,
203 .xcvr_setup = 9,
204 .xcvr_lsfslew = 2,
205 .xcvr_lsrslew = 2,
206 },
207};
208
209static inline bool phy_is_ulpi(struct tegra_usb_phy *phy)
210{
211 return (phy->instance == 1);
212}
213
214static int utmip_pad_open(struct tegra_usb_phy *phy)
215{
216 phy->pad_clk = clk_get_sys("utmip-pad", NULL);
217 if (IS_ERR(phy->pad_clk)) {
218 pr_err("%s: can't get utmip pad clock\n", __func__);
219 return PTR_ERR(phy->pad_clk);
220 }
221
222 if (phy->instance == 0) {
223 phy->pad_regs = phy->regs;
224 } else {
225 phy->pad_regs = ioremap(TEGRA_USB_BASE, TEGRA_USB_SIZE);
226 if (!phy->pad_regs) {
227 pr_err("%s: can't remap usb registers\n", __func__);
228 clk_put(phy->pad_clk);
229 return -ENOMEM;
230 }
231 }
232 return 0;
233}
234
235static void utmip_pad_close(struct tegra_usb_phy *phy)
236{
237 if (phy->instance != 0)
238 iounmap(phy->pad_regs);
239 clk_put(phy->pad_clk);
240}
241
242static void utmip_pad_power_on(struct tegra_usb_phy *phy)
243{
244 unsigned long val, flags;
245 void __iomem *base = phy->pad_regs;
246
247 clk_enable(phy->pad_clk);
248
249 spin_lock_irqsave(&utmip_pad_lock, flags);
250
251 if (utmip_pad_count++ == 0) {
252 val = readl(base + UTMIP_BIAS_CFG0);
253 val &= ~(UTMIP_OTGPD | UTMIP_BIASPD);
254 writel(val, base + UTMIP_BIAS_CFG0);
255 }
256
257 spin_unlock_irqrestore(&utmip_pad_lock, flags);
258
259 clk_disable(phy->pad_clk);
260}
261
262static int utmip_pad_power_off(struct tegra_usb_phy *phy)
263{
264 unsigned long val, flags;
265 void __iomem *base = phy->pad_regs;
266
267 if (!utmip_pad_count) {
268 pr_err("%s: utmip pad already powered off\n", __func__);
269 return -EINVAL;
270 }
271
272 clk_enable(phy->pad_clk);
273
274 spin_lock_irqsave(&utmip_pad_lock, flags);
275
276 if (--utmip_pad_count == 0) {
277 val = readl(base + UTMIP_BIAS_CFG0);
278 val |= UTMIP_OTGPD | UTMIP_BIASPD;
279 writel(val, base + UTMIP_BIAS_CFG0);
280 }
281
282 spin_unlock_irqrestore(&utmip_pad_lock, flags);
283
284 clk_disable(phy->pad_clk);
285
286 return 0;
287}
288
289static int utmi_wait_register(void __iomem *reg, u32 mask, u32 result)
290{
291 unsigned long timeout = 2000;
292 do {
293 if ((readl(reg) & mask) == result)
294 return 0;
295 udelay(1);
296 timeout--;
297 } while (timeout);
298 return -1;
299}
300
301static void utmi_phy_clk_disable(struct tegra_usb_phy *phy)
302{
303 unsigned long val;
304 void __iomem *base = phy->regs;
305
306 if (phy->instance == 0) {
307 val = readl(base + USB_SUSP_CTRL);
308 val |= USB_SUSP_SET;
309 writel(val, base + USB_SUSP_CTRL);
310
311 udelay(10);
312
313 val = readl(base + USB_SUSP_CTRL);
314 val &= ~USB_SUSP_SET;
315 writel(val, base + USB_SUSP_CTRL);
316 }
317
318 if (phy->instance == 2) {
319 val = readl(base + USB_PORTSC1);
320 val |= USB_PORTSC1_PHCD;
321 writel(val, base + USB_PORTSC1);
322 }
323
324 if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID, 0) < 0)
325 pr_err("%s: timeout waiting for phy to stabilize\n", __func__);
326}
327
328static void utmi_phy_clk_enable(struct tegra_usb_phy *phy)
329{
330 unsigned long val;
331 void __iomem *base = phy->regs;
332
333 if (phy->instance == 0) {
334 val = readl(base + USB_SUSP_CTRL);
335 val |= USB_SUSP_CLR;
336 writel(val, base + USB_SUSP_CTRL);
337
338 udelay(10);
339
340 val = readl(base + USB_SUSP_CTRL);
341 val &= ~USB_SUSP_CLR;
342 writel(val, base + USB_SUSP_CTRL);
343 }
344
345 if (phy->instance == 2) {
346 val = readl(base + USB_PORTSC1);
347 val &= ~USB_PORTSC1_PHCD;
348 writel(val, base + USB_PORTSC1);
349 }
350
351 if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID,
352 USB_PHY_CLK_VALID))
353 pr_err("%s: timeout waiting for phy to stabilize\n", __func__);
354}
355
356static int utmi_phy_power_on(struct tegra_usb_phy *phy)
357{
358 unsigned long val;
359 void __iomem *base = phy->regs;
360 struct tegra_utmip_config *config = phy->config;
361
362 val = readl(base + USB_SUSP_CTRL);
363 val |= UTMIP_RESET;
364 writel(val, base + USB_SUSP_CTRL);
365
366 if (phy->instance == 0) {
367 val = readl(base + USB1_LEGACY_CTRL);
368 val |= USB1_NO_LEGACY_MODE;
369 writel(val, base + USB1_LEGACY_CTRL);
370 }
371
372 val = readl(base + UTMIP_TX_CFG0);
373 val &= ~UTMIP_FS_PREABMLE_J;
374 writel(val, base + UTMIP_TX_CFG0);
375
376 val = readl(base + UTMIP_HSRX_CFG0);
377 val &= ~(UTMIP_IDLE_WAIT(~0) | UTMIP_ELASTIC_LIMIT(~0));
378 val |= UTMIP_IDLE_WAIT(config->idle_wait_delay);
379 val |= UTMIP_ELASTIC_LIMIT(config->elastic_limit);
380 writel(val, base + UTMIP_HSRX_CFG0);
381
382 val = readl(base + UTMIP_HSRX_CFG1);
383 val &= ~UTMIP_HS_SYNC_START_DLY(~0);
384 val |= UTMIP_HS_SYNC_START_DLY(config->hssync_start_delay);
385 writel(val, base + UTMIP_HSRX_CFG1);
386
387 val = readl(base + UTMIP_DEBOUNCE_CFG0);
388 val &= ~UTMIP_BIAS_DEBOUNCE_A(~0);
389 val |= UTMIP_BIAS_DEBOUNCE_A(phy->freq->debounce);
390 writel(val, base + UTMIP_DEBOUNCE_CFG0);
391
392 val = readl(base + UTMIP_MISC_CFG0);
393 val &= ~UTMIP_SUSPEND_EXIT_ON_EDGE;
394 writel(val, base + UTMIP_MISC_CFG0);
395
396 val = readl(base + UTMIP_MISC_CFG1);
397 val &= ~(UTMIP_PLL_ACTIVE_DLY_COUNT(~0) | UTMIP_PLLU_STABLE_COUNT(~0));
398 val |= UTMIP_PLL_ACTIVE_DLY_COUNT(phy->freq->active_delay) |
399 UTMIP_PLLU_STABLE_COUNT(phy->freq->stable_count);
400 writel(val, base + UTMIP_MISC_CFG1);
401
402 val = readl(base + UTMIP_PLL_CFG1);
403 val &= ~(UTMIP_XTAL_FREQ_COUNT(~0) | UTMIP_PLLU_ENABLE_DLY_COUNT(~0));
404 val |= UTMIP_XTAL_FREQ_COUNT(phy->freq->xtal_freq_count) |
405 UTMIP_PLLU_ENABLE_DLY_COUNT(phy->freq->enable_delay);
406 writel(val, base + UTMIP_PLL_CFG1);
407
408 if (phy->mode == TEGRA_USB_PHY_MODE_DEVICE) {
409 val = readl(base + USB_SUSP_CTRL);
410 val &= ~(USB_WAKE_ON_CNNT_EN_DEV | USB_WAKE_ON_DISCON_EN_DEV);
411 writel(val, base + USB_SUSP_CTRL);
412 }
413
414 utmip_pad_power_on(phy);
415
416 val = readl(base + UTMIP_XCVR_CFG0);
417 val &= ~(UTMIP_FORCE_PD_POWERDOWN | UTMIP_FORCE_PD2_POWERDOWN |
418 UTMIP_FORCE_PDZI_POWERDOWN | UTMIP_XCVR_SETUP(~0) |
419 UTMIP_XCVR_LSFSLEW(~0) | UTMIP_XCVR_LSRSLEW(~0) |
420 UTMIP_XCVR_HSSLEW_MSB(~0));
421 val |= UTMIP_XCVR_SETUP(config->xcvr_setup);
422 val |= UTMIP_XCVR_LSFSLEW(config->xcvr_lsfslew);
423 val |= UTMIP_XCVR_LSRSLEW(config->xcvr_lsrslew);
424 writel(val, base + UTMIP_XCVR_CFG0);
425
426 val = readl(base + UTMIP_XCVR_CFG1);
427 val &= ~(UTMIP_FORCE_PDDISC_POWERDOWN | UTMIP_FORCE_PDCHRP_POWERDOWN |
428 UTMIP_FORCE_PDDR_POWERDOWN | UTMIP_XCVR_TERM_RANGE_ADJ(~0));
429 val |= UTMIP_XCVR_TERM_RANGE_ADJ(config->term_range_adj);
430 writel(val, base + UTMIP_XCVR_CFG1);
431
432 val = readl(base + UTMIP_BAT_CHRG_CFG0);
433 val &= ~UTMIP_PD_CHRG;
434 writel(val, base + UTMIP_BAT_CHRG_CFG0);
435
436 val = readl(base + UTMIP_BIAS_CFG1);
437 val &= ~UTMIP_BIAS_PDTRK_COUNT(~0);
438 val |= UTMIP_BIAS_PDTRK_COUNT(0x5);
439 writel(val, base + UTMIP_BIAS_CFG1);
440
441 if (phy->instance == 0) {
442 val = readl(base + UTMIP_SPARE_CFG0);
443 if (phy->mode == TEGRA_USB_PHY_MODE_DEVICE)
444 val &= ~FUSE_SETUP_SEL;
445 else
446 val |= FUSE_SETUP_SEL;
447 writel(val, base + UTMIP_SPARE_CFG0);
448 }
449
450 if (phy->instance == 2) {
451 val = readl(base + USB_SUSP_CTRL);
452 val |= UTMIP_PHY_ENABLE;
453 writel(val, base + USB_SUSP_CTRL);
454 }
455
456 val = readl(base + USB_SUSP_CTRL);
457 val &= ~UTMIP_RESET;
458 writel(val, base + USB_SUSP_CTRL);
459
460 if (phy->instance == 0) {
461 val = readl(base + USB1_LEGACY_CTRL);
462 val &= ~USB1_VBUS_SENSE_CTL_MASK;
463 val |= USB1_VBUS_SENSE_CTL_A_SESS_VLD;
464 writel(val, base + USB1_LEGACY_CTRL);
465
466 val = readl(base + USB_SUSP_CTRL);
467 val &= ~USB_SUSP_SET;
468 writel(val, base + USB_SUSP_CTRL);
469 }
470
471 utmi_phy_clk_enable(phy);
472
473 if (phy->instance == 2) {
474 val = readl(base + USB_PORTSC1);
475 val &= ~USB_PORTSC1_PTS(~0);
476 writel(val, base + USB_PORTSC1);
477 }
478
479 return 0;
480}
481
482static void utmi_phy_power_off(struct tegra_usb_phy *phy)
483{
484 unsigned long val;
485 void __iomem *base = phy->regs;
486
487 utmi_phy_clk_disable(phy);
488
489 if (phy->mode == TEGRA_USB_PHY_MODE_DEVICE) {
490 val = readl(base + USB_SUSP_CTRL);
491 val &= ~USB_WAKEUP_DEBOUNCE_COUNT(~0);
492 val |= USB_WAKE_ON_CNNT_EN_DEV | USB_WAKEUP_DEBOUNCE_COUNT(5);
493 writel(val, base + USB_SUSP_CTRL);
494 }
495
496 val = readl(base + USB_SUSP_CTRL);
497 val |= UTMIP_RESET;
498 writel(val, base + USB_SUSP_CTRL);
499
500 val = readl(base + UTMIP_BAT_CHRG_CFG0);
501 val |= UTMIP_PD_CHRG;
502 writel(val, base + UTMIP_BAT_CHRG_CFG0);
503
504 val = readl(base + UTMIP_XCVR_CFG0);
505 val |= UTMIP_FORCE_PD_POWERDOWN | UTMIP_FORCE_PD2_POWERDOWN |
506 UTMIP_FORCE_PDZI_POWERDOWN;
507 writel(val, base + UTMIP_XCVR_CFG0);
508
509 val = readl(base + UTMIP_XCVR_CFG1);
510 val |= UTMIP_FORCE_PDDISC_POWERDOWN | UTMIP_FORCE_PDCHRP_POWERDOWN |
511 UTMIP_FORCE_PDDR_POWERDOWN;
512 writel(val, base + UTMIP_XCVR_CFG1);
513
514 utmip_pad_power_off(phy);
515}
516
517static void utmi_phy_preresume(struct tegra_usb_phy *phy)
518{
519 unsigned long val;
520 void __iomem *base = phy->regs;
521
522 val = readl(base + UTMIP_TX_CFG0);
523 val |= UTMIP_HS_DISCON_DISABLE;
524 writel(val, base + UTMIP_TX_CFG0);
525}
526
527static void utmi_phy_postresume(struct tegra_usb_phy *phy)
528{
529 unsigned long val;
530 void __iomem *base = phy->regs;
531
532 val = readl(base + UTMIP_TX_CFG0);
533 val &= ~UTMIP_HS_DISCON_DISABLE;
534 writel(val, base + UTMIP_TX_CFG0);
535}
536
537static void utmi_phy_restore_start(struct tegra_usb_phy *phy,
538 enum tegra_usb_phy_port_speed port_speed)
539{
540 unsigned long val;
541 void __iomem *base = phy->regs;
542
543 val = readl(base + UTMIP_MISC_CFG0);
544 val &= ~UTMIP_DPDM_OBSERVE_SEL(~0);
545 if (port_speed == TEGRA_USB_PHY_PORT_SPEED_LOW)
546 val |= UTMIP_DPDM_OBSERVE_SEL_FS_K;
547 else
548 val |= UTMIP_DPDM_OBSERVE_SEL_FS_J;
549 writel(val, base + UTMIP_MISC_CFG0);
550 udelay(1);
551
552 val = readl(base + UTMIP_MISC_CFG0);
553 val |= UTMIP_DPDM_OBSERVE;
554 writel(val, base + UTMIP_MISC_CFG0);
555 udelay(10);
556}
557
558static void utmi_phy_restore_end(struct tegra_usb_phy *phy)
559{
560 unsigned long val;
561 void __iomem *base = phy->regs;
562
563 val = readl(base + UTMIP_MISC_CFG0);
564 val &= ~UTMIP_DPDM_OBSERVE;
565 writel(val, base + UTMIP_MISC_CFG0);
566 udelay(10);
567}
568
569static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
570{
571 int ret;
572 unsigned long val;
573 void __iomem *base = phy->regs;
574 struct tegra_ulpi_config *config = phy->config;
575
576 gpio_direction_output(config->reset_gpio, 0);
577 msleep(5);
578 gpio_direction_output(config->reset_gpio, 1);
579
580 clk_enable(phy->clk);
581 msleep(1);
582
583 val = readl(base + USB_SUSP_CTRL);
584 val |= UHSIC_RESET;
585 writel(val, base + USB_SUSP_CTRL);
586
587 val = readl(base + ULPI_TIMING_CTRL_0);
588 val |= ULPI_OUTPUT_PINMUX_BYP | ULPI_CLKOUT_PINMUX_BYP;
589 writel(val, base + ULPI_TIMING_CTRL_0);
590
591 val = readl(base + USB_SUSP_CTRL);
592 val |= ULPI_PHY_ENABLE;
593 writel(val, base + USB_SUSP_CTRL);
594
595 val = 0;
596 writel(val, base + ULPI_TIMING_CTRL_1);
597
598 val |= ULPI_DATA_TRIMMER_SEL(4);
599 val |= ULPI_STPDIRNXT_TRIMMER_SEL(4);
600 val |= ULPI_DIR_TRIMMER_SEL(4);
601 writel(val, base + ULPI_TIMING_CTRL_1);
602 udelay(10);
603
604 val |= ULPI_DATA_TRIMMER_LOAD;
605 val |= ULPI_STPDIRNXT_TRIMMER_LOAD;
606 val |= ULPI_DIR_TRIMMER_LOAD;
607 writel(val, base + ULPI_TIMING_CTRL_1);
608
609 /* Fix VbusInvalid due to floating VBUS */
610 ret = otg_io_write(phy->ulpi, 0x40, 0x08);
611 if (ret) {
612 pr_err("%s: ulpi write failed\n", __func__);
613 return ret;
614 }
615
616 ret = otg_io_write(phy->ulpi, 0x80, 0x0B);
617 if (ret) {
618 pr_err("%s: ulpi write failed\n", __func__);
619 return ret;
620 }
621
622 val = readl(base + USB_PORTSC1);
623 val |= USB_PORTSC1_WKOC | USB_PORTSC1_WKDS | USB_PORTSC1_WKCN;
624 writel(val, base + USB_PORTSC1);
625
626 val = readl(base + USB_SUSP_CTRL);
627 val |= USB_SUSP_CLR;
628 writel(val, base + USB_SUSP_CTRL);
629 udelay(100);
630
631 val = readl(base + USB_SUSP_CTRL);
632 val &= ~USB_SUSP_CLR;
633 writel(val, base + USB_SUSP_CTRL);
634
635 return 0;
636}
637
638static void ulpi_phy_power_off(struct tegra_usb_phy *phy)
639{
640 unsigned long val;
641 void __iomem *base = phy->regs;
642 struct tegra_ulpi_config *config = phy->config;
643
644 /* Clear WKCN/WKDS/WKOC wake-on events that can cause the USB
645 * Controller to immediately bring the ULPI PHY out of low power
646 */
647 val = readl(base + USB_PORTSC1);
648 val &= ~(USB_PORTSC1_WKOC | USB_PORTSC1_WKDS | USB_PORTSC1_WKCN);
649 writel(val, base + USB_PORTSC1);
650
651 gpio_direction_output(config->reset_gpio, 0);
652 clk_disable(phy->clk);
653}
654
655struct tegra_usb_phy *tegra_usb_phy_open(int instance, void __iomem *regs,
656 void *config, enum tegra_usb_phy_mode phy_mode)
657{
658 struct tegra_usb_phy *phy;
659 struct tegra_ulpi_config *ulpi_config;
660 unsigned long parent_rate;
661 int i;
662 int err;
663
664 phy = kmalloc(sizeof(struct tegra_usb_phy), GFP_KERNEL);
665 if (!phy)
666 return ERR_PTR(-ENOMEM);
667
668 phy->instance = instance;
669 phy->regs = regs;
670 phy->config = config;
671 phy->mode = phy_mode;
672
673 if (!phy->config) {
674 if (phy_is_ulpi(phy)) {
675 pr_err("%s: ulpi phy configuration missing", __func__);
676 err = -EINVAL;
677 goto err0;
678 } else {
679 phy->config = &utmip_default[instance];
680 }
681 }
682
683 phy->pll_u = clk_get_sys(NULL, "pll_u");
684 if (IS_ERR(phy->pll_u)) {
685 pr_err("Can't get pll_u clock\n");
686 err = PTR_ERR(phy->pll_u);
687 goto err0;
688 }
689 clk_enable(phy->pll_u);
690
691 parent_rate = clk_get_rate(clk_get_parent(phy->pll_u));
692 for (i = 0; i < ARRAY_SIZE(tegra_freq_table); i++) {
693 if (tegra_freq_table[i].freq == parent_rate) {
694 phy->freq = &tegra_freq_table[i];
695 break;
696 }
697 }
698 if (!phy->freq) {
699 pr_err("invalid pll_u parent rate %ld\n", parent_rate);
700 err = -EINVAL;
701 goto err1;
702 }
703
704 if (phy_is_ulpi(phy)) {
705 ulpi_config = config;
706 phy->clk = clk_get_sys(NULL, ulpi_config->clk);
707 if (IS_ERR(phy->clk)) {
708 pr_err("%s: can't get ulpi clock\n", __func__);
709 err = -ENXIO;
710 goto err1;
711 }
712 tegra_gpio_enable(ulpi_config->reset_gpio);
713 gpio_request(ulpi_config->reset_gpio, "ulpi_phy_reset_b");
714 gpio_direction_output(ulpi_config->reset_gpio, 0);
715 phy->ulpi = otg_ulpi_create(&ulpi_viewport_access_ops, 0);
716 phy->ulpi->io_priv = regs + ULPI_VIEWPORT;
717 } else {
718 err = utmip_pad_open(phy);
719 if (err < 0)
720 goto err1;
721 }
722
723 return phy;
724
725err1:
726 clk_disable(phy->pll_u);
727 clk_put(phy->pll_u);
728err0:
729 kfree(phy);
730 return ERR_PTR(err);
731}
732
733int tegra_usb_phy_power_on(struct tegra_usb_phy *phy)
734{
735 if (phy_is_ulpi(phy))
736 return ulpi_phy_power_on(phy);
737 else
738 return utmi_phy_power_on(phy);
739}
740
741void tegra_usb_phy_power_off(struct tegra_usb_phy *phy)
742{
743 if (phy_is_ulpi(phy))
744 ulpi_phy_power_off(phy);
745 else
746 utmi_phy_power_off(phy);
747}
748
749void tegra_usb_phy_preresume(struct tegra_usb_phy *phy)
750{
751 if (!phy_is_ulpi(phy))
752 utmi_phy_preresume(phy);
753}
754
755void tegra_usb_phy_postresume(struct tegra_usb_phy *phy)
756{
757 if (!phy_is_ulpi(phy))
758 utmi_phy_postresume(phy);
759}
760
761void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy,
762 enum tegra_usb_phy_port_speed port_speed)
763{
764 if (!phy_is_ulpi(phy))
765 utmi_phy_restore_start(phy, port_speed);
766}
767
768void tegra_ehci_phy_restore_end(struct tegra_usb_phy *phy)
769{
770 if (!phy_is_ulpi(phy))
771 utmi_phy_restore_end(phy);
772}
773
774void tegra_usb_phy_clk_disable(struct tegra_usb_phy *phy)
775{
776 if (!phy_is_ulpi(phy))
777 utmi_phy_clk_disable(phy);
778}
779
780void tegra_usb_phy_clk_enable(struct tegra_usb_phy *phy)
781{
782 if (!phy_is_ulpi(phy))
783 utmi_phy_clk_enable(phy);
784}
785
786void tegra_usb_phy_close(struct tegra_usb_phy *phy)
787{
788 if (phy_is_ulpi(phy))
789 clk_put(phy->clk);
790 else
791 utmip_pad_close(phy);
792 clk_disable(phy->pll_u);
793 clk_put(phy->pll_u);
794 kfree(phy);
795}
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index 450a332f1009..fe449f1a1c14 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -7,15 +7,12 @@
7#include <plat/board.h> 7#include <plat/board.h>
8 8
9#define OMAP3_HS_USB_PORTS 3 9#define OMAP3_HS_USB_PORTS 3
10enum ehci_hcd_omap_mode {
11 EHCI_HCD_OMAP_MODE_UNKNOWN,
12 EHCI_HCD_OMAP_MODE_PHY,
13 EHCI_HCD_OMAP_MODE_TLL,
14 EHCI_HCD_OMAP_MODE_HSIC,
15};
16 10
17enum ohci_omap3_port_mode { 11enum usbhs_omap_port_mode {
18 OMAP_OHCI_PORT_MODE_UNUSED, 12 OMAP_USBHS_PORT_MODE_UNUSED,
13 OMAP_EHCI_PORT_MODE_PHY,
14 OMAP_EHCI_PORT_MODE_TLL,
15 OMAP_EHCI_PORT_MODE_HSIC,
19 OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0, 16 OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0,
20 OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM, 17 OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM,
21 OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0, 18 OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0,
@@ -25,24 +22,45 @@ enum ohci_omap3_port_mode {
25 OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0, 22 OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0,
26 OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM, 23 OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM,
27 OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0, 24 OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0,
28 OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM, 25 OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM
29}; 26};
30 27
31struct ehci_hcd_omap_platform_data { 28struct usbhs_omap_board_data {
32 enum ehci_hcd_omap_mode port_mode[OMAP3_HS_USB_PORTS]; 29 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
33 unsigned phy_reset:1;
34 30
35 /* have to be valid if phy_reset is true and portx is in phy mode */ 31 /* have to be valid if phy_reset is true and portx is in phy mode */
36 int reset_gpio_port[OMAP3_HS_USB_PORTS]; 32 int reset_gpio_port[OMAP3_HS_USB_PORTS];
33
34 /* Set this to true for ES2.x silicon */
35 unsigned es2_compatibility:1;
36
37 unsigned phy_reset:1;
38
39 /*
40 * Regulators for USB PHYs.
41 * Each PHY can have a separate regulator.
42 */
43 struct regulator *regulator[OMAP3_HS_USB_PORTS];
37}; 44};
38 45
39struct ohci_hcd_omap_platform_data { 46struct ehci_hcd_omap_platform_data {
40 enum ohci_omap3_port_mode port_mode[OMAP3_HS_USB_PORTS]; 47 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
48 int reset_gpio_port[OMAP3_HS_USB_PORTS];
49 struct regulator *regulator[OMAP3_HS_USB_PORTS];
50 unsigned phy_reset:1;
51};
41 52
42 /* Set this to true for ES2.x silicon */ 53struct ohci_hcd_omap_platform_data {
54 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
43 unsigned es2_compatibility:1; 55 unsigned es2_compatibility:1;
44}; 56};
45 57
58struct usbhs_omap_platform_data {
59 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
60
61 struct ehci_hcd_omap_platform_data *ehci_data;
62 struct ohci_hcd_omap_platform_data *ohci_data;
63};
46/*-------------------------------------------------------------------------*/ 64/*-------------------------------------------------------------------------*/
47 65
48#define OMAP1_OTG_BASE 0xfffb0400 66#define OMAP1_OTG_BASE 0xfffb0400
@@ -80,18 +98,18 @@ enum musb_interface {MUSB_INTERFACE_ULPI, MUSB_INTERFACE_UTMI};
80 98
81extern void usb_musb_init(struct omap_musb_board_data *board_data); 99extern void usb_musb_init(struct omap_musb_board_data *board_data);
82 100
83extern void usb_ehci_init(const struct ehci_hcd_omap_platform_data *pdata); 101extern void usbhs_init(const struct usbhs_omap_board_data *pdata);
84 102
85extern void usb_ohci_init(const struct ohci_hcd_omap_platform_data *pdata); 103extern int omap_usbhs_enable(struct device *dev);
104extern void omap_usbhs_disable(struct device *dev);
86 105
87extern int omap4430_phy_power(struct device *dev, int ID, int on); 106extern int omap4430_phy_power(struct device *dev, int ID, int on);
88extern int omap4430_phy_set_clk(struct device *dev, int on); 107extern int omap4430_phy_set_clk(struct device *dev, int on);
89extern int omap4430_phy_init(struct device *dev); 108extern int omap4430_phy_init(struct device *dev);
90extern int omap4430_phy_exit(struct device *dev); 109extern int omap4430_phy_exit(struct device *dev);
91 110extern int omap4430_phy_suspend(struct device *dev, int suspend);
92#endif 111#endif
93 112
94
95/* 113/*
96 * FIXME correct answer depends on hmc_mode, 114 * FIXME correct answer depends on hmc_mode,
97 * as does (on omap1) any nonzero value for config->otg port number 115 * as does (on omap1) any nonzero value for config->otg port number
diff --git a/arch/arm/plat-s3c24xx/include/plat/udc.h b/arch/arm/plat-s3c24xx/include/plat/udc.h
index 546bb4008f49..80457c6414aa 100644
--- a/arch/arm/plat-s3c24xx/include/plat/udc.h
+++ b/arch/arm/plat-s3c24xx/include/plat/udc.h
@@ -27,6 +27,10 @@ enum s3c2410_udc_cmd_e {
27struct s3c2410_udc_mach_info { 27struct s3c2410_udc_mach_info {
28 void (*udc_command)(enum s3c2410_udc_cmd_e); 28 void (*udc_command)(enum s3c2410_udc_cmd_e);
29 void (*vbus_draw)(unsigned int ma); 29 void (*vbus_draw)(unsigned int ma);
30
31 unsigned int pullup_pin;
32 unsigned int pullup_pin_inverted;
33
30 unsigned int vbus_pin; 34 unsigned int vbus_pin;
31 unsigned char vbus_pin_inverted; 35 unsigned char vbus_pin_inverted;
32}; 36};
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-19 10:53:11 -0500