aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2011-10-30 16:26:37 -0400
committerArnd Bergmann <arnd@arndb.de>2011-10-30 16:26:37 -0400
commit91fed558d0f33c74477569f50ed883fe6d430f1f (patch)
tree84b32eb5f9b995efc21e39ee241fed38372d5f3b /arch/arm
parentdb1c5628eb8a321af7585e58019de99ccd2f28b2 (diff)
parent1a64200ec5e93be03e27c3b2fc332e04ae443eb2 (diff)
Merge branch 'pxa/fixes' into next/fixes
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/include/asm/hardware/it8152.h2
-rw-r--r--arch/arm/mach-mmp/Kconfig2
-rw-r--r--arch/arm/mach-mmp/Makefile2
-rw-r--r--arch/arm/mach-mmp/clock.h8
-rw-r--r--arch/arm/mach-mmp/common.c4
-rw-r--r--arch/arm/mach-mmp/gplugd.c2
-rw-r--r--arch/arm/mach-mmp/include/mach/addr-map.h10
-rw-r--r--arch/arm/mach-mmp/mmp2.c3
-rw-r--r--arch/arm/mach-pxa/Kconfig38
-rw-r--r--arch/arm/mach-pxa/Makefile2
-rw-r--r--arch/arm/mach-pxa/balloon3.c10
-rw-r--r--arch/arm/mach-pxa/cm-x2xx-pci.c2
-rw-r--r--arch/arm/mach-pxa/cm-x2xx.c4
-rw-r--r--arch/arm/mach-pxa/cm-x300.c8
-rw-r--r--arch/arm/mach-pxa/include/mach/addr-map.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/balloon3.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/hardware.h9
-rw-r--r--arch/arm/mach-pxa/include/mach/lpd270.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/mtd-xip.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/palm27x.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmtx.h6
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa27x.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa95x.h7
-rw-r--r--arch/arm/mach-pxa/include/mach/pxafb.h13
-rw-r--r--arch/arm/mach-pxa/include/mach/smemc.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/zeus.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/zylonite.h4
-rw-r--r--arch/arm/mach-pxa/irq.c4
-rw-r--r--arch/arm/mach-pxa/lpd270.c2
-rw-r--r--arch/arm/mach-pxa/palmtreo.c8
-rw-r--r--arch/arm/mach-pxa/palmtx.c8
-rw-r--r--arch/arm/mach-pxa/pxa25x.c2
-rw-r--r--arch/arm/mach-pxa/pxa27x.c2
-rw-r--r--arch/arm/mach-pxa/pxa3xx-ulpi.c2
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c2
-rw-r--r--arch/arm/mach-pxa/saarb.c3
-rw-r--r--arch/arm/mach-pxa/z2.c3
-rw-r--r--arch/arm/mach-pxa/zeus.c8
-rw-r--r--arch/arm/plat-pxa/gpio.c2
-rw-r--r--arch/arm/plat-pxa/include/plat/mfp.h2
-rw-r--r--arch/arm/plat-pxa/mfp.c4
42 files changed, 136 insertions, 78 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3146ed3f6eca..e1050a766a01 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1953,6 +1953,7 @@ config CPU_FREQ_PXA
1953 bool 1953 bool
1954 depends on CPU_FREQ && ARCH_PXA && PXA25x 1954 depends on CPU_FREQ && ARCH_PXA && PXA25x
1955 default y 1955 default y
1956 select CPU_FREQ_TABLE
1956 select CPU_FREQ_DEFAULT_GOV_USERSPACE 1957 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1957 1958
1958config CPU_FREQ_S3C 1959config CPU_FREQ_S3C
diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h
index b3fea38d55c6..43cab498bc27 100644
--- a/arch/arm/include/asm/hardware/it8152.h
+++ b/arch/arm/include/asm/hardware/it8152.h
@@ -9,7 +9,7 @@
9 9
10#ifndef __ASM_HARDWARE_IT8152_H 10#ifndef __ASM_HARDWARE_IT8152_H
11#define __ASM_HARDWARE_IT8152_H 11#define __ASM_HARDWARE_IT8152_H
12extern unsigned long it8152_base_address; 12extern void __iomem *it8152_base_address;
13 13
14#define IT8152_IO_BASE (it8152_base_address + 0x03e00000) 14#define IT8152_IO_BASE (it8152_base_address + 0x03e00000)
15#define IT8152_CFGREG_BASE (it8152_base_address + 0x03f00000) 15#define IT8152_CFGREG_BASE (it8152_base_address + 0x03f00000)
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index 56ef5f6c8116..323d4c9e9f44 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -77,7 +77,7 @@ config MACH_TETON_BGA
77 Say 'Y' here if you want to support the Marvell PXA168-based 77 Say 'Y' here if you want to support the Marvell PXA168-based
78 Teton BGA Development Board. 78 Teton BGA Development Board.
79 79
80config MACH_SHEEVAD 80config MACH_GPLUGD
81 bool "Marvell's PXA168 GuruPlug Display (gplugD) Board" 81 bool "Marvell's PXA168 GuruPlug Display (gplugD) Board"
82 select CPU_PXA168 82 select CPU_PXA168
83 help 83 help
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index b0ac942327aa..8f948f981646 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -19,4 +19,4 @@ obj-$(CONFIG_MACH_BROWNSTONE) += brownstone.o
19obj-$(CONFIG_MACH_FLINT) += flint.o 19obj-$(CONFIG_MACH_FLINT) += flint.o
20obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o 20obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o
21obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o 21obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o
22obj-$(CONFIG_MACH_SHEEVAD) += gplugd.o 22obj-$(CONFIG_MACH_GPLUGD) += gplugd.o
diff --git a/arch/arm/mach-mmp/clock.h b/arch/arm/mach-mmp/clock.h
index 3143e994e672..149b30cd1469 100644
--- a/arch/arm/mach-mmp/clock.h
+++ b/arch/arm/mach-mmp/clock.h
@@ -30,7 +30,7 @@ extern struct clkops apmu_clk_ops;
30 30
31#define APBC_CLK(_name, _reg, _fnclksel, _rate) \ 31#define APBC_CLK(_name, _reg, _fnclksel, _rate) \
32struct clk clk_##_name = { \ 32struct clk clk_##_name = { \
33 .clk_rst = (void __iomem *)APBC_##_reg, \ 33 .clk_rst = APBC_##_reg, \
34 .fnclksel = _fnclksel, \ 34 .fnclksel = _fnclksel, \
35 .rate = _rate, \ 35 .rate = _rate, \
36 .ops = &apbc_clk_ops, \ 36 .ops = &apbc_clk_ops, \
@@ -38,7 +38,7 @@ struct clk clk_##_name = { \
38 38
39#define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \ 39#define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \
40struct clk clk_##_name = { \ 40struct clk clk_##_name = { \
41 .clk_rst = (void __iomem *)APBC_##_reg, \ 41 .clk_rst = APBC_##_reg, \
42 .fnclksel = _fnclksel, \ 42 .fnclksel = _fnclksel, \
43 .rate = _rate, \ 43 .rate = _rate, \
44 .ops = _ops, \ 44 .ops = _ops, \
@@ -46,7 +46,7 @@ struct clk clk_##_name = { \
46 46
47#define APMU_CLK(_name, _reg, _eval, _rate) \ 47#define APMU_CLK(_name, _reg, _eval, _rate) \
48struct clk clk_##_name = { \ 48struct clk clk_##_name = { \
49 .clk_rst = (void __iomem *)APMU_##_reg, \ 49 .clk_rst = APMU_##_reg, \
50 .enable_val = _eval, \ 50 .enable_val = _eval, \
51 .rate = _rate, \ 51 .rate = _rate, \
52 .ops = &apmu_clk_ops, \ 52 .ops = &apmu_clk_ops, \
@@ -54,7 +54,7 @@ struct clk clk_##_name = { \
54 54
55#define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \ 55#define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \
56struct clk clk_##_name = { \ 56struct clk clk_##_name = { \
57 .clk_rst = (void __iomem *)APMU_##_reg, \ 57 .clk_rst = APMU_##_reg, \
58 .enable_val = _eval, \ 58 .enable_val = _eval, \
59 .rate = _rate, \ 59 .rate = _rate, \
60 .ops = _ops, \ 60 .ops = _ops, \
diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c
index 0ec0ca80bb3e..5720674739f0 100644
--- a/arch/arm/mach-mmp/common.c
+++ b/arch/arm/mach-mmp/common.c
@@ -27,12 +27,12 @@ EXPORT_SYMBOL(mmp_chip_id);
27static struct map_desc standard_io_desc[] __initdata = { 27static struct map_desc standard_io_desc[] __initdata = {
28 { 28 {
29 .pfn = __phys_to_pfn(APB_PHYS_BASE), 29 .pfn = __phys_to_pfn(APB_PHYS_BASE),
30 .virtual = APB_VIRT_BASE, 30 .virtual = (unsigned long)APB_VIRT_BASE,
31 .length = APB_PHYS_SIZE, 31 .length = APB_PHYS_SIZE,
32 .type = MT_DEVICE, 32 .type = MT_DEVICE,
33 }, { 33 }, {
34 .pfn = __phys_to_pfn(AXI_PHYS_BASE), 34 .pfn = __phys_to_pfn(AXI_PHYS_BASE),
35 .virtual = AXI_VIRT_BASE, 35 .virtual = (unsigned long)AXI_VIRT_BASE,
36 .length = AXI_PHYS_SIZE, 36 .length = AXI_PHYS_SIZE,
37 .type = MT_DEVICE, 37 .type = MT_DEVICE,
38 }, 38 },
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 98e25d9aaab6..2d2c0ad60d8d 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -188,7 +188,7 @@ static void __init gplugd_init(void)
188 pxa168_add_eth(&gplugd_eth_platform_data); 188 pxa168_add_eth(&gplugd_eth_platform_data);
189} 189}
190 190
191MACHINE_START(SHEEVAD, "PXA168-based GuruPlug Display (gplugD) Platform") 191MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
192 .map_io = mmp_map_io, 192 .map_io = mmp_map_io,
193 .nr_irqs = IRQ_BOARD_START, 193 .nr_irqs = IRQ_BOARD_START,
194 .init_irq = pxa168_init_irq, 194 .init_irq = pxa168_init_irq,
diff --git a/arch/arm/mach-mmp/include/mach/addr-map.h b/arch/arm/mach-mmp/include/mach/addr-map.h
index 3254089a644d..3e404acd6ff4 100644
--- a/arch/arm/mach-mmp/include/mach/addr-map.h
+++ b/arch/arm/mach-mmp/include/mach/addr-map.h
@@ -11,6 +11,12 @@
11#ifndef __ASM_MACH_ADDR_MAP_H 11#ifndef __ASM_MACH_ADDR_MAP_H
12#define __ASM_MACH_ADDR_MAP_H 12#define __ASM_MACH_ADDR_MAP_H
13 13
14#ifndef __ASSEMBLER__
15#define IOMEM(x) ((void __iomem *)(x))
16#else
17#define IOMEM(x) (x)
18#endif
19
14/* APB - Application Subsystem Peripheral Bus 20/* APB - Application Subsystem Peripheral Bus
15 * 21 *
16 * NOTE: the DMA controller registers are actually on the AXI fabric #1 22 * NOTE: the DMA controller registers are actually on the AXI fabric #1
@@ -18,11 +24,11 @@
18 * peripherals on APB, let's count it into the ABP mapping area. 24 * peripherals on APB, let's count it into the ABP mapping area.
19 */ 25 */
20#define APB_PHYS_BASE 0xd4000000 26#define APB_PHYS_BASE 0xd4000000
21#define APB_VIRT_BASE 0xfe000000 27#define APB_VIRT_BASE IOMEM(0xfe000000)
22#define APB_PHYS_SIZE 0x00200000 28#define APB_PHYS_SIZE 0x00200000
23 29
24#define AXI_PHYS_BASE 0xd4200000 30#define AXI_PHYS_BASE 0xd4200000
25#define AXI_VIRT_BASE 0xfe200000 31#define AXI_VIRT_BASE IOMEM(0xfe200000)
26#define AXI_PHYS_SIZE 0x00200000 32#define AXI_PHYS_SIZE 0x00200000
27 33
28/* Static Memory Controller - Chip Select 0 and 1 */ 34/* Static Memory Controller - Chip Select 0 and 1 */
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 079c18861d5c..a80cbea40496 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -87,7 +87,8 @@ static struct mfp_addr_map mmp2_addr_map[] __initdata = {
87 87
88void mmp2_clear_pmic_int(void) 88void mmp2_clear_pmic_int(void)
89{ 89{
90 unsigned long mfpr_pmic, data; 90 void __iomem *mfpr_pmic;
91 unsigned long data;
91 92
92 mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4; 93 mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4;
93 data = __raw_readl(mfpr_pmic); 94 data = __raw_readl(mfpr_pmic);
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index cd19309fd3b8..61d3c72ded84 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -2,6 +2,27 @@ if ARCH_PXA
2 2
3menu "Intel PXA2xx/PXA3xx Implementations" 3menu "Intel PXA2xx/PXA3xx Implementations"
4 4
5config ARCH_PXA_V7
6 bool "ARMv7 (PXA95x) based systems"
7
8if ARCH_PXA_V7
9comment "Marvell Dev Platforms (sorted by hardware release time)"
10config MACH_TAVOREVB3
11 bool "PXA95x Development Platform (aka TavorEVB III)"
12 select CPU_PXA955
13
14config MACH_SAARB
15 bool "PXA955 Handheld Platform (aka SAARB)"
16 select CPU_PXA955
17endif
18
19config PXA_V7_MACH_AUTO
20 def_bool y
21 depends on ARCH_PXA_V7
22 depends on !MACH_SAARB
23 select MACH_TAVOREVB3
24
25if !ARCH_PXA_V7
5comment "Intel/Marvell Dev Platforms (sorted by hardware release time)" 26comment "Intel/Marvell Dev Platforms (sorted by hardware release time)"
6 27
7config ARCH_LUBBOCK 28config ARCH_LUBBOCK
@@ -41,19 +62,11 @@ config MACH_TAVOREVB
41 select PXA3xx 62 select PXA3xx
42 select CPU_PXA930 63 select CPU_PXA930
43 64
44config MACH_TAVOREVB3
45 bool "PXA95x Development Platform (aka TavorEVB III)"
46 select CPU_PXA950
47
48config MACH_SAAR 65config MACH_SAAR
49 bool "PXA930 Handheld Platform (aka SAAR)" 66 bool "PXA930 Handheld Platform (aka SAAR)"
50 select PXA3xx 67 select PXA3xx
51 select CPU_PXA930 68 select CPU_PXA930
52 69
53config MACH_SAARB
54 bool "PXA955 Handheld Platform (aka SAARB)"
55 select CPU_PXA955
56
57comment "Third Party Dev Platforms (sorted by vendor name)" 70comment "Third Party Dev Platforms (sorted by vendor name)"
58 71
59config ARCH_PXA_IDP 72config ARCH_PXA_IDP
@@ -414,6 +427,7 @@ config MACH_CENTRO
414 bool "Palm Centro 685 (GSM)" 427 bool "Palm Centro 685 (GSM)"
415 default y 428 default y
416 depends on ARCH_PXA_PALM 429 depends on ARCH_PXA_PALM
430 select MACH_PALM27X
417 select PXA27x 431 select PXA27x
418 select IWMMXT 432 select IWMMXT
419 select PALM_TREO 433 select PALM_TREO
@@ -425,6 +439,7 @@ config MACH_TREO680
425 bool "Palm Treo 680" 439 bool "Palm Treo 680"
426 default y 440 default y
427 depends on ARCH_PXA_PALM 441 depends on ARCH_PXA_PALM
442 select MACH_PALM27X
428 select PXA27x 443 select PXA27x
429 select IWMMXT 444 select IWMMXT
430 select PALM_TREO 445 select PALM_TREO
@@ -436,15 +451,18 @@ config MACH_RAUMFELD_RC
436 bool "Raumfeld Controller" 451 bool "Raumfeld Controller"
437 select PXA3xx 452 select PXA3xx
438 select CPU_PXA300 453 select CPU_PXA300
454 select POWER_SUPPLY
439 select HAVE_PWM 455 select HAVE_PWM
440 456
441config MACH_RAUMFELD_CONNECTOR 457config MACH_RAUMFELD_CONNECTOR
442 bool "Raumfeld Connector" 458 bool "Raumfeld Connector"
459 select POWER_SUPPLY
443 select PXA3xx 460 select PXA3xx
444 select CPU_PXA300 461 select CPU_PXA300
445 462
446config MACH_RAUMFELD_SPEAKER 463config MACH_RAUMFELD_SPEAKER
447 bool "Raumfeld Speaker" 464 bool "Raumfeld Speaker"
465 select POWER_SUPPLY
448 select PXA3xx 466 select PXA3xx
449 select CPU_PXA300 467 select CPU_PXA300
450 468
@@ -598,7 +616,7 @@ config MACH_ZIPIT2
598 bool "Zipit Z2 Handheld" 616 bool "Zipit Z2 Handheld"
599 select PXA27x 617 select PXA27x
600 select HAVE_PWM 618 select HAVE_PWM
601 619endif
602endmenu 620endmenu
603 621
604config PXA25x 622config PXA25x
@@ -688,6 +706,8 @@ config SHARPSL_PM
688config SHARPSL_PM_MAX1111 706config SHARPSL_PM_MAX1111
689 bool 707 bool
690 select HWMON 708 select HWMON
709 select SPI
710 select SPI_MASTER
691 select SENSORS_MAX1111 711 select SENSORS_MAX1111
692 712
693config PXA_HAVE_ISA_IRQS 713config PXA_HAVE_ISA_IRQS
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index cc39d17b2e07..be0f7df8685c 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -19,7 +19,7 @@ endif
19obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o 19obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o
20obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o 20obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o
21obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o 21obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o
22obj-$(CONFIG_PXA95x) += mfp-pxa3xx.o clock-pxa3xx.o pxa95x.o smemc.o 22obj-$(CONFIG_PXA95x) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o pxa95x.o smemc.o
23obj-$(CONFIG_CPU_PXA300) += pxa300.o 23obj-$(CONFIG_CPU_PXA300) += pxa300.o
24obj-$(CONFIG_CPU_PXA320) += pxa320.o 24obj-$(CONFIG_CPU_PXA320) += pxa320.o
25obj-$(CONFIG_CPU_PXA930) += pxa930.o 25obj-$(CONFIG_CPU_PXA930) += pxa930.o
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index ef3e8b1e06c1..d0f141162171 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -591,7 +591,7 @@ static void balloon3_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ct
591 BALLOON3_NAND_CONTROL_REG); 591 BALLOON3_NAND_CONTROL_REG);
592 if (balloon3_ctl_set) 592 if (balloon3_ctl_set)
593 __raw_writel(balloon3_ctl_set, 593 __raw_writel(balloon3_ctl_set,
594 BALLOON3_NAND_CONTROL_REG | 594 BALLOON3_NAND_CONTROL_REG +
595 BALLOON3_FPGA_SETnCLR); 595 BALLOON3_FPGA_SETnCLR);
596 } 596 }
597 597
@@ -608,7 +608,7 @@ static void balloon3_nand_select_chip(struct mtd_info *mtd, int chip)
608 __raw_writew( 608 __raw_writew(
609 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 | 609 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
610 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3, 610 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3,
611 BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR); 611 BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR);
612 612
613 /* Deassert correct nCE line */ 613 /* Deassert correct nCE line */
614 __raw_writew(BALLOON3_NAND_CONTROL_FLCE0 << chip, 614 __raw_writew(BALLOON3_NAND_CONTROL_FLCE0 << chip,
@@ -626,7 +626,7 @@ static int balloon3_nand_probe(struct platform_device *pdev)
626 int ret; 626 int ret;
627 627
628 __raw_writew(BALLOON3_NAND_CONTROL2_16BIT, 628 __raw_writew(BALLOON3_NAND_CONTROL2_16BIT,
629 BALLOON3_NAND_CONTROL2_REG | BALLOON3_FPGA_SETnCLR); 629 BALLOON3_NAND_CONTROL2_REG + BALLOON3_FPGA_SETnCLR);
630 630
631 ver = __raw_readw(BALLOON3_FPGA_VER); 631 ver = __raw_readw(BALLOON3_FPGA_VER);
632 if (ver < 0x4f08) 632 if (ver < 0x4f08)
@@ -649,7 +649,7 @@ static int balloon3_nand_probe(struct platform_device *pdev)
649 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 | 649 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
650 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 | 650 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 |
651 BALLOON3_NAND_CONTROL_FLWP, 651 BALLOON3_NAND_CONTROL_FLWP,
652 BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR); 652 BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR);
653 return 0; 653 return 0;
654 654
655err2: 655err2:
@@ -807,7 +807,7 @@ static void __init balloon3_init(void)
807 807
808static struct map_desc balloon3_io_desc[] __initdata = { 808static struct map_desc balloon3_io_desc[] __initdata = {
809 { /* CPLD/FPGA */ 809 { /* CPLD/FPGA */
810 .virtual = BALLOON3_FPGA_VIRT, 810 .virtual = (unsigned long)BALLOON3_FPGA_VIRT,
811 .pfn = __phys_to_pfn(BALLOON3_FPGA_PHYS), 811 .pfn = __phys_to_pfn(BALLOON3_FPGA_PHYS),
812 .length = BALLOON3_FPGA_LENGTH, 812 .length = BALLOON3_FPGA_LENGTH,
813 .type = MT_DEVICE, 813 .type = MT_DEVICE,
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 6bf479d9b5ac..ebd9259f5ac9 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -26,7 +26,7 @@
26 26
27#include <asm/hardware/it8152.h> 27#include <asm/hardware/it8152.h>
28 28
29unsigned long it8152_base_address; 29void __iomem *it8152_base_address;
30static int cmx2xx_it8152_irq_gpio; 30static int cmx2xx_it8152_irq_gpio;
31 31
32static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) 32static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index 13cf518bbbf8..4f07e160cac2 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -39,7 +39,7 @@ extern void cmx270_init(void);
39#define CMX2XX_NR_IRQS (IRQ_BOARD_START + 40) 39#define CMX2XX_NR_IRQS (IRQ_BOARD_START + 40)
40 40
41/* virtual addresses for statically mapped regions */ 41/* virtual addresses for statically mapped regions */
42#define CMX2XX_VIRT_BASE (0xe8000000) 42#define CMX2XX_VIRT_BASE (void __iomem *)(0xe8000000)
43#define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE) 43#define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE)
44 44
45/* physical address if local-bus attached devices */ 45/* physical address if local-bus attached devices */
@@ -482,7 +482,7 @@ static void __init cmx2xx_init_irq(void)
482/* Map PCI companion statically */ 482/* Map PCI companion statically */
483static struct map_desc cmx2xx_io_desc[] __initdata = { 483static struct map_desc cmx2xx_io_desc[] __initdata = {
484 [0] = { /* PCI bridge */ 484 [0] = { /* PCI bridge */
485 .virtual = CMX2XX_IT8152_VIRT, 485 .virtual = (unsigned long)CMX2XX_IT8152_VIRT,
486 .pfn = __phys_to_pfn(PXA_CS4_PHYS), 486 .pfn = __phys_to_pfn(PXA_CS4_PHYS),
487 .length = SZ_64M, 487 .length = SZ_64M,
488 .type = MT_DEVICE 488 .type = MT_DEVICE
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index b6a51340270b..3814e1243294 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -775,7 +775,6 @@ static struct gpio cm_x300_wi2wi_gpios[] __initdata = {
775 775
776static void __init cm_x300_init_wi2wi(void) 776static void __init cm_x300_init_wi2wi(void)
777{ 777{
778 int bt_reset, wlan_en;
779 int err; 778 int err;
780 779
781 if (system_rev < 130) { 780 if (system_rev < 130) {
@@ -791,12 +790,11 @@ static void __init cm_x300_init_wi2wi(void)
791 } 790 }
792 791
793 udelay(10); 792 udelay(10);
794 gpio_set_value(bt_reset, 0); 793 gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 0);
795 udelay(10); 794 udelay(10);
796 gpio_set_value(bt_reset, 1); 795 gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 1);
797 796
798 gpio_free(wlan_en); 797 gpio_free_array(ARRAY_AND_SIZE(cm_x300_wi2wi_gpios));
799 gpio_free(bt_reset);
800} 798}
801 799
802/* MFP */ 800/* MFP */
diff --git a/arch/arm/mach-pxa/include/mach/addr-map.h b/arch/arm/mach-pxa/include/mach/addr-map.h
index f4c03659168c..bbf9df37ad4b 100644
--- a/arch/arm/mach-pxa/include/mach/addr-map.h
+++ b/arch/arm/mach-pxa/include/mach/addr-map.h
@@ -20,7 +20,7 @@
20 * Peripheral Bus 20 * Peripheral Bus
21 */ 21 */
22#define PERIPH_PHYS 0x40000000 22#define PERIPH_PHYS 0x40000000
23#define PERIPH_VIRT 0xf2000000 23#define PERIPH_VIRT IOMEM(0xf2000000)
24#define PERIPH_SIZE 0x02000000 24#define PERIPH_SIZE 0x02000000
25 25
26/* 26/*
@@ -28,21 +28,21 @@
28 */ 28 */
29#define PXA2XX_SMEMC_PHYS 0x48000000 29#define PXA2XX_SMEMC_PHYS 0x48000000
30#define PXA3XX_SMEMC_PHYS 0x4a000000 30#define PXA3XX_SMEMC_PHYS 0x4a000000
31#define SMEMC_VIRT 0xf6000000 31#define SMEMC_VIRT IOMEM(0xf6000000)
32#define SMEMC_SIZE 0x00100000 32#define SMEMC_SIZE 0x00100000
33 33
34/* 34/*
35 * Dynamic Memory Controller (only on PXA3xx) 35 * Dynamic Memory Controller (only on PXA3xx)
36 */ 36 */
37#define DMEMC_PHYS 0x48100000 37#define DMEMC_PHYS 0x48100000
38#define DMEMC_VIRT 0xf6100000 38#define DMEMC_VIRT IOMEM(0xf6100000)
39#define DMEMC_SIZE 0x00100000 39#define DMEMC_SIZE 0x00100000
40 40
41/* 41/*
42 * Internal Memory Controller (PXA27x and later) 42 * Internal Memory Controller (PXA27x and later)
43 */ 43 */
44#define IMEMC_PHYS 0x58000000 44#define IMEMC_PHYS 0x58000000
45#define IMEMC_VIRT 0xfe000000 45#define IMEMC_VIRT IOMEM(0xfe000000)
46#define IMEMC_SIZE 0x00100000 46#define IMEMC_SIZE 0x00100000
47 47
48#endif /* __ASM_MACH_ADDR_MAP_H */ 48#endif /* __ASM_MACH_ADDR_MAP_H */
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index 7074e76146c9..6d7eab3d0867 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -23,7 +23,7 @@ enum balloon3_features {
23}; 23};
24 24
25#define BALLOON3_FPGA_PHYS PXA_CS4_PHYS 25#define BALLOON3_FPGA_PHYS PXA_CS4_PHYS
26#define BALLOON3_FPGA_VIRT (0xf1000000) /* as per balloon2 */ 26#define BALLOON3_FPGA_VIRT IOMEM(0xf1000000) /* as per balloon2 */
27#define BALLOON3_FPGA_LENGTH 0x01000000 27#define BALLOON3_FPGA_LENGTH 0x01000000
28 28
29#define BALLOON3_FPGA_SETnCLR (0x1000) 29#define BALLOON3_FPGA_SETnCLR (0x1000)
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index de63ca3016b4..8184669dde28 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -36,22 +36,23 @@
36 * Note that not all PXA2xx chips implement all those addresses, and the 36 * Note that not all PXA2xx chips implement all those addresses, and the
37 * kernel only maps the minimum needed range of this mapping. 37 * kernel only maps the minimum needed range of this mapping.
38 */ 38 */
39#define io_p2v(x) (0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
40#define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1)) 39#define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1))
40#define io_p2v(x) IOMEM(0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
41 41
42#ifndef __ASSEMBLY__ 42#ifndef __ASSEMBLY__
43 43# define IOMEM(x) ((void __iomem *)(x))
44# define __REG(x) (*((volatile u32 *)io_p2v(x))) 44# define __REG(x) (*((volatile u32 __iomem *)io_p2v(x)))
45 45
46/* With indexed regs we don't want to feed the index through io_p2v() 46/* With indexed regs we don't want to feed the index through io_p2v()
47 especially if it is a variable, otherwise horrible code will result. */ 47 especially if it is a variable, otherwise horrible code will result. */
48# define __REG2(x,y) \ 48# define __REG2(x,y) \
49 (*(volatile u32 *)((u32)&__REG(x) + (y))) 49 (*(volatile u32 __iomem*)((u32)&__REG(x) + (y)))
50 50
51# define __PREG(x) (io_v2p((u32)&(x))) 51# define __PREG(x) (io_v2p((u32)&(x)))
52 52
53#else 53#else
54 54
55# define IOMEM(x) x
55# define __REG(x) io_p2v(x) 56# define __REG(x) io_p2v(x)
56# define __PREG(x) io_v2p(x) 57# define __PREG(x) io_v2p(x)
57 58
diff --git a/arch/arm/mach-pxa/include/mach/lpd270.h b/arch/arm/mach-pxa/include/mach/lpd270.h
index cd070092b6eb..4edc712a2de8 100644
--- a/arch/arm/mach-pxa/include/mach/lpd270.h
+++ b/arch/arm/mach-pxa/include/mach/lpd270.h
@@ -13,13 +13,13 @@
13#define __ASM_ARCH_LPD270_H 13#define __ASM_ARCH_LPD270_H
14 14
15#define LPD270_CPLD_PHYS PXA_CS2_PHYS 15#define LPD270_CPLD_PHYS PXA_CS2_PHYS
16#define LPD270_CPLD_VIRT 0xf0000000 16#define LPD270_CPLD_VIRT IOMEM(0xf0000000)
17#define LPD270_CPLD_SIZE 0x00100000 17#define LPD270_CPLD_SIZE 0x00100000
18 18
19#define LPD270_ETH_PHYS (PXA_CS2_PHYS + 0x01000000) 19#define LPD270_ETH_PHYS (PXA_CS2_PHYS + 0x01000000)
20 20
21/* CPLD registers */ 21/* CPLD registers */
22#define LPD270_CPLD_REG(x) ((unsigned long)(LPD270_CPLD_VIRT + (x))) 22#define LPD270_CPLD_REG(x) (LPD270_CPLD_VIRT + (x))
23#define LPD270_CONTROL LPD270_CPLD_REG(0x00) 23#define LPD270_CONTROL LPD270_CPLD_REG(0x00)
24#define LPD270_PERIPHERAL0 LPD270_CPLD_REG(0x04) 24#define LPD270_PERIPHERAL0 LPD270_CPLD_REG(0x04)
25#define LPD270_PERIPHERAL1 LPD270_CPLD_REG(0x08) 25#define LPD270_PERIPHERAL1 LPD270_CPLD_REG(0x08)
diff --git a/arch/arm/mach-pxa/include/mach/mtd-xip.h b/arch/arm/mach-pxa/include/mach/mtd-xip.h
index 297387ec3618..990d2bf2fb45 100644
--- a/arch/arm/mach-pxa/include/mach/mtd-xip.h
+++ b/arch/arm/mach-pxa/include/mach/mtd-xip.h
@@ -16,7 +16,6 @@
16#define __ARCH_PXA_MTD_XIP_H__ 16#define __ARCH_PXA_MTD_XIP_H__
17 17
18#include <mach/regs-ost.h> 18#include <mach/regs-ost.h>
19#include <mach/regs-intc.h>
20 19
21#define xip_irqpending() (ICIP & ICMR) 20#define xip_irqpending() (ICIP & ICMR)
22 21
diff --git a/arch/arm/mach-pxa/include/mach/palm27x.h b/arch/arm/mach-pxa/include/mach/palm27x.h
index 0a5e5eadebf5..f80bbe246afe 100644
--- a/arch/arm/mach-pxa/include/mach/palm27x.h
+++ b/arch/arm/mach-pxa/include/mach/palm27x.h
@@ -34,7 +34,7 @@ extern struct pxafb_mode_info palm_320x320_new_lcd_mode;
34extern void __init palm27x_lcd_init(int power, 34extern void __init palm27x_lcd_init(int power,
35 struct pxafb_mode_info *mode); 35 struct pxafb_mode_info *mode);
36#else 36#else
37static inline void palm27x_lcd_init(int power, struct pxafb_mode_info *mode) {} 37#define palm27x_lcd_init(power, mode) do {} while (0)
38#endif 38#endif
39 39
40#if defined(CONFIG_USB_GADGET_PXA27X) || \ 40#if defined(CONFIG_USB_GADGET_PXA27X) || \
diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h
index 10abc4f2e8e4..7074a6ed46c6 100644
--- a/arch/arm/mach-pxa/include/mach/palmtx.h
+++ b/arch/arm/mach-pxa/include/mach/palmtx.h
@@ -71,7 +71,7 @@
71 71
72/* Various addresses */ 72/* Various addresses */
73#define PALMTX_PCMCIA_PHYS 0x28000000 73#define PALMTX_PCMCIA_PHYS 0x28000000
74#define PALMTX_PCMCIA_VIRT 0xf0000000 74#define PALMTX_PCMCIA_VIRT IOMEM(0xf0000000)
75#define PALMTX_PCMCIA_SIZE 0x100000 75#define PALMTX_PCMCIA_SIZE 0x100000
76 76
77#define PALMTX_PHYS_RAM_START 0xa0000000 77#define PALMTX_PHYS_RAM_START 0xa0000000
@@ -84,8 +84,8 @@
84 84
85#define PALMTX_NAND_ALE_PHYS (PALMTX_PHYS_NAND_START | (1 << 24)) 85#define PALMTX_NAND_ALE_PHYS (PALMTX_PHYS_NAND_START | (1 << 24))
86#define PALMTX_NAND_CLE_PHYS (PALMTX_PHYS_NAND_START | (1 << 25)) 86#define PALMTX_NAND_CLE_PHYS (PALMTX_PHYS_NAND_START | (1 << 25))
87#define PALMTX_NAND_ALE_VIRT 0xff100000 87#define PALMTX_NAND_ALE_VIRT IOMEM(0xff100000)
88#define PALMTX_NAND_CLE_VIRT 0xff200000 88#define PALMTX_NAND_CLE_VIRT IOMEM(0xff200000)
89 89
90/* TOUCHSCREEN */ 90/* TOUCHSCREEN */
91#define AC97_LINK_FRAME 21 91#define AC97_LINK_FRAME 21
diff --git a/arch/arm/mach-pxa/include/mach/pxa27x.h b/arch/arm/mach-pxa/include/mach/pxa27x.h
index b9b1bdc4bacc..7cff640582b8 100644
--- a/arch/arm/mach-pxa/include/mach/pxa27x.h
+++ b/arch/arm/mach-pxa/include/mach/pxa27x.h
@@ -1,6 +1,7 @@
1#ifndef __MACH_PXA27x_H 1#ifndef __MACH_PXA27x_H
2#define __MACH_PXA27x_H 2#define __MACH_PXA27x_H
3 3
4#include <linux/suspend.h>
4#include <mach/hardware.h> 5#include <mach/hardware.h>
5#include <mach/pxa2xx-regs.h> 6#include <mach/pxa2xx-regs.h>
6#include <mach/mfp-pxa27x.h> 7#include <mach/mfp-pxa27x.h>
@@ -21,6 +22,7 @@
21extern void __init pxa27x_map_io(void); 22extern void __init pxa27x_map_io(void);
22extern void __init pxa27x_init_irq(void); 23extern void __init pxa27x_init_irq(void);
23extern int __init pxa27x_set_pwrmode(unsigned int mode); 24extern int __init pxa27x_set_pwrmode(unsigned int mode);
25extern void pxa27x_cpu_pm_enter(suspend_state_t state);
24 26
25#define pxa27x_handle_irq ichp_handle_irq 27#define pxa27x_handle_irq ichp_handle_irq
26 28
diff --git a/arch/arm/mach-pxa/include/mach/pxa95x.h b/arch/arm/mach-pxa/include/mach/pxa95x.h
new file mode 100644
index 000000000000..cbb097c4cb1f
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/pxa95x.h
@@ -0,0 +1,7 @@
1#ifndef __MACH_PXA95X_H
2#define __MACH_PXA95X_H
3
4#include <mach/pxa3xx.h>
5#include <mach/mfp-pxa930.h>
6
7#endif /* __MACH_PXA95X_H */
diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h
index 01a45ac48114..486b4c519ae2 100644
--- a/arch/arm/mach-pxa/include/mach/pxafb.h
+++ b/arch/arm/mach-pxa/include/mach/pxafb.h
@@ -158,5 +158,18 @@ struct pxafb_mach_info {
158void pxa_set_fb_info(struct device *, struct pxafb_mach_info *); 158void pxa_set_fb_info(struct device *, struct pxafb_mach_info *);
159unsigned long pxafb_get_hsync_time(struct device *dev); 159unsigned long pxafb_get_hsync_time(struct device *dev);
160 160
161#ifdef CONFIG_FB_PXA_SMARTPANEL
161extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int); 162extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int);
162extern int pxafb_smart_flush(struct fb_info *info); 163extern int pxafb_smart_flush(struct fb_info *info);
164#else
165static inline int pxafb_smart_queue(struct fb_info *info,
166 uint16_t *cmds, int n)
167{
168 return 0;
169}
170
171static inline int pxafb_smart_flush(struct fb_info *info)
172{
173 return 0;
174}
175#endif
diff --git a/arch/arm/mach-pxa/include/mach/smemc.h b/arch/arm/mach-pxa/include/mach/smemc.h
index 654adc90c9a0..b7de471b273a 100644
--- a/arch/arm/mach-pxa/include/mach/smemc.h
+++ b/arch/arm/mach-pxa/include/mach/smemc.h
@@ -13,7 +13,7 @@
13 13
14#define PXA2XX_SMEMC_BASE 0x48000000 14#define PXA2XX_SMEMC_BASE 0x48000000
15#define PXA3XX_SMEMC_BASE 0x4a000000 15#define PXA3XX_SMEMC_BASE 0x4a000000
16#define SMEMC_VIRT 0xf6000000 16#define SMEMC_VIRT IOMEM(0xf6000000)
17 17
18#define MDCNFG (SMEMC_VIRT + 0x00) /* SDRAM Configuration Register 0 */ 18#define MDCNFG (SMEMC_VIRT + 0x00) /* SDRAM Configuration Register 0 */
19#define MDREFR (SMEMC_VIRT + 0x04) /* SDRAM Refresh Control Register */ 19#define MDREFR (SMEMC_VIRT + 0x04) /* SDRAM Refresh Control Register */
diff --git a/arch/arm/mach-pxa/include/mach/zeus.h b/arch/arm/mach-pxa/include/mach/zeus.h
index 0641f31a56b7..56024f81d57e 100644
--- a/arch/arm/mach-pxa/include/mach/zeus.h
+++ b/arch/arm/mach-pxa/include/mach/zeus.h
@@ -68,7 +68,7 @@
68 * Be gentle, and remap that over 32kB... 68 * Be gentle, and remap that over 32kB...
69 */ 69 */
70 70
71#define ZEUS_CPLD (0xf0000000) 71#define ZEUS_CPLD IOMEM(0xf0000000)
72#define ZEUS_CPLD_VERSION (ZEUS_CPLD + 0x0000) 72#define ZEUS_CPLD_VERSION (ZEUS_CPLD + 0x0000)
73#define ZEUS_CPLD_ISA_IRQ (ZEUS_CPLD + 0x1000) 73#define ZEUS_CPLD_ISA_IRQ (ZEUS_CPLD + 0x1000)
74#define ZEUS_CPLD_CONTROL (ZEUS_CPLD + 0x2000) 74#define ZEUS_CPLD_CONTROL (ZEUS_CPLD + 0x2000)
@@ -76,7 +76,7 @@
76/* CPLD register bits */ 76/* CPLD register bits */
77#define ZEUS_CPLD_CONTROL_CF_RST 0x01 77#define ZEUS_CPLD_CONTROL_CF_RST 0x01
78 78
79#define ZEUS_PC104IO (0xf1000000) 79#define ZEUS_PC104IO IOMEM(0xf1000000)
80 80
81#define ZEUS_SRAM_SIZE (256 * 1024) 81#define ZEUS_SRAM_SIZE (256 * 1024)
82 82
diff --git a/arch/arm/mach-pxa/include/mach/zylonite.h b/arch/arm/mach-pxa/include/mach/zylonite.h
index ea24998b923c..ecca976f03d2 100644
--- a/arch/arm/mach-pxa/include/mach/zylonite.h
+++ b/arch/arm/mach-pxa/include/mach/zylonite.h
@@ -19,7 +19,7 @@ extern int wm9713_irq;
19extern int lcd_id; 19extern int lcd_id;
20extern int lcd_orientation; 20extern int lcd_orientation;
21 21
22#ifdef CONFIG_CPU_PXA300 22#ifdef CONFIG_MACH_ZYLONITE300
23extern void zylonite_pxa300_init(void); 23extern void zylonite_pxa300_init(void);
24#else 24#else
25static inline void zylonite_pxa300_init(void) 25static inline void zylonite_pxa300_init(void)
@@ -29,7 +29,7 @@ static inline void zylonite_pxa300_init(void)
29} 29}
30#endif 30#endif
31 31
32#ifdef CONFIG_CPU_PXA320 32#ifdef CONFIG_MACH_ZYLONITE320
33extern void zylonite_pxa320_init(void); 33extern void zylonite_pxa320_init(void);
34#else 34#else
35static inline void zylonite_pxa320_init(void) 35static inline void zylonite_pxa320_init(void)
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index b09e848eb6c6..fead5c779a23 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -25,7 +25,7 @@
25 25
26#include "generic.h" 26#include "generic.h"
27 27
28#define IRQ_BASE (void __iomem *)io_p2v(0x40d00000) 28#define IRQ_BASE io_p2v(0x40d00000)
29 29
30#define ICIP (0x000) 30#define ICIP (0x000)
31#define ICMR (0x004) 31#define ICMR (0x004)
@@ -63,7 +63,7 @@ static inline void __iomem *irq_base(int i)
63 0x40d00130, 63 0x40d00130,
64 }; 64 };
65 65
66 return (void __iomem *)io_p2v(phys_base[i]); 66 return io_p2v(phys_base[i]);
67} 67}
68 68
69void pxa_mask_irq(struct irq_data *d) 69void pxa_mask_irq(struct irq_data *d)
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index c171d6ebee49..e30cdc878086 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -480,7 +480,7 @@ static void __init lpd270_init(void)
480 480
481static struct map_desc lpd270_io_desc[] __initdata = { 481static struct map_desc lpd270_io_desc[] __initdata = {
482 { 482 {
483 .virtual = LPD270_CPLD_VIRT, 483 .virtual = (unsigned long)LPD270_CPLD_VIRT,
484 .pfn = __phys_to_pfn(LPD270_CPLD_PHYS), 484 .pfn = __phys_to_pfn(LPD270_CPLD_PHYS),
485 .length = LPD270_CPLD_SIZE, 485 .length = LPD270_CPLD_SIZE,
486 .type = MT_DEVICE, 486 .type = MT_DEVICE,
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index bb27d4b688d8..30364b0af908 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -423,6 +423,7 @@ static void __init palmphone_common_init(void)
423 palmtreo_leds_init(); 423 palmtreo_leds_init();
424} 424}
425 425
426#ifdef CONFIG_MACH_TREO680
426static void __init treo680_init(void) 427static void __init treo680_init(void)
427{ 428{
428 pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config)); 429 pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config));
@@ -430,7 +431,9 @@ static void __init treo680_init(void)
430 palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, GPIO_NR_TREO680_SD_READONLY, 431 palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, GPIO_NR_TREO680_SD_READONLY,
431 GPIO_NR_TREO680_SD_POWER, 0); 432 GPIO_NR_TREO680_SD_POWER, 0);
432} 433}
434#endif
433 435
436#ifdef CONFIG_MACH_CENTRO
434static void __init centro_init(void) 437static void __init centro_init(void)
435{ 438{
436 pxa2xx_mfp_config(ARRAY_AND_SIZE(centro685_pin_config)); 439 pxa2xx_mfp_config(ARRAY_AND_SIZE(centro685_pin_config));
@@ -438,7 +441,9 @@ static void __init centro_init(void)
438 palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, -1, 441 palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, -1,
439 GPIO_NR_CENTRO_SD_POWER, 1); 442 GPIO_NR_CENTRO_SD_POWER, 1);
440} 443}
444#endif
441 445
446#ifdef CONFIG_MACH_TREO680
442MACHINE_START(TREO680, "Palm Treo 680") 447MACHINE_START(TREO680, "Palm Treo 680")
443 .boot_params = 0xa0000100, 448 .boot_params = 0xa0000100,
444 .map_io = pxa27x_map_io, 449 .map_io = pxa27x_map_io,
@@ -448,7 +453,9 @@ MACHINE_START(TREO680, "Palm Treo 680")
448 .timer = &pxa_timer, 453 .timer = &pxa_timer,
449 .init_machine = treo680_init, 454 .init_machine = treo680_init,
450MACHINE_END 455MACHINE_END
456#endif
451 457
458#ifdef CONFIG_MACH_CENTRO
452MACHINE_START(CENTRO, "Palm Centro 685") 459MACHINE_START(CENTRO, "Palm Centro 685")
453 .boot_params = 0xa0000100, 460 .boot_params = 0xa0000100,
454 .map_io = pxa27x_map_io, 461 .map_io = pxa27x_map_io,
@@ -458,3 +465,4 @@ MACHINE_START(CENTRO, "Palm Centro 685")
458 .timer = &pxa_timer, 465 .timer = &pxa_timer,
459 .init_machine = centro_init, 466 .init_machine = centro_init,
460MACHINE_END 467MACHINE_END
468#endif
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index fc4285589c1f..00c318f2fce3 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -247,7 +247,7 @@ static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd,
247 unsigned int ctrl) 247 unsigned int ctrl)
248{ 248{
249 struct nand_chip *this = mtd->priv; 249 struct nand_chip *this = mtd->priv;
250 unsigned long nandaddr = (unsigned long)this->IO_ADDR_W; 250 char __iomem *nandaddr = this->IO_ADDR_W;
251 251
252 if (cmd == NAND_CMD_NONE) 252 if (cmd == NAND_CMD_NONE)
253 return; 253 return;
@@ -315,17 +315,17 @@ static inline void palmtx_nand_init(void) {}
315 ******************************************************************************/ 315 ******************************************************************************/
316static struct map_desc palmtx_io_desc[] __initdata = { 316static struct map_desc palmtx_io_desc[] __initdata = {
317{ 317{
318 .virtual = PALMTX_PCMCIA_VIRT, 318 .virtual = (unsigned long)PALMTX_PCMCIA_VIRT,
319 .pfn = __phys_to_pfn(PALMTX_PCMCIA_PHYS), 319 .pfn = __phys_to_pfn(PALMTX_PCMCIA_PHYS),
320 .length = PALMTX_PCMCIA_SIZE, 320 .length = PALMTX_PCMCIA_SIZE,
321 .type = MT_DEVICE, 321 .type = MT_DEVICE,
322}, { 322}, {
323 .virtual = PALMTX_NAND_ALE_VIRT, 323 .virtual = (unsigned long)PALMTX_NAND_ALE_VIRT,
324 .pfn = __phys_to_pfn(PALMTX_NAND_ALE_PHYS), 324 .pfn = __phys_to_pfn(PALMTX_NAND_ALE_PHYS),
325 .length = SZ_1M, 325 .length = SZ_1M,
326 .type = MT_DEVICE, 326 .type = MT_DEVICE,
327}, { 327}, {
328 .virtual = PALMTX_NAND_CLE_VIRT, 328 .virtual = (unsigned long)PALMTX_NAND_CLE_VIRT,
329 .pfn = __phys_to_pfn(PALMTX_NAND_CLE_PHYS), 329 .pfn = __phys_to_pfn(PALMTX_NAND_CLE_PHYS),
330 .length = SZ_1M, 330 .length = SZ_1M,
331 .type = MT_DEVICE, 331 .type = MT_DEVICE,
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 9c434d21a271..6c49c7c22f98 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -324,7 +324,7 @@ void __init pxa26x_init_irq(void)
324 324
325static struct map_desc pxa25x_io_desc[] __initdata = { 325static struct map_desc pxa25x_io_desc[] __initdata = {
326 { /* Mem Ctl */ 326 { /* Mem Ctl */
327 .virtual = SMEMC_VIRT, 327 .virtual = (unsigned long)SMEMC_VIRT,
328 .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE), 328 .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
329 .length = 0x00200000, 329 .length = 0x00200000,
330 .type = MT_DEVICE 330 .type = MT_DEVICE
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 9d2400b5f503..729af54991cb 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -390,7 +390,7 @@ void __init pxa27x_init_irq(void)
390 390
391static struct map_desc pxa27x_io_desc[] __initdata = { 391static struct map_desc pxa27x_io_desc[] __initdata = {
392 { /* Mem Ctl */ 392 { /* Mem Ctl */
393 .virtual = SMEMC_VIRT, 393 .virtual = (unsigned long)SMEMC_VIRT,
394 .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE), 394 .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
395 .length = 0x00200000, 395 .length = 0x00200000,
396 .type = MT_DEVICE 396 .type = MT_DEVICE
diff --git a/arch/arm/mach-pxa/pxa3xx-ulpi.c b/arch/arm/mach-pxa/pxa3xx-ulpi.c
index ce7168b233e2..e28dfb88827f 100644
--- a/arch/arm/mach-pxa/pxa3xx-ulpi.c
+++ b/arch/arm/mach-pxa/pxa3xx-ulpi.c
@@ -265,6 +265,7 @@ int pxa3xx_u2d_start_hc(struct usb_bus *host)
265 265
266 return err; 266 return err;
267} 267}
268EXPORT_SYMBOL_GPL(pxa3xx_u2d_start_hc);
268 269
269void pxa3xx_u2d_stop_hc(struct usb_bus *host) 270void pxa3xx_u2d_stop_hc(struct usb_bus *host)
270{ 271{
@@ -277,6 +278,7 @@ void pxa3xx_u2d_stop_hc(struct usb_bus *host)
277 278
278 clk_disable(u2d->clk); 279 clk_disable(u2d->clk);
279} 280}
281EXPORT_SYMBOL_GPL(pxa3xx_u2d_stop_hc);
280 282
281static int pxa3xx_u2d_probe(struct platform_device *pdev) 283static int pxa3xx_u2d_probe(struct platform_device *pdev)
282{ 284{
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index b5cd9e5aba31..b2479cb9467b 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -394,7 +394,7 @@ void __init pxa3xx_init_irq(void)
394 394
395static struct map_desc pxa3xx_io_desc[] __initdata = { 395static struct map_desc pxa3xx_io_desc[] __initdata = {
396 { /* Mem Ctl */ 396 { /* Mem Ctl */
397 .virtual = SMEMC_VIRT, 397 .virtual = (unsigned long)SMEMC_VIRT,
398 .pfn = __phys_to_pfn(PXA3XX_SMEMC_BASE), 398 .pfn = __phys_to_pfn(PXA3XX_SMEMC_BASE),
399 .length = 0x00200000, 399 .length = 0x00200000,
400 .type = MT_DEVICE 400 .type = MT_DEVICE
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index ebd6379c4969..aebd5d9243c3 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -21,9 +21,8 @@
21 21
22#include <mach/irqs.h> 22#include <mach/irqs.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/mfp.h>
25#include <mach/mfp-pxa930.h>
26#include <mach/gpio.h> 24#include <mach/gpio.h>
25#include <mach/pxa95x.h>
27 26
28#include "generic.h" 27#include "generic.h"
29 28
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index 6c9275a20c91..a82d4207f235 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -686,7 +686,8 @@ static void z2_power_off(void)
686 */ 686 */
687 PSPR = 0x0; 687 PSPR = 0x0;
688 local_irq_disable(); 688 local_irq_disable();
689 pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PLAT_PHYS_OFFSET - PAGE_OFFSET); 689 pxa27x_set_pwrmode(PWRMODE_DEEPSLEEP);
690 pxa27x_cpu_pm_enter(PM_SUSPEND_MEM);
690} 691}
691#else 692#else
692#define z2_power_off NULL 693#define z2_power_off NULL
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 99c49bcd9f70..9188492fec2f 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -860,25 +860,25 @@ static void __init zeus_init(void)
860 860
861static struct map_desc zeus_io_desc[] __initdata = { 861static struct map_desc zeus_io_desc[] __initdata = {
862 { 862 {
863 .virtual = ZEUS_CPLD_VERSION, 863 .virtual = (unsigned long)ZEUS_CPLD_VERSION,
864 .pfn = __phys_to_pfn(ZEUS_CPLD_VERSION_PHYS), 864 .pfn = __phys_to_pfn(ZEUS_CPLD_VERSION_PHYS),
865 .length = 0x1000, 865 .length = 0x1000,
866 .type = MT_DEVICE, 866 .type = MT_DEVICE,
867 }, 867 },
868 { 868 {
869 .virtual = ZEUS_CPLD_ISA_IRQ, 869 .virtual = (unsigned long)ZEUS_CPLD_ISA_IRQ,
870 .pfn = __phys_to_pfn(ZEUS_CPLD_ISA_IRQ_PHYS), 870 .pfn = __phys_to_pfn(ZEUS_CPLD_ISA_IRQ_PHYS),
871 .length = 0x1000, 871 .length = 0x1000,
872 .type = MT_DEVICE, 872 .type = MT_DEVICE,
873 }, 873 },
874 { 874 {
875 .virtual = ZEUS_CPLD_CONTROL, 875 .virtual = (unsigned long)ZEUS_CPLD_CONTROL,
876 .pfn = __phys_to_pfn(ZEUS_CPLD_CONTROL_PHYS), 876 .pfn = __phys_to_pfn(ZEUS_CPLD_CONTROL_PHYS),
877 .length = 0x1000, 877 .length = 0x1000,
878 .type = MT_DEVICE, 878 .type = MT_DEVICE,
879 }, 879 },
880 { 880 {
881 .virtual = ZEUS_PC104IO, 881 .virtual = (unsigned long)ZEUS_PC104IO,
882 .pfn = __phys_to_pfn(ZEUS_PC104IO_PHYS), 882 .pfn = __phys_to_pfn(ZEUS_PC104IO_PHYS),
883 .length = 0x00800000, 883 .length = 0x00800000,
884 .type = MT_DEVICE, 884 .type = MT_DEVICE,
diff --git a/arch/arm/plat-pxa/gpio.c b/arch/arm/plat-pxa/gpio.c
index a11dc3670505..0db7615c2cf0 100644
--- a/arch/arm/plat-pxa/gpio.c
+++ b/arch/arm/plat-pxa/gpio.c
@@ -122,7 +122,7 @@ static int __init pxa_init_gpio_chip(int gpio_end)
122 struct gpio_chip *c = &chips[i].chip; 122 struct gpio_chip *c = &chips[i].chip;
123 123
124 sprintf(chips[i].label, "gpio-%d", i); 124 sprintf(chips[i].label, "gpio-%d", i);
125 chips[i].regbase = (void __iomem *)GPIO_BANK(i); 125 chips[i].regbase = GPIO_BANK(i);
126 126
127 c->base = gpio; 127 c->base = gpio;
128 c->label = chips[i].label; 128 c->label = chips[i].label;
diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h
index 89e68e07b0a8..5c79c29f2833 100644
--- a/arch/arm/plat-pxa/include/plat/mfp.h
+++ b/arch/arm/plat-pxa/include/plat/mfp.h
@@ -456,7 +456,7 @@ struct mfp_addr_map {
456 456
457#define MFP_ADDR_END { MFP_PIN_INVALID, 0 } 457#define MFP_ADDR_END { MFP_PIN_INVALID, 0 }
458 458
459void __init mfp_init_base(unsigned long mfpr_base); 459void __init mfp_init_base(void __iomem *mfpr_base);
460void __init mfp_init_addr(struct mfp_addr_map *map); 460void __init mfp_init_addr(struct mfp_addr_map *map);
461 461
462/* 462/*
diff --git a/arch/arm/plat-pxa/mfp.c b/arch/arm/plat-pxa/mfp.c
index be12eadcce20..2c4dbb1f4236 100644
--- a/arch/arm/plat-pxa/mfp.c
+++ b/arch/arm/plat-pxa/mfp.c
@@ -229,7 +229,7 @@ void mfp_write(int mfp, unsigned long val)
229 spin_unlock_irqrestore(&mfp_spin_lock, flags); 229 spin_unlock_irqrestore(&mfp_spin_lock, flags);
230} 230}
231 231
232void __init mfp_init_base(unsigned long mfpr_base) 232void __init mfp_init_base(void __iomem *mfpr_base)
233{ 233{
234 int i; 234 int i;
235 235
@@ -237,7 +237,7 @@ void __init mfp_init_base(unsigned long mfpr_base)
237 for (i = 0; i < ARRAY_SIZE(mfp_table); i++) 237 for (i = 0; i < ARRAY_SIZE(mfp_table); i++)
238 mfp_table[i].config = -1; 238 mfp_table[i].config = -1;
239 239
240 mfpr_mmio_base = (void __iomem *)mfpr_base; 240 mfpr_mmio_base = mfpr_base;
241} 241}
242 242
243void __init mfp_init_addr(struct mfp_addr_map *map) 243void __init mfp_init_addr(struct mfp_addr_map *map)