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authorIngo Molnar <mingo@elte.hu>2011-02-14 07:18:51 -0500
committerIngo Molnar <mingo@elte.hu>2011-02-14 07:18:56 -0500
commit91e04ec05838a5b2c790decf2a91af98cb1666e8 (patch)
treeea7373bdfab118ab6312ed3fa1fc0694ccfb38db /arch/arm
parent792363d2beceb1c7d865e517fa9939c8b8c1442a (diff)
parent100b33c8bd8a3235fd0b7948338d6cbb3db3c63d (diff)
Merge commit 'v2.6.38-rc4' into x86/cpu
Merge reason: pick up the latest fixes. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/io.h33
-rw-r--r--arch/arm/kernel/head.S22
-rw-r--r--arch/arm/mach-ep93xx/core.c2
-rw-r--r--arch/arm/mach-footbridge/include/mach/debug-macro.S4
-rw-r--r--arch/arm/mach-imx/mach-mx25_3ds.c2
-rw-r--r--arch/arm/mach-ixp4xx/common.c4
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/timex.h5
-rw-r--r--arch/arm/mach-ixp4xx/ixp4xx_qmgr.c9
-rw-r--r--arch/arm/mach-mxs/clock-mx23.c4
-rw-r--r--arch/arm/mach-mxs/clock-mx28.c7
-rw-r--r--arch/arm/mach-mxs/clock.c2
-rw-r--r--arch/arm/mach-mxs/gpio.c2
-rw-r--r--arch/arm/mach-mxs/include/mach/clock.h2
-rw-r--r--arch/arm/mach-omap1/include/mach/entry-macro.S13
-rw-r--r--arch/arm/mach-omap1/irq.c2
-rw-r--r--arch/arm/mach-omap1/lcd_dma.c24
-rw-r--r--arch/arm/mach-omap1/time.c1
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c27
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c2
-rw-r--r--arch/arm/mach-omap2/board-rm680.c3
-rw-r--r--arch/arm/mach-omap2/dma.c2
-rw-r--r--arch/arm/mach-omap2/include/mach/entry-macro.S14
-rw-r--r--arch/arm/mach-omap2/io.c6
-rw-r--r--arch/arm/mach-omap2/mux.c3
-rw-r--r--arch/arm/mach-omap2/pm24xx.c4
-rw-r--r--arch/arm/mach-omap2/pm34xx.c11
-rw-r--r--arch/arm/mach-omap2/serial.c4
-rw-r--r--arch/arm/mach-omap2/smartreflex.c11
-rw-r--r--arch/arm/mach-omap2/voltage.c1
-rw-r--r--arch/arm/mach-tegra/gpio.c4
-rw-r--r--arch/arm/mach-tegra/include/mach/clk.h2
-rw-r--r--arch/arm/mach-tegra/include/mach/clkdev.h2
-rw-r--r--arch/arm/mach-tegra/include/mach/kbc.h61
-rw-r--r--arch/arm/mach-tegra/irq.c18
-rw-r--r--arch/arm/mm/init.c6
-rw-r--r--arch/arm/plat-mxc/include/mach/uncompress.h2
-rw-r--r--arch/arm/tools/mach-types105
37 files changed, 283 insertions, 143 deletions
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 20e0f7c9e03e..d66605dea55a 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -95,6 +95,15 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
95 return (void __iomem *)addr; 95 return (void __iomem *)addr;
96} 96}
97 97
98/* IO barriers */
99#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
100#define __iormb() rmb()
101#define __iowmb() wmb()
102#else
103#define __iormb() do { } while (0)
104#define __iowmb() do { } while (0)
105#endif
106
98/* 107/*
99 * Now, pick up the machine-defined IO definitions 108 * Now, pick up the machine-defined IO definitions
100 */ 109 */
@@ -125,17 +134,17 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
125 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. 134 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
126 */ 135 */
127#ifdef __io 136#ifdef __io
128#define outb(v,p) __raw_writeb(v,__io(p)) 137#define outb(v,p) ({ __iowmb(); __raw_writeb(v,__io(p)); })
129#define outw(v,p) __raw_writew((__force __u16) \ 138#define outw(v,p) ({ __iowmb(); __raw_writew((__force __u16) \
130 cpu_to_le16(v),__io(p)) 139 cpu_to_le16(v),__io(p)); })
131#define outl(v,p) __raw_writel((__force __u32) \ 140#define outl(v,p) ({ __iowmb(); __raw_writel((__force __u32) \
132 cpu_to_le32(v),__io(p)) 141 cpu_to_le32(v),__io(p)); })
133 142
134#define inb(p) ({ __u8 __v = __raw_readb(__io(p)); __v; }) 143#define inb(p) ({ __u8 __v = __raw_readb(__io(p)); __iormb(); __v; })
135#define inw(p) ({ __u16 __v = le16_to_cpu((__force __le16) \ 144#define inw(p) ({ __u16 __v = le16_to_cpu((__force __le16) \
136 __raw_readw(__io(p))); __v; }) 145 __raw_readw(__io(p))); __iormb(); __v; })
137#define inl(p) ({ __u32 __v = le32_to_cpu((__force __le32) \ 146#define inl(p) ({ __u32 __v = le32_to_cpu((__force __le32) \
138 __raw_readl(__io(p))); __v; }) 147 __raw_readl(__io(p))); __iormb(); __v; })
139 148
140#define outsb(p,d,l) __raw_writesb(__io(p),d,l) 149#define outsb(p,d,l) __raw_writesb(__io(p),d,l)
141#define outsw(p,d,l) __raw_writesw(__io(p),d,l) 150#define outsw(p,d,l) __raw_writesw(__io(p),d,l)
@@ -192,14 +201,6 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
192#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \ 201#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \
193 cpu_to_le32(v),__mem_pci(c))) 202 cpu_to_le32(v),__mem_pci(c)))
194 203
195#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
196#define __iormb() rmb()
197#define __iowmb() wmb()
198#else
199#define __iormb() do { } while (0)
200#define __iowmb() do { } while (0)
201#endif
202
203#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) 204#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
204#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) 205#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
205#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; }) 206#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index f17d9a09e8fb..c0225da3fb21 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -392,24 +392,22 @@ ENDPROC(__turn_mmu_on)
392 392
393#ifdef CONFIG_SMP_ON_UP 393#ifdef CONFIG_SMP_ON_UP
394__fixup_smp: 394__fixup_smp:
395 mov r4, #0x00070000 395 and r3, r9, #0x000f0000 @ architecture version
396 orr r3, r4, #0xff000000 @ mask 0xff070000 396 teq r3, #0x000f0000 @ CPU ID supported?
397 orr r4, r4, #0x41000000 @ val 0x41070000
398 and r0, r9, r3
399 teq r0, r4 @ ARM CPU and ARMv6/v7?
400 bne __fixup_smp_on_up @ no, assume UP 397 bne __fixup_smp_on_up @ no, assume UP
401 398
402 orr r3, r3, #0x0000ff00 399 bic r3, r9, #0x00ff0000
403 orr r3, r3, #0x000000f0 @ mask 0xff07fff0 400 bic r3, r3, #0x0000000f @ mask 0xff00fff0
401 mov r4, #0x41000000
404 orr r4, r4, #0x0000b000 402 orr r4, r4, #0x0000b000
405 orr r4, r4, #0x00000020 @ val 0x4107b020 403 orr r4, r4, #0x00000020 @ val 0x4100b020
406 and r0, r9, r3 404 teq r3, r4 @ ARM 11MPCore?
407 teq r0, r4 @ ARM 11MPCore?
408 moveq pc, lr @ yes, assume SMP 405 moveq pc, lr @ yes, assume SMP
409 406
410 mrc p15, 0, r0, c0, c0, 5 @ read MPIDR 407 mrc p15, 0, r0, c0, c0, 5 @ read MPIDR
411 tst r0, #1 << 31 408 and r0, r0, #0xc0000000 @ multiprocessing extensions and
412 movne pc, lr @ bit 31 => SMP 409 teq r0, #0x80000000 @ not part of a uniprocessor system?
410 moveq pc, lr @ yes, assume SMP
413 411
414__fixup_smp_on_up: 412__fixup_smp_on_up:
415 adr r0, 1f 413 adr r0, 1f
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index ffdf87be2958..82079545adc4 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -838,7 +838,7 @@ EXPORT_SYMBOL(ep93xx_i2s_release);
838static struct resource ep93xx_ac97_resources[] = { 838static struct resource ep93xx_ac97_resources[] = {
839 { 839 {
840 .start = EP93XX_AAC_PHYS_BASE, 840 .start = EP93XX_AAC_PHYS_BASE,
841 .end = EP93XX_AAC_PHYS_BASE + 0xb0 - 1, 841 .end = EP93XX_AAC_PHYS_BASE + 0xac - 1,
842 .flags = IORESOURCE_MEM, 842 .flags = IORESOURCE_MEM,
843 }, 843 },
844 { 844 {
diff --git a/arch/arm/mach-footbridge/include/mach/debug-macro.S b/arch/arm/mach-footbridge/include/mach/debug-macro.S
index 3c9e0c40c679..30b971d65815 100644
--- a/arch/arm/mach-footbridge/include/mach/debug-macro.S
+++ b/arch/arm/mach-footbridge/include/mach/debug-macro.S
@@ -17,8 +17,8 @@
17 /* For NetWinder debugging */ 17 /* For NetWinder debugging */
18 .macro addruart, rp, rv 18 .macro addruart, rp, rv
19 mov \rp, #0x000003f8 19 mov \rp, #0x000003f8
20 orr \rv, \rp, #0x7c000000 @ physical 20 orr \rv, \rp, #0xff000000 @ virtual
21 orr \rp, \rp, #0xff000000 @ virtual 21 orr \rp, \rp, #0x7c000000 @ physical
22 .endm 22 .endm
23 23
24#define UART_SHIFT 0 24#define UART_SHIFT 0
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
index aa76cfd9f348..8382e7902078 100644
--- a/arch/arm/mach-imx/mach-mx25_3ds.c
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -180,7 +180,7 @@ static const uint32_t mx25pdk_keymap[] = {
180 KEY(3, 3, KEY_POWER), 180 KEY(3, 3, KEY_POWER),
181}; 181};
182 182
183static const struct matrix_keymap_data mx25pdk_keymap_data __initdata = { 183static const struct matrix_keymap_data mx25pdk_keymap_data __initconst = {
184 .keymap = mx25pdk_keymap, 184 .keymap = mx25pdk_keymap,
185 .keymap_size = ARRAY_SIZE(mx25pdk_keymap), 185 .keymap_size = ARRAY_SIZE(mx25pdk_keymap),
186}; 186};
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 4dc68d6bb6be..9fd894271d5d 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -432,7 +432,7 @@ static struct clocksource clocksource_ixp4xx = {
432 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 432 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
433}; 433};
434 434
435unsigned long ixp4xx_timer_freq = FREQ; 435unsigned long ixp4xx_timer_freq = IXP4XX_TIMER_FREQ;
436EXPORT_SYMBOL(ixp4xx_timer_freq); 436EXPORT_SYMBOL(ixp4xx_timer_freq);
437static void __init ixp4xx_clocksource_init(void) 437static void __init ixp4xx_clocksource_init(void)
438{ 438{
@@ -496,7 +496,7 @@ static struct clock_event_device clockevent_ixp4xx = {
496 496
497static void __init ixp4xx_clockevent_init(void) 497static void __init ixp4xx_clockevent_init(void)
498{ 498{
499 clockevent_ixp4xx.mult = div_sc(FREQ, NSEC_PER_SEC, 499 clockevent_ixp4xx.mult = div_sc(IXP4XX_TIMER_FREQ, NSEC_PER_SEC,
500 clockevent_ixp4xx.shift); 500 clockevent_ixp4xx.shift);
501 clockevent_ixp4xx.max_delta_ns = 501 clockevent_ixp4xx.max_delta_ns =
502 clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx); 502 clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx);
diff --git a/arch/arm/mach-ixp4xx/include/mach/timex.h b/arch/arm/mach-ixp4xx/include/mach/timex.h
index 2c3f93c3eb79..c9e930f29339 100644
--- a/arch/arm/mach-ixp4xx/include/mach/timex.h
+++ b/arch/arm/mach-ixp4xx/include/mach/timex.h
@@ -10,6 +10,7 @@
10 * 66.66... MHz. We do a convulted calculation of CLOCK_TICK_RATE b/c the 10 * 66.66... MHz. We do a convulted calculation of CLOCK_TICK_RATE b/c the
11 * timer register ignores the bottom 2 bits of the LATCH value. 11 * timer register ignores the bottom 2 bits of the LATCH value.
12 */ 12 */
13#define FREQ 66666000 13#define IXP4XX_TIMER_FREQ 66666000
14#define CLOCK_TICK_RATE (((FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ) 14#define CLOCK_TICK_RATE \
15 (((IXP4XX_TIMER_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ)
15 16
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
index bfdbe4b5a3cc..852f7c9f87d0 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
@@ -265,6 +265,11 @@ void qmgr_release_queue(unsigned int queue)
265 qmgr_queue_descs[queue], queue); 265 qmgr_queue_descs[queue], queue);
266 qmgr_queue_descs[queue][0] = '\x0'; 266 qmgr_queue_descs[queue][0] = '\x0';
267#endif 267#endif
268
269 while ((addr = qmgr_get_entry(queue)))
270 printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n",
271 queue, addr);
272
268 __raw_writel(0, &qmgr_regs->sram[queue]); 273 __raw_writel(0, &qmgr_regs->sram[queue]);
269 274
270 used_sram_bitmap[0] &= ~mask[0]; 275 used_sram_bitmap[0] &= ~mask[0];
@@ -275,10 +280,6 @@ void qmgr_release_queue(unsigned int queue)
275 spin_unlock_irq(&qmgr_lock); 280 spin_unlock_irq(&qmgr_lock);
276 281
277 module_put(THIS_MODULE); 282 module_put(THIS_MODULE);
278
279 while ((addr = qmgr_get_entry(queue)))
280 printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n",
281 queue, addr);
282} 283}
283 284
284static int qmgr_init(void) 285static int qmgr_init(void)
diff --git a/arch/arm/mach-mxs/clock-mx23.c b/arch/arm/mach-mxs/clock-mx23.c
index b1a362ebfded..ca72a05ed9c1 100644
--- a/arch/arm/mach-mxs/clock-mx23.c
+++ b/arch/arm/mach-mxs/clock-mx23.c
@@ -304,7 +304,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
304 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \ 304 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
305 reg &= ~BM_CLKCTRL_##dr##_DIV; \ 305 reg &= ~BM_CLKCTRL_##dr##_DIV; \
306 reg |= div << BP_CLKCTRL_##dr##_DIV; \ 306 reg |= div << BP_CLKCTRL_##dr##_DIV; \
307 if (reg | (1 << clk->enable_shift)) { \ 307 if (reg & (1 << clk->enable_shift)) { \
308 pr_err("%s: clock is gated\n", __func__); \ 308 pr_err("%s: clock is gated\n", __func__); \
309 return -EINVAL; \ 309 return -EINVAL; \
310 } \ 310 } \
@@ -347,7 +347,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \
347{ \ 347{ \
348 if (parent != clk->parent) { \ 348 if (parent != clk->parent) { \
349 __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \ 349 __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \
350 HW_CLKCTRL_CLKSEQ_TOG); \ 350 CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \
351 clk->parent = parent; \ 351 clk->parent = parent; \
352 } \ 352 } \
353 \ 353 \
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index 56312c092a9e..fd1c4c54b8e5 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -355,12 +355,12 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
355 } else { \ 355 } else { \
356 reg &= ~BM_CLKCTRL_##dr##_DIV; \ 356 reg &= ~BM_CLKCTRL_##dr##_DIV; \
357 reg |= div << BP_CLKCTRL_##dr##_DIV; \ 357 reg |= div << BP_CLKCTRL_##dr##_DIV; \
358 if (reg | (1 << clk->enable_shift)) { \ 358 if (reg & (1 << clk->enable_shift)) { \
359 pr_err("%s: clock is gated\n", __func__); \ 359 pr_err("%s: clock is gated\n", __func__); \
360 return -EINVAL; \ 360 return -EINVAL; \
361 } \ 361 } \
362 } \ 362 } \
363 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU); \ 363 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
364 \ 364 \
365 for (i = 10000; i; i--) \ 365 for (i = 10000; i; i--) \
366 if (!(__raw_readl(CLKCTRL_BASE_ADDR + \ 366 if (!(__raw_readl(CLKCTRL_BASE_ADDR + \
@@ -483,7 +483,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \
483{ \ 483{ \
484 if (parent != clk->parent) { \ 484 if (parent != clk->parent) { \
485 __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \ 485 __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \
486 HW_CLKCTRL_CLKSEQ_TOG); \ 486 CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \
487 clk->parent = parent; \ 487 clk->parent = parent; \
488 } \ 488 } \
489 \ 489 \
@@ -609,7 +609,6 @@ static struct clk_lookup lookups[] = {
609 _REGISTER_CLOCK("duart", NULL, uart_clk) 609 _REGISTER_CLOCK("duart", NULL, uart_clk)
610 _REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk) 610 _REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk)
611 _REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk) 611 _REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk)
612 _REGISTER_CLOCK("fec.0", NULL, fec_clk)
613 _REGISTER_CLOCK("rtc", NULL, rtc_clk) 612 _REGISTER_CLOCK("rtc", NULL, rtc_clk)
614 _REGISTER_CLOCK("pll2", NULL, pll2_clk) 613 _REGISTER_CLOCK("pll2", NULL, pll2_clk)
615 _REGISTER_CLOCK(NULL, "hclk", hbus_clk) 614 _REGISTER_CLOCK(NULL, "hclk", hbus_clk)
diff --git a/arch/arm/mach-mxs/clock.c b/arch/arm/mach-mxs/clock.c
index e7d2269cf70e..a7093c88e6a6 100644
--- a/arch/arm/mach-mxs/clock.c
+++ b/arch/arm/mach-mxs/clock.c
@@ -57,7 +57,6 @@ static void __clk_disable(struct clk *clk)
57 if (clk->disable) 57 if (clk->disable)
58 clk->disable(clk); 58 clk->disable(clk);
59 __clk_disable(clk->parent); 59 __clk_disable(clk->parent);
60 __clk_disable(clk->secondary);
61 } 60 }
62} 61}
63 62
@@ -68,7 +67,6 @@ static int __clk_enable(struct clk *clk)
68 67
69 if (clk->usecount++ == 0) { 68 if (clk->usecount++ == 0) {
70 __clk_enable(clk->parent); 69 __clk_enable(clk->parent);
71 __clk_enable(clk->secondary);
72 70
73 if (clk->enable) 71 if (clk->enable)
74 clk->enable(clk); 72 clk->enable(clk);
diff --git a/arch/arm/mach-mxs/gpio.c b/arch/arm/mach-mxs/gpio.c
index d7ad7a61366d..cb0c0e83a527 100644
--- a/arch/arm/mach-mxs/gpio.c
+++ b/arch/arm/mach-mxs/gpio.c
@@ -139,6 +139,8 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
139 struct mxs_gpio_port *port = (struct mxs_gpio_port *)get_irq_data(irq); 139 struct mxs_gpio_port *port = (struct mxs_gpio_port *)get_irq_data(irq);
140 u32 gpio_irq_no_base = port->virtual_irq_start; 140 u32 gpio_irq_no_base = port->virtual_irq_start;
141 141
142 desc->irq_data.chip->irq_ack(&desc->irq_data);
143
142 irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) & 144 irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) &
143 __raw_readl(port->base + PINCTRL_IRQEN(port->id)); 145 __raw_readl(port->base + PINCTRL_IRQEN(port->id));
144 146
diff --git a/arch/arm/mach-mxs/include/mach/clock.h b/arch/arm/mach-mxs/include/mach/clock.h
index 041e276d8a32..592c9ab5d760 100644
--- a/arch/arm/mach-mxs/include/mach/clock.h
+++ b/arch/arm/mach-mxs/include/mach/clock.h
@@ -29,8 +29,6 @@ struct clk {
29 int id; 29 int id;
30 /* Source clock this clk depends on */ 30 /* Source clock this clk depends on */
31 struct clk *parent; 31 struct clk *parent;
32 /* Secondary clock to enable/disable with this clock */
33 struct clk *secondary;
34 /* Reference count of clock enable/disable */ 32 /* Reference count of clock enable/disable */
35 __s8 usecount; 33 __s8 usecount;
36 /* Register bit position for clock's enable/disable control. */ 34 /* Register bit position for clock's enable/disable control. */
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S
index c9be6d4d83e2..bfb4fb1d7382 100644
--- a/arch/arm/mach-omap1/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap1/include/mach/entry-macro.S
@@ -14,19 +14,6 @@
14#include <mach/irqs.h> 14#include <mach/irqs.h>
15#include <asm/hardware/gic.h> 15#include <asm/hardware/gic.h>
16 16
17/*
18 * We use __glue to avoid errors with multiple definitions of
19 * .globl omap_irq_flags as it's included from entry-armv.S but not
20 * from entry-common.S.
21 */
22#ifdef __glue
23 .pushsection .data
24 .globl omap_irq_flags
25omap_irq_flags:
26 .word 0
27 .popsection
28#endif
29
30 .macro disable_fiq 17 .macro disable_fiq
31 .endm 18 .endm
32 19
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index 47701584df35..731dd33bff51 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -57,6 +57,7 @@ struct omap_irq_bank {
57 unsigned long wake_enable; 57 unsigned long wake_enable;
58}; 58};
59 59
60u32 omap_irq_flags;
60static unsigned int irq_bank_count; 61static unsigned int irq_bank_count;
61static struct omap_irq_bank *irq_banks; 62static struct omap_irq_bank *irq_banks;
62 63
@@ -176,7 +177,6 @@ static struct irq_chip omap_irq_chip = {
176 177
177void __init omap_init_irq(void) 178void __init omap_init_irq(void)
178{ 179{
179 extern unsigned int omap_irq_flags;
180 int i, j; 180 int i, j;
181 181
182#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 182#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c
index c9088d85da04..453809359ba6 100644
--- a/arch/arm/mach-omap1/lcd_dma.c
+++ b/arch/arm/mach-omap1/lcd_dma.c
@@ -37,7 +37,7 @@ int omap_lcd_dma_running(void)
37 * On OMAP1510, internal LCD controller will start the transfer 37 * On OMAP1510, internal LCD controller will start the transfer
38 * when it gets enabled, so assume DMA running if LCD enabled. 38 * when it gets enabled, so assume DMA running if LCD enabled.
39 */ 39 */
40 if (cpu_is_omap1510()) 40 if (cpu_is_omap15xx())
41 if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN) 41 if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN)
42 return 1; 42 return 1;
43 43
@@ -95,7 +95,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer);
95 95
96void omap_set_lcd_dma_b1_rotation(int rotate) 96void omap_set_lcd_dma_b1_rotation(int rotate)
97{ 97{
98 if (cpu_is_omap1510()) { 98 if (cpu_is_omap15xx()) {
99 printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n"); 99 printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n");
100 BUG(); 100 BUG();
101 return; 101 return;
@@ -106,7 +106,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_rotation);
106 106
107void omap_set_lcd_dma_b1_mirror(int mirror) 107void omap_set_lcd_dma_b1_mirror(int mirror)
108{ 108{
109 if (cpu_is_omap1510()) { 109 if (cpu_is_omap15xx()) {
110 printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n"); 110 printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n");
111 BUG(); 111 BUG();
112 } 112 }
@@ -116,7 +116,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror);
116 116
117void omap_set_lcd_dma_b1_vxres(unsigned long vxres) 117void omap_set_lcd_dma_b1_vxres(unsigned long vxres)
118{ 118{
119 if (cpu_is_omap1510()) { 119 if (cpu_is_omap15xx()) {
120 printk(KERN_ERR "DMA virtual resulotion is not supported " 120 printk(KERN_ERR "DMA virtual resulotion is not supported "
121 "in 1510 mode\n"); 121 "in 1510 mode\n");
122 BUG(); 122 BUG();
@@ -127,7 +127,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_vxres);
127 127
128void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale) 128void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale)
129{ 129{
130 if (cpu_is_omap1510()) { 130 if (cpu_is_omap15xx()) {
131 printk(KERN_ERR "DMA scale is not supported in 1510 mode\n"); 131 printk(KERN_ERR "DMA scale is not supported in 1510 mode\n");
132 BUG(); 132 BUG();
133 } 133 }
@@ -177,7 +177,7 @@ static void set_b1_regs(void)
177 bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1); 177 bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
178 /* 1510 DMA requires the bottom address to be 2 more 178 /* 1510 DMA requires the bottom address to be 2 more
179 * than the actual last memory access location. */ 179 * than the actual last memory access location. */
180 if (cpu_is_omap1510() && 180 if (cpu_is_omap15xx() &&
181 lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32) 181 lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32)
182 bottom += 2; 182 bottom += 2;
183 ei = PIXSTEP(0, 0, 1, 0); 183 ei = PIXSTEP(0, 0, 1, 0);
@@ -241,7 +241,7 @@ static void set_b1_regs(void)
241 return; /* Suppress warning about uninitialized vars */ 241 return; /* Suppress warning about uninitialized vars */
242 } 242 }
243 243
244 if (cpu_is_omap1510()) { 244 if (cpu_is_omap15xx()) {
245 omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U); 245 omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U);
246 omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L); 246 omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L);
247 omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U); 247 omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U);
@@ -343,7 +343,7 @@ void omap_free_lcd_dma(void)
343 BUG(); 343 BUG();
344 return; 344 return;
345 } 345 }
346 if (!cpu_is_omap1510()) 346 if (!cpu_is_omap15xx())
347 omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1, 347 omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1,
348 OMAP1610_DMA_LCD_CCR); 348 OMAP1610_DMA_LCD_CCR);
349 lcd_dma.reserved = 0; 349 lcd_dma.reserved = 0;
@@ -360,7 +360,7 @@ void omap_enable_lcd_dma(void)
360 * connected. Otherwise the OMAP internal controller will 360 * connected. Otherwise the OMAP internal controller will
361 * start the transfer when it gets enabled. 361 * start the transfer when it gets enabled.
362 */ 362 */
363 if (cpu_is_omap1510() || !lcd_dma.ext_ctrl) 363 if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
364 return; 364 return;
365 365
366 w = omap_readw(OMAP1610_DMA_LCD_CTRL); 366 w = omap_readw(OMAP1610_DMA_LCD_CTRL);
@@ -378,14 +378,14 @@ EXPORT_SYMBOL(omap_enable_lcd_dma);
378void omap_setup_lcd_dma(void) 378void omap_setup_lcd_dma(void)
379{ 379{
380 BUG_ON(lcd_dma.active); 380 BUG_ON(lcd_dma.active);
381 if (!cpu_is_omap1510()) { 381 if (!cpu_is_omap15xx()) {
382 /* Set some reasonable defaults */ 382 /* Set some reasonable defaults */
383 omap_writew(0x5440, OMAP1610_DMA_LCD_CCR); 383 omap_writew(0x5440, OMAP1610_DMA_LCD_CCR);
384 omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP); 384 omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP);
385 omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL); 385 omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL);
386 } 386 }
387 set_b1_regs(); 387 set_b1_regs();
388 if (!cpu_is_omap1510()) { 388 if (!cpu_is_omap15xx()) {
389 u16 w; 389 u16 w;
390 390
391 w = omap_readw(OMAP1610_DMA_LCD_CCR); 391 w = omap_readw(OMAP1610_DMA_LCD_CCR);
@@ -407,7 +407,7 @@ void omap_stop_lcd_dma(void)
407 u16 w; 407 u16 w;
408 408
409 lcd_dma.active = 0; 409 lcd_dma.active = 0;
410 if (cpu_is_omap1510() || !lcd_dma.ext_ctrl) 410 if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
411 return; 411 return;
412 412
413 w = omap_readw(OMAP1610_DMA_LCD_CCR); 413 w = omap_readw(OMAP1610_DMA_LCD_CCR);
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index f83fc335c613..6885d2fac183 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -44,7 +44,6 @@
44#include <linux/clocksource.h> 44#include <linux/clocksource.h>
45#include <linux/clockchips.h> 45#include <linux/clockchips.h>
46#include <linux/io.h> 46#include <linux/io.h>
47#include <linux/sched.h>
48 47
49#include <asm/system.h> 48#include <asm/system.h>
50#include <mach/hardware.h> 49#include <mach/hardware.h>
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index e906e05bb41b..9a2a31e011ce 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -115,9 +115,6 @@ static struct omap2_hsmmc_info mmc[] = {
115 115
116static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev) 116static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
117{ 117{
118 twl_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, REG_GPIODATADIR1);
119 twl_i2c_write_u8(TWL4030_MODULE_LED, 0x0, 0x0);
120
121 if (gpio_is_valid(dssdev->reset_gpio)) 118 if (gpio_is_valid(dssdev->reset_gpio))
122 gpio_set_value_cansleep(dssdev->reset_gpio, 1); 119 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
123 return 0; 120 return 0;
@@ -247,6 +244,8 @@ static struct gpio_led gpio_leds[];
247static int devkit8000_twl_gpio_setup(struct device *dev, 244static int devkit8000_twl_gpio_setup(struct device *dev,
248 unsigned gpio, unsigned ngpio) 245 unsigned gpio, unsigned ngpio)
249{ 246{
247 int ret;
248
250 omap_mux_init_gpio(29, OMAP_PIN_INPUT); 249 omap_mux_init_gpio(29, OMAP_PIN_INPUT);
251 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 250 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
252 mmc[0].gpio_cd = gpio + 0; 251 mmc[0].gpio_cd = gpio + 0;
@@ -255,17 +254,23 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
255 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ 254 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
256 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; 255 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
257 256
258 /* gpio + 1 is "LCD_PWREN" (out, active high) */ 257 /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
259 devkit8000_lcd_device.reset_gpio = gpio + 1; 258 devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0;
260 gpio_request(devkit8000_lcd_device.reset_gpio, "LCD_PWREN"); 259 ret = gpio_request_one(devkit8000_lcd_device.reset_gpio,
261 /* Disable until needed */ 260 GPIOF_DIR_OUT | GPIOF_INIT_LOW, "LCD_PWREN");
262 gpio_direction_output(devkit8000_lcd_device.reset_gpio, 0); 261 if (ret < 0) {
262 devkit8000_lcd_device.reset_gpio = -EINVAL;
263 printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n");
264 }
263 265
264 /* gpio + 7 is "DVI_PD" (out, active low) */ 266 /* gpio + 7 is "DVI_PD" (out, active low) */
265 devkit8000_dvi_device.reset_gpio = gpio + 7; 267 devkit8000_dvi_device.reset_gpio = gpio + 7;
266 gpio_request(devkit8000_dvi_device.reset_gpio, "DVI PowerDown"); 268 ret = gpio_request_one(devkit8000_dvi_device.reset_gpio,
267 /* Disable until needed */ 269 GPIOF_DIR_OUT | GPIOF_INIT_LOW, "DVI PowerDown");
268 gpio_direction_output(devkit8000_dvi_device.reset_gpio, 0); 270 if (ret < 0) {
271 devkit8000_dvi_device.reset_gpio = -EINVAL;
272 printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n");
273 }
269 274
270 return 0; 275 return 0;
271} 276}
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index e001a048dc0c..e944025d5ef8 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -409,8 +409,6 @@ static void __init omap4_panda_init(void)
409 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices)); 409 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
410 omap_serial_init(); 410 omap_serial_init();
411 omap4_twl6030_hsmmc_init(mmc); 411 omap4_twl6030_hsmmc_init(mmc);
412 /* OMAP4 Panda uses internal transceiver so register nop transceiver */
413 usb_nop_xceiv_register();
414 omap4_ehci_init(); 412 omap4_ehci_init();
415 usb_musb_init(&musb_board_data); 413 usb_musb_init(&musb_board_data);
416} 414}
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index cb77be7ac44f..39a71bb8a308 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -40,9 +40,6 @@ static struct regulator_consumer_supply rm680_vemmc_consumers[] = {
40static struct regulator_init_data rm680_vemmc = { 40static struct regulator_init_data rm680_vemmc = {
41 .constraints = { 41 .constraints = {
42 .name = "rm680_vemmc", 42 .name = "rm680_vemmc",
43 .min_uV = 2900000,
44 .max_uV = 2900000,
45 .apply_uV = 1,
46 .valid_modes_mask = REGULATOR_MODE_NORMAL 43 .valid_modes_mask = REGULATOR_MODE_NORMAL
47 | REGULATOR_MODE_STANDBY, 44 | REGULATOR_MODE_STANDBY,
48 .valid_ops_mask = REGULATOR_CHANGE_STATUS 45 .valid_ops_mask = REGULATOR_CHANGE_STATUS
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index d2f15f5cfd36..34922b2d2e3f 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -264,7 +264,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
264 if (IS_ERR(od)) { 264 if (IS_ERR(od)) {
265 pr_err("%s: Cant build omap_device for %s:%s.\n", 265 pr_err("%s: Cant build omap_device for %s:%s.\n",
266 __func__, name, oh->name); 266 __func__, name, oh->name);
267 return IS_ERR(od); 267 return PTR_ERR(od);
268 } 268 }
269 269
270 mem = platform_get_resource(&od->pdev, IORESOURCE_MEM, 0); 270 mem = platform_get_resource(&od->pdev, IORESOURCE_MEM, 0);
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index befa321c4c13..81985a665cb3 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -38,20 +38,6 @@
38 */ 38 */
39 39
40#ifdef MULTI_OMAP2 40#ifdef MULTI_OMAP2
41
42/*
43 * We use __glue to avoid errors with multiple definitions of
44 * .globl omap_irq_base as it's included from entry-armv.S but not
45 * from entry-common.S.
46 */
47#ifdef __glue
48 .pushsection .data
49 .globl omap_irq_base
50omap_irq_base:
51 .word 0
52 .popsection
53#endif
54
55 /* 41 /*
56 * Configure the interrupt base on the first interrupt. 42 * Configure the interrupt base on the first interrupt.
57 * See also omap_irq_base_init for setting omap_irq_base. 43 * See also omap_irq_base_init for setting omap_irq_base.
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index e66687b0b9de..c2032041d26f 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -314,14 +314,13 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
314 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); 314 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
315} 315}
316 316
317void __iomem *omap_irq_base;
318
317/* 319/*
318 * Initialize asm_irq_base for entry-macro.S 320 * Initialize asm_irq_base for entry-macro.S
319 */ 321 */
320static inline void omap_irq_base_init(void) 322static inline void omap_irq_base_init(void)
321{ 323{
322 extern void __iomem *omap_irq_base;
323
324#ifdef MULTI_OMAP2
325 if (cpu_is_omap24xx()) 324 if (cpu_is_omap24xx())
326 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE); 325 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE);
327 else if (cpu_is_omap34xx()) 326 else if (cpu_is_omap34xx())
@@ -330,7 +329,6 @@ static inline void omap_irq_base_init(void)
330 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE); 329 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE);
331 else 330 else
332 pr_err("Could not initialize omap_irq_base\n"); 331 pr_err("Could not initialize omap_irq_base\n");
333#endif
334} 332}
335 333
336void __init omap2_init_common_infrastructure(void) 334void __init omap2_init_common_infrastructure(void)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index df8d2f2872c6..98148b6c36e9 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -160,7 +160,7 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
160 struct omap_mux *mux = NULL; 160 struct omap_mux *mux = NULL;
161 struct omap_mux_entry *e; 161 struct omap_mux_entry *e;
162 const char *mode_name; 162 const char *mode_name;
163 int found = 0, found_mode, mode0_len = 0; 163 int found = 0, found_mode = 0, mode0_len = 0;
164 struct list_head *muxmodes = &partition->muxmodes; 164 struct list_head *muxmodes = &partition->muxmodes;
165 165
166 mode_name = strchr(muxname, '.'); 166 mode_name = strchr(muxname, '.');
@@ -1000,6 +1000,7 @@ int __init omap_mux_init(const char *name, u32 flags,
1000 if (!partition->base) { 1000 if (!partition->base) {
1001 pr_err("%s: Could not ioremap mux partition at 0x%08x\n", 1001 pr_err("%s: Could not ioremap mux partition at 0x%08x\n",
1002 __func__, partition->phys); 1002 __func__, partition->phys);
1003 kfree(partition);
1003 return -ENODEV; 1004 return -ENODEV;
1004 } 1005 }
1005 1006
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 9e5dc8ed51e9..97feb3ab6a69 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -134,7 +134,7 @@ static void omap2_enter_full_retention(void)
134 134
135 /* Block console output in case it is on one of the OMAP UARTs */ 135 /* Block console output in case it is on one of the OMAP UARTs */
136 if (!is_suspending()) 136 if (!is_suspending())
137 if (try_acquire_console_sem()) 137 if (!console_trylock())
138 goto no_sleep; 138 goto no_sleep;
139 139
140 omap_uart_prepare_idle(0); 140 omap_uart_prepare_idle(0);
@@ -151,7 +151,7 @@ static void omap2_enter_full_retention(void)
151 omap_uart_resume_idle(0); 151 omap_uart_resume_idle(0);
152 152
153 if (!is_suspending()) 153 if (!is_suspending())
154 release_console_sem(); 154 console_unlock();
155 155
156no_sleep: 156no_sleep:
157 if (omap2_pm_debug) { 157 if (omap2_pm_debug) {
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 8cbbeade4b8a..2f864e4b085d 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -168,9 +168,10 @@ static void omap3_core_restore_context(void)
168 * once during boot sequence, but this works as we are not using secure 168 * once during boot sequence, but this works as we are not using secure
169 * services. 169 * services.
170 */ 170 */
171static void omap3_save_secure_ram_context(u32 target_mpu_state) 171static void omap3_save_secure_ram_context(void)
172{ 172{
173 u32 ret; 173 u32 ret;
174 int mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
174 175
175 if (omap_type() != OMAP2_DEVICE_TYPE_GP) { 176 if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
176 /* 177 /*
@@ -181,7 +182,7 @@ static void omap3_save_secure_ram_context(u32 target_mpu_state)
181 pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); 182 pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
182 ret = _omap_save_secure_sram((u32 *) 183 ret = _omap_save_secure_sram((u32 *)
183 __pa(omap3_secure_ram_storage)); 184 __pa(omap3_secure_ram_storage));
184 pwrdm_set_next_pwrst(mpu_pwrdm, target_mpu_state); 185 pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state);
185 /* Following is for error tracking, it should not happen */ 186 /* Following is for error tracking, it should not happen */
186 if (ret) { 187 if (ret) {
187 printk(KERN_ERR "save_secure_sram() returns %08x\n", 188 printk(KERN_ERR "save_secure_sram() returns %08x\n",
@@ -398,7 +399,7 @@ void omap_sram_idle(void)
398 if (!is_suspending()) 399 if (!is_suspending())
399 if (per_next_state < PWRDM_POWER_ON || 400 if (per_next_state < PWRDM_POWER_ON ||
400 core_next_state < PWRDM_POWER_ON) 401 core_next_state < PWRDM_POWER_ON)
401 if (try_acquire_console_sem()) 402 if (!console_trylock())
402 goto console_still_active; 403 goto console_still_active;
403 404
404 /* PER */ 405 /* PER */
@@ -481,7 +482,7 @@ void omap_sram_idle(void)
481 } 482 }
482 483
483 if (!is_suspending()) 484 if (!is_suspending())
484 release_console_sem(); 485 console_unlock();
485 486
486console_still_active: 487console_still_active:
487 /* Disable IO-PAD and IO-CHAIN wakeup */ 488 /* Disable IO-PAD and IO-CHAIN wakeup */
@@ -1094,7 +1095,7 @@ static int __init omap3_pm_init(void)
1094 local_fiq_disable(); 1095 local_fiq_disable();
1095 1096
1096 omap_dma_global_context_save(); 1097 omap_dma_global_context_save();
1097 omap3_save_secure_ram_context(PWRDM_POWER_ON); 1098 omap3_save_secure_ram_context();
1098 omap_dma_global_context_restore(); 1099 omap_dma_global_context_restore();
1099 1100
1100 local_irq_enable(); 1101 local_irq_enable();
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 302da7403a10..32e91a9c8b6b 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -812,7 +812,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
812 812
813 oh->dev_attr = uart; 813 oh->dev_attr = uart;
814 814
815 acquire_console_sem(); /* in case the earlycon is on the UART */ 815 console_lock(); /* in case the earlycon is on the UART */
816 816
817 /* 817 /*
818 * Because of early UART probing, UART did not get idled 818 * Because of early UART probing, UART did not get idled
@@ -838,7 +838,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
838 omap_uart_block_sleep(uart); 838 omap_uart_block_sleep(uart);
839 uart->timeout = DEFAULT_TIMEOUT; 839 uart->timeout = DEFAULT_TIMEOUT;
840 840
841 release_console_sem(); 841 console_unlock();
842 842
843 if ((cpu_is_omap34xx() && uart->padconf) || 843 if ((cpu_is_omap34xx() && uart->padconf) ||
844 (uart->wk_en && uart->wk_mask)) { 844 (uart->wk_en && uart->wk_mask)) {
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 77ecebf3fae2..c37e823266d3 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -780,8 +780,7 @@ static int omap_sr_autocomp_show(void *data, u64 *val)
780 struct omap_sr *sr_info = (struct omap_sr *) data; 780 struct omap_sr *sr_info = (struct omap_sr *) data;
781 781
782 if (!sr_info) { 782 if (!sr_info) {
783 pr_warning("%s: omap_sr struct for sr_%s not found\n", 783 pr_warning("%s: omap_sr struct not found\n", __func__);
784 __func__, sr_info->voltdm->name);
785 return -EINVAL; 784 return -EINVAL;
786 } 785 }
787 786
@@ -795,8 +794,7 @@ static int omap_sr_autocomp_store(void *data, u64 val)
795 struct omap_sr *sr_info = (struct omap_sr *) data; 794 struct omap_sr *sr_info = (struct omap_sr *) data;
796 795
797 if (!sr_info) { 796 if (!sr_info) {
798 pr_warning("%s: omap_sr struct for sr_%s not found\n", 797 pr_warning("%s: omap_sr struct not found\n", __func__);
799 __func__, sr_info->voltdm->name);
800 return -EINVAL; 798 return -EINVAL;
801 } 799 }
802 800
@@ -834,7 +832,8 @@ static int __init omap_sr_probe(struct platform_device *pdev)
834 832
835 if (!pdata) { 833 if (!pdata) {
836 dev_err(&pdev->dev, "%s: platform data missing\n", __func__); 834 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
837 return -EINVAL; 835 ret = -EINVAL;
836 goto err_free_devinfo;
838 } 837 }
839 838
840 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 839 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -966,7 +965,7 @@ static int __devexit omap_sr_remove(struct platform_device *pdev)
966 } 965 }
967 966
968 sr_info = _sr_lookup(pdata->voltdm); 967 sr_info = _sr_lookup(pdata->voltdm);
969 if (!sr_info) { 968 if (IS_ERR(sr_info)) {
970 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", 969 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
971 __func__); 970 __func__);
972 return -EINVAL; 971 return -EINVAL;
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index ed6079c94c57..12be525b8df4 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -471,6 +471,7 @@ static void __init vdd_debugfs_init(struct omap_vdd_info *vdd)
471 strcat(name, vdd->voltdm.name); 471 strcat(name, vdd->voltdm.name);
472 472
473 vdd->debug_dir = debugfs_create_dir(name, voltage_dir); 473 vdd->debug_dir = debugfs_create_dir(name, voltage_dir);
474 kfree(name);
474 if (IS_ERR(vdd->debug_dir)) { 475 if (IS_ERR(vdd->debug_dir)) {
475 pr_warning("%s: Unable to create debugfs directory for" 476 pr_warning("%s: Unable to create debugfs directory for"
476 " vdd_%s\n", __func__, vdd->voltdm.name); 477 " vdd_%s\n", __func__, vdd->voltdm.name);
diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c
index bd066206e110..ad8048801513 100644
--- a/arch/arm/mach-tegra/gpio.c
+++ b/arch/arm/mach-tegra/gpio.c
@@ -207,9 +207,9 @@ static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type)
207 spin_unlock_irqrestore(&bank->lvl_lock[port], flags); 207 spin_unlock_irqrestore(&bank->lvl_lock[port], flags);
208 208
209 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) 209 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
210 __set_irq_handler_unlocked(irq, handle_level_irq); 210 __set_irq_handler_unlocked(d->irq, handle_level_irq);
211 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) 211 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
212 __set_irq_handler_unlocked(irq, handle_edge_irq); 212 __set_irq_handler_unlocked(d->irq, handle_edge_irq);
213 213
214 return 0; 214 return 0;
215} 215}
diff --git a/arch/arm/mach-tegra/include/mach/clk.h b/arch/arm/mach-tegra/include/mach/clk.h
index d7723955dac7..a217f68ba57c 100644
--- a/arch/arm/mach-tegra/include/mach/clk.h
+++ b/arch/arm/mach-tegra/include/mach/clk.h
@@ -20,6 +20,8 @@
20#ifndef __MACH_CLK_H 20#ifndef __MACH_CLK_H
21#define __MACH_CLK_H 21#define __MACH_CLK_H
22 22
23struct clk;
24
23void tegra_periph_reset_deassert(struct clk *c); 25void tegra_periph_reset_deassert(struct clk *c);
24void tegra_periph_reset_assert(struct clk *c); 26void tegra_periph_reset_assert(struct clk *c);
25 27
diff --git a/arch/arm/mach-tegra/include/mach/clkdev.h b/arch/arm/mach-tegra/include/mach/clkdev.h
index 412f5c63e65a..66cd3f4fc896 100644
--- a/arch/arm/mach-tegra/include/mach/clkdev.h
+++ b/arch/arm/mach-tegra/include/mach/clkdev.h
@@ -20,6 +20,8 @@
20#ifndef __MACH_CLKDEV_H 20#ifndef __MACH_CLKDEV_H
21#define __MACH_CLKDEV_H 21#define __MACH_CLKDEV_H
22 22
23struct clk;
24
23static inline int __clk_get(struct clk *clk) 25static inline int __clk_get(struct clk *clk)
24{ 26{
25 return 1; 27 return 1;
diff --git a/arch/arm/mach-tegra/include/mach/kbc.h b/arch/arm/mach-tegra/include/mach/kbc.h
new file mode 100644
index 000000000000..66ad2760c621
--- /dev/null
+++ b/arch/arm/mach-tegra/include/mach/kbc.h
@@ -0,0 +1,61 @@
1/*
2 * Platform definitions for tegra-kbc keyboard input driver
3 *
4 * Copyright (c) 2010-2011, NVIDIA Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
19 */
20
21#ifndef ASMARM_ARCH_TEGRA_KBC_H
22#define ASMARM_ARCH_TEGRA_KBC_H
23
24#include <linux/types.h>
25#include <linux/input/matrix_keypad.h>
26
27#ifdef CONFIG_ARCH_TEGRA_2x_SOC
28#define KBC_MAX_GPIO 24
29#define KBC_MAX_KPENT 8
30#else
31#define KBC_MAX_GPIO 20
32#define KBC_MAX_KPENT 7
33#endif
34
35#define KBC_MAX_ROW 16
36#define KBC_MAX_COL 8
37#define KBC_MAX_KEY (KBC_MAX_ROW * KBC_MAX_COL)
38
39struct tegra_kbc_pin_cfg {
40 bool is_row;
41 unsigned char num;
42};
43
44struct tegra_kbc_wake_key {
45 u8 row:4;
46 u8 col:4;
47};
48
49struct tegra_kbc_platform_data {
50 unsigned int debounce_cnt;
51 unsigned int repeat_cnt;
52
53 unsigned int wake_cnt; /* 0:wake on any key >1:wake on wake_cfg */
54 const struct tegra_kbc_wake_key *wake_cfg;
55
56 struct tegra_kbc_pin_cfg pin_cfg[KBC_MAX_GPIO];
57 const struct matrix_keymap_data *keymap_data;
58
59 bool wakeup;
60};
61#endif
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
index de7dfad6f769..17c74d21077c 100644
--- a/arch/arm/mach-tegra/irq.c
+++ b/arch/arm/mach-tegra/irq.c
@@ -46,24 +46,24 @@
46#define ICTLR_COP_IER_CLR 0x38 46#define ICTLR_COP_IER_CLR 0x38
47#define ICTLR_COP_IEP_CLASS 0x3c 47#define ICTLR_COP_IEP_CLASS 0x3c
48 48
49static void (*gic_mask_irq)(struct irq_data *d); 49static void (*tegra_gic_mask_irq)(struct irq_data *d);
50static void (*gic_unmask_irq)(struct irq_data *d); 50static void (*tegra_gic_unmask_irq)(struct irq_data *d);
51 51
52#define irq_to_ictlr(irq) (((irq)-32) >> 5) 52#define irq_to_ictlr(irq) (((irq) - 32) >> 5)
53static void __iomem *tegra_ictlr_base = IO_ADDRESS(TEGRA_PRIMARY_ICTLR_BASE); 53static void __iomem *tegra_ictlr_base = IO_ADDRESS(TEGRA_PRIMARY_ICTLR_BASE);
54#define ictlr_to_virt(ictlr) (tegra_ictlr_base + (ictlr)*0x100) 54#define ictlr_to_virt(ictlr) (tegra_ictlr_base + (ictlr) * 0x100)
55 55
56static void tegra_mask(struct irq_data *d) 56static void tegra_mask(struct irq_data *d)
57{ 57{
58 void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq)); 58 void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq));
59 gic_mask_irq(d); 59 tegra_gic_mask_irq(d);
60 writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_CLR); 60 writel(1 << (d->irq & 31), addr+ICTLR_CPU_IER_CLR);
61} 61}
62 62
63static void tegra_unmask(struct irq_data *d) 63static void tegra_unmask(struct irq_data *d)
64{ 64{
65 void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq)); 65 void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq));
66 gic_unmask_irq(d); 66 tegra_gic_unmask_irq(d);
67 writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_SET); 67 writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_SET);
68} 68}
69 69
@@ -98,8 +98,8 @@ void __init tegra_init_irq(void)
98 IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); 98 IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
99 99
100 gic = get_irq_chip(29); 100 gic = get_irq_chip(29);
101 gic_unmask_irq = gic->irq_unmask; 101 tegra_gic_unmask_irq = gic->irq_unmask;
102 gic_mask_irq = gic->irq_mask; 102 tegra_gic_mask_irq = gic->irq_mask;
103 tegra_irq.irq_ack = gic->irq_ack; 103 tegra_irq.irq_ack = gic->irq_ack;
104#ifdef CONFIG_SMP 104#ifdef CONFIG_SMP
105 tegra_irq.irq_set_affinity = gic->irq_set_affinity; 105 tegra_irq.irq_set_affinity = gic->irq_set_affinity;
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 5164069ced42..cddd684364da 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -297,6 +297,12 @@ void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc)
297 memblock_reserve(__pa(_stext), _end - _stext); 297 memblock_reserve(__pa(_stext), _end - _stext);
298#endif 298#endif
299#ifdef CONFIG_BLK_DEV_INITRD 299#ifdef CONFIG_BLK_DEV_INITRD
300 if (phys_initrd_size &&
301 memblock_is_region_reserved(phys_initrd_start, phys_initrd_size)) {
302 pr_err("INITRD: 0x%08lx+0x%08lx overlaps in-use memory region - disabling initrd\n",
303 phys_initrd_start, phys_initrd_size);
304 phys_initrd_start = phys_initrd_size = 0;
305 }
300 if (phys_initrd_size) { 306 if (phys_initrd_size) {
301 memblock_reserve(phys_initrd_start, phys_initrd_size); 307 memblock_reserve(phys_initrd_start, phys_initrd_size);
302 308
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index 3a70ebf0477f..ff469c4f1d76 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -95,6 +95,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
95 case MACH_TYPE_MX35_3DS: 95 case MACH_TYPE_MX35_3DS:
96 case MACH_TYPE_PCM043: 96 case MACH_TYPE_PCM043:
97 case MACH_TYPE_LILLY1131: 97 case MACH_TYPE_LILLY1131:
98 case MACH_TYPE_VPR200:
98 uart_base = MX3X_UART1_BASE_ADDR; 99 uart_base = MX3X_UART1_BASE_ADDR;
99 break; 100 break;
100 case MACH_TYPE_MAGX_ZN5: 101 case MACH_TYPE_MAGX_ZN5:
@@ -102,6 +103,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
102 break; 103 break;
103 case MACH_TYPE_MX51_BABBAGE: 104 case MACH_TYPE_MX51_BABBAGE:
104 case MACH_TYPE_EUKREA_CPUIMX51SD: 105 case MACH_TYPE_EUKREA_CPUIMX51SD:
106 case MACH_TYPE_MX51_3DS:
105 uart_base = MX51_UART1_BASE_ADDR; 107 uart_base = MX51_UART1_BASE_ADDR;
106 break; 108 break;
107 case MACH_TYPE_MX50_RDP: 109 case MACH_TYPE_MX50_RDP:
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 2fea897ebeb1..9d6feaabbe7d 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Sun Dec 12 23:24:27 2010 15# Last update: Mon Feb 7 08:59:27 2011
16# 16#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 18#
@@ -2240,7 +2240,7 @@ arm_ultimator2 MACH_ARM_ULTIMATOR2 ARM_ULTIMATOR2 2250
2240vs_v210 MACH_VS_V210 VS_V210 2252 2240vs_v210 MACH_VS_V210 VS_V210 2252
2241vs_v212 MACH_VS_V212 VS_V212 2253 2241vs_v212 MACH_VS_V212 VS_V212 2253
2242hmt MACH_HMT HMT 2254 2242hmt MACH_HMT HMT 2254
2243suen3 MACH_SUEN3 SUEN3 2255 2243km_kirkwood MACH_KM_KIRKWOOD KM_KIRKWOOD 2255
2244vesper MACH_VESPER VESPER 2256 2244vesper MACH_VESPER VESPER 2256
2245str9 MACH_STR9 STR9 2257 2245str9 MACH_STR9 STR9 2257
2246omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258 2246omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258
@@ -2987,7 +2987,7 @@ pxwnas_500_1000 MACH_PXWNAS_500_1000 PXWNAS_500_1000 3001
2987ea20 MACH_EA20 EA20 3002 2987ea20 MACH_EA20 EA20 3002
2988awm2 MACH_AWM2 AWM2 3003 2988awm2 MACH_AWM2 AWM2 3003
2989ti8148evm MACH_TI8148EVM TI8148EVM 3004 2989ti8148evm MACH_TI8148EVM TI8148EVM 3004
2990tegra_seaboard MACH_TEGRA_SEABOARD TEGRA_SEABOARD 3005 2990seaboard MACH_SEABOARD SEABOARD 3005
2991linkstation_chlv2 MACH_LINKSTATION_CHLV2 LINKSTATION_CHLV2 3006 2991linkstation_chlv2 MACH_LINKSTATION_CHLV2 LINKSTATION_CHLV2 3006
2992tera_pro2_rack MACH_TERA_PRO2_RACK TERA_PRO2_RACK 3007 2992tera_pro2_rack MACH_TERA_PRO2_RACK TERA_PRO2_RACK 3007
2993rubys MACH_RUBYS RUBYS 3008 2993rubys MACH_RUBYS RUBYS 3008
@@ -3190,7 +3190,7 @@ synergy MACH_SYNERGY SYNERGY 3205
3190ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206 3190ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206
3191wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207 3191wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207
3192punica MACH_PUNICA PUNICA 3208 3192punica MACH_PUNICA PUNICA 3208
3193sbc_nt250 MACH_SBC_NT250 SBC_NT250 3209 3193trimslice MACH_TRIMSLICE TRIMSLICE 3209
3194mx27_wmultra MACH_MX27_WMULTRA MX27_WMULTRA 3210 3194mx27_wmultra MACH_MX27_WMULTRA MX27_WMULTRA 3210
3195mackerel MACH_MACKEREL MACKEREL 3211 3195mackerel MACH_MACKEREL MACKEREL 3211
3196fa9x27 MACH_FA9X27 FA9X27 3213 3196fa9x27 MACH_FA9X27 FA9X27 3213
@@ -3219,3 +3219,100 @@ pivicc MACH_PIVICC PIVICC 3235
3219pcm048 MACH_PCM048 PCM048 3236 3219pcm048 MACH_PCM048 PCM048 3236
3220dds MACH_DDS DDS 3237 3220dds MACH_DDS DDS 3237
3221chalten_xa1 MACH_CHALTEN_XA1 CHALTEN_XA1 3238 3221chalten_xa1 MACH_CHALTEN_XA1 CHALTEN_XA1 3238
3222ts48xx MACH_TS48XX TS48XX 3239
3223tonga2_tfttimer MACH_TONGA2_TFTTIMER TONGA2_TFTTIMER 3240
3224whistler MACH_WHISTLER WHISTLER 3241
3225asl_phoenix MACH_ASL_PHOENIX ASL_PHOENIX 3242
3226at91sam9263otlite MACH_AT91SAM9263OTLITE AT91SAM9263OTLITE 3243
3227ddplug MACH_DDPLUG DDPLUG 3244
3228d2plug MACH_D2PLUG D2PLUG 3245
3229kzm9d MACH_KZM9D KZM9D 3246
3230verdi_lte MACH_VERDI_LTE VERDI_LTE 3247
3231nanozoom MACH_NANOZOOM NANOZOOM 3248
3232dm3730_som_lv MACH_DM3730_SOM_LV DM3730_SOM_LV 3249
3233dm3730_torpedo MACH_DM3730_TORPEDO DM3730_TORPEDO 3250
3234anchovy MACH_ANCHOVY ANCHOVY 3251
3235re2rev20 MACH_RE2REV20 RE2REV20 3253
3236re2rev21 MACH_RE2REV21 RE2REV21 3254
3237cns21xx MACH_CNS21XX CNS21XX 3255
3238rider MACH_RIDER RIDER 3257
3239nsk330 MACH_NSK330 NSK330 3258
3240cns2133evb MACH_CNS2133EVB CNS2133EVB 3259
3241z3_816x_mod MACH_Z3_816X_MOD Z3_816X_MOD 3260
3242z3_814x_mod MACH_Z3_814X_MOD Z3_814X_MOD 3261
3243beect MACH_BEECT BEECT 3262
3244dma_thunderbug MACH_DMA_THUNDERBUG DMA_THUNDERBUG 3263
3245omn_at91sam9g20 MACH_OMN_AT91SAM9G20 OMN_AT91SAM9G20 3264
3246mx25_e2s_uc MACH_MX25_E2S_UC MX25_E2S_UC 3265
3247mione MACH_MIONE MIONE 3266
3248top9000_tcu MACH_TOP9000_TCU TOP9000_TCU 3267
3249top9000_bsl MACH_TOP9000_BSL TOP9000_BSL 3268
3250kingdom MACH_KINGDOM KINGDOM 3269
3251armadillo460 MACH_ARMADILLO460 ARMADILLO460 3270
3252lq2 MACH_LQ2 LQ2 3271
3253sweda_tms2 MACH_SWEDA_TMS2 SWEDA_TMS2 3272
3254mx53_loco MACH_MX53_LOCO MX53_LOCO 3273
3255acer_a8 MACH_ACER_A8 ACER_A8 3275
3256acer_gauguin MACH_ACER_GAUGUIN ACER_GAUGUIN 3276
3257guppy MACH_GUPPY GUPPY 3277
3258mx61_ard MACH_MX61_ARD MX61_ARD 3278
3259tx53 MACH_TX53 TX53 3279
3260omapl138_case_a3 MACH_OMAPL138_CASE_A3 OMAPL138_CASE_A3 3280
3261uemd MACH_UEMD UEMD 3281
3262ccwmx51mut MACH_CCWMX51MUT CCWMX51MUT 3282
3263rockhopper MACH_ROCKHOPPER ROCKHOPPER 3283
3264nookcolor MACH_NOOKCOLOR NOOKCOLOR 3284
3265hkdkc100 MACH_HKDKC100 HKDKC100 3285
3266ts42xx MACH_TS42XX TS42XX 3286
3267aebl MACH_AEBL AEBL 3287
3268wario MACH_WARIO WARIO 3288
3269gfs_spm MACH_GFS_SPM GFS_SPM 3289
3270cm_t3730 MACH_CM_T3730 CM_T3730 3290
3271isc3 MACH_ISC3 ISC3 3291
3272rascal MACH_RASCAL RASCAL 3292
3273hrefv60 MACH_HREFV60 HREFV60 3293
3274tpt_2_0 MACH_TPT_2_0 TPT_2_0 3294
3275pyramid_td MACH_PYRAMID_TD PYRAMID_TD 3295
3276splendor MACH_SPLENDOR SPLENDOR 3296
3277guf_planet MACH_GUF_PLANET GUF_PLANET 3297
3278msm8x60_qt MACH_MSM8X60_QT MSM8X60_QT 3298
3279htc_hd_mini MACH_HTC_HD_MINI HTC_HD_MINI 3299
3280athene MACH_ATHENE ATHENE 3300
3281deep_r_ek_1 MACH_DEEP_R_EK_1 DEEP_R_EK_1 3301
3282vivow_ct MACH_VIVOW_CT VIVOW_CT 3302
3283nery_1000 MACH_NERY_1000 NERY_1000 3303
3284rfl109145_ssrv MACH_RFL109145_SSRV RFL109145_SSRV 3304
3285nmh MACH_NMH NMH 3305
3286wn802t MACH_WN802T WN802T 3306
3287dragonet MACH_DRAGONET DRAGONET 3307
3288geneva_b MACH_GENEVA_B GENEVA_B 3308
3289at91sam9263desk16l MACH_AT91SAM9263DESK16L AT91SAM9263DESK16L 3309
3290bcmhana_sv MACH_BCMHANA_SV BCMHANA_SV 3310
3291bcmhana_tablet MACH_BCMHANA_TABLET BCMHANA_TABLET 3311
3292koi MACH_KOI KOI 3312
3293ts4800 MACH_TS4800 TS4800 3313
3294tqma9263 MACH_TQMA9263 TQMA9263 3314
3295holiday MACH_HOLIDAY HOLIDAY 3315
3296dma_6410 MACH_DMA6410 DMA6410 3316
3297pcats_overlay MACH_PCATS_OVERLAY PCATS_OVERLAY 3317
3298hwgw6410 MACH_HWGW6410 HWGW6410 3318
3299shenzhou MACH_SHENZHOU SHENZHOU 3319
3300cwme9210 MACH_CWME9210 CWME9210 3320
3301cwme9210js MACH_CWME9210JS CWME9210JS 3321
3302pgs_v1 MACH_PGS_SITARA PGS_SITARA 3322
3303colibri_tegra2 MACH_COLIBRI_TEGRA2 COLIBRI_TEGRA2 3323
3304w21 MACH_W21 W21 3324
3305polysat1 MACH_POLYSAT1 POLYSAT1 3325
3306dataway MACH_DATAWAY DATAWAY 3326
3307cobral138 MACH_COBRAL138 COBRAL138 3327
3308roverpcs8 MACH_ROVERPCS8 ROVERPCS8 3328
3309marvelc MACH_MARVELC MARVELC 3329
3310navefihid MACH_NAVEFIHID NAVEFIHID 3330
3311dm365_cv100 MACH_DM365_CV100 DM365_CV100 3331
3312able MACH_ABLE ABLE 3332
3313legacy MACH_LEGACY LEGACY 3333
3314icong MACH_ICONG ICONG 3334
3315rover_g8 MACH_ROVER_G8 ROVER_G8 3335
3316t5388p MACH_T5388P T5388P 3336
3317dingo MACH_DINGO DINGO 3337
3318goflexhome MACH_GOFLEXHOME GOFLEXHOME 3338