diff options
author | Olof Johansson <olof@lixom.net> | 2013-01-14 13:20:02 -0500 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2013-01-14 13:20:02 -0500 |
commit | 8d84981e395850aab31c3f2ca7e2738e03f671d7 (patch) | |
tree | 933425fddb23d28be802277471df3fe3f6c2711d /arch/arm | |
parent | 00c82d64405631967dca3890a9ce80ab35d04cc7 (diff) | |
parent | 77cc982f6a3b33a5aa058ad3b20cda8866db2948 (diff) |
Merge branch 'clocksource/cleanup' into next/cleanup
Clockevent cleanup series from Shawn Guo.
Resolved move/change conflict in mach-pxa/time.c due to the sys_timer
cleanup.
* clocksource/cleanup:
clocksource: use clockevents_config_and_register() where possible
ARM: use clockevents_config_and_register() where possible
clockevents: export clockevents_config_and_register for module use
+ sync to Linux 3.8-rc3
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts:
arch/arm/mach-pxa/time.c
Diffstat (limited to 'arch/arm')
119 files changed, 534 insertions, 504 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f95ba14ae3d0..67874b82a4ed 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -371,7 +371,6 @@ config ARCH_CNS3XXX | |||
371 | config ARCH_CLPS711X | 371 | config ARCH_CLPS711X |
372 | bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" | 372 | bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" |
373 | select ARCH_REQUIRE_GPIOLIB | 373 | select ARCH_REQUIRE_GPIOLIB |
374 | select ARCH_USES_GETTIMEOFFSET | ||
375 | select AUTO_ZRELADDR | 374 | select AUTO_ZRELADDR |
376 | select CLKDEV_LOOKUP | 375 | select CLKDEV_LOOKUP |
377 | select COMMON_CLK | 376 | select COMMON_CLK |
@@ -1230,6 +1229,7 @@ config ARM_ERRATA_430973 | |||
1230 | config ARM_ERRATA_458693 | 1229 | config ARM_ERRATA_458693 |
1231 | bool "ARM errata: Processor deadlock when a false hazard is created" | 1230 | bool "ARM errata: Processor deadlock when a false hazard is created" |
1232 | depends on CPU_V7 | 1231 | depends on CPU_V7 |
1232 | depends on !ARCH_MULTIPLATFORM | ||
1233 | help | 1233 | help |
1234 | This option enables the workaround for the 458693 Cortex-A8 (r2p0) | 1234 | This option enables the workaround for the 458693 Cortex-A8 (r2p0) |
1235 | erratum. For very specific sequences of memory operations, it is | 1235 | erratum. For very specific sequences of memory operations, it is |
@@ -1243,6 +1243,7 @@ config ARM_ERRATA_458693 | |||
1243 | config ARM_ERRATA_460075 | 1243 | config ARM_ERRATA_460075 |
1244 | bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" | 1244 | bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" |
1245 | depends on CPU_V7 | 1245 | depends on CPU_V7 |
1246 | depends on !ARCH_MULTIPLATFORM | ||
1246 | help | 1247 | help |
1247 | This option enables the workaround for the 460075 Cortex-A8 (r2p0) | 1248 | This option enables the workaround for the 460075 Cortex-A8 (r2p0) |
1248 | erratum. Any asynchronous access to the L2 cache may encounter a | 1249 | erratum. Any asynchronous access to the L2 cache may encounter a |
@@ -1255,6 +1256,7 @@ config ARM_ERRATA_460075 | |||
1255 | config ARM_ERRATA_742230 | 1256 | config ARM_ERRATA_742230 |
1256 | bool "ARM errata: DMB operation may be faulty" | 1257 | bool "ARM errata: DMB operation may be faulty" |
1257 | depends on CPU_V7 && SMP | 1258 | depends on CPU_V7 && SMP |
1259 | depends on !ARCH_MULTIPLATFORM | ||
1258 | help | 1260 | help |
1259 | This option enables the workaround for the 742230 Cortex-A9 | 1261 | This option enables the workaround for the 742230 Cortex-A9 |
1260 | (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction | 1262 | (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction |
@@ -1267,6 +1269,7 @@ config ARM_ERRATA_742230 | |||
1267 | config ARM_ERRATA_742231 | 1269 | config ARM_ERRATA_742231 |
1268 | bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" | 1270 | bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" |
1269 | depends on CPU_V7 && SMP | 1271 | depends on CPU_V7 && SMP |
1272 | depends on !ARCH_MULTIPLATFORM | ||
1270 | help | 1273 | help |
1271 | This option enables the workaround for the 742231 Cortex-A9 | 1274 | This option enables the workaround for the 742231 Cortex-A9 |
1272 | (r2p0..r2p2) erratum. Under certain conditions, specific to the | 1275 | (r2p0..r2p2) erratum. Under certain conditions, specific to the |
@@ -1317,6 +1320,7 @@ config PL310_ERRATA_727915 | |||
1317 | config ARM_ERRATA_743622 | 1320 | config ARM_ERRATA_743622 |
1318 | bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" | 1321 | bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" |
1319 | depends on CPU_V7 | 1322 | depends on CPU_V7 |
1323 | depends on !ARCH_MULTIPLATFORM | ||
1320 | help | 1324 | help |
1321 | This option enables the workaround for the 743622 Cortex-A9 | 1325 | This option enables the workaround for the 743622 Cortex-A9 |
1322 | (r2p*) erratum. Under very rare conditions, a faulty | 1326 | (r2p*) erratum. Under very rare conditions, a faulty |
@@ -1330,6 +1334,7 @@ config ARM_ERRATA_743622 | |||
1330 | config ARM_ERRATA_751472 | 1334 | config ARM_ERRATA_751472 |
1331 | bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" | 1335 | bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" |
1332 | depends on CPU_V7 | 1336 | depends on CPU_V7 |
1337 | depends on !ARCH_MULTIPLATFORM | ||
1333 | help | 1338 | help |
1334 | This option enables the workaround for the 751472 Cortex-A9 (prior | 1339 | This option enables the workaround for the 751472 Cortex-A9 (prior |
1335 | to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the | 1340 | to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the |
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi index cf6c48a09eac..4c0abe85405f 100644 --- a/arch/arm/boot/dts/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/armada-370-xp.dtsi | |||
@@ -50,17 +50,19 @@ | |||
50 | ranges; | 50 | ranges; |
51 | 51 | ||
52 | serial@d0012000 { | 52 | serial@d0012000 { |
53 | compatible = "ns16550"; | 53 | compatible = "snps,dw-apb-uart"; |
54 | reg = <0xd0012000 0x100>; | 54 | reg = <0xd0012000 0x100>; |
55 | reg-shift = <2>; | 55 | reg-shift = <2>; |
56 | interrupts = <41>; | 56 | interrupts = <41>; |
57 | reg-io-width = <4>; | ||
57 | status = "disabled"; | 58 | status = "disabled"; |
58 | }; | 59 | }; |
59 | serial@d0012100 { | 60 | serial@d0012100 { |
60 | compatible = "ns16550"; | 61 | compatible = "snps,dw-apb-uart"; |
61 | reg = <0xd0012100 0x100>; | 62 | reg = <0xd0012100 0x100>; |
62 | reg-shift = <2>; | 63 | reg-shift = <2>; |
63 | interrupts = <42>; | 64 | interrupts = <42>; |
65 | reg-io-width = <4>; | ||
64 | status = "disabled"; | 66 | status = "disabled"; |
65 | }; | 67 | }; |
66 | 68 | ||
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index c45c7b4dc352..271855a6e224 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi | |||
@@ -34,7 +34,14 @@ | |||
34 | reg = <0>; | 34 | reg = <0>; |
35 | clocks = <&cpuclk 0>; | 35 | clocks = <&cpuclk 0>; |
36 | }; | 36 | }; |
37 | } | 37 | |
38 | cpu@1 { | ||
39 | device_type = "cpu"; | ||
40 | compatible = "marvell,sheeva-v7"; | ||
41 | reg = <1>; | ||
42 | clocks = <&cpuclk 1>; | ||
43 | }; | ||
44 | }; | ||
38 | 45 | ||
39 | soc { | 46 | soc { |
40 | pinctrl { | 47 | pinctrl { |
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index a2aee5707377..1c1937dbce73 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi | |||
@@ -85,5 +85,13 @@ | |||
85 | #interrupts-cells = <2>; | 85 | #interrupts-cells = <2>; |
86 | interrupts = <24>; | 86 | interrupts = <24>; |
87 | }; | 87 | }; |
88 | |||
89 | ethernet@d0034000 { | ||
90 | compatible = "marvell,armada-370-neta"; | ||
91 | reg = <0xd0034000 0x2500>; | ||
92 | interrupts = <14>; | ||
93 | clocks = <&gateclk 1>; | ||
94 | status = "disabled"; | ||
95 | }; | ||
88 | }; | 96 | }; |
89 | }; | 97 | }; |
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index da03a129243a..4905cf3a5ef8 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi | |||
@@ -100,5 +100,13 @@ | |||
100 | #interrupts-cells = <2>; | 100 | #interrupts-cells = <2>; |
101 | interrupts = <24>; | 101 | interrupts = <24>; |
102 | }; | 102 | }; |
103 | |||
104 | ethernet@d0034000 { | ||
105 | compatible = "marvell,armada-370-neta"; | ||
106 | reg = <0xd0034000 0x2500>; | ||
107 | interrupts = <14>; | ||
108 | clocks = <&gateclk 1>; | ||
109 | status = "disabled"; | ||
110 | }; | ||
103 | }; | 111 | }; |
104 | }; | 112 | }; |
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index 367aa3f94912..2e37ef101c90 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi | |||
@@ -42,17 +42,19 @@ | |||
42 | 42 | ||
43 | soc { | 43 | soc { |
44 | serial@d0012200 { | 44 | serial@d0012200 { |
45 | compatible = "ns16550"; | 45 | compatible = "snps,dw-apb-uart"; |
46 | reg = <0xd0012200 0x100>; | 46 | reg = <0xd0012200 0x100>; |
47 | reg-shift = <2>; | 47 | reg-shift = <2>; |
48 | interrupts = <43>; | 48 | interrupts = <43>; |
49 | reg-io-width = <4>; | ||
49 | status = "disabled"; | 50 | status = "disabled"; |
50 | }; | 51 | }; |
51 | serial@d0012300 { | 52 | serial@d0012300 { |
52 | compatible = "ns16550"; | 53 | compatible = "snps,dw-apb-uart"; |
53 | reg = <0xd0012300 0x100>; | 54 | reg = <0xd0012300 0x100>; |
54 | reg-shift = <2>; | 55 | reg-shift = <2>; |
55 | interrupts = <44>; | 56 | interrupts = <44>; |
57 | reg-io-width = <4>; | ||
56 | status = "disabled"; | 58 | status = "disabled"; |
57 | }; | 59 | }; |
58 | 60 | ||
@@ -93,14 +95,6 @@ | |||
93 | status = "disabled"; | 95 | status = "disabled"; |
94 | }; | 96 | }; |
95 | 97 | ||
96 | ethernet@d0034000 { | ||
97 | compatible = "marvell,armada-370-neta"; | ||
98 | reg = <0xd0034000 0x2500>; | ||
99 | interrupts = <14>; | ||
100 | clocks = <&gateclk 1>; | ||
101 | status = "disabled"; | ||
102 | }; | ||
103 | |||
104 | xor@d0060900 { | 98 | xor@d0060900 { |
105 | compatible = "marvell,orion-xor"; | 99 | compatible = "marvell,orion-xor"; |
106 | reg = <0xd0060900 0x100 | 100 | reg = <0xd0060900 0x100 |
diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi index 2efd9c891bc9..63f2fbcfe819 100644 --- a/arch/arm/boot/dts/dbx5x0.dtsi +++ b/arch/arm/boot/dts/dbx5x0.dtsi | |||
@@ -170,7 +170,9 @@ | |||
170 | gpio-bank = <8>; | 170 | gpio-bank = <8>; |
171 | }; | 171 | }; |
172 | 172 | ||
173 | pinctrl { | 173 | pinctrl@80157000 { |
174 | // This is actually the PRCMU base address | ||
175 | reg = <0x80157000 0x2000>; | ||
174 | compatible = "stericsson,nmk_pinctrl"; | 176 | compatible = "stericsson,nmk_pinctrl"; |
175 | }; | 177 | }; |
176 | 178 | ||
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index f3f7e9d8adca..42eac1ff3cc8 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi | |||
@@ -117,6 +117,7 @@ | |||
117 | pinctrl: pinctrl@d0200 { | 117 | pinctrl: pinctrl@d0200 { |
118 | compatible = "marvell,dove-pinctrl"; | 118 | compatible = "marvell,dove-pinctrl"; |
119 | reg = <0xd0200 0x10>; | 119 | reg = <0xd0200 0x10>; |
120 | clocks = <&gate_clk 22>; | ||
120 | }; | 121 | }; |
121 | 122 | ||
122 | spi0: spi@10600 { | 123 | spi0: spi@10600 { |
diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts index 46477ac1de99..139b40cc3a23 100644 --- a/arch/arm/boot/dts/ecx-2000.dts +++ b/arch/arm/boot/dts/ecx-2000.dts | |||
@@ -32,6 +32,7 @@ | |||
32 | 32 | ||
33 | cpu@0 { | 33 | cpu@0 { |
34 | compatible = "arm,cortex-a15"; | 34 | compatible = "arm,cortex-a15"; |
35 | device_type = "cpu"; | ||
35 | reg = <0>; | 36 | reg = <0>; |
36 | clocks = <&a9pll>; | 37 | clocks = <&a9pll>; |
37 | clock-names = "cpu"; | 38 | clock-names = "cpu"; |
@@ -39,6 +40,7 @@ | |||
39 | 40 | ||
40 | cpu@1 { | 41 | cpu@1 { |
41 | compatible = "arm,cortex-a15"; | 42 | compatible = "arm,cortex-a15"; |
43 | device_type = "cpu"; | ||
42 | reg = <1>; | 44 | reg = <1>; |
43 | clocks = <&a9pll>; | 45 | clocks = <&a9pll>; |
44 | clock-names = "cpu"; | 46 | clock-names = "cpu"; |
@@ -46,6 +48,7 @@ | |||
46 | 48 | ||
47 | cpu@2 { | 49 | cpu@2 { |
48 | compatible = "arm,cortex-a15"; | 50 | compatible = "arm,cortex-a15"; |
51 | device_type = "cpu"; | ||
49 | reg = <2>; | 52 | reg = <2>; |
50 | clocks = <&a9pll>; | 53 | clocks = <&a9pll>; |
51 | clock-names = "cpu"; | 54 | clock-names = "cpu"; |
@@ -53,6 +56,7 @@ | |||
53 | 56 | ||
54 | cpu@3 { | 57 | cpu@3 { |
55 | compatible = "arm,cortex-a15"; | 58 | compatible = "arm,cortex-a15"; |
59 | device_type = "cpu"; | ||
56 | reg = <3>; | 60 | reg = <3>; |
57 | clocks = <&a9pll>; | 61 | clocks = <&a9pll>; |
58 | clock-names = "cpu"; | 62 | clock-names = "cpu"; |
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts index 9b23a8255e39..f63490707f3a 100644 --- a/arch/arm/boot/dts/exynos4210-smdkv310.dts +++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts | |||
@@ -26,7 +26,7 @@ | |||
26 | }; | 26 | }; |
27 | 27 | ||
28 | chosen { | 28 | chosen { |
29 | bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc"; | 29 | bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc"; |
30 | }; | 30 | }; |
31 | 31 | ||
32 | sdhci@12530000 { | 32 | sdhci@12530000 { |
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 2e3b6efaf1a2..3acf594ea60b 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi | |||
@@ -574,7 +574,7 @@ | |||
574 | 574 | ||
575 | hdmi { | 575 | hdmi { |
576 | compatible = "samsung,exynos5-hdmi"; | 576 | compatible = "samsung,exynos5-hdmi"; |
577 | reg = <0x14530000 0x100000>; | 577 | reg = <0x14530000 0x70000>; |
578 | interrupts = <0 95 0>; | 578 | interrupts = <0 95 0>; |
579 | }; | 579 | }; |
580 | 580 | ||
diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts b/arch/arm/boot/dts/exynos5440-ssdk5440.dts index 921c83cf694f..81e2c964a900 100644 --- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts +++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts | |||
@@ -21,7 +21,7 @@ | |||
21 | }; | 21 | }; |
22 | 22 | ||
23 | chosen { | 23 | chosen { |
24 | bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x81000000,8M console=ttySAC2,115200 init=/linuxrc"; | 24 | bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x81000000,8M console=ttySAC0,115200 init=/linuxrc"; |
25 | }; | 25 | }; |
26 | 26 | ||
27 | spi { | 27 | spi { |
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts index a9ae5d32e80d..5927a8df5625 100644 --- a/arch/arm/boot/dts/highbank.dts +++ b/arch/arm/boot/dts/highbank.dts | |||
@@ -30,33 +30,37 @@ | |||
30 | #address-cells = <1>; | 30 | #address-cells = <1>; |
31 | #size-cells = <0>; | 31 | #size-cells = <0>; |
32 | 32 | ||
33 | cpu@0 { | 33 | cpu@900 { |
34 | compatible = "arm,cortex-a9"; | 34 | compatible = "arm,cortex-a9"; |
35 | reg = <0>; | 35 | device_type = "cpu"; |
36 | reg = <0x900>; | ||
36 | next-level-cache = <&L2>; | 37 | next-level-cache = <&L2>; |
37 | clocks = <&a9pll>; | 38 | clocks = <&a9pll>; |
38 | clock-names = "cpu"; | 39 | clock-names = "cpu"; |
39 | }; | 40 | }; |
40 | 41 | ||
41 | cpu@1 { | 42 | cpu@901 { |
42 | compatible = "arm,cortex-a9"; | 43 | compatible = "arm,cortex-a9"; |
43 | reg = <1>; | 44 | device_type = "cpu"; |
45 | reg = <0x901>; | ||
44 | next-level-cache = <&L2>; | 46 | next-level-cache = <&L2>; |
45 | clocks = <&a9pll>; | 47 | clocks = <&a9pll>; |
46 | clock-names = "cpu"; | 48 | clock-names = "cpu"; |
47 | }; | 49 | }; |
48 | 50 | ||
49 | cpu@2 { | 51 | cpu@902 { |
50 | compatible = "arm,cortex-a9"; | 52 | compatible = "arm,cortex-a9"; |
51 | reg = <2>; | 53 | device_type = "cpu"; |
54 | reg = <0x902>; | ||
52 | next-level-cache = <&L2>; | 55 | next-level-cache = <&L2>; |
53 | clocks = <&a9pll>; | 56 | clocks = <&a9pll>; |
54 | clock-names = "cpu"; | 57 | clock-names = "cpu"; |
55 | }; | 58 | }; |
56 | 59 | ||
57 | cpu@3 { | 60 | cpu@903 { |
58 | compatible = "arm,cortex-a9"; | 61 | compatible = "arm,cortex-a9"; |
59 | reg = <3>; | 62 | device_type = "cpu"; |
63 | reg = <0x903>; | ||
60 | next-level-cache = <&L2>; | 64 | next-level-cache = <&L2>; |
61 | clocks = <&a9pll>; | 65 | clocks = <&a9pll>; |
62 | clock-names = "cpu"; | 66 | clock-names = "cpu"; |
diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts index 7c43b8e70b9f..e7484e4ea659 100644 --- a/arch/arm/boot/dts/imx23-olinuxino.dts +++ b/arch/arm/boot/dts/imx23-olinuxino.dts | |||
@@ -39,17 +39,17 @@ | |||
39 | hog_pins_a: hog@0 { | 39 | hog_pins_a: hog@0 { |
40 | reg = <0>; | 40 | reg = <0>; |
41 | fsl,pinmux-ids = < | 41 | fsl,pinmux-ids = < |
42 | 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */ | 42 | 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */ |
43 | >; | 43 | >; |
44 | fsl,drive-strength = <0>; | 44 | fsl,drive-strength = <0>; |
45 | fsl,voltage = <1>; | 45 | fsl,voltage = <1>; |
46 | fsl,pull-up = <0>; | 46 | fsl,pull-up = <0>; |
47 | }; | 47 | }; |
48 | 48 | ||
49 | led_pin_gpio0_17: led_gpio0_17@0 { | 49 | led_pin_gpio2_1: led_gpio2_1@0 { |
50 | reg = <0>; | 50 | reg = <0>; |
51 | fsl,pinmux-ids = < | 51 | fsl,pinmux-ids = < |
52 | 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */ | 52 | 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */ |
53 | >; | 53 | >; |
54 | fsl,drive-strength = <0>; | 54 | fsl,drive-strength = <0>; |
55 | fsl,voltage = <1>; | 55 | fsl,voltage = <1>; |
@@ -110,7 +110,7 @@ | |||
110 | leds { | 110 | leds { |
111 | compatible = "gpio-leds"; | 111 | compatible = "gpio-leds"; |
112 | pinctrl-names = "default"; | 112 | pinctrl-names = "default"; |
113 | pinctrl-0 = <&led_pin_gpio0_17>; | 113 | pinctrl-0 = <&led_pin_gpio2_1>; |
114 | 114 | ||
115 | user { | 115 | user { |
116 | label = "green"; | 116 | label = "green"; |
diff --git a/arch/arm/boot/dts/imx31-bug.dts b/arch/arm/boot/dts/imx31-bug.dts index 24731cb78e8e..7f67402328d3 100644 --- a/arch/arm/boot/dts/imx31-bug.dts +++ b/arch/arm/boot/dts/imx31-bug.dts | |||
@@ -14,7 +14,7 @@ | |||
14 | 14 | ||
15 | / { | 15 | / { |
16 | model = "Buglabs i.MX31 Bug 1.x"; | 16 | model = "Buglabs i.MX31 Bug 1.x"; |
17 | compatible = "fsl,imx31-bug", "fsl,imx31"; | 17 | compatible = "buglabs,imx31-bug", "fsl,imx31"; |
18 | 18 | ||
19 | memory { | 19 | memory { |
20 | reg = <0x80000000 0x8000000>; /* 128M */ | 20 | reg = <0x80000000 0x8000000>; /* 128M */ |
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 552aed4ff982..edc3f1eb6699 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi | |||
@@ -492,7 +492,7 @@ | |||
492 | compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; | 492 | compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; |
493 | reg = <0x53fcc000 0x4000>; | 493 | reg = <0x53fcc000 0x4000>; |
494 | interrupts = <83>; | 494 | interrupts = <83>; |
495 | clocks = <&clks 158>, <&clks 157>; | 495 | clocks = <&clks 87>, <&clks 86>; |
496 | clock-names = "ipg", "per"; | 496 | clock-names = "ipg", "per"; |
497 | status = "disabled"; | 497 | status = "disabled"; |
498 | }; | 498 | }; |
diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi index 9ae2004d5675..4ccea2130a6c 100644 --- a/arch/arm/boot/dts/kirkwood-6282.dtsi +++ b/arch/arm/boot/dts/kirkwood-6282.dtsi | |||
@@ -39,6 +39,7 @@ | |||
39 | #size-cells = <0>; | 39 | #size-cells = <0>; |
40 | interrupts = <32>; | 40 | interrupts = <32>; |
41 | clock-frequency = <100000>; | 41 | clock-frequency = <100000>; |
42 | clocks = <&gate_clk 7>; | ||
42 | status = "disabled"; | 43 | status = "disabled"; |
43 | }; | 44 | }; |
44 | }; | 45 | }; |
diff --git a/arch/arm/boot/dts/kirkwood-topkick.dts b/arch/arm/boot/dts/kirkwood-topkick.dts index c0de5a7f660d..cd15452a52a6 100644 --- a/arch/arm/boot/dts/kirkwood-topkick.dts +++ b/arch/arm/boot/dts/kirkwood-topkick.dts | |||
@@ -82,4 +82,21 @@ | |||
82 | gpios = <&gpio1 16 1>; | 82 | gpios = <&gpio1 16 1>; |
83 | }; | 83 | }; |
84 | }; | 84 | }; |
85 | regulators { | ||
86 | compatible = "simple-bus"; | ||
87 | #address-cells = <1>; | ||
88 | #size-cells = <0>; | ||
89 | |||
90 | sata0_power: regulator@1 { | ||
91 | compatible = "regulator-fixed"; | ||
92 | reg = <1>; | ||
93 | regulator-name = "SATA0 Power"; | ||
94 | regulator-min-microvolt = <5000000>; | ||
95 | regulator-max-microvolt = <5000000>; | ||
96 | enable-active-high; | ||
97 | regulator-always-on; | ||
98 | regulator-boot-on; | ||
99 | gpio = <&gpio1 4 0>; | ||
100 | }; | ||
101 | }; | ||
85 | }; | 102 | }; |
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index 7735cee4a9c6..110d6cbb795b 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi | |||
@@ -144,6 +144,7 @@ | |||
144 | compatible = "marvell,orion-ehci"; | 144 | compatible = "marvell,orion-ehci"; |
145 | reg = <0x50000 0x1000>; | 145 | reg = <0x50000 0x1000>; |
146 | interrupts = <19>; | 146 | interrupts = <19>; |
147 | clocks = <&gate_clk 3>; | ||
147 | status = "okay"; | 148 | status = "okay"; |
148 | }; | 149 | }; |
149 | 150 | ||
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index 9173d112ea01..e57d7e5bf96a 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c | |||
@@ -686,8 +686,7 @@ sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, | |||
686 | * %-EINVAL no platform data passed | 686 | * %-EINVAL no platform data passed |
687 | * %0 successful. | 687 | * %0 successful. |
688 | */ | 688 | */ |
689 | static int __devinit | 689 | static int __sa1111_probe(struct device *me, struct resource *mem, int irq) |
690 | __sa1111_probe(struct device *me, struct resource *mem, int irq) | ||
691 | { | 690 | { |
692 | struct sa1111_platform_data *pd = me->platform_data; | 691 | struct sa1111_platform_data *pd = me->platform_data; |
693 | struct sa1111 *sachip; | 692 | struct sa1111 *sachip; |
@@ -1011,7 +1010,7 @@ static int sa1111_resume(struct platform_device *dev) | |||
1011 | #define sa1111_resume NULL | 1010 | #define sa1111_resume NULL |
1012 | #endif | 1011 | #endif |
1013 | 1012 | ||
1014 | static int __devinit sa1111_probe(struct platform_device *pdev) | 1013 | static int sa1111_probe(struct platform_device *pdev) |
1015 | { | 1014 | { |
1016 | struct resource *mem; | 1015 | struct resource *mem; |
1017 | int irq; | 1016 | int irq; |
diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c index 0c616d5fcb0f..a5c3dc38aa18 100644 --- a/arch/arm/common/scoop.c +++ b/arch/arm/common/scoop.c | |||
@@ -176,7 +176,7 @@ static int scoop_resume(struct platform_device *dev) | |||
176 | #define scoop_resume NULL | 176 | #define scoop_resume NULL |
177 | #endif | 177 | #endif |
178 | 178 | ||
179 | static int __devinit scoop_probe(struct platform_device *pdev) | 179 | static int scoop_probe(struct platform_device *pdev) |
180 | { | 180 | { |
181 | struct scoop_dev *devptr; | 181 | struct scoop_dev *devptr; |
182 | struct scoop_config *inf; | 182 | struct scoop_config *inf; |
@@ -243,7 +243,7 @@ err_ioremap: | |||
243 | return ret; | 243 | return ret; |
244 | } | 244 | } |
245 | 245 | ||
246 | static int __devexit scoop_remove(struct platform_device *pdev) | 246 | static int scoop_remove(struct platform_device *pdev) |
247 | { | 247 | { |
248 | struct scoop_dev *sdev = platform_get_drvdata(pdev); | 248 | struct scoop_dev *sdev = platform_get_drvdata(pdev); |
249 | int ret; | 249 | int ret; |
@@ -268,7 +268,7 @@ static int __devexit scoop_remove(struct platform_device *pdev) | |||
268 | 268 | ||
269 | static struct platform_driver scoop_driver = { | 269 | static struct platform_driver scoop_driver = { |
270 | .probe = scoop_probe, | 270 | .probe = scoop_probe, |
271 | .remove = __devexit_p(scoop_remove), | 271 | .remove = scoop_remove, |
272 | .suspend = scoop_suspend, | 272 | .suspend = scoop_suspend, |
273 | .resume = scoop_resume, | 273 | .resume = scoop_resume, |
274 | .driver = { | 274 | .driver = { |
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c index e4df17ca90c7..8f324b99416e 100644 --- a/arch/arm/common/vic.c +++ b/arch/arm/common/vic.c | |||
@@ -206,6 +206,7 @@ static void __init vic_register(void __iomem *base, unsigned int irq, | |||
206 | struct device_node *node) | 206 | struct device_node *node) |
207 | { | 207 | { |
208 | struct vic_device *v; | 208 | struct vic_device *v; |
209 | int i; | ||
209 | 210 | ||
210 | if (vic_id >= ARRAY_SIZE(vic_devices)) { | 211 | if (vic_id >= ARRAY_SIZE(vic_devices)) { |
211 | printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__); | 212 | printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__); |
@@ -220,6 +221,10 @@ static void __init vic_register(void __iomem *base, unsigned int irq, | |||
220 | vic_id++; | 221 | vic_id++; |
221 | v->domain = irq_domain_add_simple(node, fls(valid_sources), irq, | 222 | v->domain = irq_domain_add_simple(node, fls(valid_sources), irq, |
222 | &vic_irqdomain_ops, v); | 223 | &vic_irqdomain_ops, v); |
224 | /* create an IRQ mapping for each valid IRQ */ | ||
225 | for (i = 0; i < fls(valid_sources); i++) | ||
226 | if (valid_sources & (1 << i)) | ||
227 | irq_create_mapping(v->domain, i); | ||
223 | } | 228 | } |
224 | 229 | ||
225 | static void vic_ack_irq(struct irq_data *d) | 230 | static void vic_ack_irq(struct irq_data *d) |
@@ -416,9 +421,9 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent) | |||
416 | return -EIO; | 421 | return -EIO; |
417 | 422 | ||
418 | /* | 423 | /* |
419 | * Passing -1 as first IRQ makes the simple domain allocate descriptors | 424 | * Passing 0 as first IRQ makes the simple domain allocate descriptors |
420 | */ | 425 | */ |
421 | __vic_init(regs, -1, ~0, ~0, node); | 426 | __vic_init(regs, 0, ~0, ~0, node); |
422 | 427 | ||
423 | return 0; | 428 | return 0; |
424 | } | 429 | } |
diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig index a702fb345c01..b5bc96cb65a7 100644 --- a/arch/arm/configs/mvebu_defconfig +++ b/arch/arm/configs/mvebu_defconfig | |||
@@ -33,9 +33,7 @@ CONFIG_MVNETA=y | |||
33 | CONFIG_MARVELL_PHY=y | 33 | CONFIG_MARVELL_PHY=y |
34 | CONFIG_SERIAL_8250=y | 34 | CONFIG_SERIAL_8250=y |
35 | CONFIG_SERIAL_8250_CONSOLE=y | 35 | CONFIG_SERIAL_8250_CONSOLE=y |
36 | CONFIG_SERIAL_OF_PLATFORM=y | 36 | CONFIG_SERIAL_8250_DW=y |
37 | CONFIG_I2C=y | ||
38 | CONFIG_I2C_MV64XXX=y | ||
39 | CONFIG_GPIOLIB=y | 37 | CONFIG_GPIOLIB=y |
40 | CONFIG_GPIO_SYSFS=y | 38 | CONFIG_GPIO_SYSFS=y |
41 | # CONFIG_USB_SUPPORT is not set | 39 | # CONFIG_USB_SUPPORT is not set |
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index 9b722612553d..379cf3292390 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c | |||
@@ -78,7 +78,7 @@ void pcibios_report_status(u_int status_mask, int warn) | |||
78 | * Bug 3 is responsible for the sound DMA grinding to a halt. We now | 78 | * Bug 3 is responsible for the sound DMA grinding to a halt. We now |
79 | * live with bug 2. | 79 | * live with bug 2. |
80 | */ | 80 | */ |
81 | static void __devinit pci_fixup_83c553(struct pci_dev *dev) | 81 | static void pci_fixup_83c553(struct pci_dev *dev) |
82 | { | 82 | { |
83 | /* | 83 | /* |
84 | * Set memory region to start at address 0, and enable IO | 84 | * Set memory region to start at address 0, and enable IO |
@@ -130,7 +130,7 @@ static void __devinit pci_fixup_83c553(struct pci_dev *dev) | |||
130 | } | 130 | } |
131 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, pci_fixup_83c553); | 131 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, pci_fixup_83c553); |
132 | 132 | ||
133 | static void __devinit pci_fixup_unassign(struct pci_dev *dev) | 133 | static void pci_fixup_unassign(struct pci_dev *dev) |
134 | { | 134 | { |
135 | dev->resource[0].end -= dev->resource[0].start; | 135 | dev->resource[0].end -= dev->resource[0].start; |
136 | dev->resource[0].start = 0; | 136 | dev->resource[0].start = 0; |
@@ -142,7 +142,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_89C940F, | |||
142 | * if it is the host bridge by marking it as such. These resources are of | 142 | * if it is the host bridge by marking it as such. These resources are of |
143 | * no consequence to the PCI layer (they are handled elsewhere). | 143 | * no consequence to the PCI layer (they are handled elsewhere). |
144 | */ | 144 | */ |
145 | static void __devinit pci_fixup_dec21285(struct pci_dev *dev) | 145 | static void pci_fixup_dec21285(struct pci_dev *dev) |
146 | { | 146 | { |
147 | int i; | 147 | int i; |
148 | 148 | ||
@@ -161,7 +161,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, pci_fixup_d | |||
161 | /* | 161 | /* |
162 | * PCI IDE controllers use non-standard I/O port decoding, respect it. | 162 | * PCI IDE controllers use non-standard I/O port decoding, respect it. |
163 | */ | 163 | */ |
164 | static void __devinit pci_fixup_ide_bases(struct pci_dev *dev) | 164 | static void pci_fixup_ide_bases(struct pci_dev *dev) |
165 | { | 165 | { |
166 | struct resource *r; | 166 | struct resource *r; |
167 | int i; | 167 | int i; |
@@ -182,7 +182,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); | |||
182 | /* | 182 | /* |
183 | * Put the DEC21142 to sleep | 183 | * Put the DEC21142 to sleep |
184 | */ | 184 | */ |
185 | static void __devinit pci_fixup_dec21142(struct pci_dev *dev) | 185 | static void pci_fixup_dec21142(struct pci_dev *dev) |
186 | { | 186 | { |
187 | pci_write_config_dword(dev, 0x40, 0x80000000); | 187 | pci_write_config_dword(dev, 0x40, 0x80000000); |
188 | } | 188 | } |
@@ -204,7 +204,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142, pci_fixup_d | |||
204 | * functional. However, The CY82C693U _does not work_ in bus | 204 | * functional. However, The CY82C693U _does not work_ in bus |
205 | * master mode without locking the PCI bus solid. | 205 | * master mode without locking the PCI bus solid. |
206 | */ | 206 | */ |
207 | static void __devinit pci_fixup_cy82c693(struct pci_dev *dev) | 207 | static void pci_fixup_cy82c693(struct pci_dev *dev) |
208 | { | 208 | { |
209 | if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE) { | 209 | if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE) { |
210 | u32 base0, base1; | 210 | u32 base0, base1; |
@@ -254,7 +254,7 @@ static void __devinit pci_fixup_cy82c693(struct pci_dev *dev) | |||
254 | } | 254 | } |
255 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, pci_fixup_cy82c693); | 255 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, pci_fixup_cy82c693); |
256 | 256 | ||
257 | static void __devinit pci_fixup_it8152(struct pci_dev *dev) | 257 | static void pci_fixup_it8152(struct pci_dev *dev) |
258 | { | 258 | { |
259 | int i; | 259 | int i; |
260 | /* fixup for ITE 8152 devices */ | 260 | /* fixup for ITE 8152 devices */ |
@@ -361,9 +361,7 @@ void pcibios_fixup_bus(struct pci_bus *bus) | |||
361 | printk(KERN_INFO "PCI: bus%d: Fast back to back transfers %sabled\n", | 361 | printk(KERN_INFO "PCI: bus%d: Fast back to back transfers %sabled\n", |
362 | bus->number, (features & PCI_COMMAND_FAST_BACK) ? "en" : "dis"); | 362 | bus->number, (features & PCI_COMMAND_FAST_BACK) ? "en" : "dis"); |
363 | } | 363 | } |
364 | #ifdef CONFIG_HOTPLUG | ||
365 | EXPORT_SYMBOL(pcibios_fixup_bus); | 364 | EXPORT_SYMBOL(pcibios_fixup_bus); |
366 | #endif | ||
367 | 365 | ||
368 | /* | 366 | /* |
369 | * Swizzle the device pin each time we cross a bridge. If a platform does | 367 | * Swizzle the device pin each time we cross a bridge. If a platform does |
@@ -380,7 +378,7 @@ EXPORT_SYMBOL(pcibios_fixup_bus); | |||
380 | * PCI standard swizzle is implemented on plug-in cards and Cardbus based | 378 | * PCI standard swizzle is implemented on plug-in cards and Cardbus based |
381 | * PCI extenders, so it can not be ignored. | 379 | * PCI extenders, so it can not be ignored. |
382 | */ | 380 | */ |
383 | static u8 __devinit pcibios_swizzle(struct pci_dev *dev, u8 *pin) | 381 | static u8 pcibios_swizzle(struct pci_dev *dev, u8 *pin) |
384 | { | 382 | { |
385 | struct pci_sys_data *sys = dev->sysdata; | 383 | struct pci_sys_data *sys = dev->sysdata; |
386 | int slot, oldpin = *pin; | 384 | int slot, oldpin = *pin; |
diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c index 36d20bd50120..9b6de8c988f3 100644 --- a/arch/arm/kernel/etm.c +++ b/arch/arm/kernel/etm.c | |||
@@ -339,7 +339,7 @@ static struct miscdevice etb_miscdev = { | |||
339 | .fops = &etb_fops, | 339 | .fops = &etb_fops, |
340 | }; | 340 | }; |
341 | 341 | ||
342 | static int __devinit etb_probe(struct amba_device *dev, const struct amba_id *id) | 342 | static int etb_probe(struct amba_device *dev, const struct amba_id *id) |
343 | { | 343 | { |
344 | struct tracectx *t = &tracer; | 344 | struct tracectx *t = &tracer; |
345 | int ret = 0; | 345 | int ret = 0; |
@@ -531,7 +531,7 @@ static ssize_t trace_mode_store(struct kobject *kobj, | |||
531 | static struct kobj_attribute trace_mode_attr = | 531 | static struct kobj_attribute trace_mode_attr = |
532 | __ATTR(trace_mode, 0644, trace_mode_show, trace_mode_store); | 532 | __ATTR(trace_mode, 0644, trace_mode_show, trace_mode_store); |
533 | 533 | ||
534 | static int __devinit etm_probe(struct amba_device *dev, const struct amba_id *id) | 534 | static int etm_probe(struct amba_device *dev, const struct amba_id *id) |
535 | { | 535 | { |
536 | struct tracectx *t = &tracer; | 536 | struct tracectx *t = &tracer; |
537 | int ret = 0; | 537 | int ret = 0; |
diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c index 9a4f6307a016..5f6620684e25 100644 --- a/arch/arm/kernel/perf_event_cpu.c +++ b/arch/arm/kernel/perf_event_cpu.c | |||
@@ -132,7 +132,7 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler) | |||
132 | return 0; | 132 | return 0; |
133 | } | 133 | } |
134 | 134 | ||
135 | static void __devinit cpu_pmu_init(struct arm_pmu *cpu_pmu) | 135 | static void cpu_pmu_init(struct arm_pmu *cpu_pmu) |
136 | { | 136 | { |
137 | int cpu; | 137 | int cpu; |
138 | for_each_possible_cpu(cpu) { | 138 | for_each_possible_cpu(cpu) { |
@@ -178,7 +178,7 @@ static struct notifier_block __cpuinitdata cpu_pmu_hotplug_notifier = { | |||
178 | /* | 178 | /* |
179 | * PMU platform driver and devicetree bindings. | 179 | * PMU platform driver and devicetree bindings. |
180 | */ | 180 | */ |
181 | static struct of_device_id __devinitdata cpu_pmu_of_device_ids[] = { | 181 | static struct of_device_id cpu_pmu_of_device_ids[] = { |
182 | {.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init}, | 182 | {.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init}, |
183 | {.compatible = "arm,cortex-a9-pmu", .data = armv7_a9_pmu_init}, | 183 | {.compatible = "arm,cortex-a9-pmu", .data = armv7_a9_pmu_init}, |
184 | {.compatible = "arm,cortex-a8-pmu", .data = armv7_a8_pmu_init}, | 184 | {.compatible = "arm,cortex-a8-pmu", .data = armv7_a8_pmu_init}, |
@@ -190,7 +190,7 @@ static struct of_device_id __devinitdata cpu_pmu_of_device_ids[] = { | |||
190 | {}, | 190 | {}, |
191 | }; | 191 | }; |
192 | 192 | ||
193 | static struct platform_device_id __devinitdata cpu_pmu_plat_device_ids[] = { | 193 | static struct platform_device_id cpu_pmu_plat_device_ids[] = { |
194 | {.name = "arm-pmu"}, | 194 | {.name = "arm-pmu"}, |
195 | {}, | 195 | {}, |
196 | }; | 196 | }; |
@@ -198,7 +198,7 @@ static struct platform_device_id __devinitdata cpu_pmu_plat_device_ids[] = { | |||
198 | /* | 198 | /* |
199 | * CPU PMU identification and probing. | 199 | * CPU PMU identification and probing. |
200 | */ | 200 | */ |
201 | static int __devinit probe_current_pmu(struct arm_pmu *pmu) | 201 | static int probe_current_pmu(struct arm_pmu *pmu) |
202 | { | 202 | { |
203 | int cpu = get_cpu(); | 203 | int cpu = get_cpu(); |
204 | unsigned long cpuid = read_cpuid_id(); | 204 | unsigned long cpuid = read_cpuid_id(); |
@@ -252,7 +252,7 @@ static int __devinit probe_current_pmu(struct arm_pmu *pmu) | |||
252 | return ret; | 252 | return ret; |
253 | } | 253 | } |
254 | 254 | ||
255 | static int __devinit cpu_pmu_device_probe(struct platform_device *pdev) | 255 | static int cpu_pmu_device_probe(struct platform_device *pdev) |
256 | { | 256 | { |
257 | const struct of_device_id *of_id; | 257 | const struct of_device_id *of_id; |
258 | int (*init_fn)(struct arm_pmu *); | 258 | int (*init_fn)(struct arm_pmu *); |
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c index f3e22ff8b6a2..041d0526a288 100644 --- a/arch/arm/kernel/perf_event_v6.c +++ b/arch/arm/kernel/perf_event_v6.c | |||
@@ -653,7 +653,7 @@ static int armv6_map_event(struct perf_event *event) | |||
653 | &armv6_perf_cache_map, 0xFF); | 653 | &armv6_perf_cache_map, 0xFF); |
654 | } | 654 | } |
655 | 655 | ||
656 | static int __devinit armv6pmu_init(struct arm_pmu *cpu_pmu) | 656 | static int armv6pmu_init(struct arm_pmu *cpu_pmu) |
657 | { | 657 | { |
658 | cpu_pmu->name = "v6"; | 658 | cpu_pmu->name = "v6"; |
659 | cpu_pmu->handle_irq = armv6pmu_handle_irq; | 659 | cpu_pmu->handle_irq = armv6pmu_handle_irq; |
@@ -685,7 +685,7 @@ static int armv6mpcore_map_event(struct perf_event *event) | |||
685 | &armv6mpcore_perf_cache_map, 0xFF); | 685 | &armv6mpcore_perf_cache_map, 0xFF); |
686 | } | 686 | } |
687 | 687 | ||
688 | static int __devinit armv6mpcore_pmu_init(struct arm_pmu *cpu_pmu) | 688 | static int armv6mpcore_pmu_init(struct arm_pmu *cpu_pmu) |
689 | { | 689 | { |
690 | cpu_pmu->name = "v6mpcore"; | 690 | cpu_pmu->name = "v6mpcore"; |
691 | cpu_pmu->handle_irq = armv6pmu_handle_irq; | 691 | cpu_pmu->handle_irq = armv6pmu_handle_irq; |
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c index 7d0cce85d17e..4fbc757d9cff 100644 --- a/arch/arm/kernel/perf_event_v7.c +++ b/arch/arm/kernel/perf_event_v7.c | |||
@@ -1226,7 +1226,7 @@ static void armv7pmu_init(struct arm_pmu *cpu_pmu) | |||
1226 | cpu_pmu->max_period = (1LLU << 32) - 1; | 1226 | cpu_pmu->max_period = (1LLU << 32) - 1; |
1227 | }; | 1227 | }; |
1228 | 1228 | ||
1229 | static u32 __devinit armv7_read_num_pmnc_events(void) | 1229 | static u32 armv7_read_num_pmnc_events(void) |
1230 | { | 1230 | { |
1231 | u32 nb_cnt; | 1231 | u32 nb_cnt; |
1232 | 1232 | ||
@@ -1237,7 +1237,7 @@ static u32 __devinit armv7_read_num_pmnc_events(void) | |||
1237 | return nb_cnt + 1; | 1237 | return nb_cnt + 1; |
1238 | } | 1238 | } |
1239 | 1239 | ||
1240 | static int __devinit armv7_a8_pmu_init(struct arm_pmu *cpu_pmu) | 1240 | static int armv7_a8_pmu_init(struct arm_pmu *cpu_pmu) |
1241 | { | 1241 | { |
1242 | armv7pmu_init(cpu_pmu); | 1242 | armv7pmu_init(cpu_pmu); |
1243 | cpu_pmu->name = "ARMv7 Cortex-A8"; | 1243 | cpu_pmu->name = "ARMv7 Cortex-A8"; |
@@ -1246,7 +1246,7 @@ static int __devinit armv7_a8_pmu_init(struct arm_pmu *cpu_pmu) | |||
1246 | return 0; | 1246 | return 0; |
1247 | } | 1247 | } |
1248 | 1248 | ||
1249 | static int __devinit armv7_a9_pmu_init(struct arm_pmu *cpu_pmu) | 1249 | static int armv7_a9_pmu_init(struct arm_pmu *cpu_pmu) |
1250 | { | 1250 | { |
1251 | armv7pmu_init(cpu_pmu); | 1251 | armv7pmu_init(cpu_pmu); |
1252 | cpu_pmu->name = "ARMv7 Cortex-A9"; | 1252 | cpu_pmu->name = "ARMv7 Cortex-A9"; |
@@ -1255,7 +1255,7 @@ static int __devinit armv7_a9_pmu_init(struct arm_pmu *cpu_pmu) | |||
1255 | return 0; | 1255 | return 0; |
1256 | } | 1256 | } |
1257 | 1257 | ||
1258 | static int __devinit armv7_a5_pmu_init(struct arm_pmu *cpu_pmu) | 1258 | static int armv7_a5_pmu_init(struct arm_pmu *cpu_pmu) |
1259 | { | 1259 | { |
1260 | armv7pmu_init(cpu_pmu); | 1260 | armv7pmu_init(cpu_pmu); |
1261 | cpu_pmu->name = "ARMv7 Cortex-A5"; | 1261 | cpu_pmu->name = "ARMv7 Cortex-A5"; |
@@ -1264,7 +1264,7 @@ static int __devinit armv7_a5_pmu_init(struct arm_pmu *cpu_pmu) | |||
1264 | return 0; | 1264 | return 0; |
1265 | } | 1265 | } |
1266 | 1266 | ||
1267 | static int __devinit armv7_a15_pmu_init(struct arm_pmu *cpu_pmu) | 1267 | static int armv7_a15_pmu_init(struct arm_pmu *cpu_pmu) |
1268 | { | 1268 | { |
1269 | armv7pmu_init(cpu_pmu); | 1269 | armv7pmu_init(cpu_pmu); |
1270 | cpu_pmu->name = "ARMv7 Cortex-A15"; | 1270 | cpu_pmu->name = "ARMv7 Cortex-A15"; |
@@ -1274,7 +1274,7 @@ static int __devinit armv7_a15_pmu_init(struct arm_pmu *cpu_pmu) | |||
1274 | return 0; | 1274 | return 0; |
1275 | } | 1275 | } |
1276 | 1276 | ||
1277 | static int __devinit armv7_a7_pmu_init(struct arm_pmu *cpu_pmu) | 1277 | static int armv7_a7_pmu_init(struct arm_pmu *cpu_pmu) |
1278 | { | 1278 | { |
1279 | armv7pmu_init(cpu_pmu); | 1279 | armv7pmu_init(cpu_pmu); |
1280 | cpu_pmu->name = "ARMv7 Cortex-A7"; | 1280 | cpu_pmu->name = "ARMv7 Cortex-A7"; |
diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c index 0c8265e53d5f..2b0fe30ec12e 100644 --- a/arch/arm/kernel/perf_event_xscale.c +++ b/arch/arm/kernel/perf_event_xscale.c | |||
@@ -440,7 +440,7 @@ static int xscale_map_event(struct perf_event *event) | |||
440 | &xscale_perf_cache_map, 0xFF); | 440 | &xscale_perf_cache_map, 0xFF); |
441 | } | 441 | } |
442 | 442 | ||
443 | static int __devinit xscale1pmu_init(struct arm_pmu *cpu_pmu) | 443 | static int xscale1pmu_init(struct arm_pmu *cpu_pmu) |
444 | { | 444 | { |
445 | cpu_pmu->name = "xscale1"; | 445 | cpu_pmu->name = "xscale1"; |
446 | cpu_pmu->handle_irq = xscale1pmu_handle_irq; | 446 | cpu_pmu->handle_irq = xscale1pmu_handle_irq; |
@@ -810,7 +810,7 @@ static inline void xscale2pmu_write_counter(struct perf_event *event, u32 val) | |||
810 | } | 810 | } |
811 | } | 811 | } |
812 | 812 | ||
813 | static int __devinit xscale2pmu_init(struct arm_pmu *cpu_pmu) | 813 | static int xscale2pmu_init(struct arm_pmu *cpu_pmu) |
814 | { | 814 | { |
815 | cpu_pmu->name = "xscale2"; | 815 | cpu_pmu->name = "xscale2"; |
816 | cpu_pmu->handle_irq = xscale2pmu_handle_irq; | 816 | cpu_pmu->handle_irq = xscale2pmu_handle_irq; |
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c index 180b3024bec3..2acdff4c1dfe 100644 --- a/arch/arm/mach-at91/at91rm9200_time.c +++ b/arch/arm/mach-at91/at91rm9200_time.c | |||
@@ -174,7 +174,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev) | |||
174 | static struct clock_event_device clkevt = { | 174 | static struct clock_event_device clkevt = { |
175 | .name = "at91_tick", | 175 | .name = "at91_tick", |
176 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | 176 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
177 | .shift = 32, | ||
178 | .rating = 150, | 177 | .rating = 150, |
179 | .set_next_event = clkevt32k_next_event, | 178 | .set_next_event = clkevt32k_next_event, |
180 | .set_mode = clkevt32k_mode, | 179 | .set_mode = clkevt32k_mode, |
@@ -265,11 +264,9 @@ void __init at91rm9200_timer_init(void) | |||
265 | at91_st_write(AT91_ST_RTMR, 1); | 264 | at91_st_write(AT91_ST_RTMR, 1); |
266 | 265 | ||
267 | /* Setup timer clockevent, with minimum of two ticks (important!!) */ | 266 | /* Setup timer clockevent, with minimum of two ticks (important!!) */ |
268 | clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift); | ||
269 | clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt); | ||
270 | clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1; | ||
271 | clkevt.cpumask = cpumask_of(0); | 267 | clkevt.cpumask = cpumask_of(0); |
272 | clockevents_register_device(&clkevt); | 268 | clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK, |
269 | 2, AT91_ST_ALMV); | ||
273 | 270 | ||
274 | /* register clocksource */ | 271 | /* register clocksource */ |
275 | clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK); | 272 | clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK); |
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index 1754f8f4f34c..18b02d2707f7 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c | |||
@@ -134,7 +134,6 @@ static int cns3xxx_timer_set_next_event(unsigned long evt, | |||
134 | 134 | ||
135 | static struct clock_event_device cns3xxx_tmr1_clockevent = { | 135 | static struct clock_event_device cns3xxx_tmr1_clockevent = { |
136 | .name = "cns3xxx timer1", | 136 | .name = "cns3xxx timer1", |
137 | .shift = 8, | ||
138 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | 137 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
139 | .set_mode = cns3xxx_timer_set_mode, | 138 | .set_mode = cns3xxx_timer_set_mode, |
140 | .set_next_event = cns3xxx_timer_set_next_event, | 139 | .set_next_event = cns3xxx_timer_set_next_event, |
@@ -145,15 +144,9 @@ static struct clock_event_device cns3xxx_tmr1_clockevent = { | |||
145 | static void __init cns3xxx_clockevents_init(unsigned int timer_irq) | 144 | static void __init cns3xxx_clockevents_init(unsigned int timer_irq) |
146 | { | 145 | { |
147 | cns3xxx_tmr1_clockevent.irq = timer_irq; | 146 | cns3xxx_tmr1_clockevent.irq = timer_irq; |
148 | cns3xxx_tmr1_clockevent.mult = | 147 | clockevents_config_and_register(&cns3xxx_tmr1_clockevent, |
149 | div_sc((cns3xxx_cpu_clock() >> 3) * 1000000, NSEC_PER_SEC, | 148 | (cns3xxx_cpu_clock() >> 3) * 1000000, |
150 | cns3xxx_tmr1_clockevent.shift); | 149 | 0xf, 0xffffffff); |
151 | cns3xxx_tmr1_clockevent.max_delta_ns = | ||
152 | clockevent_delta2ns(0xffffffff, &cns3xxx_tmr1_clockevent); | ||
153 | cns3xxx_tmr1_clockevent.min_delta_ns = | ||
154 | clockevent_delta2ns(0xf, &cns3xxx_tmr1_clockevent); | ||
155 | |||
156 | clockevents_register_device(&cns3xxx_tmr1_clockevent); | ||
157 | } | 150 | } |
158 | 151 | ||
159 | /* | 152 | /* |
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index a9f2054c3e9b..de7adff324dc 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c | |||
@@ -358,7 +358,7 @@ static int cpld_video_probe(struct i2c_client *client, | |||
358 | return 0; | 358 | return 0; |
359 | } | 359 | } |
360 | 360 | ||
361 | static int __devexit cpld_video_remove(struct i2c_client *client) | 361 | static int cpld_video_remove(struct i2c_client *client) |
362 | { | 362 | { |
363 | cpld_client = NULL; | 363 | cpld_client = NULL; |
364 | return 0; | 364 | return 0; |
diff --git a/arch/arm/mach-davinci/cdce949.c b/arch/arm/mach-davinci/cdce949.c index f2232ca6d070..abafb92031c0 100644 --- a/arch/arm/mach-davinci/cdce949.c +++ b/arch/arm/mach-davinci/cdce949.c | |||
@@ -256,7 +256,7 @@ static int cdce_probe(struct i2c_client *client, | |||
256 | return 0; | 256 | return 0; |
257 | } | 257 | } |
258 | 258 | ||
259 | static int __devexit cdce_remove(struct i2c_client *client) | 259 | static int cdce_remove(struct i2c_client *client) |
260 | { | 260 | { |
261 | cdce_i2c_client = NULL; | 261 | cdce_i2c_client = NULL; |
262 | return 0; | 262 | return 0; |
@@ -274,7 +274,7 @@ static struct i2c_driver cdce_driver = { | |||
274 | .name = "cdce949", | 274 | .name = "cdce949", |
275 | }, | 275 | }, |
276 | .probe = cdce_probe, | 276 | .probe = cdce_probe, |
277 | .remove = __devexit_p(cdce_remove), | 277 | .remove = cdce_remove, |
278 | .id_table = cdce_id, | 278 | .id_table = cdce_id, |
279 | }; | 279 | }; |
280 | 280 | ||
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c index 0ef4435b1657..8a275f297522 100644 --- a/arch/arm/mach-dove/pcie.c +++ b/arch/arm/mach-dove/pcie.c | |||
@@ -135,7 +135,7 @@ static struct pci_ops pcie_ops = { | |||
135 | .write = pcie_wr_conf, | 135 | .write = pcie_wr_conf, |
136 | }; | 136 | }; |
137 | 137 | ||
138 | static void __devinit rc_pci_fixup(struct pci_dev *dev) | 138 | static void rc_pci_fixup(struct pci_dev *dev) |
139 | { | 139 | { |
140 | /* | 140 | /* |
141 | * Prevent enumeration of root complex. | 141 | * Prevent enumeration of root complex. |
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 91d5b6f1d5af..e103c290bc9e 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig | |||
@@ -74,6 +74,8 @@ config SOC_EXYNOS5440 | |||
74 | depends on ARCH_EXYNOS5 | 74 | depends on ARCH_EXYNOS5 |
75 | select ARM_ARCH_TIMER | 75 | select ARM_ARCH_TIMER |
76 | select AUTO_ZRELADDR | 76 | select AUTO_ZRELADDR |
77 | select PINCTRL | ||
78 | select PINCTRL_EXYNOS5440 | ||
77 | help | 79 | help |
78 | Enable EXYNOS5440 SoC support | 80 | Enable EXYNOS5440 SoC support |
79 | 81 | ||
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index d6d0dc651089..1a89824a5f78 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c | |||
@@ -424,11 +424,18 @@ static void __init exynos5_init_clocks(int xtal) | |||
424 | { | 424 | { |
425 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); | 425 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); |
426 | 426 | ||
427 | /* EXYNOS5440 can support only common clock framework */ | ||
428 | |||
429 | if (soc_is_exynos5440()) | ||
430 | return; | ||
431 | |||
432 | #ifdef CONFIG_SOC_EXYNOS5250 | ||
427 | s3c24xx_register_baseclocks(xtal); | 433 | s3c24xx_register_baseclocks(xtal); |
428 | s5p_register_clocks(xtal); | 434 | s5p_register_clocks(xtal); |
429 | 435 | ||
430 | exynos5_register_clocks(); | 436 | exynos5_register_clocks(); |
431 | exynos5_setup_clocks(); | 437 | exynos5_setup_clocks(); |
438 | #endif | ||
432 | } | 439 | } |
433 | 440 | ||
434 | #define COMBINER_ENABLE_SET 0x0 | 441 | #define COMBINER_ENABLE_SET 0x0 |
diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c index 4a89b54fcadb..577ee1b03ff4 100644 --- a/arch/arm/mach-exynos/mct.c +++ b/arch/arm/mach-exynos/mct.c | |||
@@ -255,13 +255,9 @@ static struct irqaction mct_comp_event_irq = { | |||
255 | 255 | ||
256 | static void exynos4_clockevent_init(void) | 256 | static void exynos4_clockevent_init(void) |
257 | { | 257 | { |
258 | clockevents_calc_mult_shift(&mct_comp_device, clk_rate, 5); | ||
259 | mct_comp_device.max_delta_ns = | ||
260 | clockevent_delta2ns(0xffffffff, &mct_comp_device); | ||
261 | mct_comp_device.min_delta_ns = | ||
262 | clockevent_delta2ns(0xf, &mct_comp_device); | ||
263 | mct_comp_device.cpumask = cpumask_of(0); | 258 | mct_comp_device.cpumask = cpumask_of(0); |
264 | clockevents_register_device(&mct_comp_device); | 259 | clockevents_config_and_register(&mct_comp_device, clk_rate, |
260 | 0xf, 0xffffffff); | ||
265 | 261 | ||
266 | if (soc_is_exynos5250()) | 262 | if (soc_is_exynos5250()) |
267 | setup_irq(EXYNOS5_IRQ_MCT_G0, &mct_comp_event_irq); | 263 | setup_irq(EXYNOS5_IRQ_MCT_G0, &mct_comp_event_irq); |
@@ -404,14 +400,8 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt) | |||
404 | evt->set_mode = exynos4_tick_set_mode; | 400 | evt->set_mode = exynos4_tick_set_mode; |
405 | evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; | 401 | evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; |
406 | evt->rating = 450; | 402 | evt->rating = 450; |
407 | 403 | clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1), | |
408 | clockevents_calc_mult_shift(evt, clk_rate / (TICK_BASE_CNT + 1), 5); | 404 | 0xf, 0x7fffffff); |
409 | evt->max_delta_ns = | ||
410 | clockevent_delta2ns(0x7fffffff, evt); | ||
411 | evt->min_delta_ns = | ||
412 | clockevent_delta2ns(0xf, evt); | ||
413 | |||
414 | clockevents_register_device(evt); | ||
415 | 405 | ||
416 | exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET); | 406 | exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET); |
417 | 407 | ||
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c index 9f14b1d9a0e7..9ee78f7b4990 100644 --- a/arch/arm/mach-footbridge/dc21285-timer.c +++ b/arch/arm/mach-footbridge/dc21285-timer.c | |||
@@ -101,10 +101,6 @@ void __init footbridge_timer_init(void) | |||
101 | 101 | ||
102 | setup_irq(ce->irq, &footbridge_timer_irq); | 102 | setup_irq(ce->irq, &footbridge_timer_irq); |
103 | 103 | ||
104 | clockevents_calc_mult_shift(ce, mem_fclk_21285, 5); | ||
105 | ce->max_delta_ns = clockevent_delta2ns(0xffffff, ce); | ||
106 | ce->min_delta_ns = clockevent_delta2ns(0x000004, ce); | ||
107 | ce->cpumask = cpumask_of(smp_processor_id()); | 104 | ce->cpumask = cpumask_of(smp_processor_id()); |
108 | 105 | clockevents_config_and_register(ce, mem_fclk_21285, 0x4, 0xffffff); | |
109 | clockevents_register_device(ce); | ||
110 | } | 106 | } |
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c index f6ca285ee5c5..41e254cac1ac 100644 --- a/arch/arm/mach-highbank/highbank.c +++ b/arch/arm/mach-highbank/highbank.c | |||
@@ -131,7 +131,7 @@ static void __init highbank_timer_init(void) | |||
131 | 131 | ||
132 | static void highbank_power_off(void) | 132 | static void highbank_power_off(void) |
133 | { | 133 | { |
134 | hignbank_set_pwr_shutdown(); | 134 | highbank_set_pwr_shutdown(); |
135 | 135 | ||
136 | while (1) | 136 | while (1) |
137 | cpu_do_idle(); | 137 | cpu_do_idle(); |
diff --git a/arch/arm/mach-highbank/hotplug.c b/arch/arm/mach-highbank/hotplug.c index 7b60faccd551..f30c52843396 100644 --- a/arch/arm/mach-highbank/hotplug.c +++ b/arch/arm/mach-highbank/hotplug.c | |||
@@ -30,7 +30,7 @@ void __ref highbank_cpu_die(unsigned int cpu) | |||
30 | { | 30 | { |
31 | flush_cache_all(); | 31 | flush_cache_all(); |
32 | 32 | ||
33 | highbank_set_cpu_jump(cpu, secondary_startup); | 33 | highbank_set_cpu_jump(cpu, phys_to_virt(0)); |
34 | highbank_set_core_pwr(); | 34 | highbank_set_core_pwr(); |
35 | 35 | ||
36 | cpu_do_idle(); | 36 | cpu_do_idle(); |
diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c index 1129957f6c1d..4ecc864ac8b9 100644 --- a/arch/arm/mach-highbank/platsmp.c +++ b/arch/arm/mach-highbank/platsmp.c | |||
@@ -32,6 +32,7 @@ static void __cpuinit highbank_secondary_init(unsigned int cpu) | |||
32 | 32 | ||
33 | static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle) | 33 | static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle) |
34 | { | 34 | { |
35 | highbank_set_cpu_jump(cpu, secondary_startup); | ||
35 | gic_raise_softirq(cpumask_of(cpu), 0); | 36 | gic_raise_softirq(cpumask_of(cpu), 0); |
36 | return 0; | 37 | return 0; |
37 | } | 38 | } |
@@ -61,19 +62,8 @@ static void __init highbank_smp_init_cpus(void) | |||
61 | 62 | ||
62 | static void __init highbank_smp_prepare_cpus(unsigned int max_cpus) | 63 | static void __init highbank_smp_prepare_cpus(unsigned int max_cpus) |
63 | { | 64 | { |
64 | int i; | ||
65 | |||
66 | if (scu_base_addr) | 65 | if (scu_base_addr) |
67 | scu_enable(scu_base_addr); | 66 | scu_enable(scu_base_addr); |
68 | |||
69 | /* | ||
70 | * Write the address of secondary startup into the jump table | ||
71 | * The cores are in wfi and wait until they receive a soft interrupt | ||
72 | * and a non-zero value to jump to. Then the secondary CPU branches | ||
73 | * to this address. | ||
74 | */ | ||
75 | for (i = 1; i < max_cpus; i++) | ||
76 | highbank_set_cpu_jump(i, secondary_startup); | ||
77 | } | 67 | } |
78 | 68 | ||
79 | struct smp_operations highbank_smp_ops __initdata = { | 69 | struct smp_operations highbank_smp_ops __initdata = { |
diff --git a/arch/arm/mach-highbank/pm.c b/arch/arm/mach-highbank/pm.c index 74aa135966f0..04eddb4f4380 100644 --- a/arch/arm/mach-highbank/pm.c +++ b/arch/arm/mach-highbank/pm.c | |||
@@ -14,10 +14,12 @@ | |||
14 | * this program. If not, see <http://www.gnu.org/licenses/>. | 14 | * this program. If not, see <http://www.gnu.org/licenses/>. |
15 | */ | 15 | */ |
16 | 16 | ||
17 | #include <linux/cpu_pm.h> | ||
17 | #include <linux/init.h> | 18 | #include <linux/init.h> |
18 | #include <linux/io.h> | 19 | #include <linux/io.h> |
19 | #include <linux/suspend.h> | 20 | #include <linux/suspend.h> |
20 | 21 | ||
22 | #include <asm/cacheflush.h> | ||
21 | #include <asm/proc-fns.h> | 23 | #include <asm/proc-fns.h> |
22 | #include <asm/suspend.h> | 24 | #include <asm/suspend.h> |
23 | 25 | ||
@@ -26,16 +28,31 @@ | |||
26 | 28 | ||
27 | static int highbank_suspend_finish(unsigned long val) | 29 | static int highbank_suspend_finish(unsigned long val) |
28 | { | 30 | { |
31 | outer_flush_all(); | ||
32 | outer_disable(); | ||
33 | |||
34 | highbank_set_pwr_suspend(); | ||
35 | |||
29 | cpu_do_idle(); | 36 | cpu_do_idle(); |
37 | |||
38 | highbank_clear_pwr_request(); | ||
30 | return 0; | 39 | return 0; |
31 | } | 40 | } |
32 | 41 | ||
33 | static int highbank_pm_enter(suspend_state_t state) | 42 | static int highbank_pm_enter(suspend_state_t state) |
34 | { | 43 | { |
35 | hignbank_set_pwr_suspend(); | 44 | cpu_pm_enter(); |
45 | cpu_cluster_pm_enter(); | ||
46 | |||
36 | highbank_set_cpu_jump(0, cpu_resume); | 47 | highbank_set_cpu_jump(0, cpu_resume); |
37 | cpu_suspend(0, highbank_suspend_finish); | 48 | cpu_suspend(0, highbank_suspend_finish); |
38 | 49 | ||
50 | cpu_cluster_pm_exit(); | ||
51 | cpu_pm_exit(); | ||
52 | |||
53 | highbank_smc1(0x102, 0x1); | ||
54 | if (scu_base_addr) | ||
55 | scu_enable(scu_base_addr); | ||
39 | return 0; | 56 | return 0; |
40 | } | 57 | } |
41 | 58 | ||
diff --git a/arch/arm/mach-highbank/sysregs.h b/arch/arm/mach-highbank/sysregs.h index e13e8ea7c6cb..70af9d13fcef 100644 --- a/arch/arm/mach-highbank/sysregs.h +++ b/arch/arm/mach-highbank/sysregs.h | |||
@@ -44,28 +44,43 @@ static inline void highbank_set_core_pwr(void) | |||
44 | writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu)); | 44 | writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu)); |
45 | } | 45 | } |
46 | 46 | ||
47 | static inline void hignbank_set_pwr_suspend(void) | 47 | static inline void highbank_clear_core_pwr(void) |
48 | { | ||
49 | int cpu = cpu_logical_map(smp_processor_id()); | ||
50 | if (scu_base_addr) | ||
51 | scu_power_mode(scu_base_addr, SCU_PM_NORMAL); | ||
52 | else | ||
53 | writel_relaxed(0, sregs_base + SREG_CPU_PWR_CTRL(cpu)); | ||
54 | } | ||
55 | |||
56 | static inline void highbank_set_pwr_suspend(void) | ||
48 | { | 57 | { |
49 | writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ); | 58 | writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ); |
50 | highbank_set_core_pwr(); | 59 | highbank_set_core_pwr(); |
51 | } | 60 | } |
52 | 61 | ||
53 | static inline void hignbank_set_pwr_shutdown(void) | 62 | static inline void highbank_set_pwr_shutdown(void) |
54 | { | 63 | { |
55 | writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ); | 64 | writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ); |
56 | highbank_set_core_pwr(); | 65 | highbank_set_core_pwr(); |
57 | } | 66 | } |
58 | 67 | ||
59 | static inline void hignbank_set_pwr_soft_reset(void) | 68 | static inline void highbank_set_pwr_soft_reset(void) |
60 | { | 69 | { |
61 | writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ); | 70 | writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ); |
62 | highbank_set_core_pwr(); | 71 | highbank_set_core_pwr(); |
63 | } | 72 | } |
64 | 73 | ||
65 | static inline void hignbank_set_pwr_hard_reset(void) | 74 | static inline void highbank_set_pwr_hard_reset(void) |
66 | { | 75 | { |
67 | writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ); | 76 | writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ); |
68 | highbank_set_core_pwr(); | 77 | highbank_set_core_pwr(); |
69 | } | 78 | } |
70 | 79 | ||
80 | static inline void highbank_clear_pwr_request(void) | ||
81 | { | ||
82 | writel(~0UL, sregs_base + HB_SREG_A9_PWR_REQ); | ||
83 | highbank_clear_core_pwr(); | ||
84 | } | ||
85 | |||
71 | #endif | 86 | #endif |
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c index aed96ad9bd4a..37d8384dcf19 100644 --- a/arch/arm/mach-highbank/system.c +++ b/arch/arm/mach-highbank/system.c | |||
@@ -22,9 +22,9 @@ | |||
22 | void highbank_restart(char mode, const char *cmd) | 22 | void highbank_restart(char mode, const char *cmd) |
23 | { | 23 | { |
24 | if (mode == 'h') | 24 | if (mode == 'h') |
25 | hignbank_set_pwr_hard_reset(); | 25 | highbank_set_pwr_hard_reset(); |
26 | else | 26 | else |
27 | hignbank_set_pwr_soft_reset(); | 27 | highbank_set_pwr_soft_reset(); |
28 | 28 | ||
29 | while (1) | 29 | while (1) |
30 | cpu_do_idle(); | 30 | cpu_do_idle(); |
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 1ad0d76de8c7..3e628fd7a674 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig | |||
@@ -841,8 +841,6 @@ config SOC_IMX6Q | |||
841 | select ARCH_HAS_CPUFREQ | 841 | select ARCH_HAS_CPUFREQ |
842 | select ARCH_HAS_OPP | 842 | select ARCH_HAS_OPP |
843 | select ARM_CPU_SUSPEND if PM | 843 | select ARM_CPU_SUSPEND if PM |
844 | select ARM_ERRATA_743622 | ||
845 | select ARM_ERRATA_751472 | ||
846 | select ARM_ERRATA_754322 | 844 | select ARM_ERRATA_754322 |
847 | select ARM_ERRATA_764369 if SMP | 845 | select ARM_ERRATA_764369 if SMP |
848 | select ARM_ERRATA_775420 | 846 | select ARM_ERRATA_775420 |
diff --git a/arch/arm/mach-imx/cpufreq.c b/arch/arm/mach-imx/cpufreq.c index 36e8b3994470..d8c75c3c925d 100644 --- a/arch/arm/mach-imx/cpufreq.c +++ b/arch/arm/mach-imx/cpufreq.c | |||
@@ -188,7 +188,7 @@ static struct cpufreq_driver mxc_driver = { | |||
188 | .name = "imx", | 188 | .name = "imx", |
189 | }; | 189 | }; |
190 | 190 | ||
191 | static int __devinit mxc_cpufreq_driver_init(void) | 191 | static int mxc_cpufreq_driver_init(void) |
192 | { | 192 | { |
193 | return cpufreq_register_driver(&mxc_driver); | 193 | return cpufreq_register_driver(&mxc_driver); |
194 | } | 194 | } |
diff --git a/arch/arm/mach-imx/epit.c b/arch/arm/mach-imx/epit.c index 04a5961beeac..e02de188ae83 100644 --- a/arch/arm/mach-imx/epit.c +++ b/arch/arm/mach-imx/epit.c | |||
@@ -178,7 +178,6 @@ static struct irqaction epit_timer_irq = { | |||
178 | static struct clock_event_device clockevent_epit = { | 178 | static struct clock_event_device clockevent_epit = { |
179 | .name = "epit", | 179 | .name = "epit", |
180 | .features = CLOCK_EVT_FEAT_ONESHOT, | 180 | .features = CLOCK_EVT_FEAT_ONESHOT, |
181 | .shift = 32, | ||
182 | .set_mode = epit_set_mode, | 181 | .set_mode = epit_set_mode, |
183 | .set_next_event = epit_set_next_event, | 182 | .set_next_event = epit_set_next_event, |
184 | .rating = 200, | 183 | .rating = 200, |
@@ -186,18 +185,10 @@ static struct clock_event_device clockevent_epit = { | |||
186 | 185 | ||
187 | static int __init epit_clockevent_init(struct clk *timer_clk) | 186 | static int __init epit_clockevent_init(struct clk *timer_clk) |
188 | { | 187 | { |
189 | unsigned int c = clk_get_rate(timer_clk); | ||
190 | |||
191 | clockevent_epit.mult = div_sc(c, NSEC_PER_SEC, | ||
192 | clockevent_epit.shift); | ||
193 | clockevent_epit.max_delta_ns = | ||
194 | clockevent_delta2ns(0xfffffffe, &clockevent_epit); | ||
195 | clockevent_epit.min_delta_ns = | ||
196 | clockevent_delta2ns(0x800, &clockevent_epit); | ||
197 | |||
198 | clockevent_epit.cpumask = cpumask_of(0); | 188 | clockevent_epit.cpumask = cpumask_of(0); |
199 | 189 | clockevents_config_and_register(&clockevent_epit, | |
200 | clockevents_register_device(&clockevent_epit); | 190 | clk_get_rate(timer_clk), |
191 | 0x800, 0xfffffffe); | ||
201 | 192 | ||
202 | return 0; | 193 | return 0; |
203 | } | 194 | } |
diff --git a/arch/arm/mach-imx/mmdc.c b/arch/arm/mach-imx/mmdc.c index c461e98496c3..7a9686ad994c 100644 --- a/arch/arm/mach-imx/mmdc.c +++ b/arch/arm/mach-imx/mmdc.c | |||
@@ -21,7 +21,7 @@ | |||
21 | #define BP_MMDC_MAPSR_PSD 0 | 21 | #define BP_MMDC_MAPSR_PSD 0 |
22 | #define BP_MMDC_MAPSR_PSS 4 | 22 | #define BP_MMDC_MAPSR_PSS 4 |
23 | 23 | ||
24 | static int __devinit imx_mmdc_probe(struct platform_device *pdev) | 24 | static int imx_mmdc_probe(struct platform_device *pdev) |
25 | { | 25 | { |
26 | struct device_node *np = pdev->dev.of_node; | 26 | struct device_node *np = pdev->dev.of_node; |
27 | void __iomem *mmdc_base, *reg; | 27 | void __iomem *mmdc_base, *reg; |
diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c index f017302f6d09..62769df36db1 100644 --- a/arch/arm/mach-imx/time.c +++ b/arch/arm/mach-imx/time.c | |||
@@ -256,7 +256,6 @@ static struct irqaction mxc_timer_irq = { | |||
256 | static struct clock_event_device clockevent_mxc = { | 256 | static struct clock_event_device clockevent_mxc = { |
257 | .name = "mxc_timer1", | 257 | .name = "mxc_timer1", |
258 | .features = CLOCK_EVT_FEAT_ONESHOT, | 258 | .features = CLOCK_EVT_FEAT_ONESHOT, |
259 | .shift = 32, | ||
260 | .set_mode = mxc_set_mode, | 259 | .set_mode = mxc_set_mode, |
261 | .set_next_event = mx1_2_set_next_event, | 260 | .set_next_event = mx1_2_set_next_event, |
262 | .rating = 200, | 261 | .rating = 200, |
@@ -264,21 +263,13 @@ static struct clock_event_device clockevent_mxc = { | |||
264 | 263 | ||
265 | static int __init mxc_clockevent_init(struct clk *timer_clk) | 264 | static int __init mxc_clockevent_init(struct clk *timer_clk) |
266 | { | 265 | { |
267 | unsigned int c = clk_get_rate(timer_clk); | ||
268 | |||
269 | if (timer_is_v2()) | 266 | if (timer_is_v2()) |
270 | clockevent_mxc.set_next_event = v2_set_next_event; | 267 | clockevent_mxc.set_next_event = v2_set_next_event; |
271 | 268 | ||
272 | clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC, | ||
273 | clockevent_mxc.shift); | ||
274 | clockevent_mxc.max_delta_ns = | ||
275 | clockevent_delta2ns(0xfffffffe, &clockevent_mxc); | ||
276 | clockevent_mxc.min_delta_ns = | ||
277 | clockevent_delta2ns(0xff, &clockevent_mxc); | ||
278 | |||
279 | clockevent_mxc.cpumask = cpumask_of(0); | 269 | clockevent_mxc.cpumask = cpumask_of(0); |
280 | 270 | clockevents_config_and_register(&clockevent_mxc, | |
281 | clockevents_register_device(&clockevent_mxc); | 271 | clk_get_rate(timer_clk), |
272 | 0xff, 0xfffffffe); | ||
282 | 273 | ||
283 | return 0; | 274 | return 0; |
284 | } | 275 | } |
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c index 2f28018c4447..9082b84aeebb 100644 --- a/arch/arm/mach-iop13xx/pci.c +++ b/arch/arm/mach-iop13xx/pci.c | |||
@@ -504,7 +504,7 @@ iop13xx_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs) | |||
504 | 504 | ||
505 | /* Scan an IOP13XX PCI bus. nr selects which ATU we use. | 505 | /* Scan an IOP13XX PCI bus. nr selects which ATU we use. |
506 | */ | 506 | */ |
507 | struct pci_bus * __devinit iop13xx_scan_bus(int nr, struct pci_sys_data *sys) | 507 | struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys) |
508 | { | 508 | { |
509 | int which_atu; | 509 | int which_atu; |
510 | struct pci_bus *bus = NULL; | 510 | struct pci_bus *bus = NULL; |
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index f6ac695ceb60..1dbeb7c99d58 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c | |||
@@ -519,22 +519,15 @@ static struct clock_event_device clockevent_ixp4xx = { | |||
519 | .name = "ixp4xx timer1", | 519 | .name = "ixp4xx timer1", |
520 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | 520 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
521 | .rating = 200, | 521 | .rating = 200, |
522 | .shift = 24, | ||
523 | .set_mode = ixp4xx_set_mode, | 522 | .set_mode = ixp4xx_set_mode, |
524 | .set_next_event = ixp4xx_set_next_event, | 523 | .set_next_event = ixp4xx_set_next_event, |
525 | }; | 524 | }; |
526 | 525 | ||
527 | static void __init ixp4xx_clockevent_init(void) | 526 | static void __init ixp4xx_clockevent_init(void) |
528 | { | 527 | { |
529 | clockevent_ixp4xx.mult = div_sc(IXP4XX_TIMER_FREQ, NSEC_PER_SEC, | ||
530 | clockevent_ixp4xx.shift); | ||
531 | clockevent_ixp4xx.max_delta_ns = | ||
532 | clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx); | ||
533 | clockevent_ixp4xx.min_delta_ns = | ||
534 | clockevent_delta2ns(0xf, &clockevent_ixp4xx); | ||
535 | clockevent_ixp4xx.cpumask = cpumask_of(0); | 528 | clockevent_ixp4xx.cpumask = cpumask_of(0); |
536 | 529 | clockevents_config_and_register(&clockevent_ixp4xx, IXP4XX_TIMER_FREQ, | |
537 | clockevents_register_device(&clockevent_ixp4xx); | 530 | 0xf, 0xfffffffe); |
538 | } | 531 | } |
539 | 532 | ||
540 | void ixp4xx_restart(char mode, const char *cmd) | 533 | void ixp4xx_restart(char mode, const char *cmd) |
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c index d6f57fd6f788..d4af5c191c24 100644 --- a/arch/arm/mach-kirkwood/board-dt.c +++ b/arch/arm/mach-kirkwood/board-dt.c | |||
@@ -67,6 +67,10 @@ static void __init kirkwood_legacy_clk_init(void) | |||
67 | orion_clkdev_add(NULL, "mv643xx_eth_port.1", | 67 | orion_clkdev_add(NULL, "mv643xx_eth_port.1", |
68 | of_clk_get_from_provider(&clkspec)); | 68 | of_clk_get_from_provider(&clkspec)); |
69 | 69 | ||
70 | clkspec.args[0] = CGC_BIT_SDIO; | ||
71 | orion_clkdev_add(NULL, "mvsdio", | ||
72 | of_clk_get_from_provider(&clkspec)); | ||
73 | |||
70 | } | 74 | } |
71 | 75 | ||
72 | static void __init kirkwood_of_clk_init(void) | 76 | static void __init kirkwood_of_clk_init(void) |
diff --git a/arch/arm/mach-kirkwood/board-usi_topkick.c b/arch/arm/mach-kirkwood/board-usi_topkick.c index 15e69fcde9f4..23d2dd1b1b1e 100644 --- a/arch/arm/mach-kirkwood/board-usi_topkick.c +++ b/arch/arm/mach-kirkwood/board-usi_topkick.c | |||
@@ -64,8 +64,6 @@ static unsigned int topkick_mpp_config[] __initdata = { | |||
64 | 0 | 64 | 0 |
65 | }; | 65 | }; |
66 | 66 | ||
67 | #define TOPKICK_SATA0_PWR_ENABLE 36 | ||
68 | |||
69 | void __init usi_topkick_init(void) | 67 | void __init usi_topkick_init(void) |
70 | { | 68 | { |
71 | /* | 69 | /* |
@@ -73,8 +71,6 @@ void __init usi_topkick_init(void) | |||
73 | */ | 71 | */ |
74 | kirkwood_mpp_conf(topkick_mpp_config); | 72 | kirkwood_mpp_conf(topkick_mpp_config); |
75 | 73 | ||
76 | /* SATA0 power enable */ | ||
77 | gpio_set_value(TOPKICK_SATA0_PWR_ENABLE, 1); | ||
78 | 74 | ||
79 | kirkwood_ge00_init(&topkick_ge00_data); | 75 | kirkwood_ge00_init(&topkick_ge00_data); |
80 | kirkwood_sdio_init(&topkick_mvsdio_data); | 76 | kirkwood_sdio_init(&topkick_mvsdio_data); |
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c index ef102646ba9a..a1c3ab6fc809 100644 --- a/arch/arm/mach-kirkwood/pcie.c +++ b/arch/arm/mach-kirkwood/pcie.c | |||
@@ -214,7 +214,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) | |||
214 | * PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on | 214 | * PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on |
215 | * the device. Decoding setup is handled by the orion code. | 215 | * the device. Decoding setup is handled by the orion code. |
216 | */ | 216 | */ |
217 | static void __devinit rc_pci_fixup(struct pci_dev *dev) | 217 | static void rc_pci_fixup(struct pci_dev *dev) |
218 | { | 218 | { |
219 | if (dev->bus->parent == NULL && dev->devfn == 0) { | 219 | if (dev->bus->parent == NULL && dev->devfn == 0) { |
220 | int i; | 220 | int i; |
diff --git a/arch/arm/mach-ks8695/board-acs5k.c b/arch/arm/mach-ks8695/board-acs5k.c index 7beec9b8becd..456d6386edf8 100644 --- a/arch/arm/mach-ks8695/board-acs5k.c +++ b/arch/arm/mach-ks8695/board-acs5k.c | |||
@@ -92,7 +92,7 @@ static struct i2c_board_info acs5k_i2c_devs[] __initdata = { | |||
92 | }, | 92 | }, |
93 | }; | 93 | }; |
94 | 94 | ||
95 | static void __devinit acs5k_i2c_init(void) | 95 | static void acs5k_i2c_init(void) |
96 | { | 96 | { |
97 | /* The gpio interface */ | 97 | /* The gpio interface */ |
98 | platform_device_register(&acs5k_i2c_device); | 98 | platform_device_register(&acs5k_i2c_device); |
diff --git a/arch/arm/mach-lpc32xx/timer.c b/arch/arm/mach-lpc32xx/timer.c index 88bd4ce3b94a..20eab63d10ba 100644 --- a/arch/arm/mach-lpc32xx/timer.c +++ b/arch/arm/mach-lpc32xx/timer.c | |||
@@ -70,7 +70,6 @@ static void lpc32xx_clkevt_mode(enum clock_event_mode mode, | |||
70 | static struct clock_event_device lpc32xx_clkevt = { | 70 | static struct clock_event_device lpc32xx_clkevt = { |
71 | .name = "lpc32xx_clkevt", | 71 | .name = "lpc32xx_clkevt", |
72 | .features = CLOCK_EVT_FEAT_ONESHOT, | 72 | .features = CLOCK_EVT_FEAT_ONESHOT, |
73 | .shift = 32, | ||
74 | .rating = 300, | 73 | .rating = 300, |
75 | .set_next_event = lpc32xx_clkevt_next_event, | 74 | .set_next_event = lpc32xx_clkevt_next_event, |
76 | .set_mode = lpc32xx_clkevt_mode, | 75 | .set_mode = lpc32xx_clkevt_mode, |
@@ -141,14 +140,8 @@ void __init lpc32xx_timer_init(void) | |||
141 | setup_irq(IRQ_LPC32XX_TIMER0, &lpc32xx_timer_irq); | 140 | setup_irq(IRQ_LPC32XX_TIMER0, &lpc32xx_timer_irq); |
142 | 141 | ||
143 | /* Setup the clockevent structure. */ | 142 | /* Setup the clockevent structure. */ |
144 | lpc32xx_clkevt.mult = div_sc(clkrate, NSEC_PER_SEC, | ||
145 | lpc32xx_clkevt.shift); | ||
146 | lpc32xx_clkevt.max_delta_ns = clockevent_delta2ns(-1, | ||
147 | &lpc32xx_clkevt); | ||
148 | lpc32xx_clkevt.min_delta_ns = clockevent_delta2ns(1, | ||
149 | &lpc32xx_clkevt) + 1; | ||
150 | lpc32xx_clkevt.cpumask = cpumask_of(0); | 143 | lpc32xx_clkevt.cpumask = cpumask_of(0); |
151 | clockevents_register_device(&lpc32xx_clkevt); | 144 | clockevents_config_and_register(&lpc32xx_clkevt, clkrate, 1, -1); |
152 | 145 | ||
153 | /* Use timer1 as clock source. */ | 146 | /* Use timer1 as clock source. */ |
154 | __raw_writel(LPC32XX_TIMER_CNTR_TCR_RESET, | 147 | __raw_writel(LPC32XX_TIMER_CNTR_TCR_RESET, |
diff --git a/arch/arm/mach-mmp/sram.c b/arch/arm/mach-mmp/sram.c index a6c08ede4491..bf5e64906e65 100644 --- a/arch/arm/mach-mmp/sram.c +++ b/arch/arm/mach-mmp/sram.c | |||
@@ -61,7 +61,7 @@ struct gen_pool *sram_get_gpool(char *pool_name) | |||
61 | } | 61 | } |
62 | EXPORT_SYMBOL(sram_get_gpool); | 62 | EXPORT_SYMBOL(sram_get_gpool); |
63 | 63 | ||
64 | static int __devinit sram_probe(struct platform_device *pdev) | 64 | static int sram_probe(struct platform_device *pdev) |
65 | { | 65 | { |
66 | struct sram_platdata *pdata = pdev->dev.platform_data; | 66 | struct sram_platdata *pdata = pdev->dev.platform_data; |
67 | struct sram_bank_info *info; | 67 | struct sram_bank_info *info; |
@@ -125,7 +125,7 @@ out: | |||
125 | return ret; | 125 | return ret; |
126 | } | 126 | } |
127 | 127 | ||
128 | static int __devexit sram_remove(struct platform_device *pdev) | 128 | static int sram_remove(struct platform_device *pdev) |
129 | { | 129 | { |
130 | struct sram_bank_info *info; | 130 | struct sram_bank_info *info; |
131 | 131 | ||
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c index 936447c70977..86a18b3d252e 100644 --- a/arch/arm/mach-mmp/time.c +++ b/arch/arm/mach-mmp/time.c | |||
@@ -141,7 +141,6 @@ static void timer_set_mode(enum clock_event_mode mode, | |||
141 | static struct clock_event_device ckevt = { | 141 | static struct clock_event_device ckevt = { |
142 | .name = "clockevent", | 142 | .name = "clockevent", |
143 | .features = CLOCK_EVT_FEAT_ONESHOT, | 143 | .features = CLOCK_EVT_FEAT_ONESHOT, |
144 | .shift = 32, | ||
145 | .rating = 200, | 144 | .rating = 200, |
146 | .set_next_event = timer_set_next_event, | 145 | .set_next_event = timer_set_next_event, |
147 | .set_mode = timer_set_mode, | 146 | .set_mode = timer_set_mode, |
@@ -198,15 +197,13 @@ void __init timer_init(int irq) | |||
198 | 197 | ||
199 | setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE); | 198 | setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE); |
200 | 199 | ||
201 | ckevt.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt.shift); | ||
202 | ckevt.max_delta_ns = clockevent_delta2ns(MAX_DELTA, &ckevt); | ||
203 | ckevt.min_delta_ns = clockevent_delta2ns(MIN_DELTA, &ckevt); | ||
204 | ckevt.cpumask = cpumask_of(0); | 200 | ckevt.cpumask = cpumask_of(0); |
205 | 201 | ||
206 | setup_irq(irq, &timer_irq); | 202 | setup_irq(irq, &timer_irq); |
207 | 203 | ||
208 | clocksource_register_hz(&cksrc, CLOCK_TICK_RATE); | 204 | clocksource_register_hz(&cksrc, CLOCK_TICK_RATE); |
209 | clockevents_register_device(&ckevt); | 205 | clockevents_config_and_register(&ckevt, CLOCK_TICK_RATE, |
206 | MIN_DELTA, MAX_DELTA); | ||
210 | } | 207 | } |
211 | 208 | ||
212 | #ifdef CONFIG_OF | 209 | #ifdef CONFIG_OF |
diff --git a/arch/arm/mach-msm/proc_comm.c b/arch/arm/mach-msm/proc_comm.c index 8f1eecd88186..507f5ca80697 100644 --- a/arch/arm/mach-msm/proc_comm.c +++ b/arch/arm/mach-msm/proc_comm.c | |||
@@ -120,7 +120,7 @@ int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2) | |||
120 | * and unknown state. This function should be called early to | 120 | * and unknown state. This function should be called early to |
121 | * wait on the ARM9. | 121 | * wait on the ARM9. |
122 | */ | 122 | */ |
123 | void __devinit proc_comm_boot_wait(void) | 123 | void proc_comm_boot_wait(void) |
124 | { | 124 | { |
125 | void __iomem *base = MSM_SHARED_RAM_BASE; | 125 | void __iomem *base = MSM_SHARED_RAM_BASE; |
126 | 126 | ||
diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c index c5a2eddc6cdc..b1588a1ea2f8 100644 --- a/arch/arm/mach-msm/smd.c +++ b/arch/arm/mach-msm/smd.c | |||
@@ -988,7 +988,7 @@ int smd_core_init(void) | |||
988 | return 0; | 988 | return 0; |
989 | } | 989 | } |
990 | 990 | ||
991 | static int __devinit msm_smd_probe(struct platform_device *pdev) | 991 | static int msm_smd_probe(struct platform_device *pdev) |
992 | { | 992 | { |
993 | /* | 993 | /* |
994 | * If we haven't waited for the ARM9 to boot up till now, | 994 | * If we haven't waited for the ARM9 to boot up till now, |
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c index 2fb5f3eec50f..dc8864cd3a16 100644 --- a/arch/arm/mach-msm/timer.c +++ b/arch/arm/mach-msm/timer.c | |||
@@ -144,13 +144,9 @@ static int __cpuinit msm_local_timer_setup(struct clock_event_device *evt) | |||
144 | evt->rating = msm_clockevent.rating; | 144 | evt->rating = msm_clockevent.rating; |
145 | evt->set_mode = msm_timer_set_mode; | 145 | evt->set_mode = msm_timer_set_mode; |
146 | evt->set_next_event = msm_timer_set_next_event; | 146 | evt->set_next_event = msm_timer_set_next_event; |
147 | evt->shift = msm_clockevent.shift; | ||
148 | evt->mult = div_sc(GPT_HZ, NSEC_PER_SEC, evt->shift); | ||
149 | evt->max_delta_ns = clockevent_delta2ns(0xf0000000, evt); | ||
150 | evt->min_delta_ns = clockevent_delta2ns(4, evt); | ||
151 | 147 | ||
152 | *__this_cpu_ptr(msm_evt.percpu_evt) = evt; | 148 | *__this_cpu_ptr(msm_evt.percpu_evt) = evt; |
153 | clockevents_register_device(evt); | 149 | clockevents_config_and_register(evt, GPT_HZ, 4, 0xf0000000); |
154 | enable_percpu_irq(evt->irq, IRQ_TYPE_EDGE_RISING); | 150 | enable_percpu_irq(evt->irq, IRQ_TYPE_EDGE_RISING); |
155 | return 0; | 151 | return 0; |
156 | } | 152 | } |
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c index a9a154a646dd..ee8c0b51df2c 100644 --- a/arch/arm/mach-mv78xx0/pcie.c +++ b/arch/arm/mach-mv78xx0/pcie.c | |||
@@ -173,7 +173,7 @@ static struct pci_ops pcie_ops = { | |||
173 | .write = pcie_wr_conf, | 173 | .write = pcie_wr_conf, |
174 | }; | 174 | }; |
175 | 175 | ||
176 | static void __devinit rc_pci_fixup(struct pci_dev *dev) | 176 | static void rc_pci_fixup(struct pci_dev *dev) |
177 | { | 177 | { |
178 | /* | 178 | /* |
179 | * Prevent enumeration of root complex. | 179 | * Prevent enumeration of root complex. |
diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c index 856f4c796061..27451b1ba3f1 100644 --- a/arch/arm/mach-mxs/timer.c +++ b/arch/arm/mach-mxs/timer.c | |||
@@ -195,7 +195,6 @@ static void mxs_set_mode(enum clock_event_mode mode, | |||
195 | static struct clock_event_device mxs_clockevent_device = { | 195 | static struct clock_event_device mxs_clockevent_device = { |
196 | .name = "mxs_timrot", | 196 | .name = "mxs_timrot", |
197 | .features = CLOCK_EVT_FEAT_ONESHOT, | 197 | .features = CLOCK_EVT_FEAT_ONESHOT, |
198 | .shift = 32, | ||
199 | .set_mode = mxs_set_mode, | 198 | .set_mode = mxs_set_mode, |
200 | .set_next_event = timrotv2_set_next_event, | 199 | .set_next_event = timrotv2_set_next_event, |
201 | .rating = 200, | 200 | .rating = 200, |
@@ -203,25 +202,12 @@ static struct clock_event_device mxs_clockevent_device = { | |||
203 | 202 | ||
204 | static int __init mxs_clockevent_init(struct clk *timer_clk) | 203 | static int __init mxs_clockevent_init(struct clk *timer_clk) |
205 | { | 204 | { |
206 | unsigned int c = clk_get_rate(timer_clk); | 205 | if (timrot_is_v1()) |
207 | |||
208 | mxs_clockevent_device.mult = | ||
209 | div_sc(c, NSEC_PER_SEC, mxs_clockevent_device.shift); | ||
210 | mxs_clockevent_device.cpumask = cpumask_of(0); | ||
211 | if (timrot_is_v1()) { | ||
212 | mxs_clockevent_device.set_next_event = timrotv1_set_next_event; | 206 | mxs_clockevent_device.set_next_event = timrotv1_set_next_event; |
213 | mxs_clockevent_device.max_delta_ns = | 207 | mxs_clockevent_device.cpumask = cpumask_of(0); |
214 | clockevent_delta2ns(0xfffe, &mxs_clockevent_device); | 208 | clockevents_config_and_register(&mxs_clockevent_device, |
215 | mxs_clockevent_device.min_delta_ns = | 209 | clk_get_rate(timer_clk), 0xf, |
216 | clockevent_delta2ns(0xf, &mxs_clockevent_device); | 210 | timrot_is_v1() ? 0xfffe : 0xfffffffe); |
217 | } else { | ||
218 | mxs_clockevent_device.max_delta_ns = | ||
219 | clockevent_delta2ns(0xfffffffe, &mxs_clockevent_device); | ||
220 | mxs_clockevent_device.min_delta_ns = | ||
221 | clockevent_delta2ns(0xf, &mxs_clockevent_device); | ||
222 | } | ||
223 | |||
224 | clockevents_register_device(&mxs_clockevent_device); | ||
225 | 211 | ||
226 | return 0; | 212 | return 0; |
227 | } | 213 | } |
diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c index 0dee4524494f..6df42e643031 100644 --- a/arch/arm/mach-netx/time.c +++ b/arch/arm/mach-netx/time.c | |||
@@ -76,7 +76,6 @@ static int netx_set_next_event(unsigned long evt, | |||
76 | 76 | ||
77 | static struct clock_event_device netx_clockevent = { | 77 | static struct clock_event_device netx_clockevent = { |
78 | .name = "netx-timer" __stringify(TIMER_CLOCKEVENT), | 78 | .name = "netx-timer" __stringify(TIMER_CLOCKEVENT), |
79 | .shift = 32, | ||
80 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | 79 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
81 | .set_next_event = netx_set_next_event, | 80 | .set_next_event = netx_set_next_event, |
82 | .set_mode = netx_set_mode, | 81 | .set_mode = netx_set_mode, |
@@ -140,14 +139,9 @@ void __init netx_timer_init(void) | |||
140 | clocksource_mmio_init(NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE), | 139 | clocksource_mmio_init(NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE), |
141 | "netx_timer", CLOCK_TICK_RATE, 200, 32, clocksource_mmio_readl_up); | 140 | "netx_timer", CLOCK_TICK_RATE, 200, 32, clocksource_mmio_readl_up); |
142 | 141 | ||
143 | netx_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, | ||
144 | netx_clockevent.shift); | ||
145 | netx_clockevent.max_delta_ns = | ||
146 | clockevent_delta2ns(0xfffffffe, &netx_clockevent); | ||
147 | /* with max_delta_ns >= delta2ns(0x800) the system currently runs fine. | 142 | /* with max_delta_ns >= delta2ns(0x800) the system currently runs fine. |
148 | * Adding some safety ... */ | 143 | * Adding some safety ... */ |
149 | netx_clockevent.min_delta_ns = | ||
150 | clockevent_delta2ns(0xa00, &netx_clockevent); | ||
151 | netx_clockevent.cpumask = cpumask_of(0); | 144 | netx_clockevent.cpumask = cpumask_of(0); |
152 | clockevents_register_device(&netx_clockevent); | 145 | clockevents_config_and_register(&netx_clockevent, CLOCK_TICK_RATE, |
146 | 0xa00, 0xfffffffe); | ||
153 | } | 147 | } |
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index ab756ed87ef0..c9015ba647a2 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c | |||
@@ -27,7 +27,6 @@ | |||
27 | #include <linux/pinctrl/machine.h> | 27 | #include <linux/pinctrl/machine.h> |
28 | #include <linux/platform_data/pinctrl-nomadik.h> | 28 | #include <linux/platform_data/pinctrl-nomadik.h> |
29 | #include <linux/platform_data/clocksource-nomadik-mtu.h> | 29 | #include <linux/platform_data/clocksource-nomadik-mtu.h> |
30 | #include <linux/platform_data/mtd-nomadik-nand.h> | ||
31 | #include <asm/hardware/vic.h> | 30 | #include <asm/hardware/vic.h> |
32 | #include <asm/sizes.h> | 31 | #include <asm/sizes.h> |
33 | #include <asm/mach-types.h> | 32 | #include <asm/mach-types.h> |
diff --git a/arch/arm/mach-nomadik/include/mach/irqs.h b/arch/arm/mach-nomadik/include/mach/irqs.h index b549d0571548..215f8cdb4004 100644 --- a/arch/arm/mach-nomadik/include/mach/irqs.h +++ b/arch/arm/mach-nomadik/include/mach/irqs.h | |||
@@ -22,49 +22,49 @@ | |||
22 | 22 | ||
23 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
24 | 24 | ||
25 | #define IRQ_VIC_START 1 /* first VIC interrupt is 1 */ | 25 | #define IRQ_VIC_START 32 /* first VIC interrupt is 1 */ |
26 | 26 | ||
27 | /* | 27 | /* |
28 | * Interrupt numbers generic for all Nomadik Chip cuts | 28 | * Interrupt numbers generic for all Nomadik Chip cuts |
29 | */ | 29 | */ |
30 | #define IRQ_WATCHDOG 1 | 30 | #define IRQ_WATCHDOG (IRQ_VIC_START+0) |
31 | #define IRQ_SOFTINT 2 | 31 | #define IRQ_SOFTINT (IRQ_VIC_START+1) |
32 | #define IRQ_CRYPTO 3 | 32 | #define IRQ_CRYPTO (IRQ_VIC_START+2) |
33 | #define IRQ_OWM 4 | 33 | #define IRQ_OWM (IRQ_VIC_START+3) |
34 | #define IRQ_MTU0 5 | 34 | #define IRQ_MTU0 (IRQ_VIC_START+4) |
35 | #define IRQ_MTU1 6 | 35 | #define IRQ_MTU1 (IRQ_VIC_START+5) |
36 | #define IRQ_GPIO0 7 | 36 | #define IRQ_GPIO0 (IRQ_VIC_START+6) |
37 | #define IRQ_GPIO1 8 | 37 | #define IRQ_GPIO1 (IRQ_VIC_START+7) |
38 | #define IRQ_GPIO2 9 | 38 | #define IRQ_GPIO2 (IRQ_VIC_START+8) |
39 | #define IRQ_GPIO3 10 | 39 | #define IRQ_GPIO3 (IRQ_VIC_START+9) |
40 | #define IRQ_RTC_RTT 11 | 40 | #define IRQ_RTC_RTT (IRQ_VIC_START+10) |
41 | #define IRQ_SSP 12 | 41 | #define IRQ_SSP (IRQ_VIC_START+11) |
42 | #define IRQ_UART0 13 | 42 | #define IRQ_UART0 (IRQ_VIC_START+12) |
43 | #define IRQ_DMA1 14 | 43 | #define IRQ_DMA1 (IRQ_VIC_START+13) |
44 | #define IRQ_CLCD_MDIF 15 | 44 | #define IRQ_CLCD_MDIF (IRQ_VIC_START+14) |
45 | #define IRQ_DMA0 16 | 45 | #define IRQ_DMA0 (IRQ_VIC_START+15) |
46 | #define IRQ_PWRFAIL 17 | 46 | #define IRQ_PWRFAIL (IRQ_VIC_START+16) |
47 | #define IRQ_UART1 18 | 47 | #define IRQ_UART1 (IRQ_VIC_START+17) |
48 | #define IRQ_FIRDA 19 | 48 | #define IRQ_FIRDA (IRQ_VIC_START+18) |
49 | #define IRQ_MSP0 20 | 49 | #define IRQ_MSP0 (IRQ_VIC_START+19) |
50 | #define IRQ_I2C0 21 | 50 | #define IRQ_I2C0 (IRQ_VIC_START+20) |
51 | #define IRQ_I2C1 22 | 51 | #define IRQ_I2C1 (IRQ_VIC_START+21) |
52 | #define IRQ_SDMMC 23 | 52 | #define IRQ_SDMMC (IRQ_VIC_START+22) |
53 | #define IRQ_USBOTG 24 | 53 | #define IRQ_USBOTG (IRQ_VIC_START+23) |
54 | #define IRQ_SVA_IT0 25 | 54 | #define IRQ_SVA_IT0 (IRQ_VIC_START+24) |
55 | #define IRQ_SVA_IT1 26 | 55 | #define IRQ_SVA_IT1 (IRQ_VIC_START+25) |
56 | #define IRQ_SAA_IT0 27 | 56 | #define IRQ_SAA_IT0 (IRQ_VIC_START+26) |
57 | #define IRQ_SAA_IT1 28 | 57 | #define IRQ_SAA_IT1 (IRQ_VIC_START+27) |
58 | #define IRQ_UART2 29 | 58 | #define IRQ_UART2 (IRQ_VIC_START+28) |
59 | #define IRQ_MSP2 30 | 59 | #define IRQ_MSP2 (IRQ_VIC_START+29) |
60 | #define IRQ_L2CC 49 | 60 | #define IRQ_L2CC (IRQ_VIC_START+30) |
61 | #define IRQ_HPI 50 | 61 | #define IRQ_HPI (IRQ_VIC_START+31) |
62 | #define IRQ_SKE 51 | 62 | #define IRQ_SKE (IRQ_VIC_START+32) |
63 | #define IRQ_KP 52 | 63 | #define IRQ_KP (IRQ_VIC_START+33) |
64 | #define IRQ_MEMST 55 | 64 | #define IRQ_MEMST (IRQ_VIC_START+34) |
65 | #define IRQ_SGA_IT 59 | 65 | #define IRQ_SGA_IT (IRQ_VIC_START+35) |
66 | #define IRQ_USBM 61 | 66 | #define IRQ_USBM (IRQ_VIC_START+36) |
67 | #define IRQ_MSP1 63 | 67 | #define IRQ_MSP1 (IRQ_VIC_START+37) |
68 | 68 | ||
69 | #define NOMADIK_GPIO_OFFSET (IRQ_VIC_START+64) | 69 | #define NOMADIK_GPIO_OFFSET (IRQ_VIC_START+64) |
70 | 70 | ||
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 3d2aa6f30192..2aab761ee68d 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c | |||
@@ -160,7 +160,7 @@ static struct omap_lcd_config ams_delta_lcd_config __initdata = { | |||
160 | .ctrl_name = "internal", | 160 | .ctrl_name = "internal", |
161 | }; | 161 | }; |
162 | 162 | ||
163 | static struct omap_usb_config ams_delta_usb_config = { | 163 | static struct omap_usb_config ams_delta_usb_config __initdata = { |
164 | .register_host = 1, | 164 | .register_host = 1, |
165 | .hmc_mode = 16, | 165 | .hmc_mode = 16, |
166 | .pins[0] = 2, | 166 | .pins[0] = 2, |
diff --git a/arch/arm/mach-omap1/mailbox.c b/arch/arm/mach-omap1/mailbox.c index e962926b67bc..efc8f207f6fc 100644 --- a/arch/arm/mach-omap1/mailbox.c +++ b/arch/arm/mach-omap1/mailbox.c | |||
@@ -142,7 +142,7 @@ static struct omap_mbox mbox_dsp_info = { | |||
142 | 142 | ||
143 | static struct omap_mbox *omap1_mboxes[] = { &mbox_dsp_info, NULL }; | 143 | static struct omap_mbox *omap1_mboxes[] = { &mbox_dsp_info, NULL }; |
144 | 144 | ||
145 | static int __devinit omap1_mbox_probe(struct platform_device *pdev) | 145 | static int omap1_mbox_probe(struct platform_device *pdev) |
146 | { | 146 | { |
147 | struct resource *mem; | 147 | struct resource *mem; |
148 | int ret; | 148 | int ret; |
@@ -165,7 +165,7 @@ static int __devinit omap1_mbox_probe(struct platform_device *pdev) | |||
165 | return 0; | 165 | return 0; |
166 | } | 166 | } |
167 | 167 | ||
168 | static int __devexit omap1_mbox_remove(struct platform_device *pdev) | 168 | static int omap1_mbox_remove(struct platform_device *pdev) |
169 | { | 169 | { |
170 | omap_mbox_unregister(); | 170 | omap_mbox_unregister(); |
171 | iounmap(mbox_base); | 171 | iounmap(mbox_base); |
@@ -174,7 +174,7 @@ static int __devexit omap1_mbox_remove(struct platform_device *pdev) | |||
174 | 174 | ||
175 | static struct platform_driver omap1_mbox_driver = { | 175 | static struct platform_driver omap1_mbox_driver = { |
176 | .probe = omap1_mbox_probe, | 176 | .probe = omap1_mbox_probe, |
177 | .remove = __devexit_p(omap1_mbox_remove), | 177 | .remove = omap1_mbox_remove, |
178 | .driver = { | 178 | .driver = { |
179 | .name = "omap-mailbox", | 179 | .name = "omap-mailbox", |
180 | }, | 180 | }, |
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index 1d4512fdc9bc..726ec23d29c7 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c | |||
@@ -145,7 +145,6 @@ static void omap_mpu_set_mode(enum clock_event_mode mode, | |||
145 | static struct clock_event_device clockevent_mpu_timer1 = { | 145 | static struct clock_event_device clockevent_mpu_timer1 = { |
146 | .name = "mpu_timer1", | 146 | .name = "mpu_timer1", |
147 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | 147 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
148 | .shift = 32, | ||
149 | .set_next_event = omap_mpu_set_next_event, | 148 | .set_next_event = omap_mpu_set_next_event, |
150 | .set_mode = omap_mpu_set_mode, | 149 | .set_mode = omap_mpu_set_mode, |
151 | }; | 150 | }; |
@@ -170,15 +169,9 @@ static __init void omap_init_mpu_timer(unsigned long rate) | |||
170 | setup_irq(INT_TIMER1, &omap_mpu_timer1_irq); | 169 | setup_irq(INT_TIMER1, &omap_mpu_timer1_irq); |
171 | omap_mpu_timer_start(0, (rate / HZ) - 1, 1); | 170 | omap_mpu_timer_start(0, (rate / HZ) - 1, 1); |
172 | 171 | ||
173 | clockevent_mpu_timer1.mult = div_sc(rate, NSEC_PER_SEC, | ||
174 | clockevent_mpu_timer1.shift); | ||
175 | clockevent_mpu_timer1.max_delta_ns = | ||
176 | clockevent_delta2ns(-1, &clockevent_mpu_timer1); | ||
177 | clockevent_mpu_timer1.min_delta_ns = | ||
178 | clockevent_delta2ns(1, &clockevent_mpu_timer1); | ||
179 | |||
180 | clockevent_mpu_timer1.cpumask = cpumask_of(0); | 172 | clockevent_mpu_timer1.cpumask = cpumask_of(0); |
181 | clockevents_register_device(&clockevent_mpu_timer1); | 173 | clockevents_config_and_register(&clockevent_mpu_timer1, rate, |
174 | 1, -1); | ||
182 | } | 175 | } |
183 | 176 | ||
184 | 177 | ||
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c index 41152fadd4c0..0b74246ba62c 100644 --- a/arch/arm/mach-omap1/timer32k.c +++ b/arch/arm/mach-omap1/timer32k.c | |||
@@ -140,7 +140,6 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode, | |||
140 | static struct clock_event_device clockevent_32k_timer = { | 140 | static struct clock_event_device clockevent_32k_timer = { |
141 | .name = "32k-timer", | 141 | .name = "32k-timer", |
142 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | 142 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
143 | .shift = 32, | ||
144 | .set_next_event = omap_32k_timer_set_next_event, | 143 | .set_next_event = omap_32k_timer_set_next_event, |
145 | .set_mode = omap_32k_timer_set_mode, | 144 | .set_mode = omap_32k_timer_set_mode, |
146 | }; | 145 | }; |
@@ -165,16 +164,9 @@ static __init void omap_init_32k_timer(void) | |||
165 | { | 164 | { |
166 | setup_irq(INT_OS_TIMER, &omap_32k_timer_irq); | 165 | setup_irq(INT_OS_TIMER, &omap_32k_timer_irq); |
167 | 166 | ||
168 | clockevent_32k_timer.mult = div_sc(OMAP_32K_TICKS_PER_SEC, | ||
169 | NSEC_PER_SEC, | ||
170 | clockevent_32k_timer.shift); | ||
171 | clockevent_32k_timer.max_delta_ns = | ||
172 | clockevent_delta2ns(0xfffffffe, &clockevent_32k_timer); | ||
173 | clockevent_32k_timer.min_delta_ns = | ||
174 | clockevent_delta2ns(1, &clockevent_32k_timer); | ||
175 | |||
176 | clockevent_32k_timer.cpumask = cpumask_of(0); | 167 | clockevent_32k_timer.cpumask = cpumask_of(0); |
177 | clockevents_register_device(&clockevent_32k_timer); | 168 | clockevents_config_and_register(&clockevent_32k_timer, |
169 | OMAP_32K_TICKS_PER_SEC, 1, 0xfffffffe); | ||
178 | } | 170 | } |
179 | 171 | ||
180 | /* | 172 | /* |
diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c index 104fed366b8f..1a1db5971cd9 100644 --- a/arch/arm/mach-omap1/usb.c +++ b/arch/arm/mach-omap1/usb.c | |||
@@ -629,8 +629,14 @@ static void __init omap_1510_usb_init(struct omap_usb_config *config) | |||
629 | static inline void omap_1510_usb_init(struct omap_usb_config *config) {} | 629 | static inline void omap_1510_usb_init(struct omap_usb_config *config) {} |
630 | #endif | 630 | #endif |
631 | 631 | ||
632 | void __init omap1_usb_init(struct omap_usb_config *pdata) | 632 | void __init omap1_usb_init(struct omap_usb_config *_pdata) |
633 | { | 633 | { |
634 | struct omap_usb_config *pdata; | ||
635 | |||
636 | pdata = kmemdup(_pdata, sizeof(*pdata), GFP_KERNEL); | ||
637 | if (!pdata) | ||
638 | return; | ||
639 | |||
634 | pdata->usb0_init = omap1_usb0_init; | 640 | pdata->usb0_init = omap1_usb0_init; |
635 | pdata->usb1_init = omap1_usb1_init; | 641 | pdata->usb1_init = omap1_usb1_init; |
636 | pdata->usb2_init = omap1_usb2_init; | 642 | pdata->usb2_init = omap1_usb2_init; |
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c index bdf39481fbd6..6ef87580c33f 100644 --- a/arch/arm/mach-omap2/cclock3xxx_data.c +++ b/arch/arm/mach-omap2/cclock3xxx_data.c | |||
@@ -1167,6 +1167,8 @@ static const struct clk_ops emu_src_ck_ops = { | |||
1167 | .recalc_rate = &omap2_clksel_recalc, | 1167 | .recalc_rate = &omap2_clksel_recalc, |
1168 | .get_parent = &omap2_clksel_find_parent_index, | 1168 | .get_parent = &omap2_clksel_find_parent_index, |
1169 | .set_parent = &omap2_clksel_set_parent, | 1169 | .set_parent = &omap2_clksel_set_parent, |
1170 | .enable = &omap2_clkops_enable_clkdm, | ||
1171 | .disable = &omap2_clkops_disable_clkdm, | ||
1170 | }; | 1172 | }; |
1171 | 1173 | ||
1172 | static struct clk emu_src_ck; | 1174 | static struct clk emu_src_ck; |
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 65468f6d7f0e..8033cb747c86 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c | |||
@@ -744,7 +744,7 @@ static int gpmc_setup_irq(void) | |||
744 | return request_irq(gpmc_irq, gpmc_handle_irq, 0, "gpmc", NULL); | 744 | return request_irq(gpmc_irq, gpmc_handle_irq, 0, "gpmc", NULL); |
745 | } | 745 | } |
746 | 746 | ||
747 | static __devexit int gpmc_free_irq(void) | 747 | static int gpmc_free_irq(void) |
748 | { | 748 | { |
749 | int i; | 749 | int i; |
750 | 750 | ||
@@ -762,7 +762,7 @@ static __devexit int gpmc_free_irq(void) | |||
762 | return 0; | 762 | return 0; |
763 | } | 763 | } |
764 | 764 | ||
765 | static void __devexit gpmc_mem_exit(void) | 765 | static void gpmc_mem_exit(void) |
766 | { | 766 | { |
767 | int cs; | 767 | int cs; |
768 | 768 | ||
@@ -774,7 +774,7 @@ static void __devexit gpmc_mem_exit(void) | |||
774 | 774 | ||
775 | } | 775 | } |
776 | 776 | ||
777 | static int __devinit gpmc_mem_init(void) | 777 | static int gpmc_mem_init(void) |
778 | { | 778 | { |
779 | int cs, rc; | 779 | int cs, rc; |
780 | unsigned long boot_rom_space = 0; | 780 | unsigned long boot_rom_space = 0; |
@@ -1121,7 +1121,7 @@ int gpmc_calc_timings(struct gpmc_timings *gpmc_t, | |||
1121 | return 0; | 1121 | return 0; |
1122 | } | 1122 | } |
1123 | 1123 | ||
1124 | static __devinit int gpmc_probe(struct platform_device *pdev) | 1124 | static int gpmc_probe(struct platform_device *pdev) |
1125 | { | 1125 | { |
1126 | int rc; | 1126 | int rc; |
1127 | u32 l; | 1127 | u32 l; |
@@ -1177,7 +1177,7 @@ static __devinit int gpmc_probe(struct platform_device *pdev) | |||
1177 | return 0; | 1177 | return 0; |
1178 | } | 1178 | } |
1179 | 1179 | ||
1180 | static __devexit int gpmc_remove(struct platform_device *pdev) | 1180 | static int gpmc_remove(struct platform_device *pdev) |
1181 | { | 1181 | { |
1182 | gpmc_free_irq(); | 1182 | gpmc_free_irq(); |
1183 | gpmc_mem_exit(); | 1183 | gpmc_mem_exit(); |
@@ -1187,7 +1187,7 @@ static __devexit int gpmc_remove(struct platform_device *pdev) | |||
1187 | 1187 | ||
1188 | static struct platform_driver gpmc_driver = { | 1188 | static struct platform_driver gpmc_driver = { |
1189 | .probe = gpmc_probe, | 1189 | .probe = gpmc_probe, |
1190 | .remove = __devexit_p(gpmc_remove), | 1190 | .remove = gpmc_remove, |
1191 | .driver = { | 1191 | .driver = { |
1192 | .name = DEVICE_NAME, | 1192 | .name = DEVICE_NAME, |
1193 | .owner = THIS_MODULE, | 1193 | .owner = THIS_MODULE, |
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index 0d974565f8ca..0b080267b7f6 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c | |||
@@ -342,7 +342,7 @@ struct omap_mbox mbox_2_info = { | |||
342 | struct omap_mbox *omap4_mboxes[] = { &mbox_1_info, &mbox_2_info, NULL }; | 342 | struct omap_mbox *omap4_mboxes[] = { &mbox_1_info, &mbox_2_info, NULL }; |
343 | #endif | 343 | #endif |
344 | 344 | ||
345 | static int __devinit omap2_mbox_probe(struct platform_device *pdev) | 345 | static int omap2_mbox_probe(struct platform_device *pdev) |
346 | { | 346 | { |
347 | struct resource *mem; | 347 | struct resource *mem; |
348 | int ret; | 348 | int ret; |
@@ -395,7 +395,7 @@ static int __devinit omap2_mbox_probe(struct platform_device *pdev) | |||
395 | return 0; | 395 | return 0; |
396 | } | 396 | } |
397 | 397 | ||
398 | static int __devexit omap2_mbox_remove(struct platform_device *pdev) | 398 | static int omap2_mbox_remove(struct platform_device *pdev) |
399 | { | 399 | { |
400 | omap_mbox_unregister(); | 400 | omap_mbox_unregister(); |
401 | iounmap(mbox_base); | 401 | iounmap(mbox_base); |
@@ -404,7 +404,7 @@ static int __devexit omap2_mbox_remove(struct platform_device *pdev) | |||
404 | 404 | ||
405 | static struct platform_driver omap2_mbox_driver = { | 405 | static struct platform_driver omap2_mbox_driver = { |
406 | .probe = omap2_mbox_probe, | 406 | .probe = omap2_mbox_probe, |
407 | .remove = __devexit_p(omap2_mbox_remove), | 407 | .remove = omap2_mbox_remove, |
408 | .driver = { | 408 | .driver = { |
409 | .name = "omap-mailbox", | 409 | .name = "omap-mailbox", |
410 | }, | 410 | }, |
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c index 081c71edddf4..646c14d9fdb9 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c | |||
@@ -2070,7 +2070,7 @@ static struct omap_hwmod_irq_info am33xx_usbss_mpu_irqs[] = { | |||
2070 | { .name = "usbss-irq", .irq = 17 + OMAP_INTC_START, }, | 2070 | { .name = "usbss-irq", .irq = 17 + OMAP_INTC_START, }, |
2071 | { .name = "musb0-irq", .irq = 18 + OMAP_INTC_START, }, | 2071 | { .name = "musb0-irq", .irq = 18 + OMAP_INTC_START, }, |
2072 | { .name = "musb1-irq", .irq = 19 + OMAP_INTC_START, }, | 2072 | { .name = "musb1-irq", .irq = 19 + OMAP_INTC_START, }, |
2073 | { .irq = -1 + OMAP_INTC_START, }, | 2073 | { .irq = -1, }, |
2074 | }; | 2074 | }; |
2075 | 2075 | ||
2076 | static struct omap_hwmod am33xx_usbss_hwmod = { | 2076 | static struct omap_hwmod am33xx_usbss_hwmod = { |
@@ -2515,7 +2515,7 @@ static struct omap_hwmod_ocp_if am33xx_l4_hs__cpgmac0 = { | |||
2515 | .user = OCP_USER_MPU, | 2515 | .user = OCP_USER_MPU, |
2516 | }; | 2516 | }; |
2517 | 2517 | ||
2518 | struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = { | 2518 | static struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = { |
2519 | { | 2519 | { |
2520 | .pa_start = 0x4A101000, | 2520 | .pa_start = 0x4A101000, |
2521 | .pa_end = 0x4A101000 + SZ_256 - 1, | 2521 | .pa_end = 0x4A101000 + SZ_256 - 1, |
@@ -2523,7 +2523,7 @@ struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = { | |||
2523 | { } | 2523 | { } |
2524 | }; | 2524 | }; |
2525 | 2525 | ||
2526 | struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = { | 2526 | static struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = { |
2527 | .master = &am33xx_cpgmac0_hwmod, | 2527 | .master = &am33xx_cpgmac0_hwmod, |
2528 | .slave = &am33xx_mdio_hwmod, | 2528 | .slave = &am33xx_mdio_hwmod, |
2529 | .addr = am33xx_mdio_addr_space, | 2529 | .addr = am33xx_mdio_addr_space, |
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c index cc0e71430af1..418de9c3b319 100644 --- a/arch/arm/mach-omap2/prm2xxx.c +++ b/arch/arm/mach-omap2/prm2xxx.c | |||
@@ -28,6 +28,14 @@ | |||
28 | #include "prm-regbits-24xx.h" | 28 | #include "prm-regbits-24xx.h" |
29 | 29 | ||
30 | /* | 30 | /* |
31 | * OMAP24xx PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED bits - | ||
32 | * these are reversed from the bits used on OMAP3+ | ||
33 | */ | ||
34 | #define OMAP24XX_PWRDM_POWER_ON 0x0 | ||
35 | #define OMAP24XX_PWRDM_POWER_RET 0x1 | ||
36 | #define OMAP24XX_PWRDM_POWER_OFF 0x3 | ||
37 | |||
38 | /* | ||
31 | * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP | 39 | * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP |
32 | * hardware register (which are specific to the OMAP2xxx SoCs) to | 40 | * hardware register (which are specific to the OMAP2xxx SoCs) to |
33 | * reset source ID bit shifts (which is an OMAP SoC-independent | 41 | * reset source ID bit shifts (which is an OMAP SoC-independent |
@@ -68,6 +76,34 @@ static u32 omap2xxx_prm_read_reset_sources(void) | |||
68 | } | 76 | } |
69 | 77 | ||
70 | /** | 78 | /** |
79 | * omap2xxx_pwrst_to_common_pwrst - convert OMAP2xxx pwrst to common pwrst | ||
80 | * @omap2xxx_pwrst: OMAP2xxx hardware power state to convert | ||
81 | * | ||
82 | * Return the common power state bits corresponding to the OMAP2xxx | ||
83 | * hardware power state bits @omap2xxx_pwrst, or -EINVAL upon error. | ||
84 | */ | ||
85 | static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst) | ||
86 | { | ||
87 | u8 pwrst; | ||
88 | |||
89 | switch (omap2xxx_pwrst) { | ||
90 | case OMAP24XX_PWRDM_POWER_OFF: | ||
91 | pwrst = PWRDM_POWER_OFF; | ||
92 | break; | ||
93 | case OMAP24XX_PWRDM_POWER_RET: | ||
94 | pwrst = PWRDM_POWER_RET; | ||
95 | break; | ||
96 | case OMAP24XX_PWRDM_POWER_ON: | ||
97 | pwrst = PWRDM_POWER_ON; | ||
98 | break; | ||
99 | default: | ||
100 | return -EINVAL; | ||
101 | } | ||
102 | |||
103 | return pwrst; | ||
104 | } | ||
105 | |||
106 | /** | ||
71 | * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC | 107 | * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC |
72 | * | 108 | * |
73 | * Set the DPLL reset bit, which should reboot the SoC. This is the | 109 | * Set the DPLL reset bit, which should reboot the SoC. This is the |
@@ -97,10 +133,56 @@ int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm) | |||
97 | return 0; | 133 | return 0; |
98 | } | 134 | } |
99 | 135 | ||
136 | static int omap2xxx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) | ||
137 | { | ||
138 | u8 omap24xx_pwrst; | ||
139 | |||
140 | switch (pwrst) { | ||
141 | case PWRDM_POWER_OFF: | ||
142 | omap24xx_pwrst = OMAP24XX_PWRDM_POWER_OFF; | ||
143 | break; | ||
144 | case PWRDM_POWER_RET: | ||
145 | omap24xx_pwrst = OMAP24XX_PWRDM_POWER_RET; | ||
146 | break; | ||
147 | case PWRDM_POWER_ON: | ||
148 | omap24xx_pwrst = OMAP24XX_PWRDM_POWER_ON; | ||
149 | break; | ||
150 | default: | ||
151 | return -EINVAL; | ||
152 | } | ||
153 | |||
154 | omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, | ||
155 | (omap24xx_pwrst << OMAP_POWERSTATE_SHIFT), | ||
156 | pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); | ||
157 | return 0; | ||
158 | } | ||
159 | |||
160 | static int omap2xxx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) | ||
161 | { | ||
162 | u8 omap2xxx_pwrst; | ||
163 | |||
164 | omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, | ||
165 | OMAP2_PM_PWSTCTRL, | ||
166 | OMAP_POWERSTATE_MASK); | ||
167 | |||
168 | return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst); | ||
169 | } | ||
170 | |||
171 | static int omap2xxx_pwrdm_read_pwrst(struct powerdomain *pwrdm) | ||
172 | { | ||
173 | u8 omap2xxx_pwrst; | ||
174 | |||
175 | omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, | ||
176 | OMAP2_PM_PWSTST, | ||
177 | OMAP_POWERSTATEST_MASK); | ||
178 | |||
179 | return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst); | ||
180 | } | ||
181 | |||
100 | struct pwrdm_ops omap2_pwrdm_operations = { | 182 | struct pwrdm_ops omap2_pwrdm_operations = { |
101 | .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, | 183 | .pwrdm_set_next_pwrst = omap2xxx_pwrdm_set_next_pwrst, |
102 | .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, | 184 | .pwrdm_read_next_pwrst = omap2xxx_pwrdm_read_next_pwrst, |
103 | .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, | 185 | .pwrdm_read_pwrst = omap2xxx_pwrdm_read_pwrst, |
104 | .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, | 186 | .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, |
105 | .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, | 187 | .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, |
106 | .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, | 188 | .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, |
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c index 30517f5af707..a3e121f94a86 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c | |||
@@ -103,28 +103,6 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) | |||
103 | /* Powerdomain low-level functions */ | 103 | /* Powerdomain low-level functions */ |
104 | 104 | ||
105 | /* Common functions across OMAP2 and OMAP3 */ | 105 | /* Common functions across OMAP2 and OMAP3 */ |
106 | int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) | ||
107 | { | ||
108 | omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, | ||
109 | (pwrst << OMAP_POWERSTATE_SHIFT), | ||
110 | pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); | ||
111 | return 0; | ||
112 | } | ||
113 | |||
114 | int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) | ||
115 | { | ||
116 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, | ||
117 | OMAP2_PM_PWSTCTRL, | ||
118 | OMAP_POWERSTATE_MASK); | ||
119 | } | ||
120 | |||
121 | int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm) | ||
122 | { | ||
123 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, | ||
124 | OMAP2_PM_PWSTST, | ||
125 | OMAP_POWERSTATEST_MASK); | ||
126 | } | ||
127 | |||
128 | int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, | 106 | int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, |
129 | u8 pwrst) | 107 | u8 pwrst) |
130 | { | 108 | { |
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c index 39822aabcff3..e648bd55b072 100644 --- a/arch/arm/mach-omap2/prm3xxx.c +++ b/arch/arm/mach-omap2/prm3xxx.c | |||
@@ -277,6 +277,28 @@ static u32 omap3xxx_prm_read_reset_sources(void) | |||
277 | 277 | ||
278 | /* Powerdomain low-level functions */ | 278 | /* Powerdomain low-level functions */ |
279 | 279 | ||
280 | static int omap3_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) | ||
281 | { | ||
282 | omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, | ||
283 | (pwrst << OMAP_POWERSTATE_SHIFT), | ||
284 | pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); | ||
285 | return 0; | ||
286 | } | ||
287 | |||
288 | static int omap3_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) | ||
289 | { | ||
290 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, | ||
291 | OMAP2_PM_PWSTCTRL, | ||
292 | OMAP_POWERSTATE_MASK); | ||
293 | } | ||
294 | |||
295 | static int omap3_pwrdm_read_pwrst(struct powerdomain *pwrdm) | ||
296 | { | ||
297 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, | ||
298 | OMAP2_PM_PWSTST, | ||
299 | OMAP_POWERSTATEST_MASK); | ||
300 | } | ||
301 | |||
280 | /* Applicable only for OMAP3. Not supported on OMAP2 */ | 302 | /* Applicable only for OMAP3. Not supported on OMAP2 */ |
281 | static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) | 303 | static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) |
282 | { | 304 | { |
@@ -355,9 +377,9 @@ static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm) | |||
355 | } | 377 | } |
356 | 378 | ||
357 | struct pwrdm_ops omap3_pwrdm_operations = { | 379 | struct pwrdm_ops omap3_pwrdm_operations = { |
358 | .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, | 380 | .pwrdm_set_next_pwrst = omap3_pwrdm_set_next_pwrst, |
359 | .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, | 381 | .pwrdm_read_next_pwrst = omap3_pwrdm_read_next_pwrst, |
360 | .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, | 382 | .pwrdm_read_pwrst = omap3_pwrdm_read_pwrst, |
361 | .pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst, | 383 | .pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst, |
362 | .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, | 384 | .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, |
363 | .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst, | 385 | .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst, |
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 7498bc77fe8b..c05a343d465d 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c | |||
@@ -56,9 +56,9 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = { | |||
56 | * enumeration) | 56 | * enumeration) |
57 | */ | 57 | */ |
58 | static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = { | 58 | static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = { |
59 | { OMAP4430_RST_GLOBAL_WARM_SW_SHIFT, | 59 | { OMAP4430_GLOBAL_WARM_SW_RST_SHIFT, |
60 | OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT }, | 60 | OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT }, |
61 | { OMAP4430_RST_GLOBAL_COLD_SW_SHIFT, | 61 | { OMAP4430_GLOBAL_COLD_RST_SHIFT, |
62 | OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT }, | 62 | OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT }, |
63 | { OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT, | 63 | { OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT, |
64 | OMAP_SECU_VIOL_RST_SRC_ID_SHIFT }, | 64 | OMAP_SECU_VIOL_RST_SRC_ID_SHIFT }, |
@@ -333,7 +333,7 @@ static u32 omap44xx_prm_read_reset_sources(void) | |||
333 | u32 r = 0; | 333 | u32 r = 0; |
334 | u32 v; | 334 | u32 v; |
335 | 335 | ||
336 | v = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, | 336 | v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, |
337 | OMAP4_RM_RSTST); | 337 | OMAP4_RM_RSTST); |
338 | 338 | ||
339 | p = omap44xx_prm_reset_src_map; | 339 | p = omap44xx_prm_reset_src_map; |
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 22b0979206ca..8ee1fbdec561 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h | |||
@@ -62,8 +62,8 @@ | |||
62 | 62 | ||
63 | /* OMAP4 specific register offsets */ | 63 | /* OMAP4 specific register offsets */ |
64 | #define OMAP4_RM_RSTCTRL 0x0000 | 64 | #define OMAP4_RM_RSTCTRL 0x0000 |
65 | #define OMAP4_RM_RSTTIME 0x0004 | 65 | #define OMAP4_RM_RSTST 0x0004 |
66 | #define OMAP4_RM_RSTST 0x0008 | 66 | #define OMAP4_RM_RSTTIME 0x0008 |
67 | #define OMAP4_PM_PWSTCTRL 0x0000 | 67 | #define OMAP4_PM_PWSTCTRL 0x0000 |
68 | #define OMAP4_PM_PWSTST 0x0004 | 68 | #define OMAP4_PM_PWSTST 0x0004 |
69 | 69 | ||
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 5975a42e16d4..57b1ee39fe56 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c | |||
@@ -131,7 +131,6 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode, | |||
131 | static struct clock_event_device clockevent_gpt = { | 131 | static struct clock_event_device clockevent_gpt = { |
132 | .name = "gp_timer", | 132 | .name = "gp_timer", |
133 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | 133 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
134 | .shift = 32, | ||
135 | .rating = 300, | 134 | .rating = 300, |
136 | .set_next_event = omap2_gp_timer_set_next_event, | 135 | .set_next_event = omap2_gp_timer_set_next_event, |
137 | .set_mode = omap2_gp_timer_set_mode, | 136 | .set_mode = omap2_gp_timer_set_mode, |
@@ -340,17 +339,11 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, | |||
340 | 339 | ||
341 | __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW); | 340 | __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW); |
342 | 341 | ||
343 | clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC, | ||
344 | clockevent_gpt.shift); | ||
345 | clockevent_gpt.max_delta_ns = | ||
346 | clockevent_delta2ns(0xffffffff, &clockevent_gpt); | ||
347 | clockevent_gpt.min_delta_ns = | ||
348 | clockevent_delta2ns(3, &clockevent_gpt); | ||
349 | /* Timer internal resynch latency. */ | ||
350 | |||
351 | clockevent_gpt.cpumask = cpu_possible_mask; | 342 | clockevent_gpt.cpumask = cpu_possible_mask; |
352 | clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev); | 343 | clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev); |
353 | clockevents_register_device(&clockevent_gpt); | 344 | clockevents_config_and_register(&clockevent_gpt, clkev.rate, |
345 | 3, /* Timer internal resynch latency */ | ||
346 | 0xffffffff); | ||
354 | 347 | ||
355 | pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", | 348 | pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", |
356 | gptimer_id, clkev.rate); | 349 | gptimer_id, clkev.rate); |
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c index cd50e328db2a..d9c7c3bf0d9c 100644 --- a/arch/arm/mach-orion5x/pci.c +++ b/arch/arm/mach-orion5x/pci.c | |||
@@ -506,7 +506,7 @@ static int __init pci_setup(struct pci_sys_data *sys) | |||
506 | /***************************************************************************** | 506 | /***************************************************************************** |
507 | * General PCIe + PCI | 507 | * General PCIe + PCI |
508 | ****************************************************************************/ | 508 | ****************************************************************************/ |
509 | static void __devinit rc_pci_fixup(struct pci_dev *dev) | 509 | static void rc_pci_fixup(struct pci_dev *dev) |
510 | { | 510 | { |
511 | /* | 511 | /* |
512 | * Prevent enumeration of root complex. | 512 | * Prevent enumeration of root complex. |
diff --git a/arch/arm/mach-prima2/pm.c b/arch/arm/mach-prima2/pm.c index fb5a7910af35..9936c180bf01 100644 --- a/arch/arm/mach-prima2/pm.c +++ b/arch/arm/mach-prima2/pm.c | |||
@@ -123,7 +123,7 @@ static const struct of_device_id memc_ids[] = { | |||
123 | {} | 123 | {} |
124 | }; | 124 | }; |
125 | 125 | ||
126 | static int __devinit sirfsoc_memc_probe(struct platform_device *op) | 126 | static int sirfsoc_memc_probe(struct platform_device *op) |
127 | { | 127 | { |
128 | struct device_node *np = op->dev.of_node; | 128 | struct device_node *np = op->dev.of_node; |
129 | 129 | ||
diff --git a/arch/arm/mach-prima2/rtciobrg.c b/arch/arm/mach-prima2/rtciobrg.c index 9d80f1e20a98..557353602130 100644 --- a/arch/arm/mach-prima2/rtciobrg.c +++ b/arch/arm/mach-prima2/rtciobrg.c | |||
@@ -107,7 +107,7 @@ static const struct of_device_id rtciobrg_ids[] = { | |||
107 | {} | 107 | {} |
108 | }; | 108 | }; |
109 | 109 | ||
110 | static int __devinit sirfsoc_rtciobrg_probe(struct platform_device *op) | 110 | static int sirfsoc_rtciobrg_probe(struct platform_device *op) |
111 | { | 111 | { |
112 | struct device_node *np = op->dev.of_node; | 112 | struct device_node *np = op->dev.of_node; |
113 | 113 | ||
diff --git a/arch/arm/mach-prima2/timer.c b/arch/arm/mach-prima2/timer.c index 8c732a5beb7f..a7a2c199c3ea 100644 --- a/arch/arm/mach-prima2/timer.c +++ b/arch/arm/mach-prima2/timer.c | |||
@@ -175,15 +175,9 @@ static u32 notrace sirfsoc_read_sched_clock(void) | |||
175 | 175 | ||
176 | static void __init sirfsoc_clockevent_init(void) | 176 | static void __init sirfsoc_clockevent_init(void) |
177 | { | 177 | { |
178 | clockevents_calc_mult_shift(&sirfsoc_clockevent, CLOCK_TICK_RATE, 60); | ||
179 | |||
180 | sirfsoc_clockevent.max_delta_ns = | ||
181 | clockevent_delta2ns(-2, &sirfsoc_clockevent); | ||
182 | sirfsoc_clockevent.min_delta_ns = | ||
183 | clockevent_delta2ns(2, &sirfsoc_clockevent); | ||
184 | |||
185 | sirfsoc_clockevent.cpumask = cpumask_of(0); | 178 | sirfsoc_clockevent.cpumask = cpumask_of(0); |
186 | clockevents_register_device(&sirfsoc_clockevent); | 179 | clockevents_config_and_register(&sirfsoc_clockevent, CLOCK_TICK_RATE, |
180 | 2, -2); | ||
187 | } | 181 | } |
188 | 182 | ||
189 | /* initialize the kernel jiffy timer source */ | 183 | /* initialize the kernel jiffy timer source */ |
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c index 048c4299473c..7a39efc50865 100644 --- a/arch/arm/mach-pxa/corgi_pm.c +++ b/arch/arm/mach-pxa/corgi_pm.c | |||
@@ -198,7 +198,7 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = { | |||
198 | 198 | ||
199 | static struct platform_device *corgipm_device; | 199 | static struct platform_device *corgipm_device; |
200 | 200 | ||
201 | static int __devinit corgipm_init(void) | 201 | static int corgipm_init(void) |
202 | { | 202 | { |
203 | int ret; | 203 | int ret; |
204 | 204 | ||
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c index ec55c575ed19..0a36d3585f26 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.c +++ b/arch/arm/mach-pxa/sharpsl_pm.c | |||
@@ -829,7 +829,7 @@ static const struct platform_suspend_ops sharpsl_pm_ops = { | |||
829 | }; | 829 | }; |
830 | #endif | 830 | #endif |
831 | 831 | ||
832 | static int __devinit sharpsl_pm_probe(struct platform_device *pdev) | 832 | static int sharpsl_pm_probe(struct platform_device *pdev) |
833 | { | 833 | { |
834 | int ret, irq; | 834 | int ret, irq; |
835 | 835 | ||
@@ -941,7 +941,7 @@ static struct platform_driver sharpsl_pm_driver = { | |||
941 | }, | 941 | }, |
942 | }; | 942 | }; |
943 | 943 | ||
944 | static int __devinit sharpsl_pm_init(void) | 944 | static int sharpsl_pm_init(void) |
945 | { | 945 | { |
946 | return platform_driver_register(&sharpsl_pm_driver); | 946 | return platform_driver_register(&sharpsl_pm_driver); |
947 | } | 947 | } |
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index 842596d4d31e..e191f9996b26 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c | |||
@@ -232,7 +232,7 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = { | |||
232 | 232 | ||
233 | static struct platform_device *spitzpm_device; | 233 | static struct platform_device *spitzpm_device; |
234 | 234 | ||
235 | static int __devinit spitzpm_init(void) | 235 | static int spitzpm_init(void) |
236 | { | 236 | { |
237 | int ret; | 237 | int ret; |
238 | 238 | ||
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index bea19a06b2bf..8f1ee92aea30 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c | |||
@@ -151,16 +151,12 @@ void __init pxa_timer_init(void) | |||
151 | 151 | ||
152 | setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate); | 152 | setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate); |
153 | 153 | ||
154 | clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4); | ||
155 | ckevt_pxa_osmr0.max_delta_ns = | ||
156 | clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0); | ||
157 | ckevt_pxa_osmr0.min_delta_ns = | ||
158 | clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_pxa_osmr0) + 1; | ||
159 | ckevt_pxa_osmr0.cpumask = cpumask_of(0); | 154 | ckevt_pxa_osmr0.cpumask = cpumask_of(0); |
160 | 155 | ||
161 | setup_irq(IRQ_OST0, &pxa_ost0_irq); | 156 | setup_irq(IRQ_OST0, &pxa_ost0_irq); |
162 | 157 | ||
163 | clocksource_mmio_init(OSCR, "oscr0", clock_tick_rate, 200, 32, | 158 | clocksource_mmio_init(OSCR, "oscr0", clock_tick_rate, 200, 32, |
164 | clocksource_mmio_readl_up); | 159 | clocksource_mmio_readl_up); |
165 | clockevents_register_device(&ckevt_pxa_osmr0); | 160 | clockevents_config_and_register(&ckevt_pxa_osmr0, clock_tick_rate, |
161 | MIN_OSCR_DELTA * 2, 0x7fffffff); | ||
166 | } | 162 | } |
diff --git a/arch/arm/mach-pxa/tosa-bt.c b/arch/arm/mach-pxa/tosa-bt.c index b9b1e5c2b290..fc3646c2c694 100644 --- a/arch/arm/mach-pxa/tosa-bt.c +++ b/arch/arm/mach-pxa/tosa-bt.c | |||
@@ -102,7 +102,7 @@ err_reset: | |||
102 | return rc; | 102 | return rc; |
103 | } | 103 | } |
104 | 104 | ||
105 | static int __devexit tosa_bt_remove(struct platform_device *dev) | 105 | static int tosa_bt_remove(struct platform_device *dev) |
106 | { | 106 | { |
107 | struct tosa_bt_data *data = dev->dev.platform_data; | 107 | struct tosa_bt_data *data = dev->dev.platform_data; |
108 | struct rfkill *rfk = platform_get_drvdata(dev); | 108 | struct rfkill *rfk = platform_get_drvdata(dev); |
@@ -125,7 +125,7 @@ static int __devexit tosa_bt_remove(struct platform_device *dev) | |||
125 | 125 | ||
126 | static struct platform_driver tosa_bt_driver = { | 126 | static struct platform_driver tosa_bt_driver = { |
127 | .probe = tosa_bt_probe, | 127 | .probe = tosa_bt_probe, |
128 | .remove = __devexit_p(tosa_bt_remove), | 128 | .remove = tosa_bt_remove, |
129 | 129 | ||
130 | .driver = { | 130 | .driver = { |
131 | .name = "tosa-bt", | 131 | .name = "tosa-bt", |
diff --git a/arch/arm/mach-s3c24xx/h1940-bluetooth.c b/arch/arm/mach-s3c24xx/h1940-bluetooth.c index 57aee916bdb1..3f40c61b6e02 100644 --- a/arch/arm/mach-s3c24xx/h1940-bluetooth.c +++ b/arch/arm/mach-s3c24xx/h1940-bluetooth.c | |||
@@ -62,7 +62,7 @@ static const struct rfkill_ops h1940bt_rfkill_ops = { | |||
62 | .set_block = h1940bt_set_block, | 62 | .set_block = h1940bt_set_block, |
63 | }; | 63 | }; |
64 | 64 | ||
65 | static int __devinit h1940bt_probe(struct platform_device *pdev) | 65 | static int h1940bt_probe(struct platform_device *pdev) |
66 | { | 66 | { |
67 | struct rfkill *rfk; | 67 | struct rfkill *rfk; |
68 | int ret = 0; | 68 | int ret = 0; |
diff --git a/arch/arm/mach-s3c24xx/mach-osiris-dvs.c b/arch/arm/mach-s3c24xx/mach-osiris-dvs.c index 5876c6ba7500..45e74363aaa9 100644 --- a/arch/arm/mach-s3c24xx/mach-osiris-dvs.c +++ b/arch/arm/mach-s3c24xx/mach-osiris-dvs.c | |||
@@ -93,7 +93,7 @@ static struct notifier_block osiris_dvs_nb = { | |||
93 | .notifier_call = osiris_dvs_notify, | 93 | .notifier_call = osiris_dvs_notify, |
94 | }; | 94 | }; |
95 | 95 | ||
96 | static int __devinit osiris_dvs_probe(struct platform_device *pdev) | 96 | static int osiris_dvs_probe(struct platform_device *pdev) |
97 | { | 97 | { |
98 | int ret; | 98 | int ret; |
99 | 99 | ||
@@ -126,7 +126,7 @@ err_nogpio: | |||
126 | return ret; | 126 | return ret; |
127 | } | 127 | } |
128 | 128 | ||
129 | static int __devexit osiris_dvs_remove(struct platform_device *pdev) | 129 | static int osiris_dvs_remove(struct platform_device *pdev) |
130 | { | 130 | { |
131 | dev_info(&pdev->dev, "exiting\n"); | 131 | dev_info(&pdev->dev, "exiting\n"); |
132 | 132 | ||
@@ -167,7 +167,7 @@ static const struct dev_pm_ops osiris_dvs_pm = { | |||
167 | 167 | ||
168 | static struct platform_driver osiris_dvs_driver = { | 168 | static struct platform_driver osiris_dvs_driver = { |
169 | .probe = osiris_dvs_probe, | 169 | .probe = osiris_dvs_probe, |
170 | .remove = __devexit_p(osiris_dvs_remove), | 170 | .remove = osiris_dvs_remove, |
171 | .driver = { | 171 | .driver = { |
172 | .name = "osiris-dvs", | 172 | .name = "osiris-dvs", |
173 | .owner = THIS_MODULE, | 173 | .owner = THIS_MODULE, |
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c index c6d8dba90623..553059f51841 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c | |||
@@ -290,7 +290,7 @@ static const struct i2c_board_info wm2200_i2c[] = { | |||
290 | .platform_data = &wm2200_pdata, }, | 290 | .platform_data = &wm2200_pdata, }, |
291 | }; | 291 | }; |
292 | 292 | ||
293 | static __devinitdata const struct { | 293 | static const struct { |
294 | u8 id; | 294 | u8 id; |
295 | u8 rev; | 295 | u8 rev; |
296 | const char *name; | 296 | const char *name; |
@@ -343,8 +343,8 @@ static __devinitdata const struct { | |||
343 | .i2c_devs = wm2200_i2c, .num_i2c_devs = ARRAY_SIZE(wm2200_i2c) }, | 343 | .i2c_devs = wm2200_i2c, .num_i2c_devs = ARRAY_SIZE(wm2200_i2c) }, |
344 | }; | 344 | }; |
345 | 345 | ||
346 | static __devinit int wlf_gf_module_probe(struct i2c_client *i2c, | 346 | static int wlf_gf_module_probe(struct i2c_client *i2c, |
347 | const struct i2c_device_id *i2c_id) | 347 | const struct i2c_device_id *i2c_id) |
348 | { | 348 | { |
349 | int ret, i, j, id, rev; | 349 | int ret, i, j, id, rev; |
350 | 350 | ||
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c index 87aab127dd60..053dbcbeaa73 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410.c | |||
@@ -171,7 +171,7 @@ static struct fb_videomode crag6410_lcd_timing = { | |||
171 | }; | 171 | }; |
172 | 172 | ||
173 | /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ | 173 | /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ |
174 | static struct s3c_fb_platdata crag6410_lcd_pdata __devinitdata = { | 174 | static struct s3c_fb_platdata crag6410_lcd_pdata = { |
175 | .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, | 175 | .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, |
176 | .vtiming = &crag6410_lcd_timing, | 176 | .vtiming = &crag6410_lcd_timing, |
177 | .win[0] = &crag6410_fb_win0, | 177 | .win[0] = &crag6410_fb_win0, |
@@ -181,7 +181,7 @@ static struct s3c_fb_platdata crag6410_lcd_pdata __devinitdata = { | |||
181 | 181 | ||
182 | /* 2x6 keypad */ | 182 | /* 2x6 keypad */ |
183 | 183 | ||
184 | static uint32_t crag6410_keymap[] __devinitdata = { | 184 | static uint32_t crag6410_keymap[] = { |
185 | /* KEY(row, col, keycode) */ | 185 | /* KEY(row, col, keycode) */ |
186 | KEY(0, 0, KEY_VOLUMEUP), | 186 | KEY(0, 0, KEY_VOLUMEUP), |
187 | KEY(0, 1, KEY_HOME), | 187 | KEY(0, 1, KEY_HOME), |
@@ -197,12 +197,12 @@ static uint32_t crag6410_keymap[] __devinitdata = { | |||
197 | KEY(1, 5, KEY_CAMERA), | 197 | KEY(1, 5, KEY_CAMERA), |
198 | }; | 198 | }; |
199 | 199 | ||
200 | static struct matrix_keymap_data crag6410_keymap_data __devinitdata = { | 200 | static struct matrix_keymap_data crag6410_keymap_data = { |
201 | .keymap = crag6410_keymap, | 201 | .keymap = crag6410_keymap, |
202 | .keymap_size = ARRAY_SIZE(crag6410_keymap), | 202 | .keymap_size = ARRAY_SIZE(crag6410_keymap), |
203 | }; | 203 | }; |
204 | 204 | ||
205 | static struct samsung_keypad_platdata crag6410_keypad_data __devinitdata = { | 205 | static struct samsung_keypad_platdata crag6410_keypad_data = { |
206 | .keymap_data = &crag6410_keymap_data, | 206 | .keymap_data = &crag6410_keymap_data, |
207 | .rows = 2, | 207 | .rows = 2, |
208 | .cols = 6, | 208 | .cols = 6, |
@@ -407,11 +407,11 @@ static struct wm831x_buckv_pdata vddarm_pdata = { | |||
407 | .dvs_gpio = S3C64XX_GPK(0), | 407 | .dvs_gpio = S3C64XX_GPK(0), |
408 | }; | 408 | }; |
409 | 409 | ||
410 | static struct regulator_consumer_supply vddarm_consumers[] __devinitdata = { | 410 | static struct regulator_consumer_supply vddarm_consumers[] = { |
411 | REGULATOR_SUPPLY("vddarm", NULL), | 411 | REGULATOR_SUPPLY("vddarm", NULL), |
412 | }; | 412 | }; |
413 | 413 | ||
414 | static struct regulator_init_data vddarm __devinitdata = { | 414 | static struct regulator_init_data vddarm = { |
415 | .constraints = { | 415 | .constraints = { |
416 | .name = "VDDARM", | 416 | .name = "VDDARM", |
417 | .min_uV = 1000000, | 417 | .min_uV = 1000000, |
@@ -425,11 +425,11 @@ static struct regulator_init_data vddarm __devinitdata = { | |||
425 | .driver_data = &vddarm_pdata, | 425 | .driver_data = &vddarm_pdata, |
426 | }; | 426 | }; |
427 | 427 | ||
428 | static struct regulator_consumer_supply vddint_consumers[] __devinitdata = { | 428 | static struct regulator_consumer_supply vddint_consumers[] = { |
429 | REGULATOR_SUPPLY("vddint", NULL), | 429 | REGULATOR_SUPPLY("vddint", NULL), |
430 | }; | 430 | }; |
431 | 431 | ||
432 | static struct regulator_init_data vddint __devinitdata = { | 432 | static struct regulator_init_data vddint = { |
433 | .constraints = { | 433 | .constraints = { |
434 | .name = "VDDINT", | 434 | .name = "VDDINT", |
435 | .min_uV = 1000000, | 435 | .min_uV = 1000000, |
@@ -442,27 +442,27 @@ static struct regulator_init_data vddint __devinitdata = { | |||
442 | .supply_regulator = "WALLVDD", | 442 | .supply_regulator = "WALLVDD", |
443 | }; | 443 | }; |
444 | 444 | ||
445 | static struct regulator_init_data vddmem __devinitdata = { | 445 | static struct regulator_init_data vddmem = { |
446 | .constraints = { | 446 | .constraints = { |
447 | .name = "VDDMEM", | 447 | .name = "VDDMEM", |
448 | .always_on = 1, | 448 | .always_on = 1, |
449 | }, | 449 | }, |
450 | }; | 450 | }; |
451 | 451 | ||
452 | static struct regulator_init_data vddsys __devinitdata = { | 452 | static struct regulator_init_data vddsys = { |
453 | .constraints = { | 453 | .constraints = { |
454 | .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS", | 454 | .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS", |
455 | .always_on = 1, | 455 | .always_on = 1, |
456 | }, | 456 | }, |
457 | }; | 457 | }; |
458 | 458 | ||
459 | static struct regulator_consumer_supply vddmmc_consumers[] __devinitdata = { | 459 | static struct regulator_consumer_supply vddmmc_consumers[] = { |
460 | REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"), | 460 | REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"), |
461 | REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"), | 461 | REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"), |
462 | REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"), | 462 | REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"), |
463 | }; | 463 | }; |
464 | 464 | ||
465 | static struct regulator_init_data vddmmc __devinitdata = { | 465 | static struct regulator_init_data vddmmc = { |
466 | .constraints = { | 466 | .constraints = { |
467 | .name = "VDDMMC,UH", | 467 | .name = "VDDMMC,UH", |
468 | .always_on = 1, | 468 | .always_on = 1, |
@@ -472,7 +472,7 @@ static struct regulator_init_data vddmmc __devinitdata = { | |||
472 | .supply_regulator = "WALLVDD", | 472 | .supply_regulator = "WALLVDD", |
473 | }; | 473 | }; |
474 | 474 | ||
475 | static struct regulator_init_data vddotgi __devinitdata = { | 475 | static struct regulator_init_data vddotgi = { |
476 | .constraints = { | 476 | .constraints = { |
477 | .name = "VDDOTGi", | 477 | .name = "VDDOTGi", |
478 | .always_on = 1, | 478 | .always_on = 1, |
@@ -480,7 +480,7 @@ static struct regulator_init_data vddotgi __devinitdata = { | |||
480 | .supply_regulator = "WALLVDD", | 480 | .supply_regulator = "WALLVDD", |
481 | }; | 481 | }; |
482 | 482 | ||
483 | static struct regulator_init_data vddotg __devinitdata = { | 483 | static struct regulator_init_data vddotg = { |
484 | .constraints = { | 484 | .constraints = { |
485 | .name = "VDDOTG", | 485 | .name = "VDDOTG", |
486 | .always_on = 1, | 486 | .always_on = 1, |
@@ -488,7 +488,7 @@ static struct regulator_init_data vddotg __devinitdata = { | |||
488 | .supply_regulator = "WALLVDD", | 488 | .supply_regulator = "WALLVDD", |
489 | }; | 489 | }; |
490 | 490 | ||
491 | static struct regulator_init_data vddhi __devinitdata = { | 491 | static struct regulator_init_data vddhi = { |
492 | .constraints = { | 492 | .constraints = { |
493 | .name = "VDDHI", | 493 | .name = "VDDHI", |
494 | .always_on = 1, | 494 | .always_on = 1, |
@@ -496,7 +496,7 @@ static struct regulator_init_data vddhi __devinitdata = { | |||
496 | .supply_regulator = "WALLVDD", | 496 | .supply_regulator = "WALLVDD", |
497 | }; | 497 | }; |
498 | 498 | ||
499 | static struct regulator_init_data vddadc __devinitdata = { | 499 | static struct regulator_init_data vddadc = { |
500 | .constraints = { | 500 | .constraints = { |
501 | .name = "VDDADC,VDDDAC", | 501 | .name = "VDDADC,VDDDAC", |
502 | .always_on = 1, | 502 | .always_on = 1, |
@@ -504,7 +504,7 @@ static struct regulator_init_data vddadc __devinitdata = { | |||
504 | .supply_regulator = "WALLVDD", | 504 | .supply_regulator = "WALLVDD", |
505 | }; | 505 | }; |
506 | 506 | ||
507 | static struct regulator_init_data vddmem0 __devinitdata = { | 507 | static struct regulator_init_data vddmem0 = { |
508 | .constraints = { | 508 | .constraints = { |
509 | .name = "VDDMEM0", | 509 | .name = "VDDMEM0", |
510 | .always_on = 1, | 510 | .always_on = 1, |
@@ -512,7 +512,7 @@ static struct regulator_init_data vddmem0 __devinitdata = { | |||
512 | .supply_regulator = "WALLVDD", | 512 | .supply_regulator = "WALLVDD", |
513 | }; | 513 | }; |
514 | 514 | ||
515 | static struct regulator_init_data vddpll __devinitdata = { | 515 | static struct regulator_init_data vddpll = { |
516 | .constraints = { | 516 | .constraints = { |
517 | .name = "VDDPLL", | 517 | .name = "VDDPLL", |
518 | .always_on = 1, | 518 | .always_on = 1, |
@@ -520,7 +520,7 @@ static struct regulator_init_data vddpll __devinitdata = { | |||
520 | .supply_regulator = "WALLVDD", | 520 | .supply_regulator = "WALLVDD", |
521 | }; | 521 | }; |
522 | 522 | ||
523 | static struct regulator_init_data vddlcd __devinitdata = { | 523 | static struct regulator_init_data vddlcd = { |
524 | .constraints = { | 524 | .constraints = { |
525 | .name = "VDDLCD", | 525 | .name = "VDDLCD", |
526 | .always_on = 1, | 526 | .always_on = 1, |
@@ -528,7 +528,7 @@ static struct regulator_init_data vddlcd __devinitdata = { | |||
528 | .supply_regulator = "WALLVDD", | 528 | .supply_regulator = "WALLVDD", |
529 | }; | 529 | }; |
530 | 530 | ||
531 | static struct regulator_init_data vddalive __devinitdata = { | 531 | static struct regulator_init_data vddalive = { |
532 | .constraints = { | 532 | .constraints = { |
533 | .name = "VDDALIVE", | 533 | .name = "VDDALIVE", |
534 | .always_on = 1, | 534 | .always_on = 1, |
@@ -536,28 +536,28 @@ static struct regulator_init_data vddalive __devinitdata = { | |||
536 | .supply_regulator = "WALLVDD", | 536 | .supply_regulator = "WALLVDD", |
537 | }; | 537 | }; |
538 | 538 | ||
539 | static struct wm831x_backup_pdata banff_backup_pdata __devinitdata = { | 539 | static struct wm831x_backup_pdata banff_backup_pdata = { |
540 | .charger_enable = 1, | 540 | .charger_enable = 1, |
541 | .vlim = 2500, /* mV */ | 541 | .vlim = 2500, /* mV */ |
542 | .ilim = 200, /* uA */ | 542 | .ilim = 200, /* uA */ |
543 | }; | 543 | }; |
544 | 544 | ||
545 | static struct wm831x_status_pdata banff_red_led __devinitdata = { | 545 | static struct wm831x_status_pdata banff_red_led = { |
546 | .name = "banff:red:", | 546 | .name = "banff:red:", |
547 | .default_src = WM831X_STATUS_MANUAL, | 547 | .default_src = WM831X_STATUS_MANUAL, |
548 | }; | 548 | }; |
549 | 549 | ||
550 | static struct wm831x_status_pdata banff_green_led __devinitdata = { | 550 | static struct wm831x_status_pdata banff_green_led = { |
551 | .name = "banff:green:", | 551 | .name = "banff:green:", |
552 | .default_src = WM831X_STATUS_MANUAL, | 552 | .default_src = WM831X_STATUS_MANUAL, |
553 | }; | 553 | }; |
554 | 554 | ||
555 | static struct wm831x_touch_pdata touch_pdata __devinitdata = { | 555 | static struct wm831x_touch_pdata touch_pdata = { |
556 | .data_irq = S3C_EINT(26), | 556 | .data_irq = S3C_EINT(26), |
557 | .pd_irq = S3C_EINT(27), | 557 | .pd_irq = S3C_EINT(27), |
558 | }; | 558 | }; |
559 | 559 | ||
560 | static struct wm831x_pdata crag_pmic_pdata __devinitdata = { | 560 | static struct wm831x_pdata crag_pmic_pdata = { |
561 | .wm831x_num = 1, | 561 | .wm831x_num = 1, |
562 | .gpio_base = BANFF_PMIC_GPIO_BASE, | 562 | .gpio_base = BANFF_PMIC_GPIO_BASE, |
563 | .soft_shutdown = true, | 563 | .soft_shutdown = true, |
@@ -601,7 +601,7 @@ static struct wm831x_pdata crag_pmic_pdata __devinitdata = { | |||
601 | .touch = &touch_pdata, | 601 | .touch = &touch_pdata, |
602 | }; | 602 | }; |
603 | 603 | ||
604 | static struct i2c_board_info i2c_devs0[] __devinitdata = { | 604 | static struct i2c_board_info i2c_devs0[] = { |
605 | { I2C_BOARD_INFO("24c08", 0x50), }, | 605 | { I2C_BOARD_INFO("24c08", 0x50), }, |
606 | { I2C_BOARD_INFO("tca6408", 0x20), | 606 | { I2C_BOARD_INFO("tca6408", 0x20), |
607 | .platform_data = &crag6410_pca_data, | 607 | .platform_data = &crag6410_pca_data, |
@@ -616,13 +616,13 @@ static struct s3c2410_platform_i2c i2c0_pdata = { | |||
616 | .frequency = 400000, | 616 | .frequency = 400000, |
617 | }; | 617 | }; |
618 | 618 | ||
619 | static struct regulator_consumer_supply pvdd_1v2_consumers[] __devinitdata = { | 619 | static struct regulator_consumer_supply pvdd_1v2_consumers[] = { |
620 | REGULATOR_SUPPLY("DCVDD", "spi0.0"), | 620 | REGULATOR_SUPPLY("DCVDD", "spi0.0"), |
621 | REGULATOR_SUPPLY("AVDD", "spi0.0"), | 621 | REGULATOR_SUPPLY("AVDD", "spi0.0"), |
622 | REGULATOR_SUPPLY("AVDD", "spi0.1"), | 622 | REGULATOR_SUPPLY("AVDD", "spi0.1"), |
623 | }; | 623 | }; |
624 | 624 | ||
625 | static struct regulator_init_data pvdd_1v2 __devinitdata = { | 625 | static struct regulator_init_data pvdd_1v2 = { |
626 | .constraints = { | 626 | .constraints = { |
627 | .name = "PVDD_1V2", | 627 | .name = "PVDD_1V2", |
628 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | 628 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, |
@@ -632,7 +632,7 @@ static struct regulator_init_data pvdd_1v2 __devinitdata = { | |||
632 | .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers), | 632 | .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers), |
633 | }; | 633 | }; |
634 | 634 | ||
635 | static struct regulator_consumer_supply pvdd_1v8_consumers[] __devinitdata = { | 635 | static struct regulator_consumer_supply pvdd_1v8_consumers[] = { |
636 | REGULATOR_SUPPLY("LDOVDD", "1-001a"), | 636 | REGULATOR_SUPPLY("LDOVDD", "1-001a"), |
637 | REGULATOR_SUPPLY("PLLVDD", "1-001a"), | 637 | REGULATOR_SUPPLY("PLLVDD", "1-001a"), |
638 | REGULATOR_SUPPLY("DBVDD", "1-001a"), | 638 | REGULATOR_SUPPLY("DBVDD", "1-001a"), |
@@ -664,7 +664,7 @@ static struct regulator_consumer_supply pvdd_1v8_consumers[] __devinitdata = { | |||
664 | REGULATOR_SUPPLY("CPVDD", "wm5110-codec"), | 664 | REGULATOR_SUPPLY("CPVDD", "wm5110-codec"), |
665 | }; | 665 | }; |
666 | 666 | ||
667 | static struct regulator_init_data pvdd_1v8 __devinitdata = { | 667 | static struct regulator_init_data pvdd_1v8 = { |
668 | .constraints = { | 668 | .constraints = { |
669 | .name = "PVDD_1V8", | 669 | .name = "PVDD_1V8", |
670 | .always_on = 1, | 670 | .always_on = 1, |
@@ -674,12 +674,12 @@ static struct regulator_init_data pvdd_1v8 __devinitdata = { | |||
674 | .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers), | 674 | .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers), |
675 | }; | 675 | }; |
676 | 676 | ||
677 | static struct regulator_consumer_supply pvdd_3v3_consumers[] __devinitdata = { | 677 | static struct regulator_consumer_supply pvdd_3v3_consumers[] = { |
678 | REGULATOR_SUPPLY("MICVDD", "1-001a"), | 678 | REGULATOR_SUPPLY("MICVDD", "1-001a"), |
679 | REGULATOR_SUPPLY("AVDD1", "1-001a"), | 679 | REGULATOR_SUPPLY("AVDD1", "1-001a"), |
680 | }; | 680 | }; |
681 | 681 | ||
682 | static struct regulator_init_data pvdd_3v3 __devinitdata = { | 682 | static struct regulator_init_data pvdd_3v3 = { |
683 | .constraints = { | 683 | .constraints = { |
684 | .name = "PVDD_3V3", | 684 | .name = "PVDD_3V3", |
685 | .always_on = 1, | 685 | .always_on = 1, |
@@ -689,7 +689,7 @@ static struct regulator_init_data pvdd_3v3 __devinitdata = { | |||
689 | .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers), | 689 | .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers), |
690 | }; | 690 | }; |
691 | 691 | ||
692 | static struct wm831x_pdata glenfarclas_pmic_pdata __devinitdata = { | 692 | static struct wm831x_pdata glenfarclas_pmic_pdata = { |
693 | .wm831x_num = 2, | 693 | .wm831x_num = 2, |
694 | .irq_base = GLENFARCLAS_PMIC_IRQ_BASE, | 694 | .irq_base = GLENFARCLAS_PMIC_IRQ_BASE, |
695 | .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE, | 695 | .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE, |
@@ -721,7 +721,7 @@ static struct wm1250_ev1_pdata wm1250_ev1_pdata = { | |||
721 | }, | 721 | }, |
722 | }; | 722 | }; |
723 | 723 | ||
724 | static struct i2c_board_info i2c_devs1[] __devinitdata = { | 724 | static struct i2c_board_info i2c_devs1[] = { |
725 | { I2C_BOARD_INFO("wm8311", 0x34), | 725 | { I2C_BOARD_INFO("wm8311", 0x34), |
726 | .irq = S3C_EINT(0), | 726 | .irq = S3C_EINT(0), |
727 | .platform_data = &glenfarclas_pmic_pdata }, | 727 | .platform_data = &glenfarclas_pmic_pdata }, |
diff --git a/arch/arm/mach-sa1100/jornada720_ssp.c b/arch/arm/mach-sa1100/jornada720_ssp.c index 7f07f08d8968..b143c4659346 100644 --- a/arch/arm/mach-sa1100/jornada720_ssp.c +++ b/arch/arm/mach-sa1100/jornada720_ssp.c | |||
@@ -130,7 +130,7 @@ void jornada_ssp_end(void) | |||
130 | }; | 130 | }; |
131 | EXPORT_SYMBOL(jornada_ssp_end); | 131 | EXPORT_SYMBOL(jornada_ssp_end); |
132 | 132 | ||
133 | static int __devinit jornada_ssp_probe(struct platform_device *dev) | 133 | static int jornada_ssp_probe(struct platform_device *dev) |
134 | { | 134 | { |
135 | int ret; | 135 | int ret; |
136 | 136 | ||
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c index 88be0474f3d7..400f80332046 100644 --- a/arch/arm/mach-sa1100/neponset.c +++ b/arch/arm/mach-sa1100/neponset.c | |||
@@ -154,7 +154,7 @@ static u_int neponset_get_mctrl(struct uart_port *port) | |||
154 | return ret; | 154 | return ret; |
155 | } | 155 | } |
156 | 156 | ||
157 | static struct sa1100_port_fns neponset_port_fns __devinitdata = { | 157 | static struct sa1100_port_fns neponset_port_fns = { |
158 | .set_mctrl = neponset_set_mctrl, | 158 | .set_mctrl = neponset_set_mctrl, |
159 | .get_mctrl = neponset_get_mctrl, | 159 | .get_mctrl = neponset_get_mctrl, |
160 | }; | 160 | }; |
@@ -233,7 +233,7 @@ static struct sa1111_platform_data sa1111_info = { | |||
233 | .disable_devs = SA1111_DEVID_PS2_MSE, | 233 | .disable_devs = SA1111_DEVID_PS2_MSE, |
234 | }; | 234 | }; |
235 | 235 | ||
236 | static int __devinit neponset_probe(struct platform_device *dev) | 236 | static int neponset_probe(struct platform_device *dev) |
237 | { | 237 | { |
238 | struct neponset_drvdata *d; | 238 | struct neponset_drvdata *d; |
239 | struct resource *nep_res, *sa1111_res, *smc91x_res; | 239 | struct resource *nep_res, *sa1111_res, *smc91x_res; |
@@ -368,7 +368,7 @@ static int __devinit neponset_probe(struct platform_device *dev) | |||
368 | return ret; | 368 | return ret; |
369 | } | 369 | } |
370 | 370 | ||
371 | static int __devexit neponset_remove(struct platform_device *dev) | 371 | static int neponset_remove(struct platform_device *dev) |
372 | { | 372 | { |
373 | struct neponset_drvdata *d = platform_get_drvdata(dev); | 373 | struct neponset_drvdata *d = platform_get_drvdata(dev); |
374 | int irq = platform_get_irq(dev, 0); | 374 | int irq = platform_get_irq(dev, 0); |
@@ -420,7 +420,7 @@ static const struct dev_pm_ops neponset_pm_ops = { | |||
420 | 420 | ||
421 | static struct platform_driver neponset_device_driver = { | 421 | static struct platform_driver neponset_device_driver = { |
422 | .probe = neponset_probe, | 422 | .probe = neponset_probe, |
423 | .remove = __devexit_p(neponset_remove), | 423 | .remove = neponset_remove, |
424 | .driver = { | 424 | .driver = { |
425 | .name = "neponset", | 425 | .name = "neponset", |
426 | .owner = THIS_MODULE, | 426 | .owner = THIS_MODULE, |
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index 934db6385cd6..a59a13a665a6 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c | |||
@@ -124,16 +124,12 @@ void __init sa1100_timer_init(void) | |||
124 | 124 | ||
125 | setup_sched_clock(sa1100_read_sched_clock, 32, 3686400); | 125 | setup_sched_clock(sa1100_read_sched_clock, 32, 3686400); |
126 | 126 | ||
127 | clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4); | ||
128 | ckevt_sa1100_osmr0.max_delta_ns = | ||
129 | clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0); | ||
130 | ckevt_sa1100_osmr0.min_delta_ns = | ||
131 | clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_sa1100_osmr0) + 1; | ||
132 | ckevt_sa1100_osmr0.cpumask = cpumask_of(0); | 127 | ckevt_sa1100_osmr0.cpumask = cpumask_of(0); |
133 | 128 | ||
134 | setup_irq(IRQ_OST0, &sa1100_timer_irq); | 129 | setup_irq(IRQ_OST0, &sa1100_timer_irq); |
135 | 130 | ||
136 | clocksource_mmio_init(OSCR, "oscr", CLOCK_TICK_RATE, 200, 32, | 131 | clocksource_mmio_init(OSCR, "oscr", CLOCK_TICK_RATE, 200, 32, |
137 | clocksource_mmio_readl_up); | 132 | clocksource_mmio_readl_up); |
138 | clockevents_register_device(&ckevt_sa1100_osmr0); | 133 | clockevents_config_and_register(&ckevt_sa1100_osmr0, 3686400, |
134 | MIN_OSCR_DELTA * 2, 0x7fffffff); | ||
139 | } | 135 | } |
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c index 53d085871798..bffcd643d7a3 100644 --- a/arch/arm/mach-tegra/pcie.c +++ b/arch/arm/mach-tegra/pcie.c | |||
@@ -331,7 +331,7 @@ static struct pci_ops tegra_pcie_ops = { | |||
331 | .write = tegra_pcie_write_conf, | 331 | .write = tegra_pcie_write_conf, |
332 | }; | 332 | }; |
333 | 333 | ||
334 | static void __devinit tegra_pcie_fixup_bridge(struct pci_dev *dev) | 334 | static void tegra_pcie_fixup_bridge(struct pci_dev *dev) |
335 | { | 335 | { |
336 | u16 reg; | 336 | u16 reg; |
337 | 337 | ||
@@ -345,7 +345,7 @@ static void __devinit tegra_pcie_fixup_bridge(struct pci_dev *dev) | |||
345 | DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, tegra_pcie_fixup_bridge); | 345 | DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, tegra_pcie_fixup_bridge); |
346 | 346 | ||
347 | /* Tegra PCIE root complex wrongly reports device class */ | 347 | /* Tegra PCIE root complex wrongly reports device class */ |
348 | static void __devinit tegra_pcie_fixup_class(struct pci_dev *dev) | 348 | static void tegra_pcie_fixup_class(struct pci_dev *dev) |
349 | { | 349 | { |
350 | dev->class = PCI_CLASS_BRIDGE_PCI << 8; | 350 | dev->class = PCI_CLASS_BRIDGE_PCI << 8; |
351 | } | 351 | } |
@@ -353,7 +353,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0bf0, tegra_pcie_fixup_class); | |||
353 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0bf1, tegra_pcie_fixup_class); | 353 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0bf1, tegra_pcie_fixup_class); |
354 | 354 | ||
355 | /* Tegra PCIE requires relaxed ordering */ | 355 | /* Tegra PCIE requires relaxed ordering */ |
356 | static void __devinit tegra_pcie_relax_enable(struct pci_dev *dev) | 356 | static void tegra_pcie_relax_enable(struct pci_dev *dev) |
357 | { | 357 | { |
358 | pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_RELAX_EN); | 358 | pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_RELAX_EN); |
359 | } | 359 | } |
diff --git a/arch/arm/mach-tegra/tegra2_emc.c b/arch/arm/mach-tegra/tegra2_emc.c index 837c7b9ea63b..e18aa2f83ebf 100644 --- a/arch/arm/mach-tegra/tegra2_emc.c +++ b/arch/arm/mach-tegra/tegra2_emc.c | |||
@@ -268,7 +268,7 @@ static struct tegra_emc_pdata *tegra_emc_dt_parse_pdata( | |||
268 | } | 268 | } |
269 | #endif | 269 | #endif |
270 | 270 | ||
271 | static struct tegra_emc_pdata __devinit *tegra_emc_fill_pdata(struct platform_device *pdev) | 271 | static struct tegra_emc_pdata *tegra_emc_fill_pdata(struct platform_device *pdev) |
272 | { | 272 | { |
273 | struct clk *c = clk_get_sys(NULL, "emc"); | 273 | struct clk *c = clk_get_sys(NULL, "emc"); |
274 | struct tegra_emc_pdata *pdata; | 274 | struct tegra_emc_pdata *pdata; |
@@ -296,7 +296,7 @@ static struct tegra_emc_pdata __devinit *tegra_emc_fill_pdata(struct platform_de | |||
296 | return pdata; | 296 | return pdata; |
297 | } | 297 | } |
298 | 298 | ||
299 | static int __devinit tegra_emc_probe(struct platform_device *pdev) | 299 | static int tegra_emc_probe(struct platform_device *pdev) |
300 | { | 300 | { |
301 | struct tegra_emc_pdata *pdata; | 301 | struct tegra_emc_pdata *pdata; |
302 | struct resource *res; | 302 | struct resource *res; |
@@ -333,7 +333,7 @@ static int __devinit tegra_emc_probe(struct platform_device *pdev) | |||
333 | return 0; | 333 | return 0; |
334 | } | 334 | } |
335 | 335 | ||
336 | static struct of_device_id tegra_emc_of_match[] __devinitdata = { | 336 | static struct of_device_id tegra_emc_of_match[] = { |
337 | { .compatible = "nvidia,tegra20-emc", }, | 337 | { .compatible = "nvidia,tegra20-emc", }, |
338 | { }, | 338 | { }, |
339 | }; | 339 | }; |
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c index b0036e519a15..eba0969ded19 100644 --- a/arch/arm/mach-tegra/timer.c +++ b/arch/arm/mach-tegra/timer.c | |||
@@ -259,14 +259,10 @@ void __init tegra_init_timer(void) | |||
259 | BUG(); | 259 | BUG(); |
260 | } | 260 | } |
261 | 261 | ||
262 | clockevents_calc_mult_shift(&tegra_clockevent, 1000000, 5); | ||
263 | tegra_clockevent.max_delta_ns = | ||
264 | clockevent_delta2ns(0x1fffffff, &tegra_clockevent); | ||
265 | tegra_clockevent.min_delta_ns = | ||
266 | clockevent_delta2ns(0x1, &tegra_clockevent); | ||
267 | tegra_clockevent.cpumask = cpu_all_mask; | 262 | tegra_clockevent.cpumask = cpu_all_mask; |
268 | tegra_clockevent.irq = tegra_timer_irq.irq; | 263 | tegra_clockevent.irq = tegra_timer_irq.irq; |
269 | clockevents_register_device(&tegra_clockevent); | 264 | clockevents_config_and_register(&tegra_clockevent, 1000000, |
265 | 0x1, 0x1fffffff); | ||
270 | #ifdef CONFIG_HAVE_ARM_TWD | 266 | #ifdef CONFIG_HAVE_ARM_TWD |
271 | twd_local_timer_of_register(); | 267 | twd_local_timer_of_register(); |
272 | #endif | 268 | #endif |
diff --git a/arch/arm/mach-u300/dummyspichip.c b/arch/arm/mach-u300/dummyspichip.c index 03f793612594..2785cb67b5e8 100644 --- a/arch/arm/mach-u300/dummyspichip.c +++ b/arch/arm/mach-u300/dummyspichip.c | |||
@@ -222,7 +222,7 @@ static ssize_t dummy_looptest(struct device *dev, | |||
222 | 222 | ||
223 | static DEVICE_ATTR(looptest, S_IRUGO, dummy_looptest, NULL); | 223 | static DEVICE_ATTR(looptest, S_IRUGO, dummy_looptest, NULL); |
224 | 224 | ||
225 | static int __devinit pl022_dummy_probe(struct spi_device *spi) | 225 | static int pl022_dummy_probe(struct spi_device *spi) |
226 | { | 226 | { |
227 | struct dummy *p_dummy; | 227 | struct dummy *p_dummy; |
228 | int status; | 228 | int status; |
@@ -251,7 +251,7 @@ out_dev_create_looptest_failed: | |||
251 | return status; | 251 | return status; |
252 | } | 252 | } |
253 | 253 | ||
254 | static int __devexit pl022_dummy_remove(struct spi_device *spi) | 254 | static int pl022_dummy_remove(struct spi_device *spi) |
255 | { | 255 | { |
256 | struct dummy *p_dummy = dev_get_drvdata(&spi->dev); | 256 | struct dummy *p_dummy = dev_get_drvdata(&spi->dev); |
257 | 257 | ||
@@ -269,7 +269,7 @@ static struct spi_driver pl022_dummy_driver = { | |||
269 | .owner = THIS_MODULE, | 269 | .owner = THIS_MODULE, |
270 | }, | 270 | }, |
271 | .probe = pl022_dummy_probe, | 271 | .probe = pl022_dummy_probe, |
272 | .remove = __devexit_p(pl022_dummy_remove), | 272 | .remove = pl022_dummy_remove, |
273 | }; | 273 | }; |
274 | 274 | ||
275 | static int __init pl022_init_dummy(void) | 275 | static int __init pl022_init_dummy(void) |
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index 7875d3c85df1..c1fb38b5ed97 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c | |||
@@ -285,7 +285,8 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { | |||
285 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL), | 285 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL), |
286 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL), | 286 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL), |
287 | /* Requires device name bindings. */ | 287 | /* Requires device name bindings. */ |
288 | OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL), | 288 | OF_DEV_AUXDATA("stericsson,nmk_pinctrl", U8500_PRCMU_BASE, |
289 | "pinctrl-db8500", NULL), | ||
289 | /* Requires clock name and DMA bindings. */ | 290 | /* Requires clock name and DMA bindings. */ |
290 | OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000, | 291 | OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000, |
291 | "ux500-msp-i2s.0", &msp0_platform_data), | 292 | "ux500-msp-i2s.0", &msp0_platform_data), |
diff --git a/arch/arm/mach-versatile/include/mach/irqs.h b/arch/arm/mach-versatile/include/mach/irqs.h index bf44c61bd1f6..0fd771ca617b 100644 --- a/arch/arm/mach-versatile/include/mach/irqs.h +++ b/arch/arm/mach-versatile/include/mach/irqs.h | |||
@@ -25,7 +25,7 @@ | |||
25 | * IRQ interrupts definitions are the same as the INT definitions | 25 | * IRQ interrupts definitions are the same as the INT definitions |
26 | * held within platform.h | 26 | * held within platform.h |
27 | */ | 27 | */ |
28 | #define IRQ_VIC_START 0 | 28 | #define IRQ_VIC_START 32 |
29 | #define IRQ_WDOGINT (IRQ_VIC_START + INT_WDOGINT) | 29 | #define IRQ_WDOGINT (IRQ_VIC_START + INT_WDOGINT) |
30 | #define IRQ_SOFTINT (IRQ_VIC_START + INT_SOFTINT) | 30 | #define IRQ_SOFTINT (IRQ_VIC_START + INT_SOFTINT) |
31 | #define IRQ_COMMRx (IRQ_VIC_START + INT_COMMRx) | 31 | #define IRQ_COMMRx (IRQ_VIC_START + INT_COMMRx) |
@@ -100,7 +100,7 @@ | |||
100 | /* | 100 | /* |
101 | * Secondary interrupt controller | 101 | * Secondary interrupt controller |
102 | */ | 102 | */ |
103 | #define IRQ_SIC_START 32 | 103 | #define IRQ_SIC_START 64 |
104 | #define IRQ_SIC_MMCI0B (IRQ_SIC_START + SIC_INT_MMCI0B) | 104 | #define IRQ_SIC_MMCI0B (IRQ_SIC_START + SIC_INT_MMCI0B) |
105 | #define IRQ_SIC_MMCI1B (IRQ_SIC_START + SIC_INT_MMCI1B) | 105 | #define IRQ_SIC_MMCI1B (IRQ_SIC_START + SIC_INT_MMCI1B) |
106 | #define IRQ_SIC_KMI0 (IRQ_SIC_START + SIC_INT_KMI0) | 106 | #define IRQ_SIC_KMI0 (IRQ_SIC_START + SIC_INT_KMI0) |
@@ -120,7 +120,7 @@ | |||
120 | #define IRQ_SIC_PCI1 (IRQ_SIC_START + SIC_INT_PCI1) | 120 | #define IRQ_SIC_PCI1 (IRQ_SIC_START + SIC_INT_PCI1) |
121 | #define IRQ_SIC_PCI2 (IRQ_SIC_START + SIC_INT_PCI2) | 121 | #define IRQ_SIC_PCI2 (IRQ_SIC_START + SIC_INT_PCI2) |
122 | #define IRQ_SIC_PCI3 (IRQ_SIC_START + SIC_INT_PCI3) | 122 | #define IRQ_SIC_PCI3 (IRQ_SIC_START + SIC_INT_PCI3) |
123 | #define IRQ_SIC_END 63 | 123 | #define IRQ_SIC_END 95 |
124 | 124 | ||
125 | #define IRQ_GPIO0_START (IRQ_SIC_END + 1) | 125 | #define IRQ_GPIO0_START (IRQ_SIC_END + 1) |
126 | #define IRQ_GPIO0_END (IRQ_GPIO0_START + 31) | 126 | #define IRQ_GPIO0_END (IRQ_GPIO0_START + 31) |
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig index 99e63f5f99d1..52d315b792c8 100644 --- a/arch/arm/mach-vexpress/Kconfig +++ b/arch/arm/mach-vexpress/Kconfig | |||
@@ -42,7 +42,6 @@ config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA | |||
42 | bool "Enable A5 and A9 only errata work-arounds" | 42 | bool "Enable A5 and A9 only errata work-arounds" |
43 | default y | 43 | default y |
44 | select ARM_ERRATA_720789 | 44 | select ARM_ERRATA_720789 |
45 | select ARM_ERRATA_751472 | ||
46 | select PL310_ERRATA_753970 if CACHE_PL310 | 45 | select PL310_ERRATA_753970 if CACHE_PL310 |
47 | help | 46 | help |
48 | Provides common dependencies for Versatile Express platforms | 47 | Provides common dependencies for Versatile Express platforms |
diff --git a/arch/arm/mach-vt8500/timer.c b/arch/arm/mach-vt8500/timer.c index 3dd21a47881f..ed66cf07d3c6 100644 --- a/arch/arm/mach-vt8500/timer.c +++ b/arch/arm/mach-vt8500/timer.c | |||
@@ -168,17 +168,12 @@ void __init vt8500_timer_init(void) | |||
168 | pr_err("%s: vt8500_timer_init: clocksource_register failed for %s\n", | 168 | pr_err("%s: vt8500_timer_init: clocksource_register failed for %s\n", |
169 | __func__, clocksource.name); | 169 | __func__, clocksource.name); |
170 | 170 | ||
171 | clockevents_calc_mult_shift(&clockevent, VT8500_TIMER_HZ, 4); | ||
172 | |||
173 | /* copy-pasted from mach-msm; no idea */ | ||
174 | clockevent.max_delta_ns = | ||
175 | clockevent_delta2ns(0xf0000000, &clockevent); | ||
176 | clockevent.min_delta_ns = clockevent_delta2ns(4, &clockevent); | ||
177 | clockevent.cpumask = cpumask_of(0); | 171 | clockevent.cpumask = cpumask_of(0); |
178 | 172 | ||
179 | if (setup_irq(timer_irq, &irq)) | 173 | if (setup_irq(timer_irq, &irq)) |
180 | pr_err("%s: setup_irq failed for %s\n", __func__, | 174 | pr_err("%s: setup_irq failed for %s\n", __func__, |
181 | clockevent.name); | 175 | clockevent.name); |
182 | clockevents_register_device(&clockevent); | 176 | clockevents_config_and_register(&clockevent, VT8500_TIMER_HZ, |
177 | 4, 0xf0000000); | ||
183 | } | 178 | } |
184 | 179 | ||
diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c index d9c3d6b801c7..30fbca844575 100644 --- a/arch/arm/mach-w90x900/time.c +++ b/arch/arm/mach-w90x900/time.c | |||
@@ -91,7 +91,6 @@ static int nuc900_clockevent_setnextevent(unsigned long evt, | |||
91 | 91 | ||
92 | static struct clock_event_device nuc900_clockevent_device = { | 92 | static struct clock_event_device nuc900_clockevent_device = { |
93 | .name = "nuc900-timer0", | 93 | .name = "nuc900-timer0", |
94 | .shift = 32, | ||
95 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | 94 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
96 | .set_mode = nuc900_clockevent_setmode, | 95 | .set_mode = nuc900_clockevent_setmode, |
97 | .set_next_event = nuc900_clockevent_setnextevent, | 96 | .set_next_event = nuc900_clockevent_setnextevent, |
@@ -133,15 +132,10 @@ static void __init nuc900_clockevents_init(void) | |||
133 | __raw_writel(RESETINT, REG_TISR); | 132 | __raw_writel(RESETINT, REG_TISR); |
134 | setup_irq(IRQ_TIMER0, &nuc900_timer0_irq); | 133 | setup_irq(IRQ_TIMER0, &nuc900_timer0_irq); |
135 | 134 | ||
136 | nuc900_clockevent_device.mult = div_sc(rate, NSEC_PER_SEC, | ||
137 | nuc900_clockevent_device.shift); | ||
138 | nuc900_clockevent_device.max_delta_ns = clockevent_delta2ns(0xffffffff, | ||
139 | &nuc900_clockevent_device); | ||
140 | nuc900_clockevent_device.min_delta_ns = clockevent_delta2ns(0xf, | ||
141 | &nuc900_clockevent_device); | ||
142 | nuc900_clockevent_device.cpumask = cpumask_of(0); | 135 | nuc900_clockevent_device.cpumask = cpumask_of(0); |
143 | 136 | ||
144 | clockevents_register_device(&nuc900_clockevent_device); | 137 | clockevents_config_and_register(&nuc900_clockevent_device, rate, |
138 | 0xf, 0xffffffff); | ||
145 | } | 139 | } |
146 | 140 | ||
147 | static void __init nuc900_clocksource_init(void) | 141 | static void __init nuc900_clocksource_init(void) |
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 6911b8b2745c..c2f37390308a 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c | |||
@@ -352,7 +352,8 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask) | |||
352 | /* Unmapped register. */ | 352 | /* Unmapped register. */ |
353 | sync_reg_offset = L2X0_DUMMY_REG; | 353 | sync_reg_offset = L2X0_DUMMY_REG; |
354 | #endif | 354 | #endif |
355 | outer_cache.set_debug = pl310_set_debug; | 355 | if ((cache_id & L2X0_CACHE_ID_RTL_MASK) <= L2X0_CACHE_ID_RTL_R3P0) |
356 | outer_cache.set_debug = pl310_set_debug; | ||
356 | break; | 357 | break; |
357 | case L2X0_CACHE_ID_PART_L210: | 358 | case L2X0_CACHE_ID_PART_L210: |
358 | ways = (aux >> 13) & 0xf; | 359 | ways = (aux >> 13) & 0xf; |
@@ -459,8 +460,8 @@ static void aurora_pa_range(unsigned long start, unsigned long end, | |||
459 | unsigned long flags; | 460 | unsigned long flags; |
460 | 461 | ||
461 | raw_spin_lock_irqsave(&l2x0_lock, flags); | 462 | raw_spin_lock_irqsave(&l2x0_lock, flags); |
462 | writel(start, l2x0_base + AURORA_RANGE_BASE_ADDR_REG); | 463 | writel_relaxed(start, l2x0_base + AURORA_RANGE_BASE_ADDR_REG); |
463 | writel(end, l2x0_base + offset); | 464 | writel_relaxed(end, l2x0_base + offset); |
464 | raw_spin_unlock_irqrestore(&l2x0_lock, flags); | 465 | raw_spin_unlock_irqrestore(&l2x0_lock, flags); |
465 | 466 | ||
466 | cache_sync(); | 467 | cache_sync(); |
@@ -505,15 +506,21 @@ static void aurora_clean_range(unsigned long start, unsigned long end) | |||
505 | 506 | ||
506 | static void aurora_flush_range(unsigned long start, unsigned long end) | 507 | static void aurora_flush_range(unsigned long start, unsigned long end) |
507 | { | 508 | { |
508 | if (!l2_wt_override) { | 509 | start &= ~(CACHE_LINE_SIZE - 1); |
509 | start &= ~(CACHE_LINE_SIZE - 1); | 510 | end = ALIGN(end, CACHE_LINE_SIZE); |
510 | end = ALIGN(end, CACHE_LINE_SIZE); | 511 | while (start != end) { |
511 | while (start != end) { | 512 | unsigned long range_end = calc_range_end(start, end); |
512 | unsigned long range_end = calc_range_end(start, end); | 513 | /* |
514 | * If L2 is forced to WT, the L2 will always be clean and we | ||
515 | * just need to invalidate. | ||
516 | */ | ||
517 | if (l2_wt_override) | ||
513 | aurora_pa_range(start, range_end - CACHE_LINE_SIZE, | 518 | aurora_pa_range(start, range_end - CACHE_LINE_SIZE, |
514 | AURORA_FLUSH_RANGE_REG); | 519 | AURORA_INVAL_RANGE_REG); |
515 | start = range_end; | 520 | else |
516 | } | 521 | aurora_pa_range(start, range_end - CACHE_LINE_SIZE, |
522 | AURORA_FLUSH_RANGE_REG); | ||
523 | start = range_end; | ||
517 | } | 524 | } |
518 | } | 525 | } |
519 | 526 | ||
@@ -668,8 +675,9 @@ static void pl310_resume(void) | |||
668 | static void aurora_resume(void) | 675 | static void aurora_resume(void) |
669 | { | 676 | { |
670 | if (!(readl(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) { | 677 | if (!(readl(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) { |
671 | writel(l2x0_saved_regs.aux_ctrl, l2x0_base + L2X0_AUX_CTRL); | 678 | writel_relaxed(l2x0_saved_regs.aux_ctrl, |
672 | writel(l2x0_saved_regs.ctrl, l2x0_base + L2X0_CTRL); | 679 | l2x0_base + L2X0_AUX_CTRL); |
680 | writel_relaxed(l2x0_saved_regs.ctrl, l2x0_base + L2X0_CTRL); | ||
673 | } | 681 | } |
674 | } | 682 | } |
675 | 683 | ||
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 350f6a74992b..3a3c015f8d5c 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -169,6 +169,7 @@ __v7_ca15mp_setup: | |||
169 | orreq r0, r0, r10 @ Enable CPU-specific SMP bits | 169 | orreq r0, r0, r10 @ Enable CPU-specific SMP bits |
170 | mcreq p15, 0, r0, c1, c0, 1 | 170 | mcreq p15, 0, r0, c1, c0, 1 |
171 | #endif | 171 | #endif |
172 | b __v7_setup | ||
172 | 173 | ||
173 | __v7_pj4b_setup: | 174 | __v7_pj4b_setup: |
174 | #ifdef CONFIG_CPU_PJ4B | 175 | #ifdef CONFIG_CPU_PJ4B |
@@ -245,7 +246,8 @@ __v7_setup: | |||
245 | ldr r10, =0x00000c08 @ Cortex-A8 primary part number | 246 | ldr r10, =0x00000c08 @ Cortex-A8 primary part number |
246 | teq r0, r10 | 247 | teq r0, r10 |
247 | bne 2f | 248 | bne 2f |
248 | #ifdef CONFIG_ARM_ERRATA_430973 | 249 | #if defined(CONFIG_ARM_ERRATA_430973) && !defined(CONFIG_ARCH_MULTIPLATFORM) |
250 | |||
249 | teq r5, #0x00100000 @ only present in r1p* | 251 | teq r5, #0x00100000 @ only present in r1p* |
250 | mrceq p15, 0, r10, c1, c0, 1 @ read aux control register | 252 | mrceq p15, 0, r10, c1, c0, 1 @ read aux control register |
251 | orreq r10, r10, #(1 << 6) @ set IBE to 1 | 253 | orreq r10, r10, #(1 << 6) @ set IBE to 1 |
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c index cbfbbe461788..837a2d52e9db 100644 --- a/arch/arm/plat-iop/time.c +++ b/arch/arm/plat-iop/time.c | |||
@@ -156,14 +156,9 @@ void __init iop_init_time(unsigned long tick_rate) | |||
156 | write_tmr0(timer_ctl & ~IOP_TMR_EN); | 156 | write_tmr0(timer_ctl & ~IOP_TMR_EN); |
157 | write_tisr(1); | 157 | write_tisr(1); |
158 | setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq); | 158 | setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq); |
159 | clockevents_calc_mult_shift(&iop_clockevent, | ||
160 | tick_rate, IOP_MIN_RANGE); | ||
161 | iop_clockevent.max_delta_ns = | ||
162 | clockevent_delta2ns(0xfffffffe, &iop_clockevent); | ||
163 | iop_clockevent.min_delta_ns = | ||
164 | clockevent_delta2ns(0xf, &iop_clockevent); | ||
165 | iop_clockevent.cpumask = cpumask_of(0); | 159 | iop_clockevent.cpumask = cpumask_of(0); |
166 | clockevents_register_device(&iop_clockevent); | 160 | clockevents_config_and_register(&iop_clockevent, tick_rate, |
161 | 0xf, 0xfffffffe); | ||
167 | 162 | ||
168 | /* | 163 | /* |
169 | * Set up free-running clocksource timer 1. | 164 | * Set up free-running clocksource timer 1. |
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c index f3771cdb9838..5b0b86bb34bb 100644 --- a/arch/arm/plat-omap/counter_32k.c +++ b/arch/arm/plat-omap/counter_32k.c | |||
@@ -22,6 +22,8 @@ | |||
22 | #include <asm/mach/time.h> | 22 | #include <asm/mach/time.h> |
23 | #include <asm/sched_clock.h> | 23 | #include <asm/sched_clock.h> |
24 | 24 | ||
25 | #include <plat/counter-32k.h> | ||
26 | |||
25 | /* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */ | 27 | /* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */ |
26 | #define OMAP2_32KSYNCNT_REV_OFF 0x0 | 28 | #define OMAP2_32KSYNCNT_REV_OFF 0x0 |
27 | #define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30) | 29 | #define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30) |
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 37a488aaa2ba..4136b20cba3c 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
@@ -2000,7 +2000,7 @@ void omap_dma_global_context_restore(void) | |||
2000 | omap_clear_dma(ch); | 2000 | omap_clear_dma(ch); |
2001 | } | 2001 | } |
2002 | 2002 | ||
2003 | static int __devinit omap_system_dma_probe(struct platform_device *pdev) | 2003 | static int omap_system_dma_probe(struct platform_device *pdev) |
2004 | { | 2004 | { |
2005 | int ch, ret = 0; | 2005 | int ch, ret = 0; |
2006 | int dma_irq; | 2006 | int dma_irq; |
@@ -2116,7 +2116,7 @@ exit_dma_lch_fail: | |||
2116 | return ret; | 2116 | return ret; |
2117 | } | 2117 | } |
2118 | 2118 | ||
2119 | static int __devexit omap_system_dma_remove(struct platform_device *pdev) | 2119 | static int omap_system_dma_remove(struct platform_device *pdev) |
2120 | { | 2120 | { |
2121 | int dma_irq; | 2121 | int dma_irq; |
2122 | 2122 | ||
@@ -2140,7 +2140,7 @@ static int __devexit omap_system_dma_remove(struct platform_device *pdev) | |||
2140 | 2140 | ||
2141 | static struct platform_driver omap_system_dma_driver = { | 2141 | static struct platform_driver omap_system_dma_driver = { |
2142 | .probe = omap_system_dma_probe, | 2142 | .probe = omap_system_dma_probe, |
2143 | .remove = __devexit_p(omap_system_dma_remove), | 2143 | .remove = omap_system_dma_remove, |
2144 | .driver = { | 2144 | .driver = { |
2145 | .name = "omap_dma_system" | 2145 | .name = "omap_dma_system" |
2146 | }, | 2146 | }, |
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index d51b75bdcad4..7b433f3bddca 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c | |||
@@ -777,7 +777,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timers_active); | |||
777 | * Called by driver framework at the end of device registration for all | 777 | * Called by driver framework at the end of device registration for all |
778 | * timer devices. | 778 | * timer devices. |
779 | */ | 779 | */ |
780 | static int __devinit omap_dm_timer_probe(struct platform_device *pdev) | 780 | static int omap_dm_timer_probe(struct platform_device *pdev) |
781 | { | 781 | { |
782 | unsigned long flags; | 782 | unsigned long flags; |
783 | struct omap_dm_timer *timer; | 783 | struct omap_dm_timer *timer; |
@@ -864,7 +864,7 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev) | |||
864 | * In addition to freeing platform resources it also deletes the timer | 864 | * In addition to freeing platform resources it also deletes the timer |
865 | * entry from the local list. | 865 | * entry from the local list. |
866 | */ | 866 | */ |
867 | static int __devexit omap_dm_timer_remove(struct platform_device *pdev) | 867 | static int omap_dm_timer_remove(struct platform_device *pdev) |
868 | { | 868 | { |
869 | struct omap_dm_timer *timer; | 869 | struct omap_dm_timer *timer; |
870 | unsigned long flags; | 870 | unsigned long flags; |
@@ -891,7 +891,7 @@ MODULE_DEVICE_TABLE(of, omap_timer_match); | |||
891 | 891 | ||
892 | static struct platform_driver omap_dm_timer_driver = { | 892 | static struct platform_driver omap_dm_timer_driver = { |
893 | .probe = omap_dm_timer_probe, | 893 | .probe = omap_dm_timer_probe, |
894 | .remove = __devexit_p(omap_dm_timer_remove), | 894 | .remove = omap_dm_timer_remove, |
895 | .driver = { | 895 | .driver = { |
896 | .name = "omap_timer", | 896 | .name = "omap_timer", |
897 | .of_match_table = of_match_ptr(omap_timer_match), | 897 | .of_match_table = of_match_ptr(omap_timer_match), |
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 743fc2836f7a..a5bc92d7e476 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c | |||
@@ -26,6 +26,8 @@ | |||
26 | 26 | ||
27 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
28 | 28 | ||
29 | #include <plat/sram.h> | ||
30 | |||
29 | #define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) | 31 | #define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) |
30 | 32 | ||
31 | static void __iomem *omap_sram_base; | 33 | static void __iomem *omap_sram_base; |
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c index 0f4fa863dd55..5d5ac0f05422 100644 --- a/arch/arm/plat-orion/time.c +++ b/arch/arm/plat-orion/time.c | |||
@@ -156,7 +156,6 @@ orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) | |||
156 | static struct clock_event_device orion_clkevt = { | 156 | static struct clock_event_device orion_clkevt = { |
157 | .name = "orion_tick", | 157 | .name = "orion_tick", |
158 | .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, | 158 | .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, |
159 | .shift = 32, | ||
160 | .rating = 300, | 159 | .rating = 300, |
161 | .set_next_event = orion_clkevt_next_event, | 160 | .set_next_event = orion_clkevt_next_event, |
162 | .set_mode = orion_clkevt_mode, | 161 | .set_mode = orion_clkevt_mode, |
@@ -221,9 +220,6 @@ orion_time_init(void __iomem *_bridge_base, u32 _bridge_timer1_clr_mask, | |||
221 | * Setup clockevent timer (interrupt-driven). | 220 | * Setup clockevent timer (interrupt-driven). |
222 | */ | 221 | */ |
223 | setup_irq(irq, &orion_timer_irq); | 222 | setup_irq(irq, &orion_timer_irq); |
224 | orion_clkevt.mult = div_sc(tclk, NSEC_PER_SEC, orion_clkevt.shift); | ||
225 | orion_clkevt.max_delta_ns = clockevent_delta2ns(0xfffffffe, &orion_clkevt); | ||
226 | orion_clkevt.min_delta_ns = clockevent_delta2ns(1, &orion_clkevt); | ||
227 | orion_clkevt.cpumask = cpumask_of(0); | 223 | orion_clkevt.cpumask = cpumask_of(0); |
228 | clockevents_register_device(&orion_clkevt); | 224 | clockevents_config_and_register(&orion_clkevt, tclk, 1, 0xfffffffe); |
229 | } | 225 | } |
diff --git a/arch/arm/plat-pxa/ssp.c b/arch/arm/plat-pxa/ssp.c index 584c9bf8ed2d..8e11e96eab5e 100644 --- a/arch/arm/plat-pxa/ssp.c +++ b/arch/arm/plat-pxa/ssp.c | |||
@@ -72,7 +72,7 @@ void pxa_ssp_free(struct ssp_device *ssp) | |||
72 | } | 72 | } |
73 | EXPORT_SYMBOL(pxa_ssp_free); | 73 | EXPORT_SYMBOL(pxa_ssp_free); |
74 | 74 | ||
75 | static int __devinit pxa_ssp_probe(struct platform_device *pdev) | 75 | static int pxa_ssp_probe(struct platform_device *pdev) |
76 | { | 76 | { |
77 | const struct platform_device_id *id = platform_get_device_id(pdev); | 77 | const struct platform_device_id *id = platform_get_device_id(pdev); |
78 | struct resource *res; | 78 | struct resource *res; |
@@ -164,7 +164,7 @@ err_free: | |||
164 | return ret; | 164 | return ret; |
165 | } | 165 | } |
166 | 166 | ||
167 | static int __devexit pxa_ssp_remove(struct platform_device *pdev) | 167 | static int pxa_ssp_remove(struct platform_device *pdev) |
168 | { | 168 | { |
169 | struct resource *res; | 169 | struct resource *res; |
170 | struct ssp_device *ssp; | 170 | struct ssp_device *ssp; |
@@ -199,7 +199,7 @@ static const struct platform_device_id ssp_id_table[] = { | |||
199 | 199 | ||
200 | static struct platform_driver pxa_ssp_driver = { | 200 | static struct platform_driver pxa_ssp_driver = { |
201 | .probe = pxa_ssp_probe, | 201 | .probe = pxa_ssp_probe, |
202 | .remove = __devexit_p(pxa_ssp_remove), | 202 | .remove = pxa_ssp_remove, |
203 | .driver = { | 203 | .driver = { |
204 | .owner = THIS_MODULE, | 204 | .owner = THIS_MODULE, |
205 | .name = "pxa2xx-ssp", | 205 | .name = "pxa2xx-ssp", |
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c index 37542c2689a2..2d676ab50f73 100644 --- a/arch/arm/plat-samsung/adc.c +++ b/arch/arm/plat-samsung/adc.c | |||
@@ -416,7 +416,7 @@ static int s3c_adc_probe(struct platform_device *pdev) | |||
416 | return 0; | 416 | return 0; |
417 | } | 417 | } |
418 | 418 | ||
419 | static int __devexit s3c_adc_remove(struct platform_device *pdev) | 419 | static int s3c_adc_remove(struct platform_device *pdev) |
420 | { | 420 | { |
421 | struct adc_device *adc = platform_get_drvdata(pdev); | 421 | struct adc_device *adc = platform_get_drvdata(pdev); |
422 | 422 | ||
@@ -516,7 +516,7 @@ static struct platform_driver s3c_adc_driver = { | |||
516 | .pm = &adc_pm_ops, | 516 | .pm = &adc_pm_ops, |
517 | }, | 517 | }, |
518 | .probe = s3c_adc_probe, | 518 | .probe = s3c_adc_probe, |
519 | .remove = __devexit_p(s3c_adc_remove), | 519 | .remove = s3c_adc_remove, |
520 | }; | 520 | }; |
521 | 521 | ||
522 | static int __init adc_init(void) | 522 | static int __init adc_init(void) |
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index e0667a1c137c..37703ef6dfc7 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h | |||
@@ -43,7 +43,7 @@ extern unsigned long samsung_cpu_id; | |||
43 | #define EXYNOS4_CPU_MASK 0xFFFE0000 | 43 | #define EXYNOS4_CPU_MASK 0xFFFE0000 |
44 | 44 | ||
45 | #define EXYNOS5250_SOC_ID 0x43520000 | 45 | #define EXYNOS5250_SOC_ID 0x43520000 |
46 | #define EXYNOS5440_SOC_ID 0x54400000 | 46 | #define EXYNOS5440_SOC_ID 0xE5440000 |
47 | #define EXYNOS5_SOC_MASK 0xFFFFF000 | 47 | #define EXYNOS5_SOC_MASK 0xFFFFF000 |
48 | 48 | ||
49 | #define IS_SAMSUNG_CPU(name, id, mask) \ | 49 | #define IS_SAMSUNG_CPU(name, id, mask) \ |
diff --git a/arch/arm/plat-samsung/s5p-time.c b/arch/arm/plat-samsung/s5p-time.c index dabede46c0ec..e92510cf82ee 100644 --- a/arch/arm/plat-samsung/s5p-time.c +++ b/arch/arm/plat-samsung/s5p-time.c | |||
@@ -274,15 +274,8 @@ static void __init s5p_clockevent_init(void) | |||
274 | clock_rate = clk_get_rate(tin_event); | 274 | clock_rate = clk_get_rate(tin_event); |
275 | clock_count_per_tick = clock_rate / HZ; | 275 | clock_count_per_tick = clock_rate / HZ; |
276 | 276 | ||
277 | clockevents_calc_mult_shift(&time_event_device, | ||
278 | clock_rate, S5PTIMER_MIN_RANGE); | ||
279 | time_event_device.max_delta_ns = | ||
280 | clockevent_delta2ns(-1, &time_event_device); | ||
281 | time_event_device.min_delta_ns = | ||
282 | clockevent_delta2ns(1, &time_event_device); | ||
283 | |||
284 | time_event_device.cpumask = cpumask_of(0); | 277 | time_event_device.cpumask = cpumask_of(0); |
285 | clockevents_register_device(&time_event_device); | 278 | clockevents_config_and_register(&time_event_device, clock_rate, 1, -1); |
286 | 279 | ||
287 | irq_number = timer_source.event_id + IRQ_TIMER0; | 280 | irq_number = timer_source.event_id + IRQ_TIMER0; |
288 | setup_irq(irq_number, &s5p_clock_event_irq); | 281 | setup_irq(irq_number, &s5p_clock_event_irq); |
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c index 03321af5de9f..bd5c53cd6962 100644 --- a/arch/arm/plat-spear/time.c +++ b/arch/arm/plat-spear/time.c | |||
@@ -186,15 +186,9 @@ static void __init spear_clockevent_init(int irq) | |||
186 | tick_rate = clk_get_rate(gpt_clk); | 186 | tick_rate = clk_get_rate(gpt_clk); |
187 | tick_rate >>= CTRL_PRESCALER16; | 187 | tick_rate >>= CTRL_PRESCALER16; |
188 | 188 | ||
189 | clockevents_calc_mult_shift(&clkevt, tick_rate, SPEAR_MIN_RANGE); | ||
190 | |||
191 | clkevt.max_delta_ns = clockevent_delta2ns(0xfff0, | ||
192 | &clkevt); | ||
193 | clkevt.min_delta_ns = clockevent_delta2ns(3, &clkevt); | ||
194 | |||
195 | clkevt.cpumask = cpumask_of(0); | 189 | clkevt.cpumask = cpumask_of(0); |
196 | 190 | ||
197 | clockevents_register_device(&clkevt); | 191 | clockevents_config_and_register(&clkevt, tick_rate, 3, 0xfff0); |
198 | 192 | ||
199 | setup_irq(irq, &spear_timer_irq); | 193 | setup_irq(irq, &spear_timer_irq); |
200 | } | 194 | } |