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authorJoachim Eastwood <manabian@gmail.com>2012-12-04 13:10:58 -0500
committerNicolas Ferre <nicolas.ferre@atmel.com>2013-02-07 10:40:08 -0500
commit883a07f69cc7c6f40e5e57677f268267781d5b01 (patch)
tree61b05a9110012756b3b6927f7c58f9a34ff73eff /arch/arm
parent4e4c963ea9586647b055834e56f67c9ec1898692 (diff)
ARM: at91: add SSC bindings to RM9200 DT
Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/at91rm9200.dtsi78
1 files changed, 78 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 73edf0217890..6ff27bba6296 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -29,6 +29,9 @@
29 gpio3 = &pioD; 29 gpio3 = &pioD;
30 tcb0 = &tcb0; 30 tcb0 = &tcb0;
31 tcb1 = &tcb1; 31 tcb1 = &tcb1;
32 ssc0 = &ssc0;
33 ssc1 = &ssc1;
34 ssc2 = &ssc2;
32 }; 35 };
33 cpus { 36 cpus {
34 cpu@0 { 37 cpu@0 {
@@ -97,6 +100,33 @@
97 status = "disabled"; 100 status = "disabled";
98 }; 101 };
99 102
103 ssc0: ssc@fffd0000 {
104 compatible = "atmel,at91rm9200-ssc";
105 reg = <0xfffd0000 0x4000>;
106 interrupts = <14 4 5>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
109 status = "disable";
110 };
111
112 ssc1: ssc@fffd4000 {
113 compatible = "atmel,at91rm9200-ssc";
114 reg = <0xfffd4000 0x4000>;
115 interrupts = <15 4 5>;
116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
118 status = "disable";
119 };
120
121 ssc2: ssc@fffd8000 {
122 compatible = "atmel,at91rm9200-ssc";
123 reg = <0xfffd8000 0x4000>;
124 interrupts = <16 4 5>;
125 pinctrl-names = "default";
126 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
127 status = "disable";
128 };
129
100 pinctrl@fffff400 { 130 pinctrl@fffff400 {
101 #address-cells = <1>; 131 #address-cells = <1>;
102 #size-cells = <1>; 132 #size-cells = <1>;
@@ -249,6 +279,54 @@
249 }; 279 };
250 }; 280 };
251 281
282 ssc0 {
283 pinctrl_ssc0_tx: ssc0_tx-0 {
284 atmel,pins =
285 <1 0 0x1 0x0 /* PB0 periph A */
286 1 1 0x1 0x0 /* PB1 periph A */
287 1 2 0x1 0x0>; /* PB2 periph A */
288 };
289
290 pinctrl_ssc0_rx: ssc0_rx-0 {
291 atmel,pins =
292 <1 3 0x1 0x0 /* PB3 periph A */
293 1 4 0x1 0x0 /* PB4 periph A */
294 1 5 0x1 0x0>; /* PB5 periph A */
295 };
296 };
297
298 ssc1 {
299 pinctrl_ssc1_tx: ssc1_tx-0 {
300 atmel,pins =
301 <1 6 0x1 0x0 /* PB6 periph A */
302 1 7 0x1 0x0 /* PB7 periph A */
303 1 8 0x1 0x0>; /* PB8 periph A */
304 };
305
306 pinctrl_ssc1_rx: ssc1_rx-0 {
307 atmel,pins =
308 <1 9 0x1 0x0 /* PB9 periph A */
309 1 10 0x1 0x0 /* PB10 periph A */
310 1 11 0x1 0x0>; /* PB11 periph A */
311 };
312 };
313
314 ssc2 {
315 pinctrl_ssc2_tx: ssc2_tx-0 {
316 atmel,pins =
317 <1 12 0x1 0x0 /* PB12 periph A */
318 1 13 0x1 0x0 /* PB13 periph A */
319 1 14 0x1 0x0>; /* PB14 periph A */
320 };
321
322 pinctrl_ssc2_rx: ssc2_rx-0 {
323 atmel,pins =
324 <1 15 0x1 0x0 /* PB15 periph A */
325 1 16 0x1 0x0 /* PB16 periph A */
326 1 17 0x1 0x0>; /* PB17 periph A */
327 };
328 };
329
252 pioA: gpio@fffff400 { 330 pioA: gpio@fffff400 {
253 compatible = "atmel,at91rm9200-gpio"; 331 compatible = "atmel,at91rm9200-gpio";
254 reg = <0xfffff400 0x200>; 332 reg = <0xfffff400 0x200>;