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authorTodd Poynor <tpoynor@mvista.com>2005-10-28 11:25:01 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-10-28 11:25:01 -0400
commit80a18573cea2e6d8e95abe4d42bfc5f97761999a (patch)
tree169773f6b106c22e9df10d14a14f538299915b51 /arch/arm
parent917f68f8163eb877a6d71c5b446ee236645c2944 (diff)
[ARM] 2787/2: PXA27x low power modes support
Patch from Todd Poynor Add symbols for PXA2xx PWRMODE register M field that selects low-power mode, replace unadorned constants. Honor power mode parameter of pxa_cpu_suspend(mode), no longer force to 3 (sleep). Full Deep Sleep low-power mode support for PXA27x is pending generic PM interfaces to select more than 2 suspend-to-RAM-style power modes, but this is expected soon. This can be hardcoded in the meantime by replacing the pxa_cpu_suspend() parameter value. From David Burrage and Todd Poynor. Try #2 removes one of the register copies and moves the code to save the pxa_cpu_suspend parameter to immediately surround the call that requires the parameter value be preserved. Signed-off-by: Todd Poynor <tpoynor@mvista.com> Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-pxa/pxa25x.c2
-rw-r--r--arch/arm/mach-pxa/pxa27x.c2
-rw-r--r--arch/arm/mach-pxa/sleep.S7
-rw-r--r--arch/arm/mach-pxa/standby.S2
4 files changed, 8 insertions, 5 deletions
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 7869c3b4e62f..573a5758e781 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -129,7 +129,7 @@ void pxa_cpu_pm_enter(suspend_state_t state)
129 case PM_SUSPEND_MEM: 129 case PM_SUSPEND_MEM:
130 /* set resume return address */ 130 /* set resume return address */
131 PSPR = virt_to_phys(pxa_cpu_resume); 131 PSPR = virt_to_phys(pxa_cpu_resume);
132 pxa_cpu_suspend(3); 132 pxa_cpu_suspend(PWRMODE_SLEEP);
133 break; 133 break;
134 } 134 }
135} 135}
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 9a791b07118d..09a5d593f04b 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -157,7 +157,7 @@ void pxa_cpu_pm_enter(suspend_state_t state)
157 case PM_SUSPEND_MEM: 157 case PM_SUSPEND_MEM:
158 /* set resume return address */ 158 /* set resume return address */
159 PSPR = virt_to_phys(pxa_cpu_resume); 159 PSPR = virt_to_phys(pxa_cpu_resume);
160 pxa_cpu_suspend(3); 160 pxa_cpu_suspend(PWRMODE_SLEEP);
161 break; 161 break;
162 } 162 }
163} 163}
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S
index 5786ccad938c..c9862688ff3d 100644
--- a/arch/arm/mach-pxa/sleep.S
+++ b/arch/arm/mach-pxa/sleep.S
@@ -28,7 +28,9 @@
28/* 28/*
29 * pxa_cpu_suspend() 29 * pxa_cpu_suspend()
30 * 30 *
31 * Forces CPU into sleep state 31 * Forces CPU into sleep state.
32 *
33 * r0 = value for PWRMODE M field for desired sleep state
32 */ 34 */
33 35
34ENTRY(pxa_cpu_suspend) 36ENTRY(pxa_cpu_suspend)
@@ -53,6 +55,7 @@ ENTRY(pxa_cpu_suspend)
53 mov r10, sp 55 mov r10, sp
54 stmfd sp!, {r3 - r10} 56 stmfd sp!, {r3 - r10}
55 57
58 mov r5, r0 @ save sleep mode
56 @ preserve phys address of stack 59 @ preserve phys address of stack
57 mov r0, sp 60 mov r0, sp
58 bl sleep_phys_sp 61 bl sleep_phys_sp
@@ -66,7 +69,7 @@ ENTRY(pxa_cpu_suspend)
66 @ (also workaround for sighting 28071) 69 @ (also workaround for sighting 28071)
67 70
68 @ prepare value for sleep mode 71 @ prepare value for sleep mode
69 mov r1, #3 @ sleep mode 72 mov r1, r5 @ sleep mode
70 73
71 @ prepare pointer to physical address 0 (virtual mapping in generic.c) 74 @ prepare pointer to physical address 0 (virtual mapping in generic.c)
72 mov r2, #UNCACHED_PHYS_0 75 mov r2, #UNCACHED_PHYS_0
diff --git a/arch/arm/mach-pxa/standby.S b/arch/arm/mach-pxa/standby.S
index 8a3f27b76784..6f6dbbd08021 100644
--- a/arch/arm/mach-pxa/standby.S
+++ b/arch/arm/mach-pxa/standby.S
@@ -21,7 +21,7 @@
21ENTRY(pxa_cpu_standby) 21ENTRY(pxa_cpu_standby)
22 ldr r0, =PSSR 22 ldr r0, =PSSR
23 mov r1, #(PSSR_PH | PSSR_STS) 23 mov r1, #(PSSR_PH | PSSR_STS)
24 mov r2, #2 24 mov r2, #PWRMODE_STANDBY
25 mov r3, #UNCACHED_PHYS_0 @ Read mem context in. 25 mov r3, #UNCACHED_PHYS_0 @ Read mem context in.
26 ldr ip, [r3] 26 ldr ip, [r3]
27 b 1f 27 b 1f