diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-04-29 19:38:41 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-04-29 19:38:41 -0400 |
commit | 61f3d0a9883d965b498edeb673235bddc92770fd (patch) | |
tree | fa1e394cd1d5332f4a205d12f0db88320bc83813 /arch/arm | |
parent | 8ded8d4e4facab78acf616bc34085ddd15c2c21c (diff) | |
parent | cd8d984f0def2a8c5733a9468634ec3e0feec03d (diff) |
Merge tag 'spi-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"A fairly quiet release for SPI, mainly driver work. A few highlights:
- Supports bits per word compatibility checking in the core.
- Allow use of the IP used in Freescale SPI controllers outside
Freescale SoCs.
- DMA support for the Atmel SPI driver.
- New drivers for the BCM2835 and Tegra114"
* tag 'spi-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (68 commits)
spi-topcliff-pch: fix to use list_for_each_entry_safe() when delete list items
spi-topcliff-pch: missing platform_driver_unregister() on error in pch_spi_init()
ARM: dts: add pinctrl property for spi node for atmel SoC
ARM: dts: add spi nodes for the atmel boards
ARM: dts: add spi nodes for atmel SoC
ARM: at91: add clocks for spi dt entries
spi/spi-atmel: add dmaengine support
spi/spi-atmel: add flag to controller data for lock operations
spi/spi-atmel: add physical base address
spi/sirf: fix MODULE_DEVICE_TABLE
MAINTAINERS: Add git repository and update my address
spi/s3c64xx: Check for errors in dmaengine prepare_transfer()
spi/s3c64xx: Fix non-dmaengine usage
spi: omap2-mcspi: fix error return code in omap2_mcspi_probe()
spi/s3c64xx: let device core setup the default pin configuration
MAINTAINERS: Update Grant's email address and maintainership
spi: omap2-mcspi: Fix transfers if DMADEVICES is not set
spi: s3c64xx: move to generic dmaengine API
spi-gpio: init CS before spi_bitbang_setup()
spi: spi-mpc512x-psc: let transmiter/receiver enabled when in xfer loop
...
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/at91sam9260.dtsi | 40 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9263.dtsi | 40 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9263ek.dts | 10 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 10 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9g45.dtsi | 40 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9m10g45ek.dts | 10 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9n12.dtsi | 40 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9n12ek.dts | 10 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9x5.dtsi | 40 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9x5ek.dtsi | 10 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9260.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9g45.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9n12.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9x5.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-samsung/devs.c | 10 |
15 files changed, 268 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi index cb7bcc51608d..39253b9aedd1 100644 --- a/arch/arm/boot/dts/at91sam9260.dtsi +++ b/arch/arm/boot/dts/at91sam9260.dtsi | |||
@@ -322,6 +322,24 @@ | |||
322 | }; | 322 | }; |
323 | }; | 323 | }; |
324 | 324 | ||
325 | spi0 { | ||
326 | pinctrl_spi0: spi0-0 { | ||
327 | atmel,pins = | ||
328 | <0 0 0x1 0x0 /* PA0 periph A SPI0_MISO pin */ | ||
329 | 0 1 0x1 0x0 /* PA1 periph A SPI0_MOSI pin */ | ||
330 | 0 2 0x1 0x0>; /* PA2 periph A SPI0_SPCK pin */ | ||
331 | }; | ||
332 | }; | ||
333 | |||
334 | spi1 { | ||
335 | pinctrl_spi1: spi1-0 { | ||
336 | atmel,pins = | ||
337 | <1 0 0x1 0x0 /* PB0 periph A SPI1_MISO pin */ | ||
338 | 1 1 0x1 0x0 /* PB1 periph A SPI1_MOSI pin */ | ||
339 | 1 2 0x1 0x0>; /* PB2 periph A SPI1_SPCK pin */ | ||
340 | }; | ||
341 | }; | ||
342 | |||
325 | pioA: gpio@fffff400 { | 343 | pioA: gpio@fffff400 { |
326 | compatible = "atmel,at91rm9200-gpio"; | 344 | compatible = "atmel,at91rm9200-gpio"; |
327 | reg = <0xfffff400 0x200>; | 345 | reg = <0xfffff400 0x200>; |
@@ -471,6 +489,28 @@ | |||
471 | status = "disabled"; | 489 | status = "disabled"; |
472 | }; | 490 | }; |
473 | 491 | ||
492 | spi0: spi@fffc8000 { | ||
493 | #address-cells = <1>; | ||
494 | #size-cells = <0>; | ||
495 | compatible = "atmel,at91rm9200-spi"; | ||
496 | reg = <0xfffc8000 0x200>; | ||
497 | interrupts = <12 4 3>; | ||
498 | pinctrl-names = "default"; | ||
499 | pinctrl-0 = <&pinctrl_spi0>; | ||
500 | status = "disabled"; | ||
501 | }; | ||
502 | |||
503 | spi1: spi@fffcc000 { | ||
504 | #address-cells = <1>; | ||
505 | #size-cells = <0>; | ||
506 | compatible = "atmel,at91rm9200-spi"; | ||
507 | reg = <0xfffcc000 0x200>; | ||
508 | interrupts = <13 4 3>; | ||
509 | pinctrl-names = "default"; | ||
510 | pinctrl-0 = <&pinctrl_spi1>; | ||
511 | status = "disabled"; | ||
512 | }; | ||
513 | |||
474 | adc0: adc@fffe0000 { | 514 | adc0: adc@fffe0000 { |
475 | compatible = "atmel,at91sam9260-adc"; | 515 | compatible = "atmel,at91sam9260-adc"; |
476 | reg = <0xfffe0000 0x100>; | 516 | reg = <0xfffe0000 0x100>; |
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi index 271d4de026e9..94b58ab2cc08 100644 --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi | |||
@@ -303,6 +303,24 @@ | |||
303 | }; | 303 | }; |
304 | }; | 304 | }; |
305 | 305 | ||
306 | spi0 { | ||
307 | pinctrl_spi0: spi0-0 { | ||
308 | atmel,pins = | ||
309 | <0 0 0x2 0x0 /* PA0 periph B SPI0_MISO pin */ | ||
310 | 0 1 0x2 0x0 /* PA1 periph B SPI0_MOSI pin */ | ||
311 | 0 2 0x2 0x0>; /* PA2 periph B SPI0_SPCK pin */ | ||
312 | }; | ||
313 | }; | ||
314 | |||
315 | spi1 { | ||
316 | pinctrl_spi1: spi1-0 { | ||
317 | atmel,pins = | ||
318 | <1 12 0x1 0x0 /* PB12 periph A SPI1_MISO pin */ | ||
319 | 1 13 0x1 0x0 /* PB13 periph A SPI1_MOSI pin */ | ||
320 | 1 14 0x1 0x0>; /* PB14 periph A SPI1_SPCK pin */ | ||
321 | }; | ||
322 | }; | ||
323 | |||
306 | pioA: gpio@fffff200 { | 324 | pioA: gpio@fffff200 { |
307 | compatible = "atmel,at91rm9200-gpio"; | 325 | compatible = "atmel,at91rm9200-gpio"; |
308 | reg = <0xfffff200 0x200>; | 326 | reg = <0xfffff200 0x200>; |
@@ -462,6 +480,28 @@ | |||
462 | reg = <0xfffffd40 0x10>; | 480 | reg = <0xfffffd40 0x10>; |
463 | status = "disabled"; | 481 | status = "disabled"; |
464 | }; | 482 | }; |
483 | |||
484 | spi0: spi@fffa4000 { | ||
485 | #address-cells = <1>; | ||
486 | #size-cells = <0>; | ||
487 | compatible = "atmel,at91rm9200-spi"; | ||
488 | reg = <0xfffa4000 0x200>; | ||
489 | interrupts = <14 4 3>; | ||
490 | pinctrl-names = "default"; | ||
491 | pinctrl-0 = <&pinctrl_spi0>; | ||
492 | status = "disabled"; | ||
493 | }; | ||
494 | |||
495 | spi1: spi@fffa8000 { | ||
496 | #address-cells = <1>; | ||
497 | #size-cells = <0>; | ||
498 | compatible = "atmel,at91rm9200-spi"; | ||
499 | reg = <0xfffa8000 0x200>; | ||
500 | interrupts = <15 4 3>; | ||
501 | pinctrl-names = "default"; | ||
502 | pinctrl-0 = <&pinctrl_spi1>; | ||
503 | status = "disabled"; | ||
504 | }; | ||
465 | }; | 505 | }; |
466 | 506 | ||
467 | nand0: nand@40000000 { | 507 | nand0: nand@40000000 { |
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts index 1eb08728f527..a14e424b2e81 100644 --- a/arch/arm/boot/dts/at91sam9263ek.dts +++ b/arch/arm/boot/dts/at91sam9263ek.dts | |||
@@ -79,6 +79,16 @@ | |||
79 | }; | 79 | }; |
80 | }; | 80 | }; |
81 | }; | 81 | }; |
82 | |||
83 | spi0: spi@fffa4000 { | ||
84 | status = "okay"; | ||
85 | cs-gpios = <&pioA 5 0>, <0>, <0>, <0>; | ||
86 | mtd_dataflash@0 { | ||
87 | compatible = "atmel,at45", "atmel,dataflash"; | ||
88 | spi-max-frequency = <50000000>; | ||
89 | reg = <0>; | ||
90 | }; | ||
91 | }; | ||
82 | }; | 92 | }; |
83 | 93 | ||
84 | nand0: nand@40000000 { | 94 | nand0: nand@40000000 { |
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi index da15e83e7f17..23d1f468f27f 100644 --- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi +++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi | |||
@@ -96,6 +96,16 @@ | |||
96 | status = "okay"; | 96 | status = "okay"; |
97 | pinctrl-0 = <&pinctrl_ssc0_tx>; | 97 | pinctrl-0 = <&pinctrl_ssc0_tx>; |
98 | }; | 98 | }; |
99 | |||
100 | spi0: spi@fffc8000 { | ||
101 | status = "okay"; | ||
102 | cs-gpios = <0>, <&pioC 11 0>, <0>, <0>; | ||
103 | mtd_dataflash@0 { | ||
104 | compatible = "atmel,at45", "atmel,dataflash"; | ||
105 | spi-max-frequency = <50000000>; | ||
106 | reg = <1>; | ||
107 | }; | ||
108 | }; | ||
99 | }; | 109 | }; |
100 | 110 | ||
101 | nand0: nand@40000000 { | 111 | nand0: nand@40000000 { |
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index 6b1d4cab24c2..cfdf429578b5 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi | |||
@@ -322,6 +322,24 @@ | |||
322 | }; | 322 | }; |
323 | }; | 323 | }; |
324 | 324 | ||
325 | spi0 { | ||
326 | pinctrl_spi0: spi0-0 { | ||
327 | atmel,pins = | ||
328 | <1 0 0x1 0x0 /* PB0 periph A SPI0_MISO pin */ | ||
329 | 1 1 0x1 0x0 /* PB1 periph A SPI0_MOSI pin */ | ||
330 | 1 2 0x1 0x0>; /* PB2 periph A SPI0_SPCK pin */ | ||
331 | }; | ||
332 | }; | ||
333 | |||
334 | spi1 { | ||
335 | pinctrl_spi1: spi1-0 { | ||
336 | atmel,pins = | ||
337 | <1 14 0x1 0x0 /* PB14 periph A SPI1_MISO pin */ | ||
338 | 1 15 0x1 0x0 /* PB15 periph A SPI1_MOSI pin */ | ||
339 | 1 16 0x1 0x0>; /* PB16 periph A SPI1_SPCK pin */ | ||
340 | }; | ||
341 | }; | ||
342 | |||
325 | pioA: gpio@fffff200 { | 343 | pioA: gpio@fffff200 { |
326 | compatible = "atmel,at91rm9200-gpio"; | 344 | compatible = "atmel,at91rm9200-gpio"; |
327 | reg = <0xfffff200 0x200>; | 345 | reg = <0xfffff200 0x200>; |
@@ -531,6 +549,28 @@ | |||
531 | reg = <0xfffffd40 0x10>; | 549 | reg = <0xfffffd40 0x10>; |
532 | status = "disabled"; | 550 | status = "disabled"; |
533 | }; | 551 | }; |
552 | |||
553 | spi0: spi@fffa4000 { | ||
554 | #address-cells = <1>; | ||
555 | #size-cells = <0>; | ||
556 | compatible = "atmel,at91rm9200-spi"; | ||
557 | reg = <0xfffa4000 0x200>; | ||
558 | interrupts = <14 4 3>; | ||
559 | pinctrl-names = "default"; | ||
560 | pinctrl-0 = <&pinctrl_spi0>; | ||
561 | status = "disabled"; | ||
562 | }; | ||
563 | |||
564 | spi1: spi@fffa8000 { | ||
565 | #address-cells = <1>; | ||
566 | #size-cells = <0>; | ||
567 | compatible = "atmel,at91rm9200-spi"; | ||
568 | reg = <0xfffa8000 0x200>; | ||
569 | interrupts = <15 4 3>; | ||
570 | pinctrl-names = "default"; | ||
571 | pinctrl-0 = <&pinctrl_spi1>; | ||
572 | status = "disabled"; | ||
573 | }; | ||
534 | }; | 574 | }; |
535 | 575 | ||
536 | nand0: nand@40000000 { | 576 | nand0: nand@40000000 { |
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts index 20c31913c270..92c52a7d70bc 100644 --- a/arch/arm/boot/dts/at91sam9m10g45ek.dts +++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts | |||
@@ -102,6 +102,16 @@ | |||
102 | }; | 102 | }; |
103 | }; | 103 | }; |
104 | }; | 104 | }; |
105 | |||
106 | spi0: spi@fffa4000{ | ||
107 | status = "okay"; | ||
108 | cs-gpios = <&pioB 3 0>, <0>, <0>, <0>; | ||
109 | mtd_dataflash@0 { | ||
110 | compatible = "atmel,at45", "atmel,dataflash"; | ||
111 | spi-max-frequency = <13000000>; | ||
112 | reg = <0>; | ||
113 | }; | ||
114 | }; | ||
105 | }; | 115 | }; |
106 | 116 | ||
107 | nand0: nand@40000000 { | 117 | nand0: nand@40000000 { |
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index 7750f98dd764..b2961f1ea51b 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi | |||
@@ -261,6 +261,24 @@ | |||
261 | }; | 261 | }; |
262 | }; | 262 | }; |
263 | 263 | ||
264 | spi0 { | ||
265 | pinctrl_spi0: spi0-0 { | ||
266 | atmel,pins = | ||
267 | <0 11 0x1 0x0 /* PA11 periph A SPI0_MISO pin */ | ||
268 | 0 12 0x1 0x0 /* PA12 periph A SPI0_MOSI pin */ | ||
269 | 0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */ | ||
270 | }; | ||
271 | }; | ||
272 | |||
273 | spi1 { | ||
274 | pinctrl_spi1: spi1-0 { | ||
275 | atmel,pins = | ||
276 | <0 21 0x2 0x0 /* PA21 periph B SPI1_MISO pin */ | ||
277 | 0 22 0x2 0x0 /* PA22 periph B SPI1_MOSI pin */ | ||
278 | 0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */ | ||
279 | }; | ||
280 | }; | ||
281 | |||
264 | pioA: gpio@fffff400 { | 282 | pioA: gpio@fffff400 { |
265 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 283 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
266 | reg = <0xfffff400 0x200>; | 284 | reg = <0xfffff400 0x200>; |
@@ -373,6 +391,28 @@ | |||
373 | #size-cells = <0>; | 391 | #size-cells = <0>; |
374 | status = "disabled"; | 392 | status = "disabled"; |
375 | }; | 393 | }; |
394 | |||
395 | spi0: spi@f0000000 { | ||
396 | #address-cells = <1>; | ||
397 | #size-cells = <0>; | ||
398 | compatible = "atmel,at91rm9200-spi"; | ||
399 | reg = <0xf0000000 0x100>; | ||
400 | interrupts = <13 4 3>; | ||
401 | pinctrl-names = "default"; | ||
402 | pinctrl-0 = <&pinctrl_spi0>; | ||
403 | status = "disabled"; | ||
404 | }; | ||
405 | |||
406 | spi1: spi@f0004000 { | ||
407 | #address-cells = <1>; | ||
408 | #size-cells = <0>; | ||
409 | compatible = "atmel,at91rm9200-spi"; | ||
410 | reg = <0xf0004000 0x100>; | ||
411 | interrupts = <14 4 3>; | ||
412 | pinctrl-names = "default"; | ||
413 | pinctrl-0 = <&pinctrl_spi1>; | ||
414 | status = "disabled"; | ||
415 | }; | ||
376 | }; | 416 | }; |
377 | 417 | ||
378 | nand0: nand@40000000 { | 418 | nand0: nand@40000000 { |
diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts index d400f8de4387..34c842b1efb2 100644 --- a/arch/arm/boot/dts/at91sam9n12ek.dts +++ b/arch/arm/boot/dts/at91sam9n12ek.dts | |||
@@ -67,6 +67,16 @@ | |||
67 | }; | 67 | }; |
68 | }; | 68 | }; |
69 | }; | 69 | }; |
70 | |||
71 | spi0: spi@f0000000 { | ||
72 | status = "okay"; | ||
73 | cs-gpios = <&pioA 14 0>, <0>, <0>, <0>; | ||
74 | m25p80@0 { | ||
75 | compatible = "atmel,at25df321a"; | ||
76 | spi-max-frequency = <50000000>; | ||
77 | reg = <0>; | ||
78 | }; | ||
79 | }; | ||
70 | }; | 80 | }; |
71 | 81 | ||
72 | nand0: nand@40000000 { | 82 | nand0: nand@40000000 { |
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index a98c0d50fbbe..347b438d47fa 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi | |||
@@ -343,6 +343,24 @@ | |||
343 | }; | 343 | }; |
344 | }; | 344 | }; |
345 | 345 | ||
346 | spi0 { | ||
347 | pinctrl_spi0: spi0-0 { | ||
348 | atmel,pins = | ||
349 | <0 11 0x1 0x0 /* PA11 periph A SPI0_MISO pin */ | ||
350 | 0 12 0x1 0x0 /* PA12 periph A SPI0_MOSI pin */ | ||
351 | 0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */ | ||
352 | }; | ||
353 | }; | ||
354 | |||
355 | spi1 { | ||
356 | pinctrl_spi1: spi1-0 { | ||
357 | atmel,pins = | ||
358 | <0 21 0x2 0x0 /* PA21 periph B SPI1_MISO pin */ | ||
359 | 0 22 0x2 0x0 /* PA22 periph B SPI1_MOSI pin */ | ||
360 | 0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */ | ||
361 | }; | ||
362 | }; | ||
363 | |||
346 | pioA: gpio@fffff400 { | 364 | pioA: gpio@fffff400 { |
347 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 365 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
348 | reg = <0xfffff400 0x200>; | 366 | reg = <0xfffff400 0x200>; |
@@ -529,6 +547,28 @@ | |||
529 | trigger-value = <0x6>; | 547 | trigger-value = <0x6>; |
530 | }; | 548 | }; |
531 | }; | 549 | }; |
550 | |||
551 | spi0: spi@f0000000 { | ||
552 | #address-cells = <1>; | ||
553 | #size-cells = <0>; | ||
554 | compatible = "atmel,at91rm9200-spi"; | ||
555 | reg = <0xf0000000 0x100>; | ||
556 | interrupts = <13 4 3>; | ||
557 | pinctrl-names = "default"; | ||
558 | pinctrl-0 = <&pinctrl_spi0>; | ||
559 | status = "disabled"; | ||
560 | }; | ||
561 | |||
562 | spi1: spi@f0004000 { | ||
563 | #address-cells = <1>; | ||
564 | #size-cells = <0>; | ||
565 | compatible = "atmel,at91rm9200-spi"; | ||
566 | reg = <0xf0004000 0x100>; | ||
567 | interrupts = <14 4 3>; | ||
568 | pinctrl-names = "default"; | ||
569 | pinctrl-0 = <&pinctrl_spi1>; | ||
570 | status = "disabled"; | ||
571 | }; | ||
532 | }; | 572 | }; |
533 | 573 | ||
534 | nand0: nand@40000000 { | 574 | nand0: nand@40000000 { |
diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi index 8a7cf1d9cf5d..09f5e667ca7a 100644 --- a/arch/arm/boot/dts/at91sam9x5ek.dtsi +++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi | |||
@@ -84,6 +84,16 @@ | |||
84 | }; | 84 | }; |
85 | }; | 85 | }; |
86 | }; | 86 | }; |
87 | |||
88 | spi0: spi@f0000000 { | ||
89 | status = "okay"; | ||
90 | cs-gpios = <&pioA 14 0>, <0>, <0>, <0>; | ||
91 | m25p80@0 { | ||
92 | compatible = "atmel,at25df321a"; | ||
93 | spi-max-frequency = <50000000>; | ||
94 | reg = <0>; | ||
95 | }; | ||
96 | }; | ||
87 | }; | 97 | }; |
88 | 98 | ||
89 | usb0: ohci@00600000 { | 99 | usb0: ohci@00600000 { |
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index b67cd5374117..44199bc2c665 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c | |||
@@ -232,6 +232,8 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
232 | CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk), | 232 | CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk), |
233 | CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk), | 233 | CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk), |
234 | CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk), | 234 | CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk), |
235 | CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk), | ||
236 | CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk), | ||
235 | /* fake hclk clock */ | 237 | /* fake hclk clock */ |
236 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), | 238 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), |
237 | CLKDEV_CON_ID("pioA", &pioA_clk), | 239 | CLKDEV_CON_ID("pioA", &pioA_clk), |
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index d3addee43d8d..2ec5efea3f03 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c | |||
@@ -262,6 +262,8 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
262 | CLKDEV_CON_DEV_ID("mci_clk", "fffd0000.mmc", &mmc1_clk), | 262 | CLKDEV_CON_DEV_ID("mci_clk", "fffd0000.mmc", &mmc1_clk), |
263 | CLKDEV_CON_DEV_ID(NULL, "fff84000.i2c", &twi0_clk), | 263 | CLKDEV_CON_DEV_ID(NULL, "fff84000.i2c", &twi0_clk), |
264 | CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk), | 264 | CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk), |
265 | CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk), | ||
266 | CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk), | ||
265 | /* fake hclk clock */ | 267 | /* fake hclk clock */ |
266 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), | 268 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), |
267 | CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk), | 269 | CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk), |
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c index 5dfc8fd87103..ccd078355eed 100644 --- a/arch/arm/mach-at91/at91sam9n12.c +++ b/arch/arm/mach-at91/at91sam9n12.c | |||
@@ -172,6 +172,8 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
172 | CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk), | 172 | CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk), |
173 | CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk), | 173 | CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk), |
174 | CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk), | 174 | CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk), |
175 | CLKDEV_CON_DEV_ID("spi_clk", "f0000000.spi", &spi0_clk), | ||
176 | CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi1_clk), | ||
175 | CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk), | 177 | CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk), |
176 | CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk), | 178 | CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk), |
177 | CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk), | 179 | CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk), |
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c index 44a9a62dcc13..a200d8a17123 100644 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c | |||
@@ -237,6 +237,8 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
237 | CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk), | 237 | CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk), |
238 | CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk), | 238 | CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk), |
239 | CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", &twi2_clk), | 239 | CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", &twi2_clk), |
240 | CLKDEV_CON_DEV_ID("spi_clk", "f0000000.spi", &spi0_clk), | ||
241 | CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi1_clk), | ||
240 | CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk), | 242 | CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk), |
241 | CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk), | 243 | CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk), |
242 | CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk), | 244 | CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk), |
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c index 51afedda9ab6..03db14d8ace9 100644 --- a/arch/arm/plat-samsung/devs.c +++ b/arch/arm/plat-samsung/devs.c | |||
@@ -10,6 +10,7 @@ | |||
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/amba/pl330.h> | ||
13 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
14 | #include <linux/types.h> | 15 | #include <linux/types.h> |
15 | #include <linux/interrupt.h> | 16 | #include <linux/interrupt.h> |
@@ -1552,6 +1553,9 @@ void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, | |||
1552 | pd.num_cs = num_cs; | 1553 | pd.num_cs = num_cs; |
1553 | pd.src_clk_nr = src_clk_nr; | 1554 | pd.src_clk_nr = src_clk_nr; |
1554 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio; | 1555 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio; |
1556 | #ifdef CONFIG_PL330_DMA | ||
1557 | pd.filter = pl330_filter; | ||
1558 | #endif | ||
1555 | 1559 | ||
1556 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0); | 1560 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0); |
1557 | } | 1561 | } |
@@ -1590,6 +1594,9 @@ void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, | |||
1590 | pd.num_cs = num_cs; | 1594 | pd.num_cs = num_cs; |
1591 | pd.src_clk_nr = src_clk_nr; | 1595 | pd.src_clk_nr = src_clk_nr; |
1592 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio; | 1596 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio; |
1597 | #ifdef CONFIG_PL330_DMA | ||
1598 | pd.filter = pl330_filter; | ||
1599 | #endif | ||
1593 | 1600 | ||
1594 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1); | 1601 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1); |
1595 | } | 1602 | } |
@@ -1628,6 +1635,9 @@ void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, | |||
1628 | pd.num_cs = num_cs; | 1635 | pd.num_cs = num_cs; |
1629 | pd.src_clk_nr = src_clk_nr; | 1636 | pd.src_clk_nr = src_clk_nr; |
1630 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio; | 1637 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio; |
1638 | #ifdef CONFIG_PL330_DMA | ||
1639 | pd.filter = pl330_filter; | ||
1640 | #endif | ||
1631 | 1641 | ||
1632 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2); | 1642 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2); |
1633 | } | 1643 | } |