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authorKevin Hilman <khilman@ti.com>2011-03-28 13:52:04 -0400
committerKevin Hilman <khilman@ti.com>2011-09-15 15:02:04 -0400
commit58aaa599a97308c0f4a68ef07039157807fa8324 (patch)
tree584afba63279e12711f80989767a3287d6a7dd09 /arch/arm
parente74e44054f8297d60fbd2ed1d412d84055afee8c (diff)
OMAP2+: add PRM VP functions for checking/clearing VP TX done status
Add SoC specific PRM VP helper functions for checking and clearing the VP transaction done status. Longer term, these events should be handled by the forthcoming PRCM interrupt handler. Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.c41
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.h4
-rw-r--r--arch/arm/mach-omap2/prm44xx.c49
-rw-r--r--arch/arm/mach-omap2/prm44xx.h4
-rw-r--r--arch/arm/mach-omap2/vp.h34
-rw-r--r--arch/arm/mach-omap2/vp3xxx_data.c19
-rw-r--r--arch/arm/mach-omap2/vp44xx_data.c25
7 files changed, 137 insertions, 39 deletions
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 051213fbc346..58c5c878b295 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -20,6 +20,8 @@
20#include <plat/cpu.h> 20#include <plat/cpu.h>
21#include <plat/prcm.h> 21#include <plat/prcm.h>
22 22
23#include "vp.h"
24
23#include "prm2xxx_3xxx.h" 25#include "prm2xxx_3xxx.h"
24#include "cm2xxx_3xxx.h" 26#include "cm2xxx_3xxx.h"
25#include "prm-regbits-24xx.h" 27#include "prm-regbits-24xx.h"
@@ -156,3 +158,42 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
156 158
157 return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; 159 return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
158} 160}
161
162/* PRM VP */
163
164/*
165 * struct omap3_vp - OMAP3 VP register access description.
166 * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
167 */
168struct omap3_vp {
169 u32 tranxdone_status;
170};
171
172struct omap3_vp omap3_vp[] = {
173 [OMAP3_VP_VDD_MPU_ID] = {
174 .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK,
175 },
176 [OMAP3_VP_VDD_CORE_ID] = {
177 .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK,
178 },
179};
180
181#define MAX_VP_ID ARRAY_SIZE(omap3_vp);
182
183u32 omap3_prm_vp_check_txdone(u8 vp_id)
184{
185 struct omap3_vp *vp = &omap3_vp[vp_id];
186 u32 irqstatus;
187
188 irqstatus = omap2_prm_read_mod_reg(OCP_MOD,
189 OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
190 return irqstatus & vp->tranxdone_status;
191}
192
193void omap3_prm_vp_clear_txdone(u8 vp_id)
194{
195 struct omap3_vp *vp = &omap3_vp[vp_id];
196
197 omap2_prm_write_mod_reg(vp->tranxdone_status,
198 OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
199}
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index a1fc62a39dbb..51125268632b 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -303,6 +303,10 @@ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift);
303extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); 303extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift);
304extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); 304extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift);
305 305
306/* OMAP3-specific VP functions */
307u32 omap3_prm_vp_check_txdone(u8 vp_id);
308void omap3_prm_vp_clear_txdone(u8 vp_id);
309
306#endif /* CONFIG_ARCH_OMAP4 */ 310#endif /* CONFIG_ARCH_OMAP4 */
307#endif 311#endif
308 312
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 00165558fc4d..390e32c53b0e 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -21,6 +21,7 @@
21#include <plat/cpu.h> 21#include <plat/cpu.h>
22#include <plat/prcm.h> 22#include <plat/prcm.h>
23 23
24#include "vp.h"
24#include "prm44xx.h" 25#include "prm44xx.h"
25#include "prm-regbits-44xx.h" 26#include "prm-regbits-44xx.h"
26 27
@@ -50,3 +51,51 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
50 51
51 return v; 52 return v;
52} 53}
54
55/* PRM VP */
56
57/*
58 * struct omap4_vp - OMAP4 VP register access description.
59 * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP
60 * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
61 */
62struct omap4_vp {
63 u32 irqstatus_mpu;
64 u32 tranxdone_status;
65};
66
67static struct omap4_vp omap4_vp[] = {
68 [OMAP4_VP_VDD_MPU_ID] = {
69 .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET,
70 .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK,
71 },
72 [OMAP4_VP_VDD_IVA_ID] = {
73 .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
74 .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK,
75 },
76 [OMAP4_VP_VDD_CORE_ID] = {
77 .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
78 .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK,
79 },
80};
81
82u32 omap4_prm_vp_check_txdone(u8 vp_id)
83{
84 struct omap4_vp *vp = &omap4_vp[vp_id];
85 u32 irqstatus;
86
87 irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
88 OMAP4430_PRM_OCP_SOCKET_INST,
89 vp->irqstatus_mpu);
90 return irqstatus & vp->tranxdone_status;
91}
92
93void omap4_prm_vp_clear_txdone(u8 vp_id)
94{
95 struct omap4_vp *vp = &omap4_vp[vp_id];
96
97 omap4_prminst_write_inst_reg(vp->tranxdone_status,
98 OMAP4430_PRM_PARTITION,
99 OMAP4430_PRM_OCP_SOCKET_INST,
100 vp->irqstatus_mpu);
101};
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index 7dfa379b625d..b28c87dcbfa1 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -751,6 +751,10 @@ extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx);
751extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx); 751extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx);
752extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); 752extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
753 753
754/* OMAP4-specific VP functions */
755u32 omap4_prm_vp_check_txdone(u8 vp_id);
756void omap4_prm_vp_clear_txdone(u8 vp_id);
757
754# endif 758# endif
755 759
756#endif 760#endif
diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h
index 025cf164da71..1ccf7419a36c 100644
--- a/arch/arm/mach-omap2/vp.h
+++ b/arch/arm/mach-omap2/vp.h
@@ -21,10 +21,28 @@
21 21
22struct voltagedomain; 22struct voltagedomain;
23 23
24/*
25 * Voltage Processor (VP) identifiers
26 */
27#define OMAP3_VP_VDD_MPU_ID 0
28#define OMAP3_VP_VDD_CORE_ID 1
29#define OMAP4_VP_VDD_CORE_ID 0
30#define OMAP4_VP_VDD_IVA_ID 1
31#define OMAP4_VP_VDD_MPU_ID 2
32
24/* XXX document */ 33/* XXX document */
25#define VP_IDLE_TIMEOUT 200 34#define VP_IDLE_TIMEOUT 200
26#define VP_TRANXDONE_TIMEOUT 300 35#define VP_TRANXDONE_TIMEOUT 300
27 36
37/**
38 * struct omap_vp_ops - per-VP operations
39 * @check_txdone: check for VP transaction done
40 * @clear_txdone: clear VP transaction done status
41 */
42struct omap_vp_ops {
43 u32 (*check_txdone)(u8 vp_id);
44 void (*clear_txdone)(u8 vp_id);
45};
28 46
29/** 47/**
30 * struct omap_vp_common_data - register data common to all VDDs 48 * struct omap_vp_common_data - register data common to all VDDs
@@ -68,41 +86,31 @@ struct omap_vp_common_data {
68 u8 vlimitto_vddmin_shift; 86 u8 vlimitto_vddmin_shift;
69 u8 vlimitto_vddmax_shift; 87 u8 vlimitto_vddmax_shift;
70 u8 vlimitto_timeout_shift; 88 u8 vlimitto_timeout_shift;
71};
72 89
73/** 90 const struct omap_vp_ops *ops;
74 * struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data
75 * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
76 *
77 * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a
78 * hardware bug
79 * XXX This structure is probably not needed
80 */
81struct omap_vp_prm_irqst_data {
82 u32 tranxdone_status;
83}; 91};
84 92
85/** 93/**
86 * struct omap_vp_instance_data - VP register offsets (per-VDD) 94 * struct omap_vp_instance_data - VP register offsets (per-VDD)
87 * @vp_common: pointer to struct omap_vp_common_data * for this SoC 95 * @vp_common: pointer to struct omap_vp_common_data * for this SoC
88 * @prm_irqst_data: pointer to struct omap_vp_prm_irqst_data for this VDD
89 * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start 96 * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start
90 * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start 97 * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start
91 * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start 98 * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start
92 * @vstatus: PRM_VP*_VSTATUS reg offset from PRM start 99 * @vstatus: PRM_VP*_VSTATUS reg offset from PRM start
93 * @voltage: PRM_VP*_VOLTAGE reg offset from PRM start 100 * @voltage: PRM_VP*_VOLTAGE reg offset from PRM start
101 * @id: Unique identifier for VP instance.
94 * 102 *
95 * XXX vp_common is probably not needed since it is per-SoC 103 * XXX vp_common is probably not needed since it is per-SoC
96 */ 104 */
97struct omap_vp_instance_data { 105struct omap_vp_instance_data {
98 const struct omap_vp_common_data *vp_common; 106 const struct omap_vp_common_data *vp_common;
99 const struct omap_vp_prm_irqst_data *prm_irqst_data;
100 u8 vpconfig; 107 u8 vpconfig;
101 u8 vstepmin; 108 u8 vstepmin;
102 u8 vstepmax; 109 u8 vstepmax;
103 u8 vlimitto; 110 u8 vlimitto;
104 u8 vstatus; 111 u8 vstatus;
105 u8 voltage; 112 u8 voltage;
113 u8 id;
106}; 114};
107 115
108/** 116/**
diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c
index a8ea0451d0b4..0372c1ab5672 100644
--- a/arch/arm/mach-omap2/vp3xxx_data.c
+++ b/arch/arm/mach-omap2/vp3xxx_data.c
@@ -25,6 +25,12 @@
25#include "voltage.h" 25#include "voltage.h"
26 26
27#include "vp.h" 27#include "vp.h"
28#include "prm2xxx_3xxx.h"
29
30static const struct omap_vp_ops omap3_vp_ops = {
31 .check_txdone = omap3_prm_vp_check_txdone,
32 .clear_txdone = omap3_prm_vp_clear_txdone,
33};
28 34
29/* 35/*
30 * VP data common to 34xx/36xx chips 36 * VP data common to 34xx/36xx chips
@@ -48,13 +54,11 @@ static const struct omap_vp_common_data omap3_vp_common = {
48 .vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT, 54 .vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT,
49 .vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT, 55 .vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT,
50 .vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT, 56 .vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT,
51}; 57 .ops = &omap3_vp_ops,
52
53static const struct omap_vp_prm_irqst_data omap3_vp1_prm_irqst_data = {
54 .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK,
55}; 58};
56 59
57struct omap_vp_instance_data omap3_vp1_data = { 60struct omap_vp_instance_data omap3_vp1_data = {
61 .id = OMAP3_VP_VDD_MPU_ID,
58 .vp_common = &omap3_vp_common, 62 .vp_common = &omap3_vp_common,
59 .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET, 63 .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET,
60 .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET, 64 .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET,
@@ -62,14 +66,10 @@ struct omap_vp_instance_data omap3_vp1_data = {
62 .vlimitto = OMAP3_PRM_VP1_VLIMITTO_OFFSET, 66 .vlimitto = OMAP3_PRM_VP1_VLIMITTO_OFFSET,
63 .vstatus = OMAP3_PRM_VP1_STATUS_OFFSET, 67 .vstatus = OMAP3_PRM_VP1_STATUS_OFFSET,
64 .voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET, 68 .voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET,
65 .prm_irqst_data = &omap3_vp1_prm_irqst_data,
66};
67
68static const struct omap_vp_prm_irqst_data omap3_vp2_prm_irqst_data = {
69 .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK,
70}; 69};
71 70
72struct omap_vp_instance_data omap3_vp2_data = { 71struct omap_vp_instance_data omap3_vp2_data = {
72 .id = OMAP3_VP_VDD_CORE_ID,
73 .vp_common = &omap3_vp_common, 73 .vp_common = &omap3_vp_common,
74 .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET, 74 .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET,
75 .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET, 75 .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET,
@@ -77,5 +77,4 @@ struct omap_vp_instance_data omap3_vp2_data = {
77 .vlimitto = OMAP3_PRM_VP2_VLIMITTO_OFFSET, 77 .vlimitto = OMAP3_PRM_VP2_VLIMITTO_OFFSET,
78 .vstatus = OMAP3_PRM_VP2_STATUS_OFFSET, 78 .vstatus = OMAP3_PRM_VP2_STATUS_OFFSET,
79 .voltage = OMAP3_PRM_VP2_VOLTAGE_OFFSET, 79 .voltage = OMAP3_PRM_VP2_VOLTAGE_OFFSET,
80 .prm_irqst_data = &omap3_vp2_prm_irqst_data,
81}; 80};
diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c
index 0957c24b1fa9..738ba04f5cf1 100644
--- a/arch/arm/mach-omap2/vp44xx_data.c
+++ b/arch/arm/mach-omap2/vp44xx_data.c
@@ -27,6 +27,11 @@
27 27
28#include "vp.h" 28#include "vp.h"
29 29
30static const struct omap_vp_ops omap4_vp_ops = {
31 .check_txdone = omap4_prm_vp_check_txdone,
32 .clear_txdone = omap4_prm_vp_clear_txdone,
33};
34
30/* 35/*
31 * VP data common to 44xx chips 36 * VP data common to 44xx chips
32 * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. 37 * XXX This stuff presumably belongs in the vp44xx.c or vp.c file.
@@ -49,13 +54,11 @@ static const struct omap_vp_common_data omap4_vp_common = {
49 .vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT, 54 .vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT,
50 .vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT, 55 .vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT,
51 .vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT, 56 .vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT,
52}; 57 .ops = &omap4_vp_ops,
53
54static const struct omap_vp_prm_irqst_data omap4_vp_mpu_prm_irqst_data = {
55 .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK,
56}; 58};
57 59
58struct omap_vp_instance_data omap4_vp_mpu_data = { 60struct omap_vp_instance_data omap4_vp_mpu_data = {
61 .id = OMAP4_VP_VDD_MPU_ID,
59 .vp_common = &omap4_vp_common, 62 .vp_common = &omap4_vp_common,
60 .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET, 63 .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET,
61 .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET, 64 .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET,
@@ -63,14 +66,10 @@ struct omap_vp_instance_data omap4_vp_mpu_data = {
63 .vlimitto = OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET, 66 .vlimitto = OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET,
64 .vstatus = OMAP4_PRM_VP_MPU_STATUS_OFFSET, 67 .vstatus = OMAP4_PRM_VP_MPU_STATUS_OFFSET,
65 .voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET, 68 .voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET,
66 .prm_irqst_data = &omap4_vp_mpu_prm_irqst_data,
67};
68
69static const struct omap_vp_prm_irqst_data omap4_vp_iva_prm_irqst_data = {
70 .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK,
71}; 69};
72 70
73struct omap_vp_instance_data omap4_vp_iva_data = { 71struct omap_vp_instance_data omap4_vp_iva_data = {
72 .id = OMAP4_VP_VDD_IVA_ID,
74 .vp_common = &omap4_vp_common, 73 .vp_common = &omap4_vp_common,
75 .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET, 74 .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET,
76 .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET, 75 .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET,
@@ -78,14 +77,10 @@ struct omap_vp_instance_data omap4_vp_iva_data = {
78 .vlimitto = OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET, 77 .vlimitto = OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET,
79 .vstatus = OMAP4_PRM_VP_IVA_STATUS_OFFSET, 78 .vstatus = OMAP4_PRM_VP_IVA_STATUS_OFFSET,
80 .voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET, 79 .voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET,
81 .prm_irqst_data = &omap4_vp_iva_prm_irqst_data,
82};
83
84static const struct omap_vp_prm_irqst_data omap4_vp_core_prm_irqst_data = {
85 .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK,
86}; 80};
87 81
88struct omap_vp_instance_data omap4_vp_core_data = { 82struct omap_vp_instance_data omap4_vp_core_data = {
83 .id = OMAP4_VP_VDD_CORE_ID,
89 .vp_common = &omap4_vp_common, 84 .vp_common = &omap4_vp_common,
90 .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET, 85 .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET,
91 .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET, 86 .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET,
@@ -93,6 +88,4 @@ struct omap_vp_instance_data omap4_vp_core_data = {
93 .vlimitto = OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET, 88 .vlimitto = OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET,
94 .vstatus = OMAP4_PRM_VP_CORE_STATUS_OFFSET, 89 .vstatus = OMAP4_PRM_VP_CORE_STATUS_OFFSET,
95 .voltage = OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET, 90 .voltage = OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET,
96 .prm_irqst_data = &omap4_vp_core_prm_irqst_data,
97}; 91};
98