aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
authorTomasz Figa <tomasz.figa@gmail.com>2013-06-18 13:22:22 -0400
committerKukjin Kim <kgene.kim@samsung.com>2013-06-18 13:22:22 -0400
commit5336539ab8c18c3e13d9cd020dd7a0b798dfb11d (patch)
treef9289e8ff7c6d1b73540b79989d0efad8cff7cf2 /arch/arm
parent76c1b8386b31aeda911afaf11f032006d403addf (diff)
ARM: S5P64X0: Use common uncompress.h part for plat-samsung
Since uart_base can be set dynamically in arch_detect_cpu(), there is no need to have a copy of all code locally, just to override UART base address. This patch removes any duplicate code in uncompress.h variant of s5p64x0 and implements proper arch_detect_cpu() function to initialize UART with SoC-specific parameters. While at it, replace hard-coded register address with macro. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/uncompress.h162
1 files changed, 6 insertions, 156 deletions
diff --git a/arch/arm/mach-s5p64x0/include/mach/uncompress.h b/arch/arm/mach-s5p64x0/include/mach/uncompress.h
index 19e0d64d78c5..bc04bd5d1a29 100644
--- a/arch/arm/mach-s5p64x0/include/mach/uncompress.h
+++ b/arch/arm/mach-s5p64x0/include/mach/uncompress.h
@@ -14,171 +14,21 @@
14#define __ASM_ARCH_UNCOMPRESS_H 14#define __ASM_ARCH_UNCOMPRESS_H
15 15
16#include <mach/map.h> 16#include <mach/map.h>
17#include <plat/uncompress.h>
17 18
18/* 19static void arch_detect_cpu(void)
19 * cannot use commonly <plat/uncompress.h>
20 * because uart base of S5P6440 and S5P6450 is different
21 */
22
23typedef unsigned int upf_t; /* cannot include linux/serial_core.h */
24
25/* uart setup */
26
27unsigned int fifo_mask;
28unsigned int fifo_max;
29
30/* forward declerations */
31
32static void arch_detect_cpu(void);
33
34/* defines for UART registers */
35
36#include <plat/regs-serial.h>
37#include <plat/regs-watchdog.h>
38
39/* working in physical space... */
40#undef S3C2410_WDOGREG
41#define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x)))
42
43/* how many bytes we allow into the FIFO at a time in FIFO mode */
44#define FIFO_MAX (14)
45
46unsigned long uart_base;
47
48static __inline__ void get_uart_base(void)
49{ 20{
50 unsigned int chipid; 21 unsigned int chipid;
51 22
52 chipid = *(const volatile unsigned int __force *) 0xE0100118; 23 chipid = *(const volatile unsigned int __force *) 0xE0100118;
53 24
54 uart_base = S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT;
55
56 if ((chipid & 0xff000) == 0x50000) 25 if ((chipid & 0xff000) == 0x50000)
57 uart_base += 0xEC800000; 26 uart_base = S5P6450_PA_UART(CONFIG_S3C_LOWLEVEL_UART_PORT);
58 else 27 else
59 uart_base += 0xEC000000; 28 uart_base = S5P6440_PA_UART(CONFIG_S3C_LOWLEVEL_UART_PORT);
60}
61
62static __inline__ void uart_wr(unsigned int reg, unsigned int val)
63{
64 volatile unsigned int *ptr;
65
66 get_uart_base();
67 ptr = (volatile unsigned int *)(reg + uart_base);
68 *ptr = val;
69}
70
71static __inline__ unsigned int uart_rd(unsigned int reg)
72{
73 volatile unsigned int *ptr;
74
75 get_uart_base();
76 ptr = (volatile unsigned int *)(reg + uart_base);
77 return *ptr;
78}
79
80/*
81 * we can deal with the case the UARTs are being run
82 * in FIFO mode, so that we don't hold up our execution
83 * waiting for tx to happen...
84 */
85
86static void putc(int ch)
87{
88 if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
89 int level;
90
91 while (1) {
92 level = uart_rd(S3C2410_UFSTAT);
93 level &= fifo_mask;
94
95 if (level < fifo_max)
96 break;
97 }
98
99 } else {
100 /* not using fifos */
101
102 while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE)
103 barrier();
104 }
105 29
106 /* write byte to transmission register */ 30 fifo_mask = S3C2440_UFSTAT_TXMASK;
107 uart_wr(S3C2410_UTXH, ch); 31 fifo_max = 63 << S3C2440_UFSTAT_TXSHIFT;
108}
109
110static inline void flush(void)
111{
112}
113
114#define __raw_writel(d, ad) \
115 do { \
116 *((volatile unsigned int __force *)(ad)) = (d); \
117 } while (0)
118
119
120#ifdef CONFIG_S3C_BOOT_ERROR_RESET
121
122static void arch_decomp_error(const char *x)
123{
124 putstr("\n\n");
125 putstr(x);
126 putstr("\n\n -- System resetting\n");
127
128 __raw_writel(0x4000, S3C2410_WTDAT);
129 __raw_writel(0x4000, S3C2410_WTCNT);
130 __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON);
131
132 while(1);
133}
134
135#define arch_error arch_decomp_error
136#endif
137
138#ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO
139static inline void arch_enable_uart_fifo(void)
140{
141 u32 fifocon = uart_rd(S3C2410_UFCON);
142
143 if (!(fifocon & S3C2410_UFCON_FIFOMODE)) {
144 fifocon |= S3C2410_UFCON_RESETBOTH;
145 uart_wr(S3C2410_UFCON, fifocon);
146
147 /* wait for fifo reset to complete */
148 while (1) {
149 fifocon = uart_rd(S3C2410_UFCON);
150 if (!(fifocon & S3C2410_UFCON_RESETBOTH))
151 break;
152 }
153 }
154}
155#else
156#define arch_enable_uart_fifo() do { } while(0)
157#endif
158
159static void arch_decomp_setup(void)
160{
161 /*
162 * we may need to setup the uart(s) here if we are not running
163 * on an BAST... the BAST will have left the uarts configured
164 * after calling linux.
165 */
166
167 arch_detect_cpu();
168
169 /*
170 * Enable the UART FIFOs if they where not enabled and our
171 * configuration says we should turn them on.
172 */
173
174 arch_enable_uart_fifo();
175}
176
177
178
179static void arch_detect_cpu(void)
180{
181 /* we do not need to do any cpu detection here at the moment. */
182} 32}
183 33
184#endif /* __ASM_ARCH_UNCOMPRESS_H */ 34#endif /* __ASM_ARCH_UNCOMPRESS_H */