aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
authorShawn Guo <shawn.guo@linaro.org>2012-08-02 10:48:39 -0400
committerShawn Guo <shawn.guo@linaro.org>2012-09-11 04:26:51 -0400
commit4bb6143cbee3c66c23a3f259b5e479608bed0831 (patch)
treeeeeb6aa29c9e98a5be09010777738dce09c9ed7a /arch/arm
parent5be03a7bdb0f7411465eb90b3b670e99e1aefbe5 (diff)
ARM: dts: imx53-ard: add pinctrl settings
Add pinctrl settings for the exsiting devices in imx53-ard.dts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/imx53-ard.dts49
-rw-r--r--arch/arm/boot/dts/imx53.dtsi22
2 files changed, 69 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts
index e6a189096017..4be76f223526 100644
--- a/arch/arm/boot/dts/imx53-ard.dts
+++ b/arch/arm/boot/dts/imx53-ard.dts
@@ -25,6 +25,8 @@
25 aips@50000000 { /* AIPS1 */ 25 aips@50000000 { /* AIPS1 */
26 spba@50000000 { 26 spba@50000000 {
27 esdhc@50004000 { /* ESDHC1 */ 27 esdhc@50004000 { /* ESDHC1 */
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_esdhc1_2>;
28 cd-gpios = <&gpio1 1 0>; 30 cd-gpios = <&gpio1 1 0>;
29 wp-gpios = <&gpio1 9 0>; 31 wp-gpios = <&gpio1 9 0>;
30 status = "okay"; 32 status = "okay";
@@ -32,11 +34,54 @@
32 }; 34 };
33 35
34 iomuxc@53fa8000 { 36 iomuxc@53fa8000 {
35 compatible = "fsl,imx53-iomuxc-ard"; 37 pinctrl-names = "default";
36 reg = <0x53fa8000 0x4000>; 38 pinctrl-0 = <&pinctrl_hog>;
39
40 hog {
41 pinctrl_hog: hoggrp {
42 fsl,pins = <
43 1077 0x80000000 /* MX53_PAD_GPIO_1__GPIO1_1 */
44 1085 0x80000000 /* MX53_PAD_GPIO_9__GPIO1_9 */
45 486 0x80000000 /* MX53_PAD_EIM_EB3__GPIO2_31 */
46 739 0x80000000 /* MX53_PAD_GPIO_10__GPIO4_0 */
47 218 0x80000000 /* MX53_PAD_DISP0_DAT16__GPIO5_10 */
48 226 0x80000000 /* MX53_PAD_DISP0_DAT17__GPIO5_11 */
49 233 0x80000000 /* MX53_PAD_DISP0_DAT18__GPIO5_12 */
50 241 0x80000000 /* MX53_PAD_DISP0_DAT19__GPIO5_13 */
51 429 0x80000000 /* MX53_PAD_EIM_D16__EMI_WEIM_D_16 */
52 435 0x80000000 /* MX53_PAD_EIM_D17__EMI_WEIM_D_17 */
53 441 0x80000000 /* MX53_PAD_EIM_D18__EMI_WEIM_D_18 */
54 448 0x80000000 /* MX53_PAD_EIM_D19__EMI_WEIM_D_19 */
55 456 0x80000000 /* MX53_PAD_EIM_D20__EMI_WEIM_D_20 */
56 464 0x80000000 /* MX53_PAD_EIM_D21__EMI_WEIM_D_21 */
57 471 0x80000000 /* MX53_PAD_EIM_D22__EMI_WEIM_D_22 */
58 477 0x80000000 /* MX53_PAD_EIM_D23__EMI_WEIM_D_23 */
59 492 0x80000000 /* MX53_PAD_EIM_D24__EMI_WEIM_D_24 */
60 500 0x80000000 /* MX53_PAD_EIM_D25__EMI_WEIM_D_25 */
61 508 0x80000000 /* MX53_PAD_EIM_D26__EMI_WEIM_D_26 */
62 516 0x80000000 /* MX53_PAD_EIM_D27__EMI_WEIM_D_27 */
63 524 0x80000000 /* MX53_PAD_EIM_D28__EMI_WEIM_D_28 */
64 532 0x80000000 /* MX53_PAD_EIM_D29__EMI_WEIM_D_29 */
65 540 0x80000000 /* MX53_PAD_EIM_D30__EMI_WEIM_D_30 */
66 548 0x80000000 /* MX53_PAD_EIM_D31__EMI_WEIM_D_31 */
67 637 0x80000000 /* MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 */
68 642 0x80000000 /* MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 */
69 647 0x80000000 /* MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 */
70 652 0x80000000 /* MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 */
71 657 0x80000000 /* MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 */
72 662 0x80000000 /* MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 */
73 667 0x80000000 /* MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 */
74 611 0x80000000 /* MX53_PAD_EIM_OE__EMI_WEIM_OE */
75 616 0x80000000 /* MX53_PAD_EIM_RW__EMI_WEIM_RW */
76 607 0x80000000 /* MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 */
77 >;
78 };
79 };
37 }; 80 };
38 81
39 uart1: serial@53fbc000 { 82 uart1: serial@53fbc000 {
83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_uart1_2>;
40 status = "okay"; 85 status = "okay";
41 }; 86 };
42 }; 87 };
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 01fa49abab6d..20b67bc5f70b 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -259,6 +259,21 @@
259 1018 0x1d5 /* MX53_PAD_SD1_CLK__ESDHC1_CLK */ 259 1018 0x1d5 /* MX53_PAD_SD1_CLK__ESDHC1_CLK */
260 >; 260 >;
261 }; 261 };
262
263 pinctrl_esdhc1_2: esdhc1grp-2 {
264 fsl,pins = <
265 995 0x1d5 /* MX53_PAD_SD1_DATA0__ESDHC1_DAT0 */
266 1000 0x1d5 /* MX53_PAD_SD1_DATA1__ESDHC1_DAT1 */
267 1010 0x1d5 /* MX53_PAD_SD1_DATA2__ESDHC1_DAT2 */
268 1024 0x1d5 /* MX53_PAD_SD1_DATA3__ESDHC1_DAT3 */
269 941 0x1d5 /* MX53_PAD_PATA_DATA8__ESDHC1_DAT4 */
270 948 0x1d5 /* MX53_PAD_PATA_DATA9__ESDHC1_DAT5 */
271 955 0x1d5 /* MX53_PAD_PATA_DATA10__ESDHC1_DAT6 */
272 962 0x1d5 /* MX53_PAD_PATA_DATA11__ESDHC1_DAT7 */
273 1005 0x1d5 /* MX53_PAD_SD1_CMD__ESDHC1_CMD */
274 1018 0x1d5 /* MX53_PAD_SD1_CLK__ESDHC1_CLK */
275 >;
276 };
262 }; 277 };
263 278
264 esdhc3 { 279 esdhc3 {
@@ -303,6 +318,13 @@
303 354 0x1c5 /* MX53_PAD_CSI0_DAT11__UART1_RXD_MUX */ 318 354 0x1c5 /* MX53_PAD_CSI0_DAT11__UART1_RXD_MUX */
304 >; 319 >;
305 }; 320 };
321
322 pinctrl_uart1_2: uart1grp-2 {
323 fsl,pins = <
324 828 0x1c5 /* MX53_PAD_PATA_DIOW__UART1_TXD_MUX */
325 832 0x1c5 /* MX53_PAD_PATA_DMACK__UART1_RXD_MUX */
326 >;
327 };
306 }; 328 };
307 }; 329 };
308 330