diff options
author | Jason Liu <jason.hui@linaro.org> | 2011-08-26 01:35:20 -0400 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2011-08-26 02:50:58 -0400 |
commit | 3f5492c51367ed7bf39eaf9f86ba5b4f8a27a111 (patch) | |
tree | 1ecd75bf67431b0a7063be235b9170b1eb1dbf7c /arch/arm | |
parent | d27536c6619221528114746317def345467a3e80 (diff) |
ARM: mx27: Print silicon revision on boot
Silicon revision is useful information to have during kernel boot.
Print the MX27 silicon revision.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-imx/clock-imx27.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-imx/cpu-imx27.c | 28 |
2 files changed, 15 insertions, 15 deletions
diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c index 6912b821b37b..e6b1beb4282c 100644 --- a/arch/arm/mach-imx/clock-imx27.c +++ b/arch/arm/mach-imx/clock-imx27.c | |||
@@ -751,6 +751,8 @@ int __init mx27_clocks_init(unsigned long fref) | |||
751 | clk_enable(&gpio_clk); | 751 | clk_enable(&gpio_clk); |
752 | clk_enable(&emi_clk); | 752 | clk_enable(&emi_clk); |
753 | clk_enable(&iim_clk); | 753 | clk_enable(&iim_clk); |
754 | imx_print_silicon_rev("i.MX27", mx27_revision()); | ||
755 | clk_disable(&iim_clk); | ||
754 | 756 | ||
755 | #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) | 757 | #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) |
756 | clk_enable(&uart1_clk); | 758 | clk_enable(&uart1_clk); |
diff --git a/arch/arm/mach-imx/cpu-imx27.c b/arch/arm/mach-imx/cpu-imx27.c index 3b117be37bd2..ff38e1505f67 100644 --- a/arch/arm/mach-imx/cpu-imx27.c +++ b/arch/arm/mach-imx/cpu-imx27.c | |||
@@ -26,12 +26,12 @@ | |||
26 | 26 | ||
27 | #include <mach/hardware.h> | 27 | #include <mach/hardware.h> |
28 | 28 | ||
29 | static int cpu_silicon_rev = -1; | 29 | static int mx27_cpu_rev = -1; |
30 | static int cpu_partnumber; | 30 | static int mx27_cpu_partnumber; |
31 | 31 | ||
32 | #define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */ | 32 | #define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */ |
33 | 33 | ||
34 | static void query_silicon_parameter(void) | 34 | static int mx27_read_cpu_rev(void) |
35 | { | 35 | { |
36 | u32 val; | 36 | u32 val; |
37 | /* | 37 | /* |
@@ -42,20 +42,18 @@ static void query_silicon_parameter(void) | |||
42 | val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR | 42 | val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR |
43 | + SYS_CHIP_ID)); | 43 | + SYS_CHIP_ID)); |
44 | 44 | ||
45 | mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF); | ||
46 | |||
45 | switch (val >> 28) { | 47 | switch (val >> 28) { |
46 | case 0: | 48 | case 0: |
47 | cpu_silicon_rev = IMX_CHIP_REVISION_1_0; | 49 | return IMX_CHIP_REVISION_1_0; |
48 | break; | ||
49 | case 1: | 50 | case 1: |
50 | cpu_silicon_rev = IMX_CHIP_REVISION_2_0; | 51 | return IMX_CHIP_REVISION_2_0; |
51 | break; | ||
52 | case 2: | 52 | case 2: |
53 | cpu_silicon_rev = IMX_CHIP_REVISION_2_1; | 53 | return IMX_CHIP_REVISION_2_1; |
54 | break; | ||
55 | default: | 54 | default: |
56 | cpu_silicon_rev = IMX_CHIP_REVISION_UNKNOWN; | 55 | return IMX_CHIP_REVISION_UNKNOWN; |
57 | } | 56 | } |
58 | cpu_partnumber = (int)((val >> 12) & 0xFFFF); | ||
59 | } | 57 | } |
60 | 58 | ||
61 | /* | 59 | /* |
@@ -65,12 +63,12 @@ static void query_silicon_parameter(void) | |||
65 | */ | 63 | */ |
66 | int mx27_revision(void) | 64 | int mx27_revision(void) |
67 | { | 65 | { |
68 | if (cpu_silicon_rev == -1) | 66 | if (mx27_cpu_rev == -1) |
69 | query_silicon_parameter(); | 67 | mx27_cpu_rev = mx27_read_cpu_rev(); |
70 | 68 | ||
71 | if (cpu_partnumber != 0x8821) | 69 | if (mx27_cpu_partnumber != 0x8821) |
72 | return -EINVAL; | 70 | return -EINVAL; |
73 | 71 | ||
74 | return cpu_silicon_rev; | 72 | return mx27_cpu_rev; |
75 | } | 73 | } |
76 | EXPORT_SYMBOL(mx27_revision); | 74 | EXPORT_SYMBOL(mx27_revision); |