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authorOlof Johansson <olof@lixom.net>2013-06-14 20:45:39 -0400
committerOlof Johansson <olof@lixom.net>2013-06-14 20:45:39 -0400
commit38d77ff90a47d198d2fd3ebd766ee84eaa71a0d2 (patch)
tree7adc209e84f7c45fba521d3430350d8a70ac4a75 /arch/arm
parent2c3165ebb641e0ff3faf1c87ed1c8fbd85871da0 (diff)
parent159f8a0209aff155af7f6fcdedd4a4484dd19c23 (diff)
Merge tag 'renesas-gpio-rcar-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
From Simon Horman: Renesas ARM based SoC GPIO R-Car updates for v3.11 DT support to GPIO R-Car driver by Laurent Pinchart. * tag 'renesas-gpio-rcar-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (131 commits) gpio-rcar: Add DT support
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/mach-shmobile/Kconfig1
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c132
-rw-r--r--arch/arm/mach-shmobile/board-armadillo800eva.c116
-rw-r--r--arch/arm/mach-shmobile/board-bockw.c13
-rw-r--r--arch/arm/mach-shmobile/board-bonito.c47
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g-reference.c1
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g.c11
-rw-r--r--arch/arm/mach-shmobile/board-lager.c15
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c171
-rw-r--r--arch/arm/mach-shmobile/board-marzen.c7
-rw-r--r--arch/arm/mach-shmobile/include/mach/irqs.h5
-rw-r--r--arch/arm/mach-shmobile/include/mach/r8a7740.h488
-rw-r--r--arch/arm/mach-shmobile/include/mach/r8a7778.h1
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh7372.h391
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7740.c24
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7778.c47
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7779.c17
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7790.c36
19 files changed, 334 insertions, 1191 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0574901dd744..4dff801c22eb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -645,7 +645,7 @@ config ARCH_SHMOBILE
645 select MULTI_IRQ_HANDLER 645 select MULTI_IRQ_HANDLER
646 select NEED_MACH_MEMORY_H 646 select NEED_MACH_MEMORY_H
647 select NO_IOPORT 647 select NO_IOPORT
648 select PINCTRL if ARCH_WANT_OPTIONAL_GPIOLIB 648 select PINCTRL
649 select PM_GENERIC_DOMAINS if PM 649 select PM_GENERIC_DOMAINS if PM
650 select SPARSE_IRQ 650 select SPARSE_IRQ
651 help 651 help
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 1a517e2fe449..06da4d36bc7c 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -37,6 +37,7 @@ config ARCH_R8A7740
37 37
38config ARCH_R8A7778 38config ARCH_R8A7778
39 bool "R-Car M1 (R8A77780)" 39 bool "R-Car M1 (R8A77780)"
40 select ARCH_WANT_OPTIONAL_GPIOLIB
40 select CPU_V7 41 select CPU_V7
41 select SH_CLK_CPG 42 select SH_CLK_CPG
42 select ARM_GIC 43 select ARM_GIC
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 45f78cadec1d..297bf5eec5ab 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -1026,10 +1026,8 @@ out:
1026 1026
1027/* TouchScreen */ 1027/* TouchScreen */
1028#ifdef CONFIG_AP4EVB_QHD 1028#ifdef CONFIG_AP4EVB_QHD
1029# define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
1030# define GPIO_TSC_PORT 123 1029# define GPIO_TSC_PORT 123
1031#else /* WVGA */ 1030#else /* WVGA */
1032# define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
1033# define GPIO_TSC_PORT 40 1031# define GPIO_TSC_PORT 40
1034#endif 1032#endif
1035 1033
@@ -1037,22 +1035,12 @@ out:
1037#define IRQ7 evt2irq(0x02e0) /* IRQ7A */ 1035#define IRQ7 evt2irq(0x02e0) /* IRQ7A */
1038static int ts_get_pendown_state(void) 1036static int ts_get_pendown_state(void)
1039{ 1037{
1040 int val; 1038 return !gpio_get_value(GPIO_TSC_PORT);
1041
1042 gpio_free(GPIO_TSC_IRQ);
1043
1044 gpio_request_one(GPIO_TSC_PORT, GPIOF_IN, NULL);
1045
1046 val = gpio_get_value(GPIO_TSC_PORT);
1047
1048 gpio_request(GPIO_TSC_IRQ, NULL);
1049
1050 return !val;
1051} 1039}
1052 1040
1053static int ts_init(void) 1041static int ts_init(void)
1054{ 1042{
1055 gpio_request(GPIO_TSC_IRQ, NULL); 1043 gpio_request_one(GPIO_TSC_PORT, GPIOF_IN, NULL);
1056 1044
1057 return 0; 1045 return 0;
1058} 1046}
@@ -1086,11 +1074,42 @@ static struct i2c_board_info i2c1_devices[] = {
1086 1074
1087 1075
1088static const struct pinctrl_map ap4evb_pinctrl_map[] = { 1076static const struct pinctrl_map ap4evb_pinctrl_map[] = {
1077 /* CEU */
1078 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
1079 "ceu_clk_0", "ceu"),
1080 /* FSIA (AK4643) */
1081 PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
1082 "fsia_sclk_in", "fsia"),
1083 PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
1084 "fsia_data_in", "fsia"),
1085 PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
1086 "fsia_data_out", "fsia"),
1087 /* FSIB (HDMI) */
1088 PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-sh7372",
1089 "fsib_mclk_in", "fsib"),
1090 /* HDMI */
1091 PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-sh7372",
1092 "hdmi", "hdmi"),
1093 /* KEYSC */
1094 PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc", "pfc-sh7372",
1095 "keysc_in04_0", "keysc"),
1096 PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc", "pfc-sh7372",
1097 "keysc_out5", "keysc"),
1098#ifndef CONFIG_AP4EVB_QHD
1099 /* LCDC */
1100 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh7372",
1101 "lcd_data18", "lcd"),
1102 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh7372",
1103 "lcd_sync", "lcd"),
1104#endif
1089 /* MMCIF */ 1105 /* MMCIF */
1090 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372", 1106 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
1091 "mmc0_data8_0", "mmc0"), 1107 "mmc0_data8_0", "mmc0"),
1092 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372", 1108 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
1093 "mmc0_ctrl_0", "mmc0"), 1109 "mmc0_ctrl_0", "mmc0"),
1110 /* SCIFA0 */
1111 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-sh7372",
1112 "scifa0_data", "scifa0"),
1094 /* SDHI0 */ 1113 /* SDHI0 */
1095 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372", 1114 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
1096 "sdhi0_data4", "sdhi0"), 1115 "sdhi0_data4", "sdhi0"),
@@ -1105,6 +1124,26 @@ static const struct pinctrl_map ap4evb_pinctrl_map[] = {
1105 "sdhi1_data4", "sdhi1"), 1124 "sdhi1_data4", "sdhi1"),
1106 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372", 1125 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372",
1107 "sdhi1_ctrl", "sdhi1"), 1126 "sdhi1_ctrl", "sdhi1"),
1127 /* SMSC911X */
1128 PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-sh7372",
1129 "bsc_cs5a", "bsc"),
1130 PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-sh7372",
1131 "intc_irq6_0", "intc"),
1132 /* TSC2007 */
1133#ifdef CONFIG_AP4EVB_QHD
1134 PIN_MAP_MUX_GROUP_DEFAULT("1-0048", "pfc-sh7372",
1135 "intc_irq28_0", "intc"),
1136#else /* WVGA */
1137 PIN_MAP_MUX_GROUP_DEFAULT("1-0048", "pfc-sh7372",
1138 "intc_irq7_0", "intc"),
1139#endif
1140 /* USBHS1 */
1141 PIN_MAP_MUX_GROUP_DEFAULT("r8a66597_hcd.1", "pfc-sh7372",
1142 "usb1_vbus", "usb1"),
1143 PIN_MAP_MUX_GROUP_DEFAULT("r8a66597_hcd.1", "pfc-sh7372",
1144 "usb1_otg_id_0", "usb1"),
1145 PIN_MAP_MUX_GROUP_DEFAULT("r8a66597_hcd.1", "pfc-sh7372",
1146 "usb1_otg_ctrl_0", "usb1"),
1108}; 1147};
1109 1148
1110#define GPIO_PORT9CR IOMEM(0xE6051009) 1149#define GPIO_PORT9CR IOMEM(0xE6051009)
@@ -1137,36 +1176,16 @@ static void __init ap4evb_init(void)
1137 ARRAY_SIZE(ap4evb_pinctrl_map)); 1176 ARRAY_SIZE(ap4evb_pinctrl_map));
1138 sh7372_pinmux_init(); 1177 sh7372_pinmux_init();
1139 1178
1140 /* enable SCIFA0 */
1141 gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
1142 gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
1143
1144 /* enable SMSC911X */
1145 gpio_request(GPIO_FN_CS5A, NULL);
1146 gpio_request(GPIO_FN_IRQ6_39, NULL);
1147
1148 /* enable Debug switch (S6) */ 1179 /* enable Debug switch (S6) */
1149 gpio_request_one(32, GPIOF_IN | GPIOF_EXPORT, NULL); 1180 gpio_request_one(32, GPIOF_IN | GPIOF_EXPORT, NULL);
1150 gpio_request_one(33, GPIOF_IN | GPIOF_EXPORT, NULL); 1181 gpio_request_one(33, GPIOF_IN | GPIOF_EXPORT, NULL);
1151 gpio_request_one(34, GPIOF_IN | GPIOF_EXPORT, NULL); 1182 gpio_request_one(34, GPIOF_IN | GPIOF_EXPORT, NULL);
1152 gpio_request_one(35, GPIOF_IN | GPIOF_EXPORT, NULL); 1183 gpio_request_one(35, GPIOF_IN | GPIOF_EXPORT, NULL);
1153 1184
1154 /* USB enable */
1155 gpio_request(GPIO_FN_VBUS0_1, NULL);
1156 gpio_request(GPIO_FN_IDIN_1_18, NULL);
1157 gpio_request(GPIO_FN_PWEN_1_115, NULL);
1158 gpio_request(GPIO_FN_OVCN_1_114, NULL);
1159 gpio_request(GPIO_FN_EXTLP_1, NULL);
1160 gpio_request(GPIO_FN_OVCN2_1, NULL);
1161
1162 /* setup USB phy */ 1185 /* setup USB phy */
1163 __raw_writew(0x8a0a, IOMEM(0xE6058130)); /* USBCR4 */ 1186 __raw_writew(0x8a0a, IOMEM(0xE6058130)); /* USBCR4 */
1164 1187
1165 /* enable FSI2 port A (ak4643) */ 1188 /* FSI2 port A (ak4643) */
1166 gpio_request(GPIO_FN_FSIAIBT, NULL);
1167 gpio_request(GPIO_FN_FSIAILR, NULL);
1168 gpio_request(GPIO_FN_FSIAISLD, NULL);
1169 gpio_request(GPIO_FN_FSIAOSLD, NULL);
1170 gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */ 1189 gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
1171 1190
1172 gpio_request(9, NULL); 1191 gpio_request(9, NULL);
@@ -1177,8 +1196,7 @@ static void __init ap4evb_init(void)
1177 /* card detect pin for MMC slot (CN7) */ 1196 /* card detect pin for MMC slot (CN7) */
1178 gpio_request_one(41, GPIOF_IN, NULL); 1197 gpio_request_one(41, GPIOF_IN, NULL);
1179 1198
1180 /* setup FSI2 port B (HDMI) */ 1199 /* FSI2 port B (HDMI) */
1181 gpio_request(GPIO_FN_FSIBCK, NULL);
1182 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */ 1200 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1183 1201
1184 /* set SPU2 clock to 119.6 MHz */ 1202 /* set SPU2 clock to 119.6 MHz */
@@ -1208,18 +1226,6 @@ static void __init ap4evb_init(void)
1208 * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON. 1226 * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
1209 */ 1227 */
1210 1228
1211 /* enable KEYSC */
1212 gpio_request(GPIO_FN_KEYOUT0, NULL);
1213 gpio_request(GPIO_FN_KEYOUT1, NULL);
1214 gpio_request(GPIO_FN_KEYOUT2, NULL);
1215 gpio_request(GPIO_FN_KEYOUT3, NULL);
1216 gpio_request(GPIO_FN_KEYOUT4, NULL);
1217 gpio_request(GPIO_FN_KEYIN0_136, NULL);
1218 gpio_request(GPIO_FN_KEYIN1_135, NULL);
1219 gpio_request(GPIO_FN_KEYIN2_134, NULL);
1220 gpio_request(GPIO_FN_KEYIN3_133, NULL);
1221 gpio_request(GPIO_FN_KEYIN4, NULL);
1222
1223 /* enable TouchScreen */ 1229 /* enable TouchScreen */
1224 irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW); 1230 irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
1225 1231
@@ -1241,28 +1247,6 @@ static void __init ap4evb_init(void)
1241 * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and 1247 * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
1242 * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF. 1248 * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
1243 */ 1249 */
1244
1245 gpio_request(GPIO_FN_LCDD17, NULL);
1246 gpio_request(GPIO_FN_LCDD16, NULL);
1247 gpio_request(GPIO_FN_LCDD15, NULL);
1248 gpio_request(GPIO_FN_LCDD14, NULL);
1249 gpio_request(GPIO_FN_LCDD13, NULL);
1250 gpio_request(GPIO_FN_LCDD12, NULL);
1251 gpio_request(GPIO_FN_LCDD11, NULL);
1252 gpio_request(GPIO_FN_LCDD10, NULL);
1253 gpio_request(GPIO_FN_LCDD9, NULL);
1254 gpio_request(GPIO_FN_LCDD8, NULL);
1255 gpio_request(GPIO_FN_LCDD7, NULL);
1256 gpio_request(GPIO_FN_LCDD6, NULL);
1257 gpio_request(GPIO_FN_LCDD5, NULL);
1258 gpio_request(GPIO_FN_LCDD4, NULL);
1259 gpio_request(GPIO_FN_LCDD3, NULL);
1260 gpio_request(GPIO_FN_LCDD2, NULL);
1261 gpio_request(GPIO_FN_LCDD1, NULL);
1262 gpio_request(GPIO_FN_LCDD0, NULL);
1263 gpio_request(GPIO_FN_LCDDISP, NULL);
1264 gpio_request(GPIO_FN_LCDDCK, NULL);
1265
1266 gpio_request_one(189, GPIOF_OUT_INIT_HIGH, NULL); /* backlight */ 1250 gpio_request_one(189, GPIOF_OUT_INIT_HIGH, NULL); /* backlight */
1267 gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */ 1251 gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
1268 1252
@@ -1288,8 +1272,6 @@ static void __init ap4evb_init(void)
1288 */ 1272 */
1289 1273
1290 /* MIPI-CSI stuff */ 1274 /* MIPI-CSI stuff */
1291 gpio_request(GPIO_FN_VIO_CKO, NULL);
1292
1293 clk = clk_get(NULL, "vck1_clk"); 1275 clk = clk_get(NULL, "vck1_clk");
1294 if (!IS_ERR(clk)) { 1276 if (!IS_ERR(clk)) {
1295 clk_set_rate(clk, clk_round_rate(clk, 13000000)); 1277 clk_set_rate(clk, clk_round_rate(clk, 13000000));
@@ -1299,10 +1281,6 @@ static void __init ap4evb_init(void)
1299 1281
1300 sh7372_add_standard_devices(); 1282 sh7372_add_standard_devices();
1301 1283
1302 /* HDMI */
1303 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1304 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1305
1306 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */ 1284 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1307#define SRCR4 IOMEM(0xe61580bc) 1285#define SRCR4 IOMEM(0xe61580bc)
1308 srcr4 = __raw_readl(SRCR4); 1286 srcr4 = __raw_readl(SRCR4);
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index b85b2882dbd0..44a621505eeb 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -584,7 +584,7 @@ static struct regulator_init_data vcc_sdhi0_init_data = {
584static struct fixed_voltage_config vcc_sdhi0_info = { 584static struct fixed_voltage_config vcc_sdhi0_info = {
585 .supply_name = "SDHI0 Vcc", 585 .supply_name = "SDHI0 Vcc",
586 .microvolts = 3300000, 586 .microvolts = 3300000,
587 .gpio = GPIO_PORT75, 587 .gpio = 75,
588 .enable_high = 1, 588 .enable_high = 1,
589 .init_data = &vcc_sdhi0_init_data, 589 .init_data = &vcc_sdhi0_init_data,
590}; 590};
@@ -615,7 +615,7 @@ static struct regulator_init_data vccq_sdhi0_init_data = {
615}; 615};
616 616
617static struct gpio vccq_sdhi0_gpios[] = { 617static struct gpio vccq_sdhi0_gpios[] = {
618 {GPIO_PORT17, GPIOF_OUT_INIT_LOW, "vccq-sdhi0" }, 618 {17, GPIOF_OUT_INIT_LOW, "vccq-sdhi0" },
619}; 619};
620 620
621static struct gpio_regulator_state vccq_sdhi0_states[] = { 621static struct gpio_regulator_state vccq_sdhi0_states[] = {
@@ -626,7 +626,7 @@ static struct gpio_regulator_state vccq_sdhi0_states[] = {
626static struct gpio_regulator_config vccq_sdhi0_info = { 626static struct gpio_regulator_config vccq_sdhi0_info = {
627 .supply_name = "vqmmc", 627 .supply_name = "vqmmc",
628 628
629 .enable_gpio = GPIO_PORT74, 629 .enable_gpio = 74,
630 .enable_high = 1, 630 .enable_high = 1,
631 .enabled_at_boot = 0, 631 .enabled_at_boot = 0,
632 632
@@ -664,7 +664,7 @@ static struct regulator_init_data vcc_sdhi1_init_data = {
664static struct fixed_voltage_config vcc_sdhi1_info = { 664static struct fixed_voltage_config vcc_sdhi1_info = {
665 .supply_name = "SDHI1 Vcc", 665 .supply_name = "SDHI1 Vcc",
666 .microvolts = 3300000, 666 .microvolts = 3300000,
667 .gpio = GPIO_PORT16, 667 .gpio = 16,
668 .enable_high = 1, 668 .enable_high = 1,
669 .init_data = &vcc_sdhi1_init_data, 669 .init_data = &vcc_sdhi1_init_data,
670}; 670};
@@ -693,7 +693,7 @@ static struct sh_mobile_sdhi_info sdhi0_info = {
693 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | 693 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
694 MMC_CAP_POWER_OFF_CARD, 694 MMC_CAP_POWER_OFF_CARD,
695 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD, 695 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD,
696 .cd_gpio = GPIO_PORT167, 696 .cd_gpio = 167,
697}; 697};
698 698
699static struct resource sdhi0_resources[] = { 699static struct resource sdhi0_resources[] = {
@@ -736,7 +736,7 @@ static struct sh_mobile_sdhi_info sdhi1_info = {
736 MMC_CAP_POWER_OFF_CARD, 736 MMC_CAP_POWER_OFF_CARD,
737 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD, 737 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD,
738 /* Port72 cannot generate IRQs, will be used in polling mode. */ 738 /* Port72 cannot generate IRQs, will be used in polling mode. */
739 .cd_gpio = GPIO_PORT72, 739 .cd_gpio = 72,
740}; 740};
741 741
742static struct resource sdhi1_resources[] = { 742static struct resource sdhi1_resources[] = {
@@ -1046,6 +1046,35 @@ static struct platform_device *eva_devices[] __initdata = {
1046}; 1046};
1047 1047
1048static const struct pinctrl_map eva_pinctrl_map[] = { 1048static const struct pinctrl_map eva_pinctrl_map[] = {
1049 /* CEU0 */
1050 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-r8a7740",
1051 "ceu0_data_0_7", "ceu0"),
1052 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-r8a7740",
1053 "ceu0_clk_0", "ceu0"),
1054 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-r8a7740",
1055 "ceu0_sync", "ceu0"),
1056 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-r8a7740",
1057 "ceu0_field", "ceu0"),
1058 /* FSIA */
1059 PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-r8a7740",
1060 "fsia_sclk_in", "fsia"),
1061 PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-r8a7740",
1062 "fsia_mclk_out", "fsia"),
1063 PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-r8a7740",
1064 "fsia_data_in_1", "fsia"),
1065 PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-r8a7740",
1066 "fsia_data_out_0", "fsia"),
1067 /* FSIB */
1068 PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-r8a7740",
1069 "fsib_mclk_in", "fsib"),
1070 /* GETHER */
1071 PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
1072 "gether_mii", "gether"),
1073 PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
1074 "gether_int", "gether"),
1075 /* HDMI */
1076 PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-r8a7740",
1077 "hdmi", "hdmi"),
1049 /* LCD0 */ 1078 /* LCD0 */
1050 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740", 1079 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740",
1051 "lcd0_data24_0", "lcd0"), 1080 "lcd0_data24_0", "lcd0"),
@@ -1058,6 +1087,9 @@ static const struct pinctrl_map eva_pinctrl_map[] = {
1058 "mmc0_data8_1", "mmc0"), 1087 "mmc0_data8_1", "mmc0"),
1059 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-r8a7740", 1088 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-r8a7740",
1060 "mmc0_ctrl_1", "mmc0"), 1089 "mmc0_ctrl_1", "mmc0"),
1090 /* SCIFA1 */
1091 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.1", "pfc-r8a7740",
1092 "scifa1_data", "scifa1"),
1061 /* SDHI0 */ 1093 /* SDHI0 */
1062 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7740", 1094 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7740",
1063 "sdhi0_data4", "sdhi0"), 1095 "sdhi0_data4", "sdhi0"),
@@ -1065,6 +1097,12 @@ static const struct pinctrl_map eva_pinctrl_map[] = {
1065 "sdhi0_ctrl", "sdhi0"), 1097 "sdhi0_ctrl", "sdhi0"),
1066 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7740", 1098 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7740",
1067 "sdhi0_wp", "sdhi0"), 1099 "sdhi0_wp", "sdhi0"),
1100 /* ST1232 */
1101 PIN_MAP_MUX_GROUP_DEFAULT("0-0055", "pfc-r8a7740",
1102 "intc_irq10", "intc"),
1103 /* USBHS */
1104 PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7740",
1105 "intc_irq7_1", "intc"),
1068}; 1106};
1069 1107
1070static void __init eva_clock_init(void) 1108static void __init eva_clock_init(void)
@@ -1119,40 +1157,14 @@ static void __init eva_init(void)
1119 r8a7740_pinmux_init(); 1157 r8a7740_pinmux_init();
1120 r8a7740_meram_workaround(); 1158 r8a7740_meram_workaround();
1121 1159
1122 /* SCIFA1 */
1123 gpio_request(GPIO_FN_SCIFA1_RXD, NULL);
1124 gpio_request(GPIO_FN_SCIFA1_TXD, NULL);
1125
1126 /* LCDC0 */ 1160 /* LCDC0 */
1127 gpio_request(GPIO_FN_LCDC0_SELECT, NULL);
1128
1129 gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */ 1161 gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
1130 gpio_request_one(202, GPIOF_OUT_INIT_LOW, NULL); /* LCD0_LED_CONT */ 1162 gpio_request_one(202, GPIOF_OUT_INIT_LOW, NULL); /* LCD0_LED_CONT */
1131 1163
1132 /* Touchscreen */ 1164 /* Touchscreen */
1133 gpio_request(GPIO_FN_IRQ10, NULL); /* TP_INT */ 1165 gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */
1134 1166
1135 /* GETHER */ 1167 /* GETHER */
1136 gpio_request(GPIO_FN_ET_CRS, NULL);
1137 gpio_request(GPIO_FN_ET_MDC, NULL);
1138 gpio_request(GPIO_FN_ET_MDIO, NULL);
1139 gpio_request(GPIO_FN_ET_TX_ER, NULL);
1140 gpio_request(GPIO_FN_ET_RX_ER, NULL);
1141 gpio_request(GPIO_FN_ET_ERXD0, NULL);
1142 gpio_request(GPIO_FN_ET_ERXD1, NULL);
1143 gpio_request(GPIO_FN_ET_ERXD2, NULL);
1144 gpio_request(GPIO_FN_ET_ERXD3, NULL);
1145 gpio_request(GPIO_FN_ET_TX_CLK, NULL);
1146 gpio_request(GPIO_FN_ET_TX_EN, NULL);
1147 gpio_request(GPIO_FN_ET_ETXD0, NULL);
1148 gpio_request(GPIO_FN_ET_ETXD1, NULL);
1149 gpio_request(GPIO_FN_ET_ETXD2, NULL);
1150 gpio_request(GPIO_FN_ET_ETXD3, NULL);
1151 gpio_request(GPIO_FN_ET_PHY_INT, NULL);
1152 gpio_request(GPIO_FN_ET_COL, NULL);
1153 gpio_request(GPIO_FN_ET_RX_DV, NULL);
1154 gpio_request(GPIO_FN_ET_RX_CLK, NULL);
1155
1156 gpio_request_one(18, GPIOF_OUT_INIT_HIGH, NULL); /* PHY_RST */ 1168 gpio_request_one(18, GPIOF_OUT_INIT_HIGH, NULL); /* PHY_RST */
1157 1169
1158 /* USB */ 1170 /* USB */
@@ -1163,34 +1175,17 @@ static void __init eva_init(void)
1163 } else { 1175 } else {
1164 /* USB Func */ 1176 /* USB Func */
1165 /* 1177 /*
1166 * A1 chip has 2 IRQ7 pin and it was controled by MSEL register. 1178 * The USBHS interrupt handlers needs to read the IRQ pin value
1167 * OTOH, usbhs interrupt needs its value (HI/LOW) to decide 1179 * (HI/LOW) to diffentiate USB connection and disconnection
1168 * USB connection/disconnection (usbhsf_get_vbus()). 1180 * events (usbhsf_get_vbus()). We thus need to select both the
1169 * This means we needs to select GPIO_FN_IRQ7_PORT209 first, 1181 * intc_irq7_1 pin group and GPIO 209 here.
1170 * and select GPIO 209 here
1171 */ 1182 */
1172 gpio_request(GPIO_FN_IRQ7_PORT209, NULL);
1173 gpio_request_one(209, GPIOF_IN, NULL); 1183 gpio_request_one(209, GPIOF_IN, NULL);
1174 1184
1175 platform_device_register(&usbhsf_device); 1185 platform_device_register(&usbhsf_device);
1176 usb = &usbhsf_device; 1186 usb = &usbhsf_device;
1177 } 1187 }
1178 1188
1179 /* CEU0 */
1180 gpio_request(GPIO_FN_VIO0_D7, NULL);
1181 gpio_request(GPIO_FN_VIO0_D6, NULL);
1182 gpio_request(GPIO_FN_VIO0_D5, NULL);
1183 gpio_request(GPIO_FN_VIO0_D4, NULL);
1184 gpio_request(GPIO_FN_VIO0_D3, NULL);
1185 gpio_request(GPIO_FN_VIO0_D2, NULL);
1186 gpio_request(GPIO_FN_VIO0_D1, NULL);
1187 gpio_request(GPIO_FN_VIO0_D0, NULL);
1188 gpio_request(GPIO_FN_VIO0_CLK, NULL);
1189 gpio_request(GPIO_FN_VIO0_HD, NULL);
1190 gpio_request(GPIO_FN_VIO0_VD, NULL);
1191 gpio_request(GPIO_FN_VIO0_FIELD, NULL);
1192 gpio_request(GPIO_FN_VIO_CKO, NULL);
1193
1194 /* CON1/CON15 Camera */ 1189 /* CON1/CON15 Camera */
1195 gpio_request_one(173, GPIOF_OUT_INIT_LOW, NULL); /* STANDBY */ 1190 gpio_request_one(173, GPIOF_OUT_INIT_LOW, NULL); /* STANDBY */
1196 gpio_request_one(172, GPIOF_OUT_INIT_HIGH, NULL); /* RST */ 1191 gpio_request_one(172, GPIOF_OUT_INIT_HIGH, NULL); /* RST */
@@ -1198,24 +1193,11 @@ static void __init eva_init(void)
1198 gpio_request_one(158, GPIOF_OUT_INIT_LOW, NULL); /* CAM_PON */ 1193 gpio_request_one(158, GPIOF_OUT_INIT_LOW, NULL); /* CAM_PON */
1199 1194
1200 /* FSI-WM8978 */ 1195 /* FSI-WM8978 */
1201 gpio_request(GPIO_FN_FSIAIBT, NULL);
1202 gpio_request(GPIO_FN_FSIAILR, NULL);
1203 gpio_request(GPIO_FN_FSIAOMC, NULL);
1204 gpio_request(GPIO_FN_FSIAOSLD, NULL);
1205 gpio_request(GPIO_FN_FSIAISLD_PORT5, NULL);
1206
1207 gpio_request(7, NULL); 1196 gpio_request(7, NULL);
1208 gpio_request(8, NULL); 1197 gpio_request(8, NULL);
1209 gpio_direction_none(GPIO_PORT7CR); /* FSIAOBT needs no direction */ 1198 gpio_direction_none(GPIO_PORT7CR); /* FSIAOBT needs no direction */
1210 gpio_direction_none(GPIO_PORT8CR); /* FSIAOLR needs no direction */ 1199 gpio_direction_none(GPIO_PORT8CR); /* FSIAOLR needs no direction */
1211 1200
1212 /* FSI-HDMI */
1213 gpio_request(GPIO_FN_FSIBCK, NULL);
1214
1215 /* HDMI */
1216 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1217 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1218
1219 /* 1201 /*
1220 * CAUTION 1202 * CAUTION
1221 * 1203 *
diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
index 38e5e50fb318..dac4365c5158 100644
--- a/arch/arm/mach-shmobile/board-bockw.c
+++ b/arch/arm/mach-shmobile/board-bockw.c
@@ -18,6 +18,7 @@
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */ 19 */
20 20
21#include <linux/pinctrl/machine.h>
21#include <linux/platform_device.h> 22#include <linux/platform_device.h>
22#include <linux/smsc911x.h> 23#include <linux/smsc911x.h>
23#include <mach/common.h> 24#include <mach/common.h>
@@ -37,6 +38,14 @@ static struct resource smsc911x_resources[] = {
37 DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */ 38 DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
38}; 39};
39 40
41static const struct pinctrl_map bockw_pinctrl_map[] = {
42 /* SCIF0 */
43 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
44 "scif0_data_a", "scif0"),
45 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
46 "scif0_ctrl", "scif0"),
47};
48
40#define IRQ0MR 0x30 49#define IRQ0MR 0x30
41static void __init bockw_init(void) 50static void __init bockw_init(void)
42{ 51{
@@ -46,6 +55,10 @@ static void __init bockw_init(void)
46 r8a7778_init_irq_extpin(1); 55 r8a7778_init_irq_extpin(1);
47 r8a7778_add_standard_devices(); 56 r8a7778_add_standard_devices();
48 57
58 pinctrl_register_mappings(bockw_pinctrl_map,
59 ARRAY_SIZE(bockw_pinctrl_map));
60 r8a7778_pinmux_init();
61
49 fpga = ioremap_nocache(0x18200000, SZ_1M); 62 fpga = ioremap_nocache(0x18200000, SZ_1M);
50 if (fpga) { 63 if (fpga) {
51 /* 64 /*
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
index 70d992c540ae..b373e9ced573 100644
--- a/arch/arm/mach-shmobile/board-bonito.c
+++ b/arch/arm/mach-shmobile/board-bonito.c
@@ -331,12 +331,6 @@ static struct platform_device smsc_device = {
331}; 331};
332 332
333/* 333/*
334 * core board devices
335 */
336static struct platform_device *bonito_core_devices[] __initdata = {
337};
338
339/*
340 * base board devices 334 * base board devices
341 */ 335 */
342static struct platform_device *bonito_base_devices[] __initdata = { 336static struct platform_device *bonito_base_devices[] __initdata = {
@@ -375,12 +369,37 @@ static void __init bonito_map_io(void)
375#define VCCQ1CR IOMEM(0xE6058140) 369#define VCCQ1CR IOMEM(0xE6058140)
376#define VCCQ1LCDCR IOMEM(0xE6058186) 370#define VCCQ1LCDCR IOMEM(0xE6058186)
377 371
372/*
373 * HACK: The FPGA mappings should be associated with the FPGA device, but we
374 * don't have one at the moment. Associate them with the PFC device to make
375 * sure they will be applied.
376 */
377static const struct pinctrl_map fpga_pinctrl_map[] = {
378 /* FPGA */
379 PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740",
380 "bsc_cs5a_0", "bsc"),
381 PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740",
382 "bsc_cs5b", "bsc"),
383 PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740",
384 "bsc_cs6a", "bsc"),
385 PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740",
386 "intc_irq10", "intc"),
387};
388
389static const struct pinctrl_map scifa5_pinctrl_map[] = {
390 /* SCIFA5 */
391 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.5", "pfc-r8a7740",
392 "scifa5_data_2", "scifa5"),
393};
394
378static void __init bonito_init(void) 395static void __init bonito_init(void)
379{ 396{
380 u16 val; 397 u16 val;
381 398
382 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); 399 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
383 400
401 pinctrl_register_mappings(fpga_pinctrl_map,
402 ARRAY_SIZE(fpga_pinctrl_map));
384 r8a7740_pinmux_init(); 403 r8a7740_pinmux_init();
385 bonito_fpga_init(); 404 bonito_fpga_init();
386 405
@@ -397,9 +416,6 @@ static void __init bonito_init(void)
397 416
398 r8a7740_add_standard_devices(); 417 r8a7740_add_standard_devices();
399 418
400 platform_add_devices(bonito_core_devices,
401 ARRAY_SIZE(bonito_core_devices));
402
403 /* 419 /*
404 * base board settings 420 * base board settings
405 */ 421 */
@@ -409,14 +425,6 @@ static void __init bonito_init(void)
409 u16 bsw3; 425 u16 bsw3;
410 u16 bsw4; 426 u16 bsw4;
411 427
412 /*
413 * FPGA
414 */
415 gpio_request(GPIO_FN_CS5B, NULL);
416 gpio_request(GPIO_FN_CS6A, NULL);
417 gpio_request(GPIO_FN_CS5A_PORT105, NULL);
418 gpio_request(GPIO_FN_IRQ10, NULL);
419
420 val = bonito_fpga_read(BVERR); 428 val = bonito_fpga_read(BVERR);
421 pr_info("bonito version: cpu %02x, base %02x\n", 429 pr_info("bonito version: cpu %02x, base %02x\n",
422 ((val >> 8) & 0xFF), 430 ((val >> 8) & 0xFF),
@@ -432,8 +440,8 @@ static void __init bonito_init(void)
432 if (BIT_OFF(bsw2, 1) && /* S38.3 = ON */ 440 if (BIT_OFF(bsw2, 1) && /* S38.3 = ON */
433 BIT_OFF(bsw3, 9) && /* S39.6 = ON */ 441 BIT_OFF(bsw3, 9) && /* S39.6 = ON */
434 BIT_OFF(bsw4, 4)) { /* S43.1 = ON */ 442 BIT_OFF(bsw4, 4)) { /* S43.1 = ON */
435 gpio_request(GPIO_FN_SCIFA5_TXD_PORT91, NULL); 443 pinctrl_register_mappings(scifa5_pinctrl_map,
436 gpio_request(GPIO_FN_SCIFA5_RXD_PORT92, NULL); 444 ARRAY_SIZE(scifa5_pinctrl_map));
437 } 445 }
438 446
439 /* 447 /*
@@ -443,7 +451,6 @@ static void __init bonito_init(void)
443 BIT_ON(bsw2, 2)) { /* S38.2 = OFF */ 451 BIT_ON(bsw2, 2)) { /* S38.2 = OFF */
444 pinctrl_register_mappings(lcdc0_pinctrl_map, 452 pinctrl_register_mappings(lcdc0_pinctrl_map,
445 ARRAY_SIZE(lcdc0_pinctrl_map)); 453 ARRAY_SIZE(lcdc0_pinctrl_map));
446 gpio_request(GPIO_FN_LCDC0_SELECT, NULL);
447 454
448 gpio_request_one(61, GPIOF_OUT_INIT_HIGH, 455 gpio_request_one(61, GPIOF_OUT_INIT_HIGH,
449 NULL); /* LCDDON */ 456 NULL); /* LCDDON */
diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c
index aefa50d385b7..44055fe8a45c 100644
--- a/arch/arm/mach-shmobile/board-kzm9g-reference.c
+++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c
@@ -79,7 +79,6 @@ static void __init kzm_init(void)
79 sh73a0_pinmux_init(); 79 sh73a0_pinmux_init();
80 80
81 /* enable SD */ 81 /* enable SD */
82 gpio_request(GPIO_FN_SDHI0_VCCQ_MC0_ON, NULL);
83 gpio_request_one(15, GPIOF_OUT_INIT_HIGH, NULL); /* power */ 82 gpio_request_one(15, GPIOF_OUT_INIT_HIGH, NULL); /* power */
84 83
85 gpio_request_one(14, GPIOF_OUT_INIT_HIGH, NULL); /* power */ 84 gpio_request_one(14, GPIOF_OUT_INIT_HIGH, NULL); /* power */
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index e6b775a10aad..1fdf05cb6da1 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -663,13 +663,13 @@ static unsigned long pin_pullup_conf[] = {
663 663
664static const struct pinctrl_map kzm_pinctrl_map[] = { 664static const struct pinctrl_map kzm_pinctrl_map[] = {
665 /* FSIA (AK4648) */ 665 /* FSIA (AK4648) */
666 PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0", 666 PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2", "pfc-sh73a0",
667 "fsia_mclk_in", "fsia"), 667 "fsia_mclk_in", "fsia"),
668 PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0", 668 PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2", "pfc-sh73a0",
669 "fsia_sclk_in", "fsia"), 669 "fsia_sclk_in", "fsia"),
670 PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0", 670 PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2", "pfc-sh73a0",
671 "fsia_data_in", "fsia"), 671 "fsia_data_in", "fsia"),
672 PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0", 672 PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2", "pfc-sh73a0",
673 "fsia_data_out", "fsia"), 673 "fsia_data_out", "fsia"),
674 /* I2C3 */ 674 /* I2C3 */
675 PIN_MAP_MUX_GROUP_DEFAULT("i2c-sh_mobile.3", "pfc-sh73a0", 675 PIN_MAP_MUX_GROUP_DEFAULT("i2c-sh_mobile.3", "pfc-sh73a0",
@@ -788,9 +788,6 @@ static void __init kzm_init(void)
788 /* Touchscreen */ 788 /* Touchscreen */
789 gpio_request_one(223, GPIOF_IN, NULL); /* IRQ8 */ 789 gpio_request_one(223, GPIOF_IN, NULL); /* IRQ8 */
790 790
791 /* enable SD */
792 gpio_request(GPIO_FN_SDHI0_VCCQ_MC0_ON, NULL);
793
794#ifdef CONFIG_CACHE_L2X0 791#ifdef CONFIG_CACHE_L2X0
795 /* Early BRESP enable, Shared attribute override enable, 64K*8way */ 792 /* Early BRESP enable, Shared attribute override enable, 64K*8way */
796 l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff); 793 l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff);
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index f587187a8603..6114edd0a977 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -21,15 +21,30 @@
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/irqchip.h> 22#include <linux/irqchip.h>
23#include <linux/kernel.h> 23#include <linux/kernel.h>
24#include <linux/pinctrl/machine.h>
24#include <linux/platform_device.h> 25#include <linux/platform_device.h>
25#include <mach/common.h> 26#include <mach/common.h>
26#include <mach/r8a7790.h> 27#include <mach/r8a7790.h>
27#include <asm/mach-types.h> 28#include <asm/mach-types.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
29 30
31static const struct pinctrl_map lager_pinctrl_map[] = {
32 /* SCIF0 (CN19: DEBUG SERIAL0) */
33 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
34 "scif0_data", "scif0"),
35 /* SCIF1 (CN20: DEBUG SERIAL1) */
36 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
37 "scif1_data", "scif1"),
38};
39
30static void __init lager_add_standard_devices(void) 40static void __init lager_add_standard_devices(void)
31{ 41{
32 r8a7790_clock_init(); 42 r8a7790_clock_init();
43
44 pinctrl_register_mappings(lager_pinctrl_map,
45 ARRAY_SIZE(lager_pinctrl_map));
46 r8a7790_pinmux_init();
47
33 r8a7790_add_standard_devices(); 48 r8a7790_add_standard_devices();
34} 49}
35 50
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index fa3407da682a..85f51a849a50 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -1309,6 +1309,49 @@ static struct i2c_board_info i2c1_devices[] = {
1309}; 1309};
1310 1310
1311static const struct pinctrl_map mackerel_pinctrl_map[] = { 1311static const struct pinctrl_map mackerel_pinctrl_map[] = {
1312 /* ADXL34X */
1313 PIN_MAP_MUX_GROUP_DEFAULT("1-0053", "pfc-sh7372",
1314 "intc_irq21", "intc"),
1315 /* CEU */
1316 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
1317 "ceu_data_0_7", "ceu"),
1318 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
1319 "ceu_clk_0", "ceu"),
1320 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
1321 "ceu_sync", "ceu"),
1322 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
1323 "ceu_field", "ceu"),
1324 /* FLCTL */
1325 PIN_MAP_MUX_GROUP_DEFAULT("sh_flctl.0", "pfc-sh7372",
1326 "flctl_data", "flctl"),
1327 PIN_MAP_MUX_GROUP_DEFAULT("sh_flctl.0", "pfc-sh7372",
1328 "flctl_ce0", "flctl"),
1329 PIN_MAP_MUX_GROUP_DEFAULT("sh_flctl.0", "pfc-sh7372",
1330 "flctl_ctrl", "flctl"),
1331 /* FSIA (AK4643) */
1332 PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
1333 "fsia_sclk_in", "fsia"),
1334 PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
1335 "fsia_data_in", "fsia"),
1336 PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
1337 "fsia_data_out", "fsia"),
1338 /* FSIB (HDMI) */
1339 PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-sh7372",
1340 "fsib_mclk_in", "fsib"),
1341 /* HDMI */
1342 PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-sh7372",
1343 "hdmi", "hdmi"),
1344 /* LCDC */
1345 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh7372",
1346 "lcd_data24", "lcd"),
1347 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh7372",
1348 "lcd_sync", "lcd"),
1349 /* SCIFA0 */
1350 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-sh7372",
1351 "scifa0_data", "scifa0"),
1352 /* SCIFA2 (GT-720F GPS module) */
1353 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh7372",
1354 "scifa2_data", "scifa2"),
1312 /* SDHI0 */ 1355 /* SDHI0 */
1313 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372", 1356 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
1314 "sdhi0_data4", "sdhi0"), 1357 "sdhi0_data4", "sdhi0"),
@@ -1316,6 +1359,8 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
1316 "sdhi0_ctrl", "sdhi0"), 1359 "sdhi0_ctrl", "sdhi0"),
1317 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372", 1360 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
1318 "sdhi0_wp", "sdhi0"), 1361 "sdhi0_wp", "sdhi0"),
1362 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
1363 "intc_irq26_1", "intc"),
1319 /* SDHI1 */ 1364 /* SDHI1 */
1320#if !IS_ENABLED(CONFIG_MMC_SH_MMCIF) 1365#if !IS_ENABLED(CONFIG_MMC_SH_MMCIF)
1321 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372", 1366 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372",
@@ -1334,6 +1379,25 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
1334 "sdhi2_data4", "sdhi2"), 1379 "sdhi2_data4", "sdhi2"),
1335 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh7372", 1380 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh7372",
1336 "sdhi2_ctrl", "sdhi2"), 1381 "sdhi2_ctrl", "sdhi2"),
1382 /* SMSC911X */
1383 PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-sh7372",
1384 "bsc_cs5a", "bsc"),
1385 PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-sh7372",
1386 "intc_irq6_0", "intc"),
1387 /* ST1232 */
1388 PIN_MAP_MUX_GROUP_DEFAULT("0-0055", "pfc-sh7372",
1389 "intc_irq7_0", "intc"),
1390 /* TCA6416 */
1391 PIN_MAP_MUX_GROUP_DEFAULT("0-0020", "pfc-sh7372",
1392 "intc_irq9_0", "intc"),
1393 /* USBHS0 */
1394 PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.0", "pfc-sh7372",
1395 "usb0_vbus", "usb0"),
1396 /* USBHS1 */
1397 PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
1398 "usb1_vbus", "usb1"),
1399 PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
1400 "usb1_otg_id_0", "usb1"),
1337}; 1401};
1338 1402
1339#define GPIO_PORT9CR IOMEM(0xE6051009) 1403#define GPIO_PORT9CR IOMEM(0xE6051009)
@@ -1377,61 +1441,18 @@ static void __init mackerel_init(void)
1377 ARRAY_SIZE(mackerel_pinctrl_map)); 1441 ARRAY_SIZE(mackerel_pinctrl_map));
1378 sh7372_pinmux_init(); 1442 sh7372_pinmux_init();
1379 1443
1380 /* enable SCIFA0 */
1381 gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
1382 gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
1383
1384 /* enable SMSC911X */
1385 gpio_request(GPIO_FN_CS5A, NULL);
1386 gpio_request(GPIO_FN_IRQ6_39, NULL);
1387
1388 /* LCDC */
1389 gpio_request(GPIO_FN_LCDD23, NULL);
1390 gpio_request(GPIO_FN_LCDD22, NULL);
1391 gpio_request(GPIO_FN_LCDD21, NULL);
1392 gpio_request(GPIO_FN_LCDD20, NULL);
1393 gpio_request(GPIO_FN_LCDD19, NULL);
1394 gpio_request(GPIO_FN_LCDD18, NULL);
1395 gpio_request(GPIO_FN_LCDD17, NULL);
1396 gpio_request(GPIO_FN_LCDD16, NULL);
1397 gpio_request(GPIO_FN_LCDD15, NULL);
1398 gpio_request(GPIO_FN_LCDD14, NULL);
1399 gpio_request(GPIO_FN_LCDD13, NULL);
1400 gpio_request(GPIO_FN_LCDD12, NULL);
1401 gpio_request(GPIO_FN_LCDD11, NULL);
1402 gpio_request(GPIO_FN_LCDD10, NULL);
1403 gpio_request(GPIO_FN_LCDD9, NULL);
1404 gpio_request(GPIO_FN_LCDD8, NULL);
1405 gpio_request(GPIO_FN_LCDD7, NULL);
1406 gpio_request(GPIO_FN_LCDD6, NULL);
1407 gpio_request(GPIO_FN_LCDD5, NULL);
1408 gpio_request(GPIO_FN_LCDD4, NULL);
1409 gpio_request(GPIO_FN_LCDD3, NULL);
1410 gpio_request(GPIO_FN_LCDD2, NULL);
1411 gpio_request(GPIO_FN_LCDD1, NULL);
1412 gpio_request(GPIO_FN_LCDD0, NULL);
1413 gpio_request(GPIO_FN_LCDDISP, NULL);
1414 gpio_request(GPIO_FN_LCDDCK, NULL);
1415
1416 /* backlight, off by default */ 1444 /* backlight, off by default */
1417 gpio_request_one(31, GPIOF_OUT_INIT_LOW, NULL); 1445 gpio_request_one(31, GPIOF_OUT_INIT_LOW, NULL);
1418 1446
1419 gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */ 1447 gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
1420 1448
1421 /* USBHS0 */ 1449 /* USBHS0 */
1422 gpio_request(GPIO_FN_VBUS0_0, NULL);
1423 gpio_request_pulldown(GPIO_PORT168CR); /* VBUS0_0 pull down */ 1450 gpio_request_pulldown(GPIO_PORT168CR); /* VBUS0_0 pull down */
1424 1451
1425 /* USBHS1 */ 1452 /* USBHS1 */
1426 gpio_request(GPIO_FN_VBUS0_1, NULL);
1427 gpio_request_pulldown(GPIO_PORT167CR); /* VBUS0_1 pull down */ 1453 gpio_request_pulldown(GPIO_PORT167CR); /* VBUS0_1 pull down */
1428 gpio_request(GPIO_FN_IDIN_1_113, NULL);
1429 1454
1430 /* enable FSI2 port A (ak4643) */ 1455 /* FSI2 port A (ak4643) */
1431 gpio_request(GPIO_FN_FSIAIBT, NULL);
1432 gpio_request(GPIO_FN_FSIAILR, NULL);
1433 gpio_request(GPIO_FN_FSIAISLD, NULL);
1434 gpio_request(GPIO_FN_FSIAOSLD, NULL);
1435 gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */ 1456 gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
1436 1457
1437 gpio_request(9, NULL); 1458 gpio_request(9, NULL);
@@ -1441,8 +1462,7 @@ static void __init mackerel_init(void)
1441 1462
1442 intc_set_priority(IRQ_FSI, 3); /* irq priority FSI(3) > SMSC911X(2) */ 1463 intc_set_priority(IRQ_FSI, 3); /* irq priority FSI(3) > SMSC911X(2) */
1443 1464
1444 /* setup FSI2 port B (HDMI) */ 1465 /* FSI2 port B (HDMI) */
1445 gpio_request(GPIO_FN_FSIBCK, NULL);
1446 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */ 1466 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1447 1467
1448 /* set SPU2 clock to 119.6 MHz */ 1468 /* set SPU2 clock to 119.6 MHz */
@@ -1452,68 +1472,15 @@ static void __init mackerel_init(void)
1452 clk_put(clk); 1472 clk_put(clk);
1453 } 1473 }
1454 1474
1455 /* enable Keypad */ 1475 /* Keypad */
1456 gpio_request(GPIO_FN_IRQ9_42, NULL);
1457 irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH); 1476 irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
1458 1477
1459 /* enable Touchscreen */ 1478 /* Touchscreen */
1460 gpio_request(GPIO_FN_IRQ7_40, NULL);
1461 irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW); 1479 irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
1462 1480
1463 /* enable Accelerometer */ 1481 /* Accelerometer */
1464 gpio_request(GPIO_FN_IRQ21, NULL);
1465 irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH); 1482 irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
1466 1483
1467 /* SDHI0 PORT172 card-detect IRQ26 */
1468 gpio_request(GPIO_FN_IRQ26_172, NULL);
1469
1470 /* FLCTL */
1471 gpio_request(GPIO_FN_D0_NAF0, NULL);
1472 gpio_request(GPIO_FN_D1_NAF1, NULL);
1473 gpio_request(GPIO_FN_D2_NAF2, NULL);
1474 gpio_request(GPIO_FN_D3_NAF3, NULL);
1475 gpio_request(GPIO_FN_D4_NAF4, NULL);
1476 gpio_request(GPIO_FN_D5_NAF5, NULL);
1477 gpio_request(GPIO_FN_D6_NAF6, NULL);
1478 gpio_request(GPIO_FN_D7_NAF7, NULL);
1479 gpio_request(GPIO_FN_D8_NAF8, NULL);
1480 gpio_request(GPIO_FN_D9_NAF9, NULL);
1481 gpio_request(GPIO_FN_D10_NAF10, NULL);
1482 gpio_request(GPIO_FN_D11_NAF11, NULL);
1483 gpio_request(GPIO_FN_D12_NAF12, NULL);
1484 gpio_request(GPIO_FN_D13_NAF13, NULL);
1485 gpio_request(GPIO_FN_D14_NAF14, NULL);
1486 gpio_request(GPIO_FN_D15_NAF15, NULL);
1487 gpio_request(GPIO_FN_FCE0, NULL);
1488 gpio_request(GPIO_FN_WE0_FWE, NULL);
1489 gpio_request(GPIO_FN_FRB, NULL);
1490 gpio_request(GPIO_FN_A4_FOE, NULL);
1491 gpio_request(GPIO_FN_A5_FCDE, NULL);
1492 gpio_request(GPIO_FN_RD_FSC, NULL);
1493
1494 /* enable GPS module (GT-720F) */
1495 gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
1496 gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
1497
1498 /* CEU */
1499 gpio_request(GPIO_FN_VIO_CLK, NULL);
1500 gpio_request(GPIO_FN_VIO_VD, NULL);
1501 gpio_request(GPIO_FN_VIO_HD, NULL);
1502 gpio_request(GPIO_FN_VIO_FIELD, NULL);
1503 gpio_request(GPIO_FN_VIO_CKO, NULL);
1504 gpio_request(GPIO_FN_VIO_D7, NULL);
1505 gpio_request(GPIO_FN_VIO_D6, NULL);
1506 gpio_request(GPIO_FN_VIO_D5, NULL);
1507 gpio_request(GPIO_FN_VIO_D4, NULL);
1508 gpio_request(GPIO_FN_VIO_D3, NULL);
1509 gpio_request(GPIO_FN_VIO_D2, NULL);
1510 gpio_request(GPIO_FN_VIO_D1, NULL);
1511 gpio_request(GPIO_FN_VIO_D0, NULL);
1512
1513 /* HDMI */
1514 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1515 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1516
1517 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */ 1484 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1518 srcr4 = __raw_readl(SRCR4); 1485 srcr4 = __raw_readl(SRCR4);
1519 __raw_writel(srcr4 | (1 << 13), SRCR4); 1486 __raw_writel(srcr4 | (1 << 13), SRCR4);
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
index b9594e911ce7..9112faef923b 100644
--- a/arch/arm/mach-shmobile/board-marzen.c
+++ b/arch/arm/mach-shmobile/board-marzen.c
@@ -28,6 +28,7 @@
28#include <linux/leds.h> 28#include <linux/leds.h>
29#include <linux/dma-mapping.h> 29#include <linux/dma-mapping.h>
30#include <linux/pinctrl/machine.h> 30#include <linux/pinctrl/machine.h>
31#include <linux/platform_data/gpio-rcar.h>
31#include <linux/regulator/fixed.h> 32#include <linux/regulator/fixed.h>
32#include <linux/regulator/machine.h> 33#include <linux/regulator/machine.h>
33#include <linux/smsc911x.h> 34#include <linux/smsc911x.h>
@@ -173,15 +174,15 @@ static struct platform_device usb_phy_device = {
173static struct gpio_led marzen_leds[] = { 174static struct gpio_led marzen_leds[] = {
174 { 175 {
175 .name = "led2", 176 .name = "led2",
176 .gpio = 157, 177 .gpio = RCAR_GP_PIN(4, 29),
177 .default_state = LEDS_GPIO_DEFSTATE_ON, 178 .default_state = LEDS_GPIO_DEFSTATE_ON,
178 }, { 179 }, {
179 .name = "led3", 180 .name = "led3",
180 .gpio = 158, 181 .gpio = RCAR_GP_PIN(4, 30),
181 .default_state = LEDS_GPIO_DEFSTATE_ON, 182 .default_state = LEDS_GPIO_DEFSTATE_ON,
182 }, { 183 }, {
183 .name = "led4", 184 .name = "led4",
184 .gpio = 159, 185 .gpio = RCAR_GP_PIN(4, 31),
185 .default_state = LEDS_GPIO_DEFSTATE_ON, 186 .default_state = LEDS_GPIO_DEFSTATE_ON,
186 }, 187 },
187}; 188};
diff --git a/arch/arm/mach-shmobile/include/mach/irqs.h b/arch/arm/mach-shmobile/include/mach/irqs.h
index b2074e2acb15..d241bfd6926d 100644
--- a/arch/arm/mach-shmobile/include/mach/irqs.h
+++ b/arch/arm/mach-shmobile/include/mach/irqs.h
@@ -16,4 +16,9 @@
16#define IRQPIN_BASE 2000 16#define IRQPIN_BASE 2000
17#define irq_pin(nr) ((nr) + IRQPIN_BASE) 17#define irq_pin(nr) ((nr) + IRQPIN_BASE)
18 18
19/* GPIO IRQ */
20#define _GPIO_IRQ_BASE 2500
21#define GPIO_IRQ_BASE(x) (_GPIO_IRQ_BASE + (32 * x))
22#define GPIO_IRQ(x, y) (_GPIO_IRQ_BASE + (32 * x) + y)
23
19#endif /* __ASM_MACH_IRQS_H */ 24#endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
index abdc4d4efa28..9c9a66ccaf6f 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
@@ -28,494 +28,6 @@
28#define MD_CK1 (1 << 1) 28#define MD_CK1 (1 << 1)
29#define MD_CK0 (1 << 0) 29#define MD_CK0 (1 << 0)
30 30
31/*
32 * Pin Function Controller:
33 * GPIO_FN_xx - GPIO used to select pin function
34 * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
35 */
36enum {
37 /* PORT */
38 GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
39 GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
40
41 GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
42 GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
43
44 GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
45 GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
46
47 GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
48 GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
49
50 GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
51 GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
52
53 GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
54 GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
55
56 GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
57 GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
58
59 GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
60 GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
61
62 GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
63 GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
64
65 GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
66 GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
67
68 GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
69 GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
70
71 GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
72 GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119,
73
74 GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124,
75 GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129,
76
77 GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
78 GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
79
80 GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
81 GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
82
83 GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
84 GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
85
86 GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
87 GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169,
88
89 GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174,
90 GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179,
91
92 GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184,
93 GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189,
94
95 GPIO_PORT190, GPIO_PORT191, GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,
96 GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,
97
98 GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,
99 GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,
100
101 GPIO_PORT210, GPIO_PORT211,
102
103 /* IRQ */
104 GPIO_FN_IRQ0_PORT2, GPIO_FN_IRQ0_PORT13,
105 GPIO_FN_IRQ1,
106 GPIO_FN_IRQ2_PORT11, GPIO_FN_IRQ2_PORT12,
107 GPIO_FN_IRQ3_PORT10, GPIO_FN_IRQ3_PORT14,
108 GPIO_FN_IRQ4_PORT15, GPIO_FN_IRQ4_PORT172,
109 GPIO_FN_IRQ5_PORT0, GPIO_FN_IRQ5_PORT1,
110 GPIO_FN_IRQ6_PORT121, GPIO_FN_IRQ6_PORT173,
111 GPIO_FN_IRQ7_PORT120, GPIO_FN_IRQ7_PORT209,
112 GPIO_FN_IRQ8,
113 GPIO_FN_IRQ9_PORT118, GPIO_FN_IRQ9_PORT210,
114 GPIO_FN_IRQ10,
115 GPIO_FN_IRQ11,
116 GPIO_FN_IRQ12_PORT42, GPIO_FN_IRQ12_PORT97,
117 GPIO_FN_IRQ13_PORT64, GPIO_FN_IRQ13_PORT98,
118 GPIO_FN_IRQ14_PORT63, GPIO_FN_IRQ14_PORT99,
119 GPIO_FN_IRQ15_PORT62, GPIO_FN_IRQ15_PORT100,
120 GPIO_FN_IRQ16_PORT68, GPIO_FN_IRQ16_PORT211,
121 GPIO_FN_IRQ17,
122 GPIO_FN_IRQ18,
123 GPIO_FN_IRQ19,
124 GPIO_FN_IRQ20,
125 GPIO_FN_IRQ21,
126 GPIO_FN_IRQ22,
127 GPIO_FN_IRQ23,
128 GPIO_FN_IRQ24,
129 GPIO_FN_IRQ25,
130 GPIO_FN_IRQ26_PORT58, GPIO_FN_IRQ26_PORT81,
131 GPIO_FN_IRQ27_PORT57, GPIO_FN_IRQ27_PORT168,
132 GPIO_FN_IRQ28_PORT56, GPIO_FN_IRQ28_PORT169,
133 GPIO_FN_IRQ29_PORT50, GPIO_FN_IRQ29_PORT170,
134 GPIO_FN_IRQ30_PORT49, GPIO_FN_IRQ30_PORT171,
135 GPIO_FN_IRQ31_PORT41, GPIO_FN_IRQ31_PORT167,
136
137 /* Function */
138
139 /* DBGT */
140 GPIO_FN_DBGMDT2, GPIO_FN_DBGMDT1, GPIO_FN_DBGMDT0,
141 GPIO_FN_DBGMD10, GPIO_FN_DBGMD11, GPIO_FN_DBGMD20,
142 GPIO_FN_DBGMD21,
143
144 /* FSI-A */
145 GPIO_FN_FSIAISLD_PORT0, /* FSIAISLD Port 0/5 */
146 GPIO_FN_FSIAISLD_PORT5,
147 GPIO_FN_FSIASPDIF_PORT9, /* FSIASPDIF Port 9/18 */
148 GPIO_FN_FSIASPDIF_PORT18,
149 GPIO_FN_FSIAOSLD1, GPIO_FN_FSIAOSLD2,
150 GPIO_FN_FSIAOLR, GPIO_FN_FSIAOBT,
151 GPIO_FN_FSIAOSLD, GPIO_FN_FSIAOMC,
152 GPIO_FN_FSIACK, GPIO_FN_FSIAILR,
153 GPIO_FN_FSIAIBT,
154
155 /* FSI-B */
156 GPIO_FN_FSIBCK,
157
158 /* FMSI */
159 GPIO_FN_FMSISLD_PORT1, /* FMSISLD Port 1/6 */
160 GPIO_FN_FMSISLD_PORT6,
161 GPIO_FN_FMSIILR, GPIO_FN_FMSIIBT,
162 GPIO_FN_FMSIOLR, GPIO_FN_FMSIOBT,
163 GPIO_FN_FMSICK, GPIO_FN_FMSOILR,
164 GPIO_FN_FMSOIBT, GPIO_FN_FMSOOLR,
165 GPIO_FN_FMSOOBT, GPIO_FN_FMSOSLD,
166 GPIO_FN_FMSOCK,
167
168 /* SCIFA0 */
169 GPIO_FN_SCIFA0_SCK, GPIO_FN_SCIFA0_CTS,
170 GPIO_FN_SCIFA0_RTS, GPIO_FN_SCIFA0_RXD,
171 GPIO_FN_SCIFA0_TXD,
172
173 /* SCIFA1 */
174 GPIO_FN_SCIFA1_CTS, GPIO_FN_SCIFA1_SCK,
175 GPIO_FN_SCIFA1_RXD, GPIO_FN_SCIFA1_TXD,
176 GPIO_FN_SCIFA1_RTS,
177
178 /* SCIFA2 */
179 GPIO_FN_SCIFA2_SCK_PORT22, /* SCIFA2_SCK Port 22/199 */
180 GPIO_FN_SCIFA2_SCK_PORT199,
181 GPIO_FN_SCIFA2_RXD, GPIO_FN_SCIFA2_TXD,
182 GPIO_FN_SCIFA2_CTS, GPIO_FN_SCIFA2_RTS,
183
184 /* SCIFA3 */
185 GPIO_FN_SCIFA3_RTS_PORT105, /* MSEL5CR_8_0 */
186 GPIO_FN_SCIFA3_SCK_PORT116,
187 GPIO_FN_SCIFA3_CTS_PORT117,
188 GPIO_FN_SCIFA3_RXD_PORT174,
189 GPIO_FN_SCIFA3_TXD_PORT175,
190
191 GPIO_FN_SCIFA3_RTS_PORT161, /* MSEL5CR_8_1 */
192 GPIO_FN_SCIFA3_SCK_PORT158,
193 GPIO_FN_SCIFA3_CTS_PORT162,
194 GPIO_FN_SCIFA3_RXD_PORT159,
195 GPIO_FN_SCIFA3_TXD_PORT160,
196
197 /* SCIFA4 */
198 GPIO_FN_SCIFA4_RXD_PORT12, /* MSEL5CR[12:11] = 00 */
199 GPIO_FN_SCIFA4_TXD_PORT13,
200
201 GPIO_FN_SCIFA4_RXD_PORT204, /* MSEL5CR[12:11] = 01 */
202 GPIO_FN_SCIFA4_TXD_PORT203,
203
204 GPIO_FN_SCIFA4_RXD_PORT94, /* MSEL5CR[12:11] = 10 */
205 GPIO_FN_SCIFA4_TXD_PORT93,
206
207 GPIO_FN_SCIFA4_SCK_PORT21, /* SCIFA4_SCK Port 21/205 */
208 GPIO_FN_SCIFA4_SCK_PORT205,
209
210 /* SCIFA5 */
211 GPIO_FN_SCIFA5_TXD_PORT20, /* MSEL5CR[15:14] = 00 */
212 GPIO_FN_SCIFA5_RXD_PORT10,
213
214 GPIO_FN_SCIFA5_RXD_PORT207, /* MSEL5CR[15:14] = 01 */
215 GPIO_FN_SCIFA5_TXD_PORT208,
216
217 GPIO_FN_SCIFA5_TXD_PORT91, /* MSEL5CR[15:14] = 10 */
218 GPIO_FN_SCIFA5_RXD_PORT92,
219
220 GPIO_FN_SCIFA5_SCK_PORT23, /* SCIFA5_SCK Port 23/206 */
221 GPIO_FN_SCIFA5_SCK_PORT206,
222
223 /* SCIFA6 */
224 GPIO_FN_SCIFA6_SCK, GPIO_FN_SCIFA6_RXD, GPIO_FN_SCIFA6_TXD,
225
226 /* SCIFA7 */
227 GPIO_FN_SCIFA7_TXD, GPIO_FN_SCIFA7_RXD,
228
229 /* SCIFAB */
230 GPIO_FN_SCIFB_SCK_PORT190, /* MSEL5CR_17_0 */
231 GPIO_FN_SCIFB_RXD_PORT191,
232 GPIO_FN_SCIFB_TXD_PORT192,
233 GPIO_FN_SCIFB_RTS_PORT186,
234 GPIO_FN_SCIFB_CTS_PORT187,
235
236 GPIO_FN_SCIFB_SCK_PORT2, /* MSEL5CR_17_1 */
237 GPIO_FN_SCIFB_RXD_PORT3,
238 GPIO_FN_SCIFB_TXD_PORT4,
239 GPIO_FN_SCIFB_RTS_PORT172,
240 GPIO_FN_SCIFB_CTS_PORT173,
241
242 /* LCD0 */
243 GPIO_FN_LCDC0_SELECT,
244
245 /* LCD1 */
246 GPIO_FN_LCDC1_SELECT,
247
248 /* RSPI */
249 GPIO_FN_RSPI_SSL0_A, GPIO_FN_RSPI_SSL1_A,
250 GPIO_FN_RSPI_SSL2_A, GPIO_FN_RSPI_SSL3_A,
251 GPIO_FN_RSPI_MOSI_A, GPIO_FN_RSPI_MISO_A,
252 GPIO_FN_RSPI_CK_A,
253
254 /* VIO CKO */
255 GPIO_FN_VIO_CKO1,
256 GPIO_FN_VIO_CKO2,
257 GPIO_FN_VIO_CKO_1,
258 GPIO_FN_VIO_CKO,
259
260 /* VIO0 */
261 GPIO_FN_VIO0_D0, GPIO_FN_VIO0_D1, GPIO_FN_VIO0_D2,
262 GPIO_FN_VIO0_D3, GPIO_FN_VIO0_D4, GPIO_FN_VIO0_D5,
263 GPIO_FN_VIO0_D6, GPIO_FN_VIO0_D7, GPIO_FN_VIO0_D8,
264 GPIO_FN_VIO0_D9, GPIO_FN_VIO0_D10, GPIO_FN_VIO0_D11,
265 GPIO_FN_VIO0_D12, GPIO_FN_VIO0_VD, GPIO_FN_VIO0_HD,
266 GPIO_FN_VIO0_CLK, GPIO_FN_VIO0_FIELD,
267
268 GPIO_FN_VIO0_D13_PORT26, /* MSEL5CR_27_0 */
269 GPIO_FN_VIO0_D14_PORT25,
270 GPIO_FN_VIO0_D15_PORT24,
271
272 GPIO_FN_VIO0_D13_PORT22, /* MSEL5CR_27_1 */
273 GPIO_FN_VIO0_D14_PORT95,
274 GPIO_FN_VIO0_D15_PORT96,
275
276 /* VIO1 */
277 GPIO_FN_VIO1_D0, GPIO_FN_VIO1_D1, GPIO_FN_VIO1_D2,
278 GPIO_FN_VIO1_D3, GPIO_FN_VIO1_D4, GPIO_FN_VIO1_D5,
279 GPIO_FN_VIO1_D6, GPIO_FN_VIO1_D7, GPIO_FN_VIO1_VD,
280 GPIO_FN_VIO1_HD, GPIO_FN_VIO1_CLK, GPIO_FN_VIO1_FIELD,
281
282 /* TPU0 */
283 GPIO_FN_TPU0TO0, GPIO_FN_TPU0TO1,
284 GPIO_FN_TPU0TO3,
285 GPIO_FN_TPU0TO2_PORT66, /* TPU0TO2 Port 66/202 */
286 GPIO_FN_TPU0TO2_PORT202,
287
288 /* SSP1 0 */
289 GPIO_FN_STP0_IPD0, GPIO_FN_STP0_IPD1, GPIO_FN_STP0_IPD2,
290 GPIO_FN_STP0_IPD3, GPIO_FN_STP0_IPD4, GPIO_FN_STP0_IPD5,
291 GPIO_FN_STP0_IPD6, GPIO_FN_STP0_IPD7, GPIO_FN_STP0_IPEN,
292 GPIO_FN_STP0_IPCLK, GPIO_FN_STP0_IPSYNC,
293
294 /* SSP1 1 */
295 GPIO_FN_STP1_IPD1, GPIO_FN_STP1_IPD2, GPIO_FN_STP1_IPD3,
296 GPIO_FN_STP1_IPD4, GPIO_FN_STP1_IPD5, GPIO_FN_STP1_IPD6,
297 GPIO_FN_STP1_IPD7, GPIO_FN_STP1_IPCLK, GPIO_FN_STP1_IPSYNC,
298
299 GPIO_FN_STP1_IPD0_PORT186, /* MSEL5CR_23_0 */
300 GPIO_FN_STP1_IPEN_PORT187,
301
302 GPIO_FN_STP1_IPD0_PORT194, /* MSEL5CR_23_1 */
303 GPIO_FN_STP1_IPEN_PORT193,
304
305 /* SIM */
306 GPIO_FN_SIM_RST, GPIO_FN_SIM_CLK,
307 GPIO_FN_SIM_D_PORT22, /* SIM_D Port 22/199 */
308 GPIO_FN_SIM_D_PORT199,
309
310 /* MSIOF2 */
311 GPIO_FN_MSIOF2_TXD, GPIO_FN_MSIOF2_RXD, GPIO_FN_MSIOF2_TSCK,
312 GPIO_FN_MSIOF2_SS2, GPIO_FN_MSIOF2_TSYNC, GPIO_FN_MSIOF2_SS1,
313 GPIO_FN_MSIOF2_MCK1, GPIO_FN_MSIOF2_MCK0, GPIO_FN_MSIOF2_RSYNC,
314 GPIO_FN_MSIOF2_RSCK,
315
316 /* KEYSC */
317 GPIO_FN_KEYIN4, GPIO_FN_KEYIN5,
318 GPIO_FN_KEYIN6, GPIO_FN_KEYIN7,
319 GPIO_FN_KEYOUT0, GPIO_FN_KEYOUT1, GPIO_FN_KEYOUT2,
320 GPIO_FN_KEYOUT3, GPIO_FN_KEYOUT4, GPIO_FN_KEYOUT5,
321 GPIO_FN_KEYOUT6, GPIO_FN_KEYOUT7,
322
323 GPIO_FN_KEYIN0_PORT43, /* MSEL4CR_18_0 */
324 GPIO_FN_KEYIN1_PORT44,
325 GPIO_FN_KEYIN2_PORT45,
326 GPIO_FN_KEYIN3_PORT46,
327
328 GPIO_FN_KEYIN0_PORT58, /* MSEL4CR_18_1 */
329 GPIO_FN_KEYIN1_PORT57,
330 GPIO_FN_KEYIN2_PORT56,
331 GPIO_FN_KEYIN3_PORT55,
332
333 /* VOU */
334 GPIO_FN_DV_D0, GPIO_FN_DV_D1, GPIO_FN_DV_D2, GPIO_FN_DV_D3,
335 GPIO_FN_DV_D4, GPIO_FN_DV_D5, GPIO_FN_DV_D6, GPIO_FN_DV_D7,
336 GPIO_FN_DV_D8, GPIO_FN_DV_D9, GPIO_FN_DV_D10, GPIO_FN_DV_D11,
337 GPIO_FN_DV_D12, GPIO_FN_DV_D13, GPIO_FN_DV_D14, GPIO_FN_DV_D15,
338 GPIO_FN_DV_CLK,
339 GPIO_FN_DV_VSYNC,
340 GPIO_FN_DV_HSYNC,
341
342 /* MEMC */
343 GPIO_FN_MEMC_AD0, GPIO_FN_MEMC_AD1, GPIO_FN_MEMC_AD2,
344 GPIO_FN_MEMC_AD3, GPIO_FN_MEMC_AD4, GPIO_FN_MEMC_AD5,
345 GPIO_FN_MEMC_AD6, GPIO_FN_MEMC_AD7, GPIO_FN_MEMC_AD8,
346 GPIO_FN_MEMC_AD9, GPIO_FN_MEMC_AD10, GPIO_FN_MEMC_AD11,
347 GPIO_FN_MEMC_AD12, GPIO_FN_MEMC_AD13, GPIO_FN_MEMC_AD14,
348 GPIO_FN_MEMC_AD15, GPIO_FN_MEMC_CS0, GPIO_FN_MEMC_INT,
349 GPIO_FN_MEMC_NWE, GPIO_FN_MEMC_NOE,
350
351 GPIO_FN_MEMC_CS1, /* MSEL4CR_6_0 */
352 GPIO_FN_MEMC_ADV,
353 GPIO_FN_MEMC_WAIT,
354 GPIO_FN_MEMC_BUSCLK,
355
356 GPIO_FN_MEMC_A1, /* MSEL4CR_6_1 */
357 GPIO_FN_MEMC_DREQ0,
358 GPIO_FN_MEMC_DREQ1,
359 GPIO_FN_MEMC_A0,
360
361 /* MSIOF0 */
362 GPIO_FN_MSIOF0_SS1, GPIO_FN_MSIOF0_SS2,
363 GPIO_FN_MSIOF0_RXD, GPIO_FN_MSIOF0_TXD,
364 GPIO_FN_MSIOF0_MCK0, GPIO_FN_MSIOF0_MCK1,
365 GPIO_FN_MSIOF0_RSYNC, GPIO_FN_MSIOF0_RSCK,
366 GPIO_FN_MSIOF0_TSCK, GPIO_FN_MSIOF0_TSYNC,
367
368 /* MSIOF1 */
369 GPIO_FN_MSIOF1_RSCK, GPIO_FN_MSIOF1_RSYNC,
370 GPIO_FN_MSIOF1_MCK0, GPIO_FN_MSIOF1_MCK1,
371
372 GPIO_FN_MSIOF1_SS2_PORT116, GPIO_FN_MSIOF1_SS1_PORT117,
373 GPIO_FN_MSIOF1_RXD_PORT118, GPIO_FN_MSIOF1_TXD_PORT119,
374 GPIO_FN_MSIOF1_TSYNC_PORT120,
375 GPIO_FN_MSIOF1_TSCK_PORT121, /* MSEL4CR_10_0 */
376
377 GPIO_FN_MSIOF1_SS1_PORT67, GPIO_FN_MSIOF1_TSCK_PORT72,
378 GPIO_FN_MSIOF1_TSYNC_PORT73, GPIO_FN_MSIOF1_TXD_PORT74,
379 GPIO_FN_MSIOF1_RXD_PORT75,
380 GPIO_FN_MSIOF1_SS2_PORT202, /* MSEL4CR_10_1 */
381
382 /* GPIO */
383 GPIO_FN_GPO0, GPIO_FN_GPI0,
384 GPIO_FN_GPO1, GPIO_FN_GPI1,
385
386 /* USB0 */
387 GPIO_FN_USB0_OCI, GPIO_FN_USB0_PPON, GPIO_FN_VBUS,
388
389 /* USB1 */
390 GPIO_FN_USB1_OCI, GPIO_FN_USB1_PPON,
391
392 /* BBIF1 */
393 GPIO_FN_BBIF1_RXD, GPIO_FN_BBIF1_TXD, GPIO_FN_BBIF1_TSYNC,
394 GPIO_FN_BBIF1_TSCK, GPIO_FN_BBIF1_RSCK, GPIO_FN_BBIF1_RSYNC,
395 GPIO_FN_BBIF1_FLOW, GPIO_FN_BBIF1_RX_FLOW_N,
396
397 /* BBIF2 */
398 GPIO_FN_BBIF2_TXD2_PORT5, /* MSEL5CR_0_0 */
399 GPIO_FN_BBIF2_RXD2_PORT60,
400 GPIO_FN_BBIF2_TSYNC2_PORT6,
401 GPIO_FN_BBIF2_TSCK2_PORT59,
402
403 GPIO_FN_BBIF2_RXD2_PORT90, /* MSEL5CR_0_1 */
404 GPIO_FN_BBIF2_TXD2_PORT183,
405 GPIO_FN_BBIF2_TSCK2_PORT89,
406 GPIO_FN_BBIF2_TSYNC2_PORT184,
407
408 /* BSC / FLCTL / PCMCIA */
409 GPIO_FN_CS0, GPIO_FN_CS2, GPIO_FN_CS4,
410 GPIO_FN_CS5B, GPIO_FN_CS6A,
411 GPIO_FN_CS5A_PORT105, /* CS5A PORT 19/105 */
412 GPIO_FN_CS5A_PORT19,
413 GPIO_FN_IOIS16, /* ? */
414
415 GPIO_FN_A0, GPIO_FN_A1, GPIO_FN_A2, GPIO_FN_A3,
416 GPIO_FN_A4_FOE, /* share with FLCTL */
417 GPIO_FN_A5_FCDE, /* share with FLCTL */
418 GPIO_FN_A6, GPIO_FN_A7, GPIO_FN_A8, GPIO_FN_A9,
419 GPIO_FN_A10, GPIO_FN_A11, GPIO_FN_A12, GPIO_FN_A13,
420 GPIO_FN_A14, GPIO_FN_A15, GPIO_FN_A16, GPIO_FN_A17,
421 GPIO_FN_A18, GPIO_FN_A19, GPIO_FN_A20, GPIO_FN_A21,
422 GPIO_FN_A22, GPIO_FN_A23, GPIO_FN_A24, GPIO_FN_A25,
423 GPIO_FN_A26,
424
425 GPIO_FN_D0_NAF0, GPIO_FN_D1_NAF1, /* share with FLCTL */
426 GPIO_FN_D2_NAF2, GPIO_FN_D3_NAF3, /* share with FLCTL */
427 GPIO_FN_D4_NAF4, GPIO_FN_D5_NAF5, /* share with FLCTL */
428 GPIO_FN_D6_NAF6, GPIO_FN_D7_NAF7, /* share with FLCTL */
429 GPIO_FN_D8_NAF8, GPIO_FN_D9_NAF9, /* share with FLCTL */
430 GPIO_FN_D10_NAF10, GPIO_FN_D11_NAF11, /* share with FLCTL */
431 GPIO_FN_D12_NAF12, GPIO_FN_D13_NAF13, /* share with FLCTL */
432 GPIO_FN_D14_NAF14, GPIO_FN_D15_NAF15, /* share with FLCTL */
433
434 GPIO_FN_D16, GPIO_FN_D17, GPIO_FN_D18, GPIO_FN_D19,
435 GPIO_FN_D20, GPIO_FN_D21, GPIO_FN_D22, GPIO_FN_D23,
436 GPIO_FN_D24, GPIO_FN_D25, GPIO_FN_D26, GPIO_FN_D27,
437 GPIO_FN_D28, GPIO_FN_D29, GPIO_FN_D30, GPIO_FN_D31,
438
439 GPIO_FN_WE0_FWE, /* share with FLCTL */
440 GPIO_FN_WE1,
441 GPIO_FN_WE2_ICIORD, /* share with PCMCIA */
442 GPIO_FN_WE3_ICIOWR, /* share with PCMCIA */
443 GPIO_FN_CKO, GPIO_FN_BS, GPIO_FN_RDWR,
444 GPIO_FN_RD_FSC, /* share with FLCTL */
445 GPIO_FN_WAIT_PORT177, /* WAIT Port 90/177 */
446 GPIO_FN_WAIT_PORT90,
447
448 GPIO_FN_FCE0, GPIO_FN_FCE1, GPIO_FN_FRB, /* FLCTL */
449
450 /* IRDA */
451 GPIO_FN_IRDA_FIRSEL, GPIO_FN_IRDA_IN, GPIO_FN_IRDA_OUT,
452
453 /* ATAPI */
454 GPIO_FN_IDE_D0, GPIO_FN_IDE_D1, GPIO_FN_IDE_D2,
455 GPIO_FN_IDE_D3, GPIO_FN_IDE_D4, GPIO_FN_IDE_D5,
456 GPIO_FN_IDE_D6, GPIO_FN_IDE_D7, GPIO_FN_IDE_D8,
457 GPIO_FN_IDE_D9, GPIO_FN_IDE_D10, GPIO_FN_IDE_D11,
458 GPIO_FN_IDE_D12, GPIO_FN_IDE_D13, GPIO_FN_IDE_D14,
459 GPIO_FN_IDE_D15, GPIO_FN_IDE_A0, GPIO_FN_IDE_A1,
460 GPIO_FN_IDE_A2, GPIO_FN_IDE_CS0, GPIO_FN_IDE_CS1,
461 GPIO_FN_IDE_IOWR, GPIO_FN_IDE_IORD, GPIO_FN_IDE_IORDY,
462 GPIO_FN_IDE_INT, GPIO_FN_IDE_RST, GPIO_FN_IDE_DIRECTION,
463 GPIO_FN_IDE_EXBUF_ENB, GPIO_FN_IDE_IODACK, GPIO_FN_IDE_IODREQ,
464
465 /* RMII */
466 GPIO_FN_RMII_CRS_DV, GPIO_FN_RMII_RX_ER, GPIO_FN_RMII_RXD0,
467 GPIO_FN_RMII_RXD1, GPIO_FN_RMII_TX_EN, GPIO_FN_RMII_TXD0,
468 GPIO_FN_RMII_MDC, GPIO_FN_RMII_TXD1, GPIO_FN_RMII_MDIO,
469 GPIO_FN_RMII_REF50CK, /* for RMII */
470 GPIO_FN_RMII_REF125CK, /* for GMII */
471
472 /* GEther */
473 GPIO_FN_ET_TX_CLK, GPIO_FN_ET_TX_EN, GPIO_FN_ET_ETXD0,
474 GPIO_FN_ET_ETXD1, GPIO_FN_ET_ETXD2, GPIO_FN_ET_ETXD3,
475 GPIO_FN_ET_ETXD4, GPIO_FN_ET_ETXD5, /* for GEther */
476 GPIO_FN_ET_ETXD6, GPIO_FN_ET_ETXD7, /* for GEther */
477 GPIO_FN_ET_COL, GPIO_FN_ET_TX_ER,
478 GPIO_FN_ET_RX_CLK, GPIO_FN_ET_RX_DV,
479 GPIO_FN_ET_ERXD0, GPIO_FN_ET_ERXD1,
480 GPIO_FN_ET_ERXD2, GPIO_FN_ET_ERXD3,
481 GPIO_FN_ET_ERXD4, GPIO_FN_ET_ERXD5, /* for GEther */
482 GPIO_FN_ET_ERXD6, GPIO_FN_ET_ERXD7, /* for GEther */
483 GPIO_FN_ET_RX_ER, GPIO_FN_ET_CRS,
484 GPIO_FN_ET_MDC, GPIO_FN_ET_MDIO,
485 GPIO_FN_ET_LINK, GPIO_FN_ET_PHY_INT,
486 GPIO_FN_ET_WOL, GPIO_FN_ET_GTX_CLK,
487
488 /* DMA0 */
489 GPIO_FN_DREQ0, GPIO_FN_DACK0,
490
491 /* DMA1 */
492 GPIO_FN_DREQ1, GPIO_FN_DACK1,
493
494 /* SYSC */
495 GPIO_FN_RESETOUTS,
496 GPIO_FN_RESETP_PULLUP,
497 GPIO_FN_RESETP_PLAIN,
498
499 /* HDMI */
500 GPIO_FN_HDMI_HPD,
501 GPIO_FN_HDMI_CEC,
502
503 /* SDENC */
504 GPIO_FN_SDENC_CPG,
505 GPIO_FN_SDENC_DV_CLKI,
506
507 /* IRREM */
508 GPIO_FN_IROUT,
509
510 /* DEBUG */
511 GPIO_FN_EDEBGREQ_PULLDOWN,
512 GPIO_FN_EDEBGREQ_PULLUP,
513
514 GPIO_FN_TRACEAUD_FROM_VIO,
515 GPIO_FN_TRACEAUD_FROM_LCDC0,
516 GPIO_FN_TRACEAUD_FROM_MEMC,
517};
518
519/* DMA slave IDs */ 31/* DMA slave IDs */
520enum { 32enum {
521 SHDMA_SLAVE_INVALID, 33 SHDMA_SLAVE_INVALID,
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
index 951149e6bcca..68053fc4d9dc 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
@@ -28,5 +28,6 @@ extern void r8a7778_init_irq(void);
28extern void r8a7778_init_irq_dt(void); 28extern void r8a7778_init_irq_dt(void);
29extern void r8a7778_clock_init(void); 29extern void r8a7778_clock_init(void);
30extern void r8a7778_init_irq_extpin(int irlm); 30extern void r8a7778_init_irq_extpin(int irlm);
31extern void r8a7778_pinmux_init(void);
31 32
32#endif /* __ASM_R8A7778_H__ */ 33#endif /* __ASM_R8A7778_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
index fd7cba024c39..e882717ca97f 100644
--- a/arch/arm/mach-shmobile/include/mach/sh7372.h
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -15,397 +15,6 @@
15#include <linux/pm_domain.h> 15#include <linux/pm_domain.h>
16#include <mach/pm-rmobile.h> 16#include <mach/pm-rmobile.h>
17 17
18/*
19 * Pin Function Controller:
20 * GPIO_FN_xx - GPIO used to select pin function
21 * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
22 */
23enum {
24 /* PORT */
25 GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
26 GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
27
28 GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
29 GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
30
31 GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
32 GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
33
34 GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
35 GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
36
37 GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
38 GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
39
40 GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
41 GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
42
43 GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
44 GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
45
46 GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
47 GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
48
49 GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
50 GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
51
52 GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
53 GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
54
55 GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
56 GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
57
58 GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
59 GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119,
60
61 GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124,
62 GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129,
63
64 GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
65 GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
66
67 GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
68 GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
69
70 GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
71 GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
72
73 GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
74 GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169,
75
76 GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174,
77 GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179,
78
79 GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184,
80 GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189,
81
82 GPIO_PORT190,
83
84 /* IRQ */
85 GPIO_FN_IRQ0_6, /* PORT 6 */
86 GPIO_FN_IRQ0_162, /* PORT 162 */
87 GPIO_FN_IRQ1, /* PORT 12 */
88 GPIO_FN_IRQ2_4, /* PORT 4 */
89 GPIO_FN_IRQ2_5, /* PORT 5 */
90 GPIO_FN_IRQ3_8, /* PORT 8 */
91 GPIO_FN_IRQ3_16, /* PORT 16 */
92 GPIO_FN_IRQ4_17, /* PORT 17 */
93 GPIO_FN_IRQ4_163, /* PORT 163 */
94 GPIO_FN_IRQ5, /* PORT 18 */
95 GPIO_FN_IRQ6_39, /* PORT 39 */
96 GPIO_FN_IRQ6_164, /* PORT 164 */
97 GPIO_FN_IRQ7_40, /* PORT 40 */
98 GPIO_FN_IRQ7_167, /* PORT 167 */
99 GPIO_FN_IRQ8_41, /* PORT 41 */
100 GPIO_FN_IRQ8_168, /* PORT 168 */
101 GPIO_FN_IRQ9_42, /* PORT 42 */
102 GPIO_FN_IRQ9_169, /* PORT 169 */
103 GPIO_FN_IRQ10, /* PORT 65 */
104 GPIO_FN_IRQ11, /* PORT 67 */
105 GPIO_FN_IRQ12_80, /* PORT 80 */
106 GPIO_FN_IRQ12_137, /* PORT 137 */
107 GPIO_FN_IRQ13_81, /* PORT 81 */
108 GPIO_FN_IRQ13_145, /* PORT 145 */
109 GPIO_FN_IRQ14_82, /* PORT 82 */
110 GPIO_FN_IRQ14_146, /* PORT 146 */
111 GPIO_FN_IRQ15_83, /* PORT 83 */
112 GPIO_FN_IRQ15_147, /* PORT 147 */
113 GPIO_FN_IRQ16_84, /* PORT 84 */
114 GPIO_FN_IRQ16_170, /* PORT 170 */
115 GPIO_FN_IRQ17, /* PORT 85 */
116 GPIO_FN_IRQ18, /* PORT 86 */
117 GPIO_FN_IRQ19, /* PORT 87 */
118 GPIO_FN_IRQ20, /* PORT 92 */
119 GPIO_FN_IRQ21, /* PORT 93 */
120 GPIO_FN_IRQ22, /* PORT 94 */
121 GPIO_FN_IRQ23, /* PORT 95 */
122 GPIO_FN_IRQ24, /* PORT 112 */
123 GPIO_FN_IRQ25, /* PORT 119 */
124 GPIO_FN_IRQ26_121, /* PORT 121 */
125 GPIO_FN_IRQ26_172, /* PORT 172 */
126 GPIO_FN_IRQ27_122, /* PORT 122 */
127 GPIO_FN_IRQ27_180, /* PORT 180 */
128 GPIO_FN_IRQ28_123, /* PORT 123 */
129 GPIO_FN_IRQ28_181, /* PORT 181 */
130 GPIO_FN_IRQ29_129, /* PORT 129 */
131 GPIO_FN_IRQ29_182, /* PORT 182 */
132 GPIO_FN_IRQ30_130, /* PORT 130 */
133 GPIO_FN_IRQ30_183, /* PORT 183 */
134 GPIO_FN_IRQ31_138, /* PORT 138 */
135 GPIO_FN_IRQ31_184, /* PORT 184 */
136
137 /*
138 * MSIOF0 (PORT 36, 37, 38, 39
139 * 40, 41, 42, 43, 44, 45)
140 */
141 GPIO_FN_MSIOF0_TSYNC, GPIO_FN_MSIOF0_TSCK,
142 GPIO_FN_MSIOF0_RXD, GPIO_FN_MSIOF0_RSCK,
143 GPIO_FN_MSIOF0_RSYNC, GPIO_FN_MSIOF0_MCK0,
144 GPIO_FN_MSIOF0_MCK1, GPIO_FN_MSIOF0_SS1,
145 GPIO_FN_MSIOF0_SS2, GPIO_FN_MSIOF0_TXD,
146
147 /*
148 * MSIOF1 (PORT 39, 40, 41, 42, 43, 44
149 * 84, 85, 86, 87, 88, 89, 90, 91, 92, 93)
150 */
151 GPIO_FN_MSIOF1_TSCK_39, GPIO_FN_MSIOF1_TSYNC_40,
152 GPIO_FN_MSIOF1_TSCK_88, GPIO_FN_MSIOF1_TSYNC_89,
153 GPIO_FN_MSIOF1_TXD_41, GPIO_FN_MSIOF1_RXD_42,
154 GPIO_FN_MSIOF1_TXD_90, GPIO_FN_MSIOF1_RXD_91,
155 GPIO_FN_MSIOF1_SS1_43, GPIO_FN_MSIOF1_SS2_44,
156 GPIO_FN_MSIOF1_SS1_92, GPIO_FN_MSIOF1_SS2_93,
157 GPIO_FN_MSIOF1_RSCK, GPIO_FN_MSIOF1_RSYNC,
158 GPIO_FN_MSIOF1_MCK0, GPIO_FN_MSIOF1_MCK1,
159
160 /*
161 * MSIOF2 (PORT 134, 135, 136, 137, 138, 139
162 * 148, 149, 150, 151)
163 */
164 GPIO_FN_MSIOF2_RSCK, GPIO_FN_MSIOF2_RSYNC,
165 GPIO_FN_MSIOF2_MCK0, GPIO_FN_MSIOF2_MCK1,
166 GPIO_FN_MSIOF2_SS1, GPIO_FN_MSIOF2_SS2,
167 GPIO_FN_MSIOF2_TSYNC, GPIO_FN_MSIOF2_TSCK,
168 GPIO_FN_MSIOF2_RXD, GPIO_FN_MSIOF2_TXD,
169
170 /* MSIOF3 (PORT 76, 77, 78, 79, 80, 81, 82, 83) */
171 GPIO_FN_BBIF1_RXD, GPIO_FN_BBIF1_TSYNC,
172 GPIO_FN_BBIF1_TSCK, GPIO_FN_BBIF1_TXD,
173 GPIO_FN_BBIF1_RSCK, GPIO_FN_BBIF1_RSYNC,
174 GPIO_FN_BBIF1_FLOW, GPIO_FN_BB_RX_FLOW_N,
175
176 /* MSIOF4 (PORT 0, 1, 2, 3) */
177 GPIO_FN_BBIF2_TSCK1, GPIO_FN_BBIF2_TSYNC1,
178 GPIO_FN_BBIF2_TXD1, GPIO_FN_BBIF2_RXD,
179
180 /* FSI (PORT 4, 5, 6, 7, 8, 9, 10, 11, 15) */
181 GPIO_FN_FSIACK, GPIO_FN_FSIBCK,
182 GPIO_FN_FSIAILR, GPIO_FN_FSIAIBT,
183 GPIO_FN_FSIAISLD, GPIO_FN_FSIAOMC,
184 GPIO_FN_FSIAOLR, GPIO_FN_FSIAOBT,
185 GPIO_FN_FSIAOSLD, GPIO_FN_FSIASPDIF_11,
186 GPIO_FN_FSIASPDIF_15,
187
188 /* FMSI (PORT 12, 13, 14, 15, 16, 17, 18, 65) */
189 GPIO_FN_FMSOCK, GPIO_FN_FMSOOLR,
190 GPIO_FN_FMSIOLR, GPIO_FN_FMSOOBT,
191 GPIO_FN_FMSIOBT, GPIO_FN_FMSOSLD,
192 GPIO_FN_FMSOILR, GPIO_FN_FMSIILR,
193 GPIO_FN_FMSOIBT, GPIO_FN_FMSIIBT,
194 GPIO_FN_FMSISLD, GPIO_FN_FMSICK,
195
196 /* SCIFA0 (PORT 152, 153, 156, 157, 158) */
197 GPIO_FN_SCIFA0_TXD, GPIO_FN_SCIFA0_RXD,
198 GPIO_FN_SCIFA0_SCK, GPIO_FN_SCIFA0_RTS,
199 GPIO_FN_SCIFA0_CTS,
200
201 /* SCIFA1 (PORT 154, 155, 159, 160, 161) */
202 GPIO_FN_SCIFA1_TXD, GPIO_FN_SCIFA1_RXD,
203 GPIO_FN_SCIFA1_SCK, GPIO_FN_SCIFA1_RTS,
204 GPIO_FN_SCIFA1_CTS,
205
206 /* SCIFA2 (PORT 94, 95, 96, 97, 98) */
207 GPIO_FN_SCIFA2_CTS1, GPIO_FN_SCIFA2_RTS1,
208 GPIO_FN_SCIFA2_TXD1, GPIO_FN_SCIFA2_RXD1,
209 GPIO_FN_SCIFA2_SCK1,
210
211 /* SCIFA3 (PORT 43, 44,
212 140, 141, 142, 143, 144) */
213 GPIO_FN_SCIFA3_CTS_43, GPIO_FN_SCIFA3_CTS_140,
214 GPIO_FN_SCIFA3_RTS_44, GPIO_FN_SCIFA3_RTS_141,
215 GPIO_FN_SCIFA3_SCK, GPIO_FN_SCIFA3_TXD,
216 GPIO_FN_SCIFA3_RXD,
217
218 /* SCIFA4 (PORT 5, 6) */
219 GPIO_FN_SCIFA4_RXD, GPIO_FN_SCIFA4_TXD,
220
221 /* SCIFA5 (PORT 8, 12) */
222 GPIO_FN_SCIFA5_RXD, GPIO_FN_SCIFA5_TXD,
223
224 /* SCIFB (PORT 162, 163, 164, 165, 166) */
225 GPIO_FN_SCIFB_SCK, GPIO_FN_SCIFB_RTS,
226 GPIO_FN_SCIFB_CTS, GPIO_FN_SCIFB_TXD,
227 GPIO_FN_SCIFB_RXD,
228
229 /*
230 * CEU (PORT 16, 17,
231 * 100, 101, 102, 103, 104, 105, 106, 107, 108, 109,
232 * 110, 111, 112, 113, 114, 115, 116, 117, 118, 119,
233 * 120)
234 */
235 GPIO_FN_VIO_HD, GPIO_FN_VIO_CKO1, GPIO_FN_VIO_CKO2,
236 GPIO_FN_VIO_VD, GPIO_FN_VIO_CLK, GPIO_FN_VIO_FIELD,
237 GPIO_FN_VIO_CKO,
238 GPIO_FN_VIO_D0, GPIO_FN_VIO_D1, GPIO_FN_VIO_D2,
239 GPIO_FN_VIO_D3, GPIO_FN_VIO_D4, GPIO_FN_VIO_D5,
240 GPIO_FN_VIO_D6, GPIO_FN_VIO_D7, GPIO_FN_VIO_D8,
241 GPIO_FN_VIO_D9, GPIO_FN_VIO_D10, GPIO_FN_VIO_D11,
242 GPIO_FN_VIO_D12, GPIO_FN_VIO_D13, GPIO_FN_VIO_D14,
243 GPIO_FN_VIO_D15,
244
245 /* USB0 (PORT 113, 114, 115, 116, 117, 167) */
246 GPIO_FN_IDIN_0, GPIO_FN_EXTLP_0,
247 GPIO_FN_OVCN2_0, GPIO_FN_PWEN_0,
248 GPIO_FN_OVCN_0, GPIO_FN_VBUS0_0,
249
250 /* USB1 (PORT 18, 113, 114, 115, 116, 117, 138, 162, 168) */
251 GPIO_FN_IDIN_1_18, GPIO_FN_IDIN_1_113,
252 GPIO_FN_PWEN_1_115, GPIO_FN_PWEN_1_138,
253 GPIO_FN_OVCN_1_114, GPIO_FN_OVCN_1_162,
254 GPIO_FN_EXTLP_1, GPIO_FN_OVCN2_1,
255 GPIO_FN_VBUS0_1,
256
257 /* GPIO (PORT 41, 42, 43, 44) */
258 GPIO_FN_GPI0, GPIO_FN_GPI1, GPIO_FN_GPO0, GPIO_FN_GPO1,
259
260 /*
261 * BSC (PORT 19,
262 * 20, 21, 22, 25, 26, 27, 28, 29,
263 * 30, 31, 32, 33, 34, 35, 36, 37, 38, 39,
264 * 40, 41, 42, 43, 44, 45,
265 * 62, 63, 64, 65, 66, 67,
266 * 71, 72, 74, 75)
267 */
268 GPIO_FN_BS, GPIO_FN_WE1,
269 GPIO_FN_CKO, GPIO_FN_WAIT, GPIO_FN_RDWR,
270
271 GPIO_FN_A0, GPIO_FN_A1, GPIO_FN_A2, GPIO_FN_A3,
272 GPIO_FN_A6, GPIO_FN_A7, GPIO_FN_A8, GPIO_FN_A9,
273 GPIO_FN_A10, GPIO_FN_A11, GPIO_FN_A12, GPIO_FN_A13,
274 GPIO_FN_A14, GPIO_FN_A15, GPIO_FN_A16, GPIO_FN_A17,
275 GPIO_FN_A18, GPIO_FN_A19, GPIO_FN_A20, GPIO_FN_A21,
276 GPIO_FN_A22, GPIO_FN_A23, GPIO_FN_A24, GPIO_FN_A25,
277 GPIO_FN_A26,
278
279 GPIO_FN_CS0, GPIO_FN_CS2, GPIO_FN_CS4,
280 GPIO_FN_CS5A, GPIO_FN_CS5B, GPIO_FN_CS6A,
281
282 /*
283 * BSC/FLCTL (PORT 23, 24,
284 * 46, 47, 48, 49,
285 * 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,
286 * 60, 61, 69, 70)
287 */
288 GPIO_FN_RD_FSC, GPIO_FN_WE0_FWE,
289 GPIO_FN_A4_FOE, GPIO_FN_A5_FCDE,
290 GPIO_FN_D0_NAF0, GPIO_FN_D1_NAF1, GPIO_FN_D2_NAF2,
291 GPIO_FN_D3_NAF3, GPIO_FN_D4_NAF4, GPIO_FN_D5_NAF5,
292 GPIO_FN_D6_NAF6, GPIO_FN_D7_NAF7, GPIO_FN_D8_NAF8,
293 GPIO_FN_D9_NAF9, GPIO_FN_D10_NAF10, GPIO_FN_D11_NAF11,
294 GPIO_FN_D12_NAF12, GPIO_FN_D13_NAF13, GPIO_FN_D14_NAF14,
295 GPIO_FN_D15_NAF15,
296
297 /* SPU2 (PORT 65) */
298 GPIO_FN_VINT_I,
299
300 /* FLCTL (PORT 66, 68, 73) */
301 GPIO_FN_FCE1, GPIO_FN_FCE0, GPIO_FN_FRB,
302
303 /* HSI (PORT 76, 77, 78, 79, 80, 81, 82, 83) */
304 GPIO_FN_GP_RX_FLAG, GPIO_FN_GP_RX_DATA, GPIO_FN_GP_TX_READY,
305 GPIO_FN_GP_RX_WAKE, GPIO_FN_MP_TX_FLAG, GPIO_FN_MP_TX_DATA,
306 GPIO_FN_MP_RX_READY, GPIO_FN_MP_TX_WAKE,
307
308 /*
309 * MFI (PORT 76, 77, 78, 79,
310 * 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
311 * 90, 91, 92, 93, 94, 95, 96, 97, 98, 99)
312 */
313 GPIO_FN_MFIv6, /* see MSEL4CR 6 */
314 GPIO_FN_MFIv4, /* see MSEL4CR 6 */
315
316 GPIO_FN_MEMC_CS0, GPIO_FN_MEMC_BUSCLK_MEMC_A0,
317 GPIO_FN_MEMC_CS1_MEMC_A1, GPIO_FN_MEMC_ADV_MEMC_DREQ0,
318 GPIO_FN_MEMC_WAIT_MEMC_DREQ1, GPIO_FN_MEMC_NOE,
319 GPIO_FN_MEMC_NWE, GPIO_FN_MEMC_INT,
320
321 GPIO_FN_MEMC_AD0, GPIO_FN_MEMC_AD1, GPIO_FN_MEMC_AD2,
322 GPIO_FN_MEMC_AD3, GPIO_FN_MEMC_AD4, GPIO_FN_MEMC_AD5,
323 GPIO_FN_MEMC_AD6, GPIO_FN_MEMC_AD7, GPIO_FN_MEMC_AD8,
324 GPIO_FN_MEMC_AD9, GPIO_FN_MEMC_AD10, GPIO_FN_MEMC_AD11,
325 GPIO_FN_MEMC_AD12, GPIO_FN_MEMC_AD13, GPIO_FN_MEMC_AD14,
326 GPIO_FN_MEMC_AD15,
327
328 /* SIM (PORT 94, 95, 98) */
329 GPIO_FN_SIM_RST, GPIO_FN_SIM_CLK, GPIO_FN_SIM_D,
330
331 /* TPU (PORT 93, 99, 112, 160, 161) */
332 GPIO_FN_TPU0TO0, GPIO_FN_TPU0TO1,
333 GPIO_FN_TPU0TO2_93, GPIO_FN_TPU0TO2_99,
334 GPIO_FN_TPU0TO3,
335
336 /* I2C2 (PORT 110, 111) */
337 GPIO_FN_I2C_SCL2, GPIO_FN_I2C_SDA2,
338
339 /* I2C3(1) (PORT 114, 115) */
340 GPIO_FN_I2C_SCL3, GPIO_FN_I2C_SDA3,
341
342 /* I2C3(2) (PORT 137, 145) */
343 GPIO_FN_I2C_SCL3S, GPIO_FN_I2C_SDA3S,
344
345 /* I2C4(2) (PORT 116, 117) */
346 GPIO_FN_I2C_SCL4, GPIO_FN_I2C_SDA4,
347
348 /* I2C4(2) (PORT 146, 147) */
349 GPIO_FN_I2C_SCL4S, GPIO_FN_I2C_SDA4S,
350
351 /*
352 * KEYSC (PORT 121, 122, 123, 124, 125, 126, 127, 128, 129,
353 * 130, 131, 132, 133, 134, 135, 136)
354 */
355 GPIO_FN_KEYOUT0, GPIO_FN_KEYIN0_121, GPIO_FN_KEYIN0_136,
356 GPIO_FN_KEYOUT1, GPIO_FN_KEYIN1_122, GPIO_FN_KEYIN1_135,
357 GPIO_FN_KEYOUT2, GPIO_FN_KEYIN2_123, GPIO_FN_KEYIN2_134,
358 GPIO_FN_KEYOUT3, GPIO_FN_KEYIN3_124, GPIO_FN_KEYIN3_133,
359 GPIO_FN_KEYOUT4, GPIO_FN_KEYIN4,
360 GPIO_FN_KEYOUT5, GPIO_FN_KEYIN5,
361 GPIO_FN_KEYOUT6, GPIO_FN_KEYIN6,
362 GPIO_FN_KEYOUT7, GPIO_FN_KEYIN7,
363
364 /*
365 * LCDC (PORT 121, 122, 123, 124, 125, 126, 127, 128, 129,
366 * 130, 131, 132, 133, 134, 135, 136, 137, 138, 139,
367 * 140, 141, 142, 143, 144, 145, 146, 147, 148, 149,
368 * 150, 151)
369 */
370 GPIO_FN_LCDC0_SELECT, /* LCDC 0 */
371 GPIO_FN_LCDC1_SELECT, /* LCDC 1 */
372 GPIO_FN_LCDHSYN, GPIO_FN_LCDCS, GPIO_FN_LCDVSYN,
373 GPIO_FN_LCDDCK, GPIO_FN_LCDWR, GPIO_FN_LCDRD,
374 GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_LCDLCLK,
375 GPIO_FN_LCDDON,
376
377 GPIO_FN_LCDD0, GPIO_FN_LCDD1, GPIO_FN_LCDD2, GPIO_FN_LCDD3,
378 GPIO_FN_LCDD4, GPIO_FN_LCDD5, GPIO_FN_LCDD6, GPIO_FN_LCDD7,
379 GPIO_FN_LCDD8, GPIO_FN_LCDD9, GPIO_FN_LCDD10, GPIO_FN_LCDD11,
380 GPIO_FN_LCDD12, GPIO_FN_LCDD13, GPIO_FN_LCDD14, GPIO_FN_LCDD15,
381 GPIO_FN_LCDD16, GPIO_FN_LCDD17, GPIO_FN_LCDD18, GPIO_FN_LCDD19,
382 GPIO_FN_LCDD20, GPIO_FN_LCDD21, GPIO_FN_LCDD22, GPIO_FN_LCDD23,
383
384 /* IRDA (PORT 139, 140, 141, 142) */
385 GPIO_FN_IRDA_OUT, GPIO_FN_IRDA_IN, GPIO_FN_IRDA_FIRSEL,
386 GPIO_FN_IROUT_139, GPIO_FN_IROUT_140,
387
388 /* TSIF1 (PORT 156, 157, 158, 159) */
389 GPIO_FN_TS0_1SELECT, /* TSIF0 - 1 select */
390 GPIO_FN_TS0_2SELECT, /* TSIF0 - 2 select */
391 GPIO_FN_TS1_1SELECT, /* TSIF1 - 1 select */
392 GPIO_FN_TS1_2SELECT, /* TSIF1 - 2 select */
393
394 GPIO_FN_TS_SPSYNC1, GPIO_FN_TS_SDAT1,
395 GPIO_FN_TS_SDEN1, GPIO_FN_TS_SCK1,
396
397 /* TSIF2 (PORT 137, 145, 146, 147) */
398 GPIO_FN_TS_SPSYNC2, GPIO_FN_TS_SDAT2,
399 GPIO_FN_TS_SDEN2, GPIO_FN_TS_SCK2,
400
401 /* HDMI (PORT 169, 170) */
402 GPIO_FN_HDMI_HPD, GPIO_FN_HDMI_CEC,
403
404 /* SDENC see MSEL4CR 19 */
405 GPIO_FN_SDENC_CPG,
406 GPIO_FN_SDENC_DV_CLKI,
407};
408
409/* DMA slave IDs */ 18/* DMA slave IDs */
410enum { 19enum {
411 SHDMA_SLAVE_INVALID, 20 SHDMA_SLAVE_INVALID,
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 326a4ab0bd5f..3a6b6fe7b6c0 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -70,29 +70,15 @@ void __init r8a7740_map_io(void)
70} 70}
71 71
72/* PFC */ 72/* PFC */
73static struct resource r8a7740_pfc_resources[] = { 73static const struct resource pfc_resources[] = {
74 [0] = { 74 DEFINE_RES_MEM(0xe6050000, 0x8000),
75 .start = 0xe6050000, 75 DEFINE_RES_MEM(0xe605800c, 0x0020),
76 .end = 0xe6057fff,
77 .flags = IORESOURCE_MEM,
78 },
79 [1] = {
80 .start = 0xe605800c,
81 .end = 0xe605802b,
82 .flags = IORESOURCE_MEM,
83 }
84};
85
86static struct platform_device r8a7740_pfc_device = {
87 .name = "pfc-r8a7740",
88 .id = -1,
89 .resource = r8a7740_pfc_resources,
90 .num_resources = ARRAY_SIZE(r8a7740_pfc_resources),
91}; 76};
92 77
93void __init r8a7740_pinmux_init(void) 78void __init r8a7740_pinmux_init(void)
94{ 79{
95 platform_device_register(&r8a7740_pfc_device); 80 platform_device_register_simple("pfc-r8a7740", -1, pfc_resources,
81 ARRAY_SIZE(pfc_resources));
96} 82}
97 83
98static struct renesas_intc_irqpin_config irqpin0_platform_data = { 84static struct renesas_intc_irqpin_config irqpin0_platform_data = {
diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
index 30b4a336308f..1f36ecc322a3 100644
--- a/arch/arm/mach-shmobile/setup-r8a7778.c
+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
@@ -24,6 +24,7 @@
24#include <linux/irqchip/arm-gic.h> 24#include <linux/irqchip/arm-gic.h>
25#include <linux/of.h> 25#include <linux/of.h>
26#include <linux/of_platform.h> 26#include <linux/of_platform.h>
27#include <linux/platform_data/gpio-rcar.h>
27#include <linux/platform_data/irq-renesas-intc-irqpin.h> 28#include <linux/platform_data/irq-renesas-intc-irqpin.h>
28#include <linux/platform_device.h> 29#include <linux/platform_device.h>
29#include <linux/irqchip.h> 30#include <linux/irqchip.h>
@@ -94,6 +95,52 @@ static struct resource ether_resources[] = {
94 &sh_tmu##idx##_platform_data, \ 95 &sh_tmu##idx##_platform_data, \
95 sizeof(sh_tmu##idx##_platform_data)) 96 sizeof(sh_tmu##idx##_platform_data))
96 97
98/* PFC/GPIO */
99static struct resource pfc_resources[] = {
100 DEFINE_RES_MEM(0xfffc0000, 0x118),
101};
102
103#define R8A7778_GPIO(idx) \
104static struct resource r8a7778_gpio##idx##_resources[] = { \
105 DEFINE_RES_MEM(0xffc40000 + 0x1000 * (idx), 0x30), \
106 DEFINE_RES_IRQ(gic_iid(0x87)), \
107}; \
108 \
109static struct gpio_rcar_config r8a7778_gpio##idx##_platform_data = { \
110 .gpio_base = 32 * (idx), \
111 .irq_base = GPIO_IRQ_BASE(idx), \
112 .number_of_pins = 32, \
113 .pctl_name = "pfc-r8a7778", \
114}
115
116R8A7778_GPIO(0);
117R8A7778_GPIO(1);
118R8A7778_GPIO(2);
119R8A7778_GPIO(3);
120R8A7778_GPIO(4);
121
122#define r8a7778_register_gpio(idx) \
123 platform_device_register_resndata( \
124 &platform_bus, "gpio_rcar", idx, \
125 r8a7778_gpio##idx##_resources, \
126 ARRAY_SIZE(r8a7778_gpio##idx##_resources), \
127 &r8a7778_gpio##idx##_platform_data, \
128 sizeof(r8a7778_gpio##idx##_platform_data))
129
130void __init r8a7778_pinmux_init(void)
131{
132 platform_device_register_simple(
133 "pfc-r8a7778", -1,
134 pfc_resources,
135 ARRAY_SIZE(pfc_resources));
136
137 r8a7778_register_gpio(0);
138 r8a7778_register_gpio(1);
139 r8a7778_register_gpio(2);
140 r8a7778_register_gpio(3);
141 r8a7778_register_gpio(4);
142}
143
97void __init r8a7778_add_standard_devices(void) 144void __init r8a7778_add_standard_devices(void)
98{ 145{
99 int i; 146 int i;
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index b0b394842ea5..dbb13f289e79 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -65,11 +65,7 @@ void __init r8a7779_map_io(void)
65} 65}
66 66
67static struct resource r8a7779_pfc_resources[] = { 67static struct resource r8a7779_pfc_resources[] = {
68 [0] = { 68 DEFINE_RES_MEM(0xfffc0000, 0x023c),
69 .start = 0xfffc0000,
70 .end = 0xfffc023b,
71 .flags = IORESOURCE_MEM,
72 },
73}; 69};
74 70
75static struct platform_device r8a7779_pfc_device = { 71static struct platform_device r8a7779_pfc_device = {
@@ -81,15 +77,8 @@ static struct platform_device r8a7779_pfc_device = {
81 77
82#define R8A7779_GPIO(idx, npins) \ 78#define R8A7779_GPIO(idx, npins) \
83static struct resource r8a7779_gpio##idx##_resources[] = { \ 79static struct resource r8a7779_gpio##idx##_resources[] = { \
84 [0] = { \ 80 DEFINE_RES_MEM(0xffc40000 + (0x1000 * (idx)), 0x002c), \
85 .start = 0xffc40000 + 0x1000 * (idx), \ 81 DEFINE_RES_IRQ(gic_iid(0xad + (idx))), \
86 .end = 0xffc4002b + 0x1000 * (idx), \
87 .flags = IORESOURCE_MEM, \
88 }, \
89 [1] = { \
90 .start = gic_iid(0xad + (idx)), \
91 .flags = IORESOURCE_IRQ, \
92 } \
93}; \ 82}; \
94 \ 83 \
95static struct gpio_rcar_config r8a7779_gpio##idx##_platform_data = { \ 84static struct gpio_rcar_config r8a7779_gpio##idx##_platform_data = { \
diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
index 49de2d56f86d..b461d93431ed 100644
--- a/arch/arm/mach-shmobile/setup-r8a7790.c
+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
@@ -23,6 +23,7 @@
23#include <linux/kernel.h> 23#include <linux/kernel.h>
24#include <linux/of_platform.h> 24#include <linux/of_platform.h>
25#include <linux/serial_sci.h> 25#include <linux/serial_sci.h>
26#include <linux/platform_data/gpio-rcar.h>
26#include <linux/platform_data/irq-renesas-irqc.h> 27#include <linux/platform_data/irq-renesas-irqc.h>
27#include <mach/common.h> 28#include <mach/common.h>
28#include <mach/irqs.h> 29#include <mach/irqs.h>
@@ -31,13 +32,46 @@
31 32
32static const struct resource pfc_resources[] = { 33static const struct resource pfc_resources[] = {
33 DEFINE_RES_MEM(0xe6060000, 0x250), 34 DEFINE_RES_MEM(0xe6060000, 0x250),
34 DEFINE_RES_MEM(0xe6050000, 0x5050),
35}; 35};
36 36
37#define R8A7790_GPIO(idx) \
38static struct resource r8a7790_gpio##idx##_resources[] = { \
39 DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50), \
40 DEFINE_RES_IRQ(gic_spi(4 + (idx))), \
41}; \
42 \
43static struct gpio_rcar_config r8a7790_gpio##idx##_platform_data = { \
44 .gpio_base = 32 * (idx), \
45 .irq_base = 0, \
46 .number_of_pins = 32, \
47 .pctl_name = "pfc-r8a7790", \
48 .has_both_edge_trigger = 1, \
49}; \
50
51R8A7790_GPIO(0);
52R8A7790_GPIO(1);
53R8A7790_GPIO(2);
54R8A7790_GPIO(3);
55R8A7790_GPIO(4);
56R8A7790_GPIO(5);
57
58#define r8a7790_register_gpio(idx) \
59 platform_device_register_resndata(&platform_bus, "gpio_rcar", idx, \
60 r8a7790_gpio##idx##_resources, \
61 ARRAY_SIZE(r8a7790_gpio##idx##_resources), \
62 &r8a7790_gpio##idx##_platform_data, \
63 sizeof(r8a7790_gpio##idx##_platform_data))
64
37void __init r8a7790_pinmux_init(void) 65void __init r8a7790_pinmux_init(void)
38{ 66{
39 platform_device_register_simple("pfc-r8a7790", -1, pfc_resources, 67 platform_device_register_simple("pfc-r8a7790", -1, pfc_resources,
40 ARRAY_SIZE(pfc_resources)); 68 ARRAY_SIZE(pfc_resources));
69 r8a7790_register_gpio(0);
70 r8a7790_register_gpio(1);
71 r8a7790_register_gpio(2);
72 r8a7790_register_gpio(3);
73 r8a7790_register_gpio(4);
74 r8a7790_register_gpio(5);
41} 75}
42 76
43#define SCIF_COMMON(scif_type, baseaddr, irq) \ 77#define SCIF_COMMON(scif_type, baseaddr, irq) \
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-22 22:59:17 -0500