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authorBen Dooks <ben-linux@fluff.org>2010-01-25 20:38:52 -0500
committerBen Dooks <ben-linux@fluff.org>2010-01-25 20:38:52 -0500
commit2f6c2ac1d945ffc2e343103bdcfccbdb2e2de805 (patch)
tree738e1ead7db6798944179f8eac2c963ff5f72ab6 /arch/arm
parent97ce9d6938d58e7846dc0365c720c13ebe64547e (diff)
ARM: S3C64XX: Squash SDHCI setup into one file
Squash the SDHCI setup for both the S3C6400 and S3C6410 into one file and make the S3C6410 case use the S3C6400 code. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-s3c64xx/Kconfig17
-rw-r--r--arch/arm/mach-s3c64xx/Makefile3
-rw-r--r--arch/arm/mach-s3c64xx/setup-sdhci-s3c6410.c68
-rw-r--r--arch/arm/mach-s3c64xx/setup-sdhci.c (renamed from arch/arm/mach-s3c64xx/setup-sdhci-s3c6400.c)13
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h43
5 files changed, 37 insertions, 107 deletions
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 551bb3faa3ac..ce32e4997d76 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -19,17 +19,12 @@ config CPU_S3C6410
19 help 19 help
20 Enable S3C6410 CPU support 20 Enable S3C6410 CPU support
21 21
22config S3C6400_SETUP_SDHCI 22config S3C64XX_SETUP_SDHCI
23 bool
24 help
25 Internal configuration for default SDHCI
26 setup for S3C6400.
27
28config S3C6410_SETUP_SDHCI
29 bool
30 select S3C64XX_SETUP_SDHCI_GPIO 23 select S3C64XX_SETUP_SDHCI_GPIO
24 bool
31 help 25 help
32 Internal helper functions for S3C6410 based SDHCI systems 26 Internal configuration for default SDHCI setup for S3C6400 and
27 S3C6410 SoCs.
33 28
34# S36400 Macchine support 29# S36400 Macchine support
35 30
@@ -38,7 +33,7 @@ config MACH_SMDK6400
38 select CPU_S3C6400 33 select CPU_S3C6400
39 select S3C_DEV_HSMMC 34 select S3C_DEV_HSMMC
40 select S3C_DEV_NAND 35 select S3C_DEV_NAND
41 select S3C6400_SETUP_SDHCI 36 select S3C64XX_SETUP_SDHCI
42 help 37 help
43 Machine support for the Samsung SMDK6400 38 Machine support for the Samsung SMDK6400
44 39
@@ -61,7 +56,7 @@ config MACH_SMDK6410
61 select S3C_DEV_FB 56 select S3C_DEV_FB
62 select S3C_DEV_USB_HOST 57 select S3C_DEV_USB_HOST
63 select S3C_DEV_USB_HSOTG 58 select S3C_DEV_USB_HSOTG
64 select S3C6410_SETUP_SDHCI 59 select S3C64XX_SETUP_SDHCI
65 select S3C64XX_SETUP_I2C1 60 select S3C64XX_SETUP_I2C1
66 select S3C64XX_SETUP_FB_24BPP 61 select S3C64XX_SETUP_FB_24BPP
67 help 62 help
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index 24a3bc33da1e..21ddf6b29280 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -17,8 +17,7 @@ obj-$(CONFIG_CPU_S3C6410) += s3c6410.o
17 17
18# setup support 18# setup support
19 19
20obj-$(CONFIG_S3C6400_SETUP_SDHCI) += setup-sdhci-s3c6400.o 20obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o
21obj-$(CONFIG_S3C6410_SETUP_SDHCI) += setup-sdhci-s3c6410.o
22 21
23# Machine support 22# Machine support
24 23
diff --git a/arch/arm/mach-s3c64xx/setup-sdhci-s3c6410.c b/arch/arm/mach-s3c64xx/setup-sdhci-s3c6410.c
deleted file mode 100644
index 8d714a1f6dc7..000000000000
--- a/arch/arm/mach-s3c64xx/setup-sdhci-s3c6410.c
+++ /dev/null
@@ -1,68 +0,0 @@
1/* linux/arch/arm/mach-s3c64xx/setup-sdhci.c
2 *
3 * Copyright 2008 Simtec Electronics
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/interrupt.h>
18#include <linux/platform_device.h>
19#include <linux/io.h>
20
21#include <linux/mmc/card.h>
22#include <linux/mmc/host.h>
23
24#include <plat/regs-sdhci.h>
25#include <plat/sdhci.h>
26
27/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
28
29char *s3c6410_hsmmc_clksrcs[4] = {
30 [0] = "hsmmc",
31 [1] = "hsmmc",
32 [2] = "mmc_bus",
33 /* [3] = "48m", - note not successfully used yet */
34};
35
36
37void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev,
38 void __iomem *r,
39 struct mmc_ios *ios,
40 struct mmc_card *card)
41{
42 u32 ctrl2, ctrl3;
43
44 /* don't need to alter anything acording to card-type */
45
46 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
47
48 ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
49 ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
50 ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
51 S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
52 S3C_SDHCI_CTRL2_ENFBCLKRX |
53 S3C_SDHCI_CTRL2_DFCNT_NONE |
54 S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
55
56 if (ios->clock < 25 * 1000000)
57 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
58 S3C_SDHCI_CTRL3_FCSEL2 |
59 S3C_SDHCI_CTRL3_FCSEL1 |
60 S3C_SDHCI_CTRL3_FCSEL0);
61 else
62 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
63
64 printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
65 writel(ctrl2, r + S3C_SDHCI_CONTROL2);
66 writel(ctrl3, r + S3C_SDHCI_CONTROL3);
67}
68
diff --git a/arch/arm/mach-s3c64xx/setup-sdhci-s3c6400.c b/arch/arm/mach-s3c64xx/setup-sdhci.c
index ec96a5863c0c..1a942037c4ef 100644
--- a/arch/arm/mach-s3c64xx/setup-sdhci-s3c6400.c
+++ b/arch/arm/mach-s3c64xx/setup-sdhci.c
@@ -5,7 +5,7 @@
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/ 6 * http://armlinux.simtec.co.uk/
7 * 7 *
8 * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC) 8 * S3C6400/S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
@@ -26,7 +26,7 @@
26 26
27/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ 27/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
28 28
29char *s3c6400_hsmmc_clksrcs[4] = { 29char *s3c64xx_hsmmc_clksrcs[4] = {
30 [0] = "hsmmc", 30 [0] = "hsmmc",
31 [1] = "hsmmc", 31 [1] = "hsmmc",
32 [2] = "mmc_bus", 32 [2] = "mmc_bus",
@@ -61,3 +61,12 @@ void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
61 writel(ctrl3, r + S3C_SDHCI_CONTROL3); 61 writel(ctrl3, r + S3C_SDHCI_CONTROL3);
62} 62}
63 63
64void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
65 void __iomem *r,
66 struct mmc_ios *ios,
67 struct mmc_card *card)
68{
69 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
70
71 s3c6400_setup_sdhci_cfg_card(dev, r, ios, card);
72}
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 53198673b6bd..7d07cd7aa4f2 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -78,8 +78,8 @@ extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
78 78
79/* S3C6400 SDHCI setup */ 79/* S3C6400 SDHCI setup */
80 80
81#ifdef CONFIG_S3C6400_SETUP_SDHCI 81#ifdef CONFIG_S3C64XX_SETUP_SDHCI
82extern char *s3c6400_hsmmc_clksrcs[4]; 82extern char *s3c64xx_hsmmc_clksrcs[4];
83 83
84#ifdef CONFIG_S3C_DEV_HSMMC 84#ifdef CONFIG_S3C_DEV_HSMMC
85extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, 85extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
@@ -89,7 +89,7 @@ extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
89 89
90static inline void s3c6400_default_sdhci0(void) 90static inline void s3c6400_default_sdhci0(void)
91{ 91{
92 s3c_hsmmc0_def_platdata.clocks = s3c6400_hsmmc_clksrcs; 92 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
93 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; 93 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
94 s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; 94 s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
95} 95}
@@ -101,7 +101,7 @@ static inline void s3c6400_default_sdhci0(void) { }
101#ifdef CONFIG_S3C_DEV_HSMMC1 101#ifdef CONFIG_S3C_DEV_HSMMC1
102static inline void s3c6400_default_sdhci1(void) 102static inline void s3c6400_default_sdhci1(void)
103{ 103{
104 s3c_hsmmc1_def_platdata.clocks = s3c6400_hsmmc_clksrcs; 104 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
105 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; 105 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
106 s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; 106 s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
107} 107}
@@ -112,7 +112,7 @@ static inline void s3c6400_default_sdhci1(void) { }
112#ifdef CONFIG_S3C_DEV_HSMMC2 112#ifdef CONFIG_S3C_DEV_HSMMC2
113static inline void s3c6400_default_sdhci2(void) 113static inline void s3c6400_default_sdhci2(void)
114{ 114{
115 s3c_hsmmc2_def_platdata.clocks = s3c6400_hsmmc_clksrcs; 115 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
116 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; 116 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
117 s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; 117 s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
118} 118}
@@ -120,27 +120,19 @@ static inline void s3c6400_default_sdhci2(void)
120static inline void s3c6400_default_sdhci2(void) { } 120static inline void s3c6400_default_sdhci2(void) { }
121#endif /* CONFIG_S3C_DEV_HSMMC2 */ 121#endif /* CONFIG_S3C_DEV_HSMMC2 */
122 122
123#else
124static inline void s3c6400_default_sdhci0(void) { }
125static inline void s3c6400_default_sdhci1(void) { }
126#endif /* CONFIG_S3C6400_SETUP_SDHCI */
127
128/* S3C6410 SDHCI setup */ 123/* S3C6410 SDHCI setup */
129 124
130#ifdef CONFIG_S3C6410_SETUP_SDHCI 125extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
131extern char *s3c6410_hsmmc_clksrcs[4]; 126 void __iomem *r,
132 127 struct mmc_ios *ios,
133extern void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev, 128 struct mmc_card *card);
134 void __iomem *r,
135 struct mmc_ios *ios,
136 struct mmc_card *card);
137 129
138#ifdef CONFIG_S3C_DEV_HSMMC 130#ifdef CONFIG_S3C_DEV_HSMMC
139static inline void s3c6410_default_sdhci0(void) 131static inline void s3c6410_default_sdhci0(void)
140{ 132{
141 s3c_hsmmc0_def_platdata.clocks = s3c6410_hsmmc_clksrcs; 133 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
142 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; 134 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
143 s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; 135 s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
144} 136}
145#else 137#else
146static inline void s3c6410_default_sdhci0(void) { } 138static inline void s3c6410_default_sdhci0(void) { }
@@ -149,9 +141,9 @@ static inline void s3c6410_default_sdhci0(void) { }
149#ifdef CONFIG_S3C_DEV_HSMMC1 141#ifdef CONFIG_S3C_DEV_HSMMC1
150static inline void s3c6410_default_sdhci1(void) 142static inline void s3c6410_default_sdhci1(void)
151{ 143{
152 s3c_hsmmc1_def_platdata.clocks = s3c6410_hsmmc_clksrcs; 144 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
153 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; 145 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
154 s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; 146 s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
155} 147}
156#else 148#else
157static inline void s3c6410_default_sdhci1(void) { } 149static inline void s3c6410_default_sdhci1(void) { }
@@ -160,9 +152,9 @@ static inline void s3c6410_default_sdhci1(void) { }
160#ifdef CONFIG_S3C_DEV_HSMMC2 152#ifdef CONFIG_S3C_DEV_HSMMC2
161static inline void s3c6410_default_sdhci2(void) 153static inline void s3c6410_default_sdhci2(void)
162{ 154{
163 s3c_hsmmc2_def_platdata.clocks = s3c6410_hsmmc_clksrcs; 155 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
164 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; 156 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
165 s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; 157 s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
166} 158}
167#else 159#else
168static inline void s3c6410_default_sdhci2(void) { } 160static inline void s3c6410_default_sdhci2(void) { }
@@ -171,7 +163,10 @@ static inline void s3c6410_default_sdhci2(void) { }
171#else 163#else
172static inline void s3c6410_default_sdhci0(void) { } 164static inline void s3c6410_default_sdhci0(void) { }
173static inline void s3c6410_default_sdhci1(void) { } 165static inline void s3c6410_default_sdhci1(void) { }
174#endif /* CONFIG_S3C6410_SETUP_SDHCI */ 166static inline void s3c6400_default_sdhci0(void) { }
167static inline void s3c6400_default_sdhci1(void) { }
168
169#endif /* CONFIG_S3C64XX_SETUP_SDHCI */
175 170
176/* S5PC100 SDHCI setup */ 171/* S5PC100 SDHCI setup */
177 172