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authorMarek Szyprowski <m.szyprowski@samsung.com>2011-10-21 05:04:54 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-10-21 05:05:02 -0400
commit1052cff317e7636456595f2246b9f644c53eccbd (patch)
tree958c9408c22c79ca18b4e29566abada8e18196a8 /arch/arm
parent899e3ee404961a90b828ad527573aaaac39f0ab1 (diff)
ARM: S5P: fix offset calculation on gpio-interrupt
Offsets of the irq controller registers were calculated correctly only for first GPIO bank. This patch fixes calculation of the register offsets for all GPIO banks. Reported-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/plat-s5p/irq-gpioint.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c
index f88216d23991..c65eb791d1bb 100644
--- a/arch/arm/plat-s5p/irq-gpioint.c
+++ b/arch/arm/plat-s5p/irq-gpioint.c
@@ -163,9 +163,9 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
163 ct->chip.irq_mask = irq_gc_mask_set_bit; 163 ct->chip.irq_mask = irq_gc_mask_set_bit;
164 ct->chip.irq_unmask = irq_gc_mask_clr_bit; 164 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
165 ct->chip.irq_set_type = s5p_gpioint_set_type, 165 ct->chip.irq_set_type = s5p_gpioint_set_type,
166 ct->regs.ack = PEND_OFFSET + REG_OFFSET(chip->group); 166 ct->regs.ack = PEND_OFFSET + REG_OFFSET(group - bank->start);
167 ct->regs.mask = MASK_OFFSET + REG_OFFSET(chip->group); 167 ct->regs.mask = MASK_OFFSET + REG_OFFSET(group - bank->start);
168 ct->regs.type = CON_OFFSET + REG_OFFSET(chip->group); 168 ct->regs.type = CON_OFFSET + REG_OFFSET(group - bank->start);
169 irq_setup_generic_chip(gc, IRQ_MSK(chip->chip.ngpio), 169 irq_setup_generic_chip(gc, IRQ_MSK(chip->chip.ngpio),
170 IRQ_GC_INIT_MASK_CACHE, 170 IRQ_GC_INIT_MASK_CACHE,
171 IRQ_NOREQUEST | IRQ_NOPROBE, 0); 171 IRQ_NOREQUEST | IRQ_NOPROBE, 0);