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authorTony Lindgren <tony@atomide.com>2010-02-15 11:49:01 -0500
committerTony Lindgren <tony@atomide.com>2010-02-15 11:49:01 -0500
commit0c8219f0302d0d27fda52c790d38406801e547ec (patch)
tree96dc93845e4a8b947fd92b4bab71efd241a02a8e /arch/arm
parent4f2c49fedf833e522001bc51824b894732900a3d (diff)
omap: Make uncompress code and DEBUG_LL code generic
Define arch_decomp_setup() the same way as some other architectures do. Use arch_id to configure the debug uart based on the machine_is by storing it into the uart scratchpad register for DEBUG_LL code to use. Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap1/include/mach/debug-macro.S72
-rw-r--r--arch/arm/mach-omap2/include/mach/debug-macro.S117
-rw-r--r--arch/arm/plat-omap/include/plat/serial.h33
-rw-r--r--arch/arm/plat-omap/include/plat/uncompress.h182
4 files changed, 322 insertions, 82 deletions
diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S
index 9ea12f29e0b6..b6d9584544b4 100644
--- a/arch/arm/mach-omap1/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap1/include/mach/debug-macro.S
@@ -15,18 +15,76 @@
15 15
16#include <plat/serial.h> 16#include <plat/serial.h>
17 17
18 .pushsection .data
19omap_uart_phys: .word 0x0
20omap_uart_virt: .word 0x0
21 .popsection
22
23 /*
24 * Note that this code won't work if the bootloader passes
25 * a wrong machine ID number in r1. To debug, just hardcode
26 * the desired UART phys and virt addresses temporarily into
27 * the omap_uart_phys and omap_uart_virt above.
28 */
18 .macro addruart, rx, tmp 29 .macro addruart, rx, tmp
30
31 /* Use omap_uart_phys/virt if already configured */
329: mrc p15, 0, \rx, c1, c0
33 tst \rx, #1 @ MMU enabled?
34 ldreq \rx, =omap_uart_phys @ physical base address
35 ldrne \rx, =omap_uart_virt @ virtual base
36 ldr \rx, [\rx, #0]
37 cmp \rx, #0 @ is port configured?
38 bne 99f @ already configured
39
40 /* Check 7XX UART1 scratchpad register for uart to use */
41 mrc p15, 0, \rx, c1, c0
42 tst \rx, #1 @ MMU enabled?
43 moveq \rx, #0xff000000 @ physical base address
44 movne \rx, #0xfe000000 @ virtual base
45 orr \rx, \rx, #0x00fb0000 @ OMAP1UART1
46 ldrb \rx, [\rx, #(UART_SCR << OMAP7XX_PORT_SHIFT)]
47 cmp \rx, #0 @ anything in 7XX scratchpad?
48 bne 10f @ found 7XX uart
49
50 /* Check 15xx/16xx UART1 scratchpad register for uart to use */
19 mrc p15, 0, \rx, c1, c0 51 mrc p15, 0, \rx, c1, c0
20 tst \rx, #1 @ MMU enabled? 52 tst \rx, #1 @ MMU enabled?
21 moveq \rx, #0xff000000 @ physical base address 53 moveq \rx, #0xff000000 @ physical base address
22 movne \rx, #0xfe000000 @ virtual base 54 movne \rx, #0xfe000000 @ virtual base
23 orr \rx, \rx, #0x00fb0000 55 orr \rx, \rx, #0x00fb0000 @ OMAP1UART1
24#ifdef CONFIG_OMAP_LL_DEBUG_UART3 56 ldrb \rx, [\rx, #(UART_SCR << OMAP_PORT_SHIFT)]
25 orr \rx, \rx, #0x00009000 @ UART 3 57
26#endif 58 /* Select the UART to use based on the UART1 scratchpad value */
27#if defined(CONFIG_OMAP_LL_DEBUG_UART2) || defined(CONFIG_OMAP_LL_DEBUG_UART3) 5910: cmp \rx, #0 @ no port configured?
28 orr \rx, \rx, #0x00000800 @ UART 2 & 3 60 beq 11f @ if none, try to use UART1
29#endif 61 cmp \rx, #OMAP1UART1
62 beq 11f @ configure OMAP1UART1
63 cmp \rx, #OMAP1UART2
64 beq 12f @ configure OMAP1UART2
65 cmp \rx, #OMAP1UART3
66 beq 13f @ configure OMAP2UART3
67
68 /* Configure the UART offset from the phys/virt base */
6911: mov \rx, #0x00fb0000 @ OMAP1UART1
70 b 98f
7112: mov \rx, #0x00fb0000 @ OMAP1UART1
72 orr \rx, \rx, #0x00000800 @ OMAP1UART2
73 b 98f
7413: mov \rx, #0x00fb0000 @ OMAP1UART1
75 orr \rx, \rx, #0x00000800 @ OMAP1UART2
76 orr \rx, \rx, #0x00009000 @ OMAP1UART3
77
78 /* Store both phys and virt address for the uart */
7998: add \rx, \rx, #0xff000000 @ phys base
80 ldr \tmp, =omap_uart_phys
81 str \rx, [\tmp, #0]
82 sub \rx, \rx, #0xff000000 @ phys base
83 add \rx, \rx, #0xfe000000 @ virt base
84 ldr \tmp, =omap_uart_virt
85 str \rx, [\tmp, #0]
86 b 9b
8799:
30 .endm 88 .endm
31 89
32 .macro senduart,rd,rx 90 .macro senduart,rd,rx
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S
index 8d6da9a39d63..4a63a2ea484d 100644
--- a/arch/arm/mach-omap2/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap2/include/mach/debug-macro.S
@@ -15,32 +15,103 @@
15 15
16#include <plat/serial.h> 16#include <plat/serial.h>
17 17
18#define UART_OFFSET(addr) ((addr) & 0x00ffffff)
19
20 .pushsection .data
21omap_uart_phys: .word 0
22omap_uart_virt: .word 0
23omap_uart_lsr: .word 0
24 .popsection
25
26 /*
27 * Note that this code won't work if the bootloader passes
28 * a wrong machine ID number in r1. To debug, just hardcode
29 * the desired UART phys and virt addresses temporarily into
30 * the omap_uart_phys and omap_uart_virt above.
31 */
18 .macro addruart, rx, tmp 32 .macro addruart, rx, tmp
33
34 /* Use omap_uart_phys/virt if already configured */
3510: mrc p15, 0, \rx, c1, c0
36 tst \rx, #1 @ MMU enabled?
37 ldreq \rx, =omap_uart_phys @ physical base address
38 ldrne \rx, =omap_uart_virt @ virtual base address
39 ldr \rx, [\rx, #0]
40 cmp \rx, #0 @ is port configured?
41 bne 99f @ already configured
42
43 /* Check UART1 scratchpad register for uart to use */
19 mrc p15, 0, \rx, c1, c0 44 mrc p15, 0, \rx, c1, c0
20 tst \rx, #1 @ MMU enabled? 45 tst \rx, #1 @ MMU enabled?
21#ifdef CONFIG_ARCH_OMAP2
22 moveq \rx, #0x48000000 @ physical base address 46 moveq \rx, #0x48000000 @ physical base address
23 movne \rx, #0xfa000000 @ virtual base 47 movne \rx, #0xfa000000 @ virtual base
24 orr \rx, \rx, #0x0006a000 48 orr \rx, \rx, #0x0006a000 @ uart1 on omap2/3/4
25#ifdef CONFIG_OMAP_LL_DEBUG_UART2 49 ldrb \rx, [\rx, #(UART_SCR << OMAP_PORT_SHIFT)] @ scratchpad
26 add \rx, \rx, #0x00002000 @ UART 2 50
27#endif 51 /* Select the UART to use based on the UART1 scratchpad value */
28#ifdef CONFIG_OMAP_LL_DEBUG_UART3 52 cmp \rx, #0 @ no port configured?
29 add \rx, \rx, #0x00004000 @ UART 3 53 beq 21f @ if none, try to use UART1
30#endif 54 cmp \rx, #OMAP2UART1 @ OMAP2/3/4UART1
31 55 beq 21f @ configure OMAP2/3/4UART1
32#elif defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) 56 cmp \rx, #OMAP2UART2 @ OMAP2/3/4UART2
33 moveq \rx, #0x48000000 @ physical base address 57 beq 22f @ configure OMAP2/3/4UART2
34 movne \rx, #0xfa000000 @ virtual base 58 cmp \rx, #OMAP2UART3 @ only on 24xx
35 orr \rx, \rx, #0x0006a000 59 beq 23f @ configure OMAP2UART3
36#ifdef CONFIG_OMAP_LL_DEBUG_UART2 60 cmp \rx, #OMAP3UART3 @ only on 34xx
37 add \rx, \rx, #0x00002000 @ UART 2 61 beq 33f @ configure OMAP3UART3
38#endif 62 cmp \rx, #OMAP4UART3 @ only on 44xx
39#ifdef CONFIG_OMAP_LL_DEBUG_UART3 63 beq 43f @ configure OMAP4UART3
40 add \rx, \rx, #0x00fb0000 @ UART 3 64 cmp \rx, #OMAP3UART4 @ only on 36xx
41 add \rx, \rx, #0x00006000 65 beq 34f @ configure OMAP3UART4
42#endif 66 cmp \rx, #OMAP4UART4 @ only on 44xx
43#endif 67 beq 44f @ configure OMAP4UART4
68 cmp \rx, #ZOOM_UART @ only on zoom2/3
69 beq 95f @ configure ZOOM_UART
70
71 /* Configure the UART offset from the phys/virt base */
7221: mov \rx, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4
73 b 98f
7422: mov \rx, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4
75 b 98f
7623: mov \rx, #UART_OFFSET(OMAP2_UART3_BASE)
77 b 98f
7833: mov \rx, #UART_OFFSET(OMAP3_UART1_BASE)
79 add \rx, \rx, #0x00fb0000
80 add \rx, \rx, #0x00006000 @ OMAP3_UART3_BASE
81 b 98f
8234: mov \rx, #UART_OFFSET(OMAP3_UART1_BASE)
83 add \rx, \rx, #0x00fb0000
84 add \rx, \rx, #0x00028000 @ OMAP3_UART4_BASE
85 b 98f
8643: mov \rx, #UART_OFFSET(OMAP4_UART3_BASE)
87 b 98f
8844: mov \rx, #UART_OFFSET(OMAP4_UART4_BASE)
89 b 98f
9095: mov \rx, #ZOOM_UART_BASE
91 ldr \tmp, =omap_uart_phys
92 str \rx, [\tmp, #0]
93 mov \rx, #ZOOM_UART_VIRT
94 ldr \tmp, =omap_uart_virt
95 str \rx, [\tmp, #0]
96 mov \rx, #(UART_LSR << ZOOM_PORT_SHIFT)
97 ldr \tmp, =omap_uart_lsr
98 str \rx, [\tmp, #0]
99 b 10b
100
101 /* Store both phys and virt address for the uart */
10298: add \rx, \rx, #0x48000000 @ phys base
103 ldr \tmp, =omap_uart_phys
104 str \rx, [\tmp, #0]
105 sub \rx, \rx, #0x48000000 @ phys base
106 add \rx, \rx, #0xfa000000 @ virt base
107 ldr \tmp, =omap_uart_virt
108 str \rx, [\tmp, #0]
109 mov \rx, #(UART_LSR << OMAP_PORT_SHIFT)
110 ldr \tmp, =omap_uart_lsr
111 str \rx, [\tmp, #0]
112
113 b 10b
11499:
44 .endm 115 .endm
45 116
46 .macro senduart,rd,rx 117 .macro senduart,rd,rx
@@ -48,7 +119,9 @@
48 .endm 119 .endm
49 120
50 .macro busyuart,rd,rx 121 .macro busyuart,rd,rx
511001: ldrb \rd, [\rx, #(UART_LSR << OMAP_PORT_SHIFT)] 1221001: ldr \rd, =omap_uart_lsr
123 ldr \rd, [\rd, #0]
124 ldrb \rd, [\rx, \rd]
52 and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE) 125 and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
53 teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE) 126 teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
54 bne 1001b 127 bne 1001b
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h
index 7f5a7a88a6eb..83dce4c4f7e6 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -26,24 +26,49 @@
26#define OMAP2_UART3_BASE 0x4806e000 26#define OMAP2_UART3_BASE 0x4806e000
27 27
28/* OMAP3 serial ports */ 28/* OMAP3 serial ports */
29#define OMAP3_UART1_BASE 0x4806a000 29#define OMAP3_UART1_BASE OMAP2_UART1_BASE
30#define OMAP3_UART2_BASE 0x4806c000 30#define OMAP3_UART2_BASE OMAP2_UART2_BASE
31#define OMAP3_UART3_BASE 0x49020000 31#define OMAP3_UART3_BASE 0x49020000
32#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */ 32#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */
33 33
34/* OMAP4 serial ports */ 34/* OMAP4 serial ports */
35#define OMAP4_UART1_BASE 0x4806a000 35#define OMAP4_UART1_BASE OMAP2_UART1_BASE
36#define OMAP4_UART2_BASE 0x4806c000 36#define OMAP4_UART2_BASE OMAP2_UART2_BASE
37#define OMAP4_UART3_BASE 0x48020000 37#define OMAP4_UART3_BASE 0x48020000
38#define OMAP4_UART4_BASE 0x4806e000 38#define OMAP4_UART4_BASE 0x4806e000
39 39
40/* External port on Zoom2/3 */
41#define ZOOM_UART_BASE 0x10000000
42#define ZOOM_UART_VIRT 0xfb000000
43
40#define OMAP_PORT_SHIFT 2 44#define OMAP_PORT_SHIFT 2
41#define OMAP7XX_PORT_SHIFT 0 45#define OMAP7XX_PORT_SHIFT 0
46#define ZOOM_PORT_SHIFT 1
42 47
43#define OMAP1510_BASE_BAUD (12000000/16) 48#define OMAP1510_BASE_BAUD (12000000/16)
44#define OMAP16XX_BASE_BAUD (48000000/16) 49#define OMAP16XX_BASE_BAUD (48000000/16)
45#define OMAP24XX_BASE_BAUD (48000000/16) 50#define OMAP24XX_BASE_BAUD (48000000/16)
46 51
52/*
53 * DEBUG_LL port encoding stored into the UART1 scratchpad register by
54 * decomp_setup in uncompress.h
55 */
56#define OMAP1UART1 11
57#define OMAP1UART2 12
58#define OMAP1UART3 13
59#define OMAP2UART1 21
60#define OMAP2UART2 22
61#define OMAP2UART3 23
62#define OMAP3UART1 OMAP2UART1
63#define OMAP3UART2 OMAP2UART2
64#define OMAP3UART3 33
65#define OMAP3UART4 34 /* Only on 36xx */
66#define OMAP4UART1 OMAP2UART1
67#define OMAP4UART2 OMAP2UART2
68#define OMAP4UART3 43
69#define OMAP4UART4 44
70#define ZOOM_UART 95 /* Only on zoom2/3 */
71
47/* This is only used by 8250.c for omap1510 */ 72/* This is only used by 8250.c for omap1510 */
48#define is_omap_port(pt) ({int __ret = 0; \ 73#define is_omap_port(pt) ({int __ret = 0; \
49 if ((pt)->port.mapbase == OMAP1_UART1_BASE || \ 74 if ((pt)->port.mapbase == OMAP1_UART1_BASE || \
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index e5723c3e3418..81d9ec540fcf 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -19,63 +19,38 @@
19 19
20#include <linux/types.h> 20#include <linux/types.h>
21#include <linux/serial_reg.h> 21#include <linux/serial_reg.h>
22
23#include <asm/mach-types.h>
24
22#include <plat/serial.h> 25#include <plat/serial.h>
23 26
24unsigned int system_rev; 27static volatile u8 *uart1_base;
28static int uart1_shift;
25 29
26#define UART_OMAP_MDR1 0x08 /* mode definition register */ 30static volatile u8 *uart_base;
27#define OMAP_ID_730 0x355F 31static int uart_shift;
28#define OMAP_ID_850 0x362C
29#define ID_MASK 0x7fff
30#define check_port(base, shift) ((base[UART_OMAP_MDR1 << shift] & 7) == 0)
31#define omap_get_id() ((*(volatile unsigned int *)(0xfffed404)) >> 12) & ID_MASK
32 32
33static void putc(int c) 33/*
34 * Store the DEBUG_LL uart number into UART1 scratchpad register.
35 * See also debug-macro.S, and serial.c for related code.
36 *
37 * Please note that we currently assume that:
38 * - UART1 clocks are enabled for register access
39 * - UART1 scratchpad register can be used
40 */
41static void set_uart1_scratchpad(unsigned char port)
34{ 42{
35 volatile u8 * uart = 0; 43 uart1_base[UART_SCR << uart1_shift] = port;
36 int shift = 2; 44}
37
38#ifdef CONFIG_MACH_OMAP_PALMTE
39 return;
40#endif
41
42#ifdef CONFIG_ARCH_OMAP
43 /* Will get removed in the next patch, set to OMAP3 to compile */
44#ifdef CONFIG_OMAP_LL_DEBUG_UART3
45 uart = (volatile u8 *)(OMAP3_UART3_BASE);
46#elif defined(CONFIG_OMAP_LL_DEBUG_UART2)
47 uart = (volatile u8 *)(OMAP3_UART2_BASE);
48#elif defined(CONFIG_OMAP_LL_DEBUG_UART1)
49 uart = (volatile u8 *)(OMAP3_UART1_BASE);
50#elif defined(CONFIG_OMAP_LL_DEBUG_NONE)
51 return;
52#else
53 return;
54#endif
55
56#ifdef CONFIG_ARCH_OMAP1
57 /* Determine which serial port to use */
58 do {
59 /* MMU is not on, so cpu_is_omapXXXX() won't work here */
60 unsigned int omap_id = omap_get_id();
61
62 if (omap_id == OMAP_ID_730 || omap_id == OMAP_ID_850)
63 shift = 0;
64 45
65 if (check_port(uart, shift)) 46static void putc(int c)
66 break; 47{
67 /* Silent boot if no serial ports are enabled. */ 48 if (!uart_base)
68 return; 49 return;
69 } while (0);
70#endif /* CONFIG_ARCH_OMAP1 */
71#endif
72 50
73 /* 51 while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE))
74 * Now, xmit each character
75 */
76 while (!(uart[UART_LSR << shift] & UART_LSR_THRE))
77 barrier(); 52 barrier();
78 uart[UART_TX << shift] = c; 53 uart_base[UART_TX << uart_shift] = c;
79} 54}
80 55
81static inline void flush(void) 56static inline void flush(void)
@@ -83,7 +58,116 @@ static inline void flush(void)
83} 58}
84 59
85/* 60/*
61 * Macros to configure UART1 and debug UART
62 */
63#define _DEBUG_LL_ENTRY(mach, uart1_phys, uart1_shft, \
64 dbg_uart, dbg_shft, dbg_id) \
65 if (machine_is_##mach()) { \
66 uart1_base = (volatile u8 *)(uart1_phys); \
67 uart1_shift = (uart1_shft); \
68 uart_base = (volatile u8 *)(dbg_uart); \
69 uart_shift = (dbg_shft); \
70 port = (dbg_id); \
71 set_uart1_scratchpad(port); \
72 break; \
73 }
74
75#define DEBUG_LL_OMAP7XX(p, mach) \
76 _DEBUG_LL_ENTRY(mach, OMAP1_UART1_BASE, OMAP7XX_PORT_SHIFT, \
77 OMAP1_UART##p##_BASE, OMAP7XX_PORT_SHIFT, OMAP1UART##p)
78
79#define DEBUG_LL_OMAP1(p, mach) \
80 _DEBUG_LL_ENTRY(mach, OMAP1_UART1_BASE, OMAP_PORT_SHIFT, \
81 OMAP1_UART##p##_BASE, OMAP_PORT_SHIFT, OMAP1UART##p)
82
83#define DEBUG_LL_OMAP2(p, mach) \
84 _DEBUG_LL_ENTRY(mach, OMAP2_UART1_BASE, OMAP_PORT_SHIFT, \
85 OMAP2_UART##p##_BASE, OMAP_PORT_SHIFT, OMAP2UART##p)
86
87#define DEBUG_LL_OMAP3(p, mach) \
88 _DEBUG_LL_ENTRY(mach, OMAP3_UART1_BASE, OMAP_PORT_SHIFT, \
89 OMAP3_UART##p##_BASE, OMAP_PORT_SHIFT, OMAP3UART##p)
90
91#define DEBUG_LL_OMAP4(p, mach) \
92 _DEBUG_LL_ENTRY(mach, OMAP4_UART1_BASE, OMAP_PORT_SHIFT, \
93 OMAP4_UART##p##_BASE, OMAP_PORT_SHIFT, OMAP4UART##p)
94
95/* Zoom2/3 shift is different for UART1 and external port */
96#define DEBUG_LL_ZOOM(mach) \
97 _DEBUG_LL_ENTRY(mach, OMAP2_UART1_BASE, OMAP_PORT_SHIFT, \
98 ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART)
99
100static inline void __arch_decomp_setup(unsigned long arch_id)
101{
102 int port = 0;
103
104 /*
105 * Initialize the port based on the machine ID from the bootloader.
106 * Note that we're using macros here instead of switch statement
107 * as machine_is functions are optimized out for the boards that
108 * are not selected.
109 */
110 do {
111 /* omap7xx/8xx based boards using UART1 with shift 0 */
112 DEBUG_LL_OMAP7XX(1, herald);
113 DEBUG_LL_OMAP7XX(1, omap_perseus2);
114
115 /* omap15xx/16xx based boards using UART1 */
116 DEBUG_LL_OMAP1(1, ams_delta);
117 DEBUG_LL_OMAP1(1, nokia770);
118 DEBUG_LL_OMAP1(1, omap_h2);
119 DEBUG_LL_OMAP1(1, omap_h3);
120 DEBUG_LL_OMAP1(1, omap_innovator);
121 DEBUG_LL_OMAP1(1, omap_osk);
122 DEBUG_LL_OMAP1(1, omap_palmte);
123 DEBUG_LL_OMAP1(1, omap_palmz71);
124
125 /* omap15xx/16xx based boards using UART2 */
126 DEBUG_LL_OMAP1(2, omap_palmtt);
127
128 /* omap15xx/16xx based boards using UART3 */
129 DEBUG_LL_OMAP1(3, sx1);
130
131 /* omap2 based boards using UART1 */
132 DEBUG_LL_OMAP2(1, omap2evm);
133 DEBUG_LL_OMAP2(1, omap_2430sdp);
134 DEBUG_LL_OMAP2(1, omap_apollon);
135 DEBUG_LL_OMAP2(1, omap_h4);
136
137 /* omap2 based boards using UART3 */
138 DEBUG_LL_OMAP2(3, nokia_n800);
139 DEBUG_LL_OMAP2(3, nokia_n810);
140 DEBUG_LL_OMAP2(3, nokia_n810_wimax);
141
142 /* omap3 based boards using UART1 */
143 DEBUG_LL_OMAP2(1, omap3evm);
144 DEBUG_LL_OMAP3(1, omap_3430sdp);
145 DEBUG_LL_OMAP3(1, omap_3630sdp);
146
147 /* omap3 based boards using UART3 */
148 DEBUG_LL_OMAP3(3, cm_t35);
149 DEBUG_LL_OMAP3(3, igep0020);
150 DEBUG_LL_OMAP3(3, nokia_rx51);
151 DEBUG_LL_OMAP3(3, omap3517evm);
152 DEBUG_LL_OMAP3(3, omap3_beagle);
153 DEBUG_LL_OMAP3(3, omap3_pandora);
154 DEBUG_LL_OMAP3(3, omap_ldp);
155 DEBUG_LL_OMAP3(3, overo);
156 DEBUG_LL_OMAP3(3, touchbook);
157
158 /* omap4 based boards using UART3 */
159 DEBUG_LL_OMAP4(3, omap_4430sdp);
160
161 /* zoom2/3 external uart */
162 DEBUG_LL_ZOOM(omap_zoom2);
163 DEBUG_LL_ZOOM(omap_zoom3);
164
165 } while (0);
166}
167
168#define arch_decomp_setup() __arch_decomp_setup(arch_id)
169
170/*
86 * nothing to do 171 * nothing to do
87 */ 172 */
88#define arch_decomp_setup()
89#define arch_decomp_wdog() 173#define arch_decomp_wdog()
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