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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2010-02-18 03:59:13 -0500
committerTony Lindgren <tony@atomide.com>2010-02-23 17:02:53 -0500
commita99db248afd4682a6a9e2aea465cb4c2eb6e26be (patch)
tree0ad7edae8350410faf0ab0a1d798c5adbaba538f /arch/arm
parente927f8d04ec8aff249beab2f7e1832c67623d0f5 (diff)
omap4: Use dma line defines from dma-44xx.h
This patch removes all the omap4 specific dma request lines defines from plat/dma.h and includes dma-44xx.h The defines are aligned so no driver should be impacted because of this change. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/plat-omap/include/plat/dma.h86
1 files changed, 3 insertions, 83 deletions
diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h
index 4ede9e17a0be..02232ca2c37f 100644
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat/dma.h
@@ -21,6 +21,9 @@
21#ifndef __ASM_ARCH_DMA_H 21#ifndef __ASM_ARCH_DMA_H
22#define __ASM_ARCH_DMA_H 22#define __ASM_ARCH_DMA_H
23 23
24/* Move omap4 specific defines to dma-44xx.h */
25#include "dma-44xx.h"
26
24/* Hardware registers for omap1 */ 27/* Hardware registers for omap1 */
25#define OMAP1_DMA_BASE (0xfffed800) 28#define OMAP1_DMA_BASE (0xfffed800)
26 29
@@ -316,89 +319,6 @@
316#define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */ 319#define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */
317#define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */ 320#define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */
318 321
319/* DMA request lines for 44xx */
320#define OMAP44XX_DMA_DSS_DISPC_REQ 6 /* S_DMA_5 */
321#define OMAP44XX_DMA_SYS_REQ2 7 /* S_DMA_6 */
322#define OMAP44XX_DMA_ISS_REQ1 9 /* S_DMA_8 */
323#define OMAP44XX_DMA_ISS_REQ2 10 /* S_DMA_9 */
324#define OMAP44XX_DMA_ISS_REQ3 12 /* S_DMA_11 */
325#define OMAP44XX_DMA_ISS_REQ4 13 /* S_DMA_12 */
326#define OMAP44XX_DMA_DSS_RFBI_REQ 14 /* S_DMA_13 */
327#define OMAP44XX_DMA_SPI3_TX0 15 /* S_DMA_14 */
328#define OMAP44XX_DMA_SPI3_RX0 16 /* S_DMA_15 */
329#define OMAP44XX_DMA_MCBSP2_TX 17 /* S_DMA_16 */
330#define OMAP44XX_DMA_MCBSP2_RX 18 /* S_DMA_17 */
331#define OMAP44XX_DMA_MCBSP3_TX 19 /* S_DMA_18 */
332#define OMAP44XX_DMA_MCBSP3_RX 20 /* S_DMA_19 */
333#define OMAP44XX_DMA_SPI3_TX1 23 /* S_DMA_22 */
334#define OMAP44XX_DMA_SPI3_RX1 24 /* S_DMA_23 */
335#define OMAP44XX_DMA_I2C3_TX 25 /* S_DMA_24 */
336#define OMAP44XX_DMA_I2C3_RX 26 /* S_DMA_25 */
337#define OMAP44XX_DMA_I2C1_TX 27 /* S_DMA_26 */
338#define OMAP44XX_DMA_I2C1_RX 28 /* S_DMA_27 */
339#define OMAP44XX_DMA_I2C2_TX 29 /* S_DMA_28 */
340#define OMAP44XX_DMA_I2C2_RX 30 /* S_DMA_29 */
341#define OMAP44XX_DMA_MCBSP4_TX 31 /* S_DMA_30 */
342#define OMAP44XX_DMA_MCBSP4_RX 32 /* S_DMA_31 */
343#define OMAP44XX_DMA_MCBSP1_TX 33 /* S_DMA_32 */
344#define OMAP44XX_DMA_MCBSP1_RX 34 /* S_DMA_33 */
345#define OMAP44XX_DMA_SPI1_TX0 35 /* S_DMA_34 */
346#define OMAP44XX_DMA_SPI1_RX0 36 /* S_DMA_35 */
347#define OMAP44XX_DMA_SPI1_TX1 37 /* S_DMA_36 */
348#define OMAP44XX_DMA_SPI1_RX1 38 /* S_DMA_37 */
349#define OMAP44XX_DMA_SPI1_TX2 39 /* S_DMA_38 */
350#define OMAP44XX_DMA_SPI1_RX2 40 /* S_DMA_39 */
351#define OMAP44XX_DMA_SPI1_TX3 41 /* S_DMA_40 */
352#define OMAP44XX_DMA_SPI1_RX3 42 /* S_DMA_41 */
353#define OMAP44XX_DMA_SPI2_TX0 43 /* S_DMA_42 */
354#define OMAP44XX_DMA_SPI2_RX0 44 /* S_DMA_43 */
355#define OMAP44XX_DMA_SPI2_TX1 45 /* S_DMA_44 */
356#define OMAP44XX_DMA_SPI2_RX1 46 /* S_DMA_45 */
357#define OMAP44XX_DMA_MMC2_TX 47 /* S_DMA_46 */
358#define OMAP44XX_DMA_MMC2_RX 48 /* S_DMA_47 */
359#define OMAP44XX_DMA_UART1_TX 49 /* S_DMA_48 */
360#define OMAP44XX_DMA_UART1_RX 50 /* S_DMA_49 */
361#define OMAP44XX_DMA_UART2_TX 51 /* S_DMA_50 */
362#define OMAP44XX_DMA_UART2_RX 52 /* S_DMA_51 */
363#define OMAP44XX_DMA_UART3_TX 53 /* S_DMA_52 */
364#define OMAP44XX_DMA_UART3_RX 54 /* S_DMA_53 */
365#define OMAP44XX_DMA_UART4_TX 55 /* S_DMA_54 */
366#define OMAP44XX_DMA_UART4_RX 56 /* S_DMA_55 */
367#define OMAP44XX_DMA_MMC4_TX 57 /* S_DMA_56 */
368#define OMAP44XX_DMA_MMC4_RX 58 /* S_DMA_57 */
369#define OMAP44XX_DMA_MMC5_TX 59 /* S_DMA_58 */
370#define OMAP44XX_DMA_MMC5_RX 60 /* S_DMA_59 */
371#define OMAP44XX_DMA_MMC1_TX 61 /* S_DMA_60 */
372#define OMAP44XX_DMA_MMC1_RX 62 /* S_DMA_61 */
373#define OMAP44XX_DMA_SYS_REQ3 64 /* S_DMA_63 */
374#define OMAP44XX_DMA_MCPDM_UP 65 /* S_DMA_64 */
375#define OMAP44XX_DMA_MCPDM_DL 66 /* S_DMA_65 */
376#define OMAP44XX_DMA_SPI4_TX0 70 /* S_DMA_69 */
377#define OMAP44XX_DMA_SPI4_RX0 71 /* S_DMA_70 */
378#define OMAP44XX_DMA_DSS_DSI1_REQ0 72 /* S_DMA_71 */
379#define OMAP44XX_DMA_DSS_DSI1_REQ1 73 /* S_DMA_72 */
380#define OMAP44XX_DMA_DSS_DSI1_REQ2 74 /* S_DMA_73 */
381#define OMAP44XX_DMA_DSS_DSI1_REQ3 75 /* S_DMA_74 */
382#define OMAP44XX_DMA_DSS_HDMI_REQ 76 /* S_DMA_75 */
383#define OMAP44XX_DMA_MMC3_TX 77 /* S_DMA_76 */
384#define OMAP44XX_DMA_MMC3_RX 78 /* S_DMA_77 */
385#define OMAP44XX_DMA_USIM_TX 79 /* S_DMA_78 */
386#define OMAP44XX_DMA_USIM_RX 80 /* S_DMA_79 */
387#define OMAP44XX_DMA_DSS_DSI2_REQ0 81 /* S_DMA_80 */
388#define OMAP44XX_DMA_DSS_DSI2_REQ1 82 /* S_DMA_81 */
389#define OMAP44XX_DMA_DSS_DSI2_REQ2 83 /* S_DMA_82 */
390#define OMAP44XX_DMA_DSS_DSI2_REQ3 84 /* S_DMA_83 */
391#define OMAP44XX_DMA_ABE_REQ0 101 /* S_DMA_100 */
392#define OMAP44XX_DMA_ABE_REQ1 102 /* S_DMA_101 */
393#define OMAP44XX_DMA_ABE_REQ2 103 /* S_DMA_102 */
394#define OMAP44XX_DMA_ABE_REQ3 104 /* S_DMA_103 */
395#define OMAP44XX_DMA_ABE_REQ4 105 /* S_DMA_104 */
396#define OMAP44XX_DMA_ABE_REQ5 106 /* S_DMA_105 */
397#define OMAP44XX_DMA_ABE_REQ6 107 /* S_DMA_106 */
398#define OMAP44XX_DMA_ABE_REQ7 108 /* S_DMA_107 */
399#define OMAP44XX_DMA_I2C4_TX 124 /* S_DMA_123 */
400#define OMAP44XX_DMA_I2C4_RX 125 /* S_DMA_124 */
401
402/*----------------------------------------------------------------------------*/ 322/*----------------------------------------------------------------------------*/
403 323
404#define OMAP1_DMA_TOUT_IRQ (1 << 0) 324#define OMAP1_DMA_TOUT_IRQ (1 << 0)