diff options
author | Sergei Shtylyov <sshtylyov@ru.mvista.com> | 2009-09-30 11:48:03 -0400 |
---|---|---|
committer | Kevin Hilman <khilman@deeprootsystems.com> | 2009-11-25 13:21:30 -0500 |
commit | 789a785ee4351a0b425d1b3702d40aeb71745ff3 (patch) | |
tree | 0ac26280bcbd162c94d53e568f1c3c404474e0f4 /arch/arm | |
parent | a9eb1f675c3363a174a424f7834e768d17cd20e5 (diff) |
davinci: DA8xx: rename 'psc_ctlr' field into 'gpsc'
Replace badly chosen 'psc_ctlr' name of the 'struct clk' field (PSC already
means "Power and Sleep Controller", so the '_ctlr' postfix makes the name
tautological) with technically correct 'gpsc' (Global PSC -- which contains
all the module registers).
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-davinci/clock.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-davinci/clock.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-davinci/da830.c | 42 | ||||
-rw-r--r-- | arch/arm/mach-davinci/da850.c | 20 |
4 files changed, 36 insertions, 38 deletions
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index e7696fcf05d8..29b6c7fa90d9 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c | |||
@@ -43,8 +43,7 @@ static void __clk_enable(struct clk *clk) | |||
43 | if (clk->parent) | 43 | if (clk->parent) |
44 | __clk_enable(clk->parent); | 44 | __clk_enable(clk->parent); |
45 | if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) | 45 | if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) |
46 | davinci_psc_config(psc_domain(clk), clk->psc_ctlr, | 46 | davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, 1); |
47 | clk->lpsc, 1); | ||
48 | } | 47 | } |
49 | 48 | ||
50 | static void __clk_disable(struct clk *clk) | 49 | static void __clk_disable(struct clk *clk) |
@@ -52,8 +51,7 @@ static void __clk_disable(struct clk *clk) | |||
52 | if (WARN_ON(clk->usecount == 0)) | 51 | if (WARN_ON(clk->usecount == 0)) |
53 | return; | 52 | return; |
54 | if (--clk->usecount == 0 && !(clk->flags & CLK_PLL)) | 53 | if (--clk->usecount == 0 && !(clk->flags & CLK_PLL)) |
55 | davinci_psc_config(psc_domain(clk), clk->psc_ctlr, | 54 | davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, 0); |
56 | clk->lpsc, 0); | ||
57 | if (clk->parent) | 55 | if (clk->parent) |
58 | __clk_disable(clk->parent); | 56 | __clk_disable(clk->parent); |
59 | } | 57 | } |
@@ -230,11 +228,11 @@ static int __init clk_disable_unused(void) | |||
230 | continue; | 228 | continue; |
231 | 229 | ||
232 | /* ignore if in Disabled or SwRstDisable states */ | 230 | /* ignore if in Disabled or SwRstDisable states */ |
233 | if (!davinci_psc_is_clk_active(ck->psc_ctlr, ck->lpsc)) | 231 | if (!davinci_psc_is_clk_active(ck->gpsc, ck->lpsc)) |
234 | continue; | 232 | continue; |
235 | 233 | ||
236 | pr_info("Clocks: disable unused %s\n", ck->name); | 234 | pr_info("Clocks: disable unused %s\n", ck->name); |
237 | davinci_psc_config(psc_domain(ck), ck->psc_ctlr, ck->lpsc, 0); | 235 | davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc, 0); |
238 | } | 236 | } |
239 | spin_unlock_irq(&clockfw_lock); | 237 | spin_unlock_irq(&clockfw_lock); |
240 | 238 | ||
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index d45dc6960a94..c92d77a3008d 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h | |||
@@ -70,7 +70,7 @@ struct clk { | |||
70 | unsigned long rate; | 70 | unsigned long rate; |
71 | u8 usecount; | 71 | u8 usecount; |
72 | u8 lpsc; | 72 | u8 lpsc; |
73 | u8 psc_ctlr; | 73 | u8 gpsc; |
74 | u32 flags; | 74 | u32 flags; |
75 | struct clk *parent; | 75 | struct clk *parent; |
76 | struct list_head children; /* list of children */ | 76 | struct list_head children; /* list of children */ |
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index a2f2bdc91400..215d2ecc102f 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c | |||
@@ -193,14 +193,14 @@ static struct clk uart1_clk = { | |||
193 | .name = "uart1", | 193 | .name = "uart1", |
194 | .parent = &pll0_sysclk2, | 194 | .parent = &pll0_sysclk2, |
195 | .lpsc = DA8XX_LPSC1_UART1, | 195 | .lpsc = DA8XX_LPSC1_UART1, |
196 | .psc_ctlr = 1, | 196 | .gpsc = 1, |
197 | }; | 197 | }; |
198 | 198 | ||
199 | static struct clk uart2_clk = { | 199 | static struct clk uart2_clk = { |
200 | .name = "uart2", | 200 | .name = "uart2", |
201 | .parent = &pll0_sysclk2, | 201 | .parent = &pll0_sysclk2, |
202 | .lpsc = DA8XX_LPSC1_UART2, | 202 | .lpsc = DA8XX_LPSC1_UART2, |
203 | .psc_ctlr = 1, | 203 | .gpsc = 1, |
204 | }; | 204 | }; |
205 | 205 | ||
206 | static struct clk spi0_clk = { | 206 | static struct clk spi0_clk = { |
@@ -213,98 +213,98 @@ static struct clk spi1_clk = { | |||
213 | .name = "spi1", | 213 | .name = "spi1", |
214 | .parent = &pll0_sysclk2, | 214 | .parent = &pll0_sysclk2, |
215 | .lpsc = DA8XX_LPSC1_SPI1, | 215 | .lpsc = DA8XX_LPSC1_SPI1, |
216 | .psc_ctlr = 1, | 216 | .gpsc = 1, |
217 | }; | 217 | }; |
218 | 218 | ||
219 | static struct clk ecap0_clk = { | 219 | static struct clk ecap0_clk = { |
220 | .name = "ecap0", | 220 | .name = "ecap0", |
221 | .parent = &pll0_sysclk2, | 221 | .parent = &pll0_sysclk2, |
222 | .lpsc = DA8XX_LPSC1_ECAP, | 222 | .lpsc = DA8XX_LPSC1_ECAP, |
223 | .psc_ctlr = 1, | 223 | .gpsc = 1, |
224 | }; | 224 | }; |
225 | 225 | ||
226 | static struct clk ecap1_clk = { | 226 | static struct clk ecap1_clk = { |
227 | .name = "ecap1", | 227 | .name = "ecap1", |
228 | .parent = &pll0_sysclk2, | 228 | .parent = &pll0_sysclk2, |
229 | .lpsc = DA8XX_LPSC1_ECAP, | 229 | .lpsc = DA8XX_LPSC1_ECAP, |
230 | .psc_ctlr = 1, | 230 | .gpsc = 1, |
231 | }; | 231 | }; |
232 | 232 | ||
233 | static struct clk ecap2_clk = { | 233 | static struct clk ecap2_clk = { |
234 | .name = "ecap2", | 234 | .name = "ecap2", |
235 | .parent = &pll0_sysclk2, | 235 | .parent = &pll0_sysclk2, |
236 | .lpsc = DA8XX_LPSC1_ECAP, | 236 | .lpsc = DA8XX_LPSC1_ECAP, |
237 | .psc_ctlr = 1, | 237 | .gpsc = 1, |
238 | }; | 238 | }; |
239 | 239 | ||
240 | static struct clk pwm0_clk = { | 240 | static struct clk pwm0_clk = { |
241 | .name = "pwm0", | 241 | .name = "pwm0", |
242 | .parent = &pll0_sysclk2, | 242 | .parent = &pll0_sysclk2, |
243 | .lpsc = DA8XX_LPSC1_PWM, | 243 | .lpsc = DA8XX_LPSC1_PWM, |
244 | .psc_ctlr = 1, | 244 | .gpsc = 1, |
245 | }; | 245 | }; |
246 | 246 | ||
247 | static struct clk pwm1_clk = { | 247 | static struct clk pwm1_clk = { |
248 | .name = "pwm1", | 248 | .name = "pwm1", |
249 | .parent = &pll0_sysclk2, | 249 | .parent = &pll0_sysclk2, |
250 | .lpsc = DA8XX_LPSC1_PWM, | 250 | .lpsc = DA8XX_LPSC1_PWM, |
251 | .psc_ctlr = 1, | 251 | .gpsc = 1, |
252 | }; | 252 | }; |
253 | 253 | ||
254 | static struct clk pwm2_clk = { | 254 | static struct clk pwm2_clk = { |
255 | .name = "pwm2", | 255 | .name = "pwm2", |
256 | .parent = &pll0_sysclk2, | 256 | .parent = &pll0_sysclk2, |
257 | .lpsc = DA8XX_LPSC1_PWM, | 257 | .lpsc = DA8XX_LPSC1_PWM, |
258 | .psc_ctlr = 1, | 258 | .gpsc = 1, |
259 | }; | 259 | }; |
260 | 260 | ||
261 | static struct clk eqep0_clk = { | 261 | static struct clk eqep0_clk = { |
262 | .name = "eqep0", | 262 | .name = "eqep0", |
263 | .parent = &pll0_sysclk2, | 263 | .parent = &pll0_sysclk2, |
264 | .lpsc = DA830_LPSC1_EQEP, | 264 | .lpsc = DA830_LPSC1_EQEP, |
265 | .psc_ctlr = 1, | 265 | .gpsc = 1, |
266 | }; | 266 | }; |
267 | 267 | ||
268 | static struct clk eqep1_clk = { | 268 | static struct clk eqep1_clk = { |
269 | .name = "eqep1", | 269 | .name = "eqep1", |
270 | .parent = &pll0_sysclk2, | 270 | .parent = &pll0_sysclk2, |
271 | .lpsc = DA830_LPSC1_EQEP, | 271 | .lpsc = DA830_LPSC1_EQEP, |
272 | .psc_ctlr = 1, | 272 | .gpsc = 1, |
273 | }; | 273 | }; |
274 | 274 | ||
275 | static struct clk lcdc_clk = { | 275 | static struct clk lcdc_clk = { |
276 | .name = "lcdc", | 276 | .name = "lcdc", |
277 | .parent = &pll0_sysclk2, | 277 | .parent = &pll0_sysclk2, |
278 | .lpsc = DA8XX_LPSC1_LCDC, | 278 | .lpsc = DA8XX_LPSC1_LCDC, |
279 | .psc_ctlr = 1, | 279 | .gpsc = 1, |
280 | }; | 280 | }; |
281 | 281 | ||
282 | static struct clk mcasp0_clk = { | 282 | static struct clk mcasp0_clk = { |
283 | .name = "mcasp0", | 283 | .name = "mcasp0", |
284 | .parent = &pll0_sysclk2, | 284 | .parent = &pll0_sysclk2, |
285 | .lpsc = DA8XX_LPSC1_McASP0, | 285 | .lpsc = DA8XX_LPSC1_McASP0, |
286 | .psc_ctlr = 1, | 286 | .gpsc = 1, |
287 | }; | 287 | }; |
288 | 288 | ||
289 | static struct clk mcasp1_clk = { | 289 | static struct clk mcasp1_clk = { |
290 | .name = "mcasp1", | 290 | .name = "mcasp1", |
291 | .parent = &pll0_sysclk2, | 291 | .parent = &pll0_sysclk2, |
292 | .lpsc = DA830_LPSC1_McASP1, | 292 | .lpsc = DA830_LPSC1_McASP1, |
293 | .psc_ctlr = 1, | 293 | .gpsc = 1, |
294 | }; | 294 | }; |
295 | 295 | ||
296 | static struct clk mcasp2_clk = { | 296 | static struct clk mcasp2_clk = { |
297 | .name = "mcasp2", | 297 | .name = "mcasp2", |
298 | .parent = &pll0_sysclk2, | 298 | .parent = &pll0_sysclk2, |
299 | .lpsc = DA830_LPSC1_McASP2, | 299 | .lpsc = DA830_LPSC1_McASP2, |
300 | .psc_ctlr = 1, | 300 | .gpsc = 1, |
301 | }; | 301 | }; |
302 | 302 | ||
303 | static struct clk usb20_clk = { | 303 | static struct clk usb20_clk = { |
304 | .name = "usb20", | 304 | .name = "usb20", |
305 | .parent = &pll0_sysclk2, | 305 | .parent = &pll0_sysclk2, |
306 | .lpsc = DA8XX_LPSC1_USB20, | 306 | .lpsc = DA8XX_LPSC1_USB20, |
307 | .psc_ctlr = 1, | 307 | .gpsc = 1, |
308 | }; | 308 | }; |
309 | 309 | ||
310 | static struct clk aemif_clk = { | 310 | static struct clk aemif_clk = { |
@@ -332,36 +332,36 @@ static struct clk emac_clk = { | |||
332 | .name = "emac", | 332 | .name = "emac", |
333 | .parent = &pll0_sysclk4, | 333 | .parent = &pll0_sysclk4, |
334 | .lpsc = DA8XX_LPSC1_CPGMAC, | 334 | .lpsc = DA8XX_LPSC1_CPGMAC, |
335 | .psc_ctlr = 1, | 335 | .gpsc = 1, |
336 | }; | 336 | }; |
337 | 337 | ||
338 | static struct clk gpio_clk = { | 338 | static struct clk gpio_clk = { |
339 | .name = "gpio", | 339 | .name = "gpio", |
340 | .parent = &pll0_sysclk4, | 340 | .parent = &pll0_sysclk4, |
341 | .lpsc = DA8XX_LPSC1_GPIO, | 341 | .lpsc = DA8XX_LPSC1_GPIO, |
342 | .psc_ctlr = 1, | 342 | .gpsc = 1, |
343 | }; | 343 | }; |
344 | 344 | ||
345 | static struct clk i2c1_clk = { | 345 | static struct clk i2c1_clk = { |
346 | .name = "i2c1", | 346 | .name = "i2c1", |
347 | .parent = &pll0_sysclk4, | 347 | .parent = &pll0_sysclk4, |
348 | .lpsc = DA8XX_LPSC1_I2C, | 348 | .lpsc = DA8XX_LPSC1_I2C, |
349 | .psc_ctlr = 1, | 349 | .gpsc = 1, |
350 | }; | 350 | }; |
351 | 351 | ||
352 | static struct clk usb11_clk = { | 352 | static struct clk usb11_clk = { |
353 | .name = "usb11", | 353 | .name = "usb11", |
354 | .parent = &pll0_sysclk4, | 354 | .parent = &pll0_sysclk4, |
355 | .lpsc = DA8XX_LPSC1_USB11, | 355 | .lpsc = DA8XX_LPSC1_USB11, |
356 | .psc_ctlr = 1, | 356 | .gpsc = 1, |
357 | }; | 357 | }; |
358 | 358 | ||
359 | static struct clk emif3_clk = { | 359 | static struct clk emif3_clk = { |
360 | .name = "emif3", | 360 | .name = "emif3", |
361 | .parent = &pll0_sysclk5, | 361 | .parent = &pll0_sysclk5, |
362 | .lpsc = DA8XX_LPSC1_EMIF3C, | 362 | .lpsc = DA8XX_LPSC1_EMIF3C, |
363 | .gpsc = 1, | ||
363 | .flags = ALWAYS_ENABLED, | 364 | .flags = ALWAYS_ENABLED, |
364 | .psc_ctlr = 1, | ||
365 | }; | 365 | }; |
366 | 366 | ||
367 | static struct clk arm_clk = { | 367 | static struct clk arm_clk = { |
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 0e1027ea8a40..1d6d8b42a624 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c | |||
@@ -224,16 +224,16 @@ static struct clk tpcc1_clk = { | |||
224 | .name = "tpcc1", | 224 | .name = "tpcc1", |
225 | .parent = &pll0_sysclk2, | 225 | .parent = &pll0_sysclk2, |
226 | .lpsc = DA850_LPSC1_TPCC1, | 226 | .lpsc = DA850_LPSC1_TPCC1, |
227 | .gpsc = 1, | ||
227 | .flags = CLK_PSC | ALWAYS_ENABLED, | 228 | .flags = CLK_PSC | ALWAYS_ENABLED, |
228 | .psc_ctlr = 1, | ||
229 | }; | 229 | }; |
230 | 230 | ||
231 | static struct clk tptc2_clk = { | 231 | static struct clk tptc2_clk = { |
232 | .name = "tptc2", | 232 | .name = "tptc2", |
233 | .parent = &pll0_sysclk2, | 233 | .parent = &pll0_sysclk2, |
234 | .lpsc = DA850_LPSC1_TPTC2, | 234 | .lpsc = DA850_LPSC1_TPTC2, |
235 | .gpsc = 1, | ||
235 | .flags = ALWAYS_ENABLED, | 236 | .flags = ALWAYS_ENABLED, |
236 | .psc_ctlr = 1, | ||
237 | }; | 237 | }; |
238 | 238 | ||
239 | static struct clk uart0_clk = { | 239 | static struct clk uart0_clk = { |
@@ -246,16 +246,16 @@ static struct clk uart1_clk = { | |||
246 | .name = "uart1", | 246 | .name = "uart1", |
247 | .parent = &pll0_sysclk2, | 247 | .parent = &pll0_sysclk2, |
248 | .lpsc = DA8XX_LPSC1_UART1, | 248 | .lpsc = DA8XX_LPSC1_UART1, |
249 | .gpsc = 1, | ||
249 | .flags = DA850_CLK_ASYNC3, | 250 | .flags = DA850_CLK_ASYNC3, |
250 | .psc_ctlr = 1, | ||
251 | }; | 251 | }; |
252 | 252 | ||
253 | static struct clk uart2_clk = { | 253 | static struct clk uart2_clk = { |
254 | .name = "uart2", | 254 | .name = "uart2", |
255 | .parent = &pll0_sysclk2, | 255 | .parent = &pll0_sysclk2, |
256 | .lpsc = DA8XX_LPSC1_UART2, | 256 | .lpsc = DA8XX_LPSC1_UART2, |
257 | .gpsc = 1, | ||
257 | .flags = DA850_CLK_ASYNC3, | 258 | .flags = DA850_CLK_ASYNC3, |
258 | .psc_ctlr = 1, | ||
259 | }; | 259 | }; |
260 | 260 | ||
261 | static struct clk aintc_clk = { | 261 | static struct clk aintc_clk = { |
@@ -269,22 +269,22 @@ static struct clk gpio_clk = { | |||
269 | .name = "gpio", | 269 | .name = "gpio", |
270 | .parent = &pll0_sysclk4, | 270 | .parent = &pll0_sysclk4, |
271 | .lpsc = DA8XX_LPSC1_GPIO, | 271 | .lpsc = DA8XX_LPSC1_GPIO, |
272 | .psc_ctlr = 1, | 272 | .gpsc = 1, |
273 | }; | 273 | }; |
274 | 274 | ||
275 | static struct clk i2c1_clk = { | 275 | static struct clk i2c1_clk = { |
276 | .name = "i2c1", | 276 | .name = "i2c1", |
277 | .parent = &pll0_sysclk4, | 277 | .parent = &pll0_sysclk4, |
278 | .lpsc = DA8XX_LPSC1_I2C, | 278 | .lpsc = DA8XX_LPSC1_I2C, |
279 | .psc_ctlr = 1, | 279 | .gpsc = 1, |
280 | }; | 280 | }; |
281 | 281 | ||
282 | static struct clk emif3_clk = { | 282 | static struct clk emif3_clk = { |
283 | .name = "emif3", | 283 | .name = "emif3", |
284 | .parent = &pll0_sysclk5, | 284 | .parent = &pll0_sysclk5, |
285 | .lpsc = DA8XX_LPSC1_EMIF3C, | 285 | .lpsc = DA8XX_LPSC1_EMIF3C, |
286 | .gpsc = 1, | ||
286 | .flags = ALWAYS_ENABLED, | 287 | .flags = ALWAYS_ENABLED, |
287 | .psc_ctlr = 1, | ||
288 | }; | 288 | }; |
289 | 289 | ||
290 | static struct clk arm_clk = { | 290 | static struct clk arm_clk = { |
@@ -305,21 +305,21 @@ static struct clk emac_clk = { | |||
305 | .name = "emac", | 305 | .name = "emac", |
306 | .parent = &pll0_sysclk4, | 306 | .parent = &pll0_sysclk4, |
307 | .lpsc = DA8XX_LPSC1_CPGMAC, | 307 | .lpsc = DA8XX_LPSC1_CPGMAC, |
308 | .psc_ctlr = 1, | 308 | .gpsc = 1, |
309 | }; | 309 | }; |
310 | 310 | ||
311 | static struct clk mcasp_clk = { | 311 | static struct clk mcasp_clk = { |
312 | .name = "mcasp", | 312 | .name = "mcasp", |
313 | .parent = &pll0_sysclk2, | 313 | .parent = &pll0_sysclk2, |
314 | .lpsc = DA8XX_LPSC1_McASP0, | 314 | .lpsc = DA8XX_LPSC1_McASP0, |
315 | .psc_ctlr = 1, | 315 | .gpsc = 1, |
316 | }; | 316 | }; |
317 | 317 | ||
318 | static struct clk lcdc_clk = { | 318 | static struct clk lcdc_clk = { |
319 | .name = "lcdc", | 319 | .name = "lcdc", |
320 | .parent = &pll0_sysclk2, | 320 | .parent = &pll0_sysclk2, |
321 | .lpsc = DA8XX_LPSC1_LCDC, | 321 | .lpsc = DA8XX_LPSC1_LCDC, |
322 | .psc_ctlr = 1, | 322 | .gpsc = 1, |
323 | }; | 323 | }; |
324 | 324 | ||
325 | static struct clk mmcsd_clk = { | 325 | static struct clk mmcsd_clk = { |