Merge branch 'devel' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into devel-stable

73 files changed, 2431 insertions, 2023 deletions

diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 6ab6b337a913..c5191b1532e8 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -685,8 +685,8 @@ proc_types:
                 W(b)    __armv4_mmu_cache_off
                 W(b)    __armv4_mmu_cache_flush
 
-                .word   0x56056930
-                .word   0xff0ffff0              @ PXA935
+                .word   0x56056900
+                .word   0xffffff00              @ PXA9xx
                 W(b)    __armv4_mmu_cache_on
                 W(b)    __armv4_mmu_cache_off
                 W(b)    __armv4_mmu_cache_flush
@@ -697,12 +697,6 @@ proc_types:
                 W(b)    __armv4_mmu_cache_off
                 W(b)    __armv5tej_mmu_cache_flush
 
-                .word   0x56056930
-                .word   0xff0ffff0              @ PXA935
-                W(b)    __armv4_mmu_cache_on
-                W(b)    __armv4_mmu_cache_off
-                W(b)    __armv4_mmu_cache_flush
-
                 .word   0x56050000              @ Feroceon
                 .word   0xff0f0000
                 W(b)    __armv4_mmu_cache_on
diff --git a/arch/arm/configs/imote2_defconfig b/arch/arm/configs/imote2_defconfig
index 95d2becfc664..21f2bff8a363 100644
--- a/arch/arm/configs/imote2_defconfig
+++ b/arch/arm/configs/imote2_defconfig
@@ -1,13 +1,14 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc8
-# Sat Feb 13 21:48:53 2010
+# Linux kernel version: 2.6.34-rc2
+# Thu Apr  8 14:49:08 2010
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_HAVE_PROC_CPU=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_STACKTRACE_SUPPORT=y
 CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@@ -19,6 +20,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_ARCH_HAS_CPUFREQ=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_ARCH_MTD_XIP=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
@@ -60,11 +62,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -97,10 +94,14 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
 
 #
 # Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
@@ -184,6 +185,7 @@ CONFIG_MMU=y
 # CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_BCMRING is not set
 # CONFIG_ARCH_CLPS711X is not set
 # CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_EBSA110 is not set
@@ -193,7 +195,6 @@ CONFIG_MMU=y
 # CONFIG_ARCH_STMP3XXX is not set
 # CONFIG_ARCH_NETX is not set
 # CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_IOP13XX is not set
 # CONFIG_ARCH_IOP32X is not set
 # CONFIG_ARCH_IOP33X is not set
@@ -210,21 +211,26 @@ CONFIG_MMU=y
 # CONFIG_ARCH_KS8695 is not set
 # CONFIG_ARCH_NS9XXX is not set
 # CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_NUC93X is not set
 # CONFIG_ARCH_PNX4008 is not set
 CONFIG_ARCH_PXA=y
 # CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_SHMOBILE is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
 # CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P6440 is not set
+# CONFIG_ARCH_S5P6442 is not set
 # CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_S5PV210 is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_BCMRING is not set
-# CONFIG_ARCH_U8500 is not set
 
 #
 # Intel PXA2xx/PXA3xx Implementations
@@ -253,6 +259,7 @@ CONFIG_ARCH_PXA=y
 # CONFIG_MACH_EM_X270 is not set
 # CONFIG_MACH_EXEDA is not set
 # CONFIG_MACH_CM_X300 is not set
+# CONFIG_MACH_CAPC7117 is not set
 # CONFIG_ARCH_GUMSTIX is not set
 CONFIG_MACH_INTELMOTE2=y
 # CONFIG_MACH_STARGATE2 is not set
@@ -275,7 +282,11 @@ CONFIG_MACH_INTELMOTE2=y
 # CONFIG_PXA_EZX is not set
 # CONFIG_MACH_MP900C is not set
 # CONFIG_ARCH_PXA_PALM is not set
+# CONFIG_MACH_RAUMFELD_RC is not set
+# CONFIG_MACH_RAUMFELD_CONNECTOR is not set
+# CONFIG_MACH_RAUMFELD_SPEAKER is not set
 # CONFIG_PXA_SHARPSL is not set
+# CONFIG_MACH_ICONTROL is not set
 # CONFIG_ARCH_PXA_ESERIES is not set
 CONFIG_PXA27x=y
 CONFIG_PXA_SSP=y
@@ -302,6 +313,7 @@ CONFIG_ARM_THUMB=y
 CONFIG_ARM_L1_CACHE_SHIFT=5
 CONFIG_IWMMXT=y
 CONFIG_XSCALE_PMU=y
+CONFIG_CPU_HAS_PMU=y
 CONFIG_COMMON_CLKDEV=y
 
 #
@@ -352,7 +364,7 @@ CONFIG_ALIGNMENT_TRAP=y
 #
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=tty1 root=/dev/mmcblk0p2 rootfstype=ext2 rootdelay=3 ip=192.168.0.202:192.168.0.200:192.168.0.200:255.255.255.0 debug"
+CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=jffs2 console=ttyS2,115200 mem=32M"
 # CONFIG_XIP_KERNEL is not set
 CONFIG_KEXEC=y
 CONFIG_ATAGS_PROC=y
@@ -360,24 +372,8 @@ CONFIG_ATAGS_PROC=y
 #
 # CPU Power Management
 #
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_TABLE=y
-CONFIG_CPU_FREQ_DEBUG=y
-CONFIG_CPU_FREQ_STAT=y
-# CONFIG_CPU_FREQ_STAT_DETAILS is not set
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
-# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
-# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
-# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=m
-CONFIG_CPU_FREQ_GOV_USERSPACE=m
-CONFIG_CPU_FREQ_GOV_ONDEMAND=m
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
-CONFIG_CPU_IDLE=y
-CONFIG_CPU_IDLE_GOV_LADDER=y
-CONFIG_CPU_IDLE_GOV_MENU=y
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPU_IDLE is not set
 
 #
 # Floating point emulation
@@ -409,6 +405,7 @@ CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
 CONFIG_APM_EMULATION=y
 CONFIG_PM_RUNTIME=y
+CONFIG_PM_OPS=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
@@ -416,7 +413,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -506,6 +502,7 @@ CONFIG_NF_CT_NETLINK=m
 CONFIG_NETFILTER_XTABLES=m
 CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
 # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_CT is not set
 # CONFIG_NETFILTER_XT_TARGET_DSCP is not set
 CONFIG_NETFILTER_XT_TARGET_HL=m
 CONFIG_NETFILTER_XT_TARGET_LED=m
@@ -622,6 +619,7 @@ CONFIG_IP6_NF_RAW=m
 # CONFIG_ATM is not set
 CONFIG_STP=m
 CONFIG_BRIDGE=m
+# CONFIG_BRIDGE_IGMP_SNOOPING is not set
 # CONFIG_NET_DSA is not set
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
@@ -646,32 +644,7 @@ CONFIG_NET_CLS_ROUTE=y
 # CONFIG_HAMRADIO is not set
 # CONFIG_CAN is not set
 # CONFIG_IRDA is not set
-CONFIG_BT=y
-CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=y
-CONFIG_BT_RFCOMM=y
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=y
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=y
-
-#
-# Bluetooth device drivers
-#
-CONFIG_BT_HCIBTUSB=m
-CONFIG_BT_HCIBTSDIO=m
-CONFIG_BT_HCIUART=y
-CONFIG_BT_HCIUART_H4=y
-# CONFIG_BT_HCIUART_BCSP is not set
-# CONFIG_BT_HCIUART_LL is not set
-CONFIG_BT_HCIBCM203X=m
-CONFIG_BT_HCIBPA10X=m
-CONFIG_BT_HCIBFUSB=m
-CONFIG_BT_HCIVHCI=m
-CONFIG_BT_MRVL=m
-CONFIG_BT_MRVL_SDIO=m
-# CONFIG_BT_ATH3K is not set
+# CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
 CONFIG_FIB_RULES=y
 # CONFIG_WIRELESS is not set
@@ -687,7 +660,8 @@ CONFIG_FIB_RULES=y
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_DEVTMPFS is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=m
@@ -703,9 +677,9 @@ CONFIG_MTD=y
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
-# CONFIG_MTD_AFS_PARTS is not set
-# CONFIG_MTD_AR7_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_AFS_PARTS=y
+CONFIG_MTD_AR7_PARTS=y
 
 #
 # User Modules And Translation Layers
@@ -812,6 +786,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -965,6 +940,7 @@ CONFIG_SERIAL_PXA=y
 CONFIG_SERIAL_PXA_CONSOLE=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 CONFIG_LEGACY_PTYS=y
@@ -993,6 +969,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_PXA=y
 # CONFIG_I2C_PXA_SLAVE is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -1006,15 +983,9 @@ CONFIG_I2C_PXA=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 CONFIG_SPI=y
 # CONFIG_SPI_DEBUG is not set
 CONFIG_SPI_MASTER=y
@@ -1046,10 +1017,12 @@ CONFIG_GPIO_SYSFS=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
@@ -1093,10 +1066,12 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_MFD_ASIC3 is not set
 # CONFIG_HTC_EGPIO is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
@@ -1105,22 +1080,25 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_TC6393XB is not set
 CONFIG_PMIC_DA903X=y
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_MFD_MC13783 is not set
 # CONFIG_AB3100_CORE is not set
 # CONFIG_EZX_PCAP is not set
-# CONFIG_MFD_88PM8607 is not set
 # CONFIG_AB4500_CORE is not set
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_DEBUG=y
+# CONFIG_REGULATOR_DUMMY is not set
 # CONFIG_REGULATOR_FIXED_VOLTAGE is not set
 CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
 CONFIG_REGULATOR_USERSPACE_CONSUMER=y
 # CONFIG_REGULATOR_BQ24022 is not set
 # CONFIG_REGULATOR_MAX1586 is not set
+# CONFIG_REGULATOR_MAX8649 is not set
 # CONFIG_REGULATOR_MAX8660 is not set
 CONFIG_REGULATOR_DA903X=y
 # CONFIG_REGULATOR_LP3971 is not set
@@ -1218,6 +1196,7 @@ CONFIG_VIDEO_IR_I2C=y
 # CONFIG_VIDEO_SAA7191 is not set
 # CONFIG_VIDEO_TVP514X is not set
 # CONFIG_VIDEO_TVP5150 is not set
+# CONFIG_VIDEO_TVP7002 is not set
 # CONFIG_VIDEO_VPX3220 is not set
 
 #
@@ -1264,15 +1243,7 @@ CONFIG_SOC_CAMERA_MT9M111=y
 CONFIG_VIDEO_PXA27x=y
 # CONFIG_VIDEO_SH_MOBILE_CEU is not set
 # CONFIG_V4L_USB_DRIVERS is not set
-CONFIG_RADIO_ADAPTERS=y
-# CONFIG_I2C_SI4713 is not set
-# CONFIG_RADIO_SI4713 is not set
-# CONFIG_USB_DSBR is not set
-# CONFIG_RADIO_SI470X is not set
-# CONFIG_USB_MR800 is not set
-CONFIG_RADIO_TEA5764=y
-CONFIG_RADIO_TEA5764_XTAL=y
-# CONFIG_RADIO_TEF6862 is not set
+# CONFIG_RADIO_ADAPTERS is not set
 # CONFIG_DAB is not set
 
 #
@@ -1398,8 +1369,6 @@ CONFIG_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_APPLE=m
-# CONFIG_HID_WACOM is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1477,7 +1446,6 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1489,7 +1457,6 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 CONFIG_USB_GADGET=y
 # CONFIG_USB_GADGET_DEBUG is not set
 # CONFIG_USB_GADGET_DEBUG_FILES is not set
@@ -1529,6 +1496,7 @@ CONFIG_USB_ETH=y
 # CONFIG_USB_MIDI_GADGET is not set
 # CONFIG_USB_G_PRINTER is not set
 # CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_NOKIA is not set
 # CONFIG_USB_G_MULTI is not set
 
 #
@@ -1555,8 +1523,6 @@ CONFIG_SDIO_UART=m
 #
 CONFIG_MMC_PXA=y
 # CONFIG_MMC_SDHCI is not set
-# CONFIG_MMC_AT91 is not set
-# CONFIG_MMC_ATMELMCI is not set
 CONFIG_MMC_SPI=y
 # CONFIG_MEMSTICK is not set
 CONFIG_NEW_LEDS=y
@@ -1574,11 +1540,11 @@ CONFIG_LEDS_LP3944=y
 # CONFIG_LEDS_REGULATOR is not set
 # CONFIG_LEDS_BD2802 is not set
 # CONFIG_LEDS_LT3593 is not set
+CONFIG_LEDS_TRIGGERS=y
 
 #
 # LED Triggers
 #
-CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_TIMER=y
 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_LEDS_TRIGGER_BACKLIGHT=y
@@ -1656,7 +1622,7 @@ CONFIG_RTC_INTF_DEV=y
 # on-CPU RTC drivers
 #
 # CONFIG_RTC_DRV_SA1100 is not set
-# CONFIG_RTC_DRV_PXA is not set
+CONFIG_RTC_DRV_PXA=y
 # CONFIG_DMADEVICES is not set
 # CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
@@ -1681,19 +1647,10 @@ CONFIG_EXT3_FS_XATTR=y
 CONFIG_JBD=m
 # CONFIG_JBD_DEBUG is not set
 CONFIG_FS_MBCACHE=m
-CONFIG_REISERFS_FS=m
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
+# CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
-CONFIG_XFS_FS=m
-# CONFIG_XFS_QUOTA is not set
-# CONFIG_XFS_POSIX_ACL is not set
-# CONFIG_XFS_RT is not set
-# CONFIG_XFS_DEBUG is not set
+# CONFIG_XFS_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
 # CONFIG_NILFS2_FS is not set
@@ -1716,9 +1673,7 @@ CONFIG_CUSE=m
 #
 # CD-ROM/DVD Filesystems
 #
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
+# CONFIG_ISO9660_FS is not set
 # CONFIG_UDF_FS is not set
 
 #
@@ -1750,12 +1705,14 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-CONFIG_JFFS2_FS=m
+CONFIG_JFFS2_FS=y
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
-# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
-# CONFIG_JFFS2_SUMMARY is not set
-# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_FS_WBUF_VERIFY=y
+CONFIG_JFFS2_SUMMARY=y
+CONFIG_JFFS2_FS_XATTR=y
+CONFIG_JFFS2_FS_POSIX_ACL=y
+CONFIG_JFFS2_FS_SECURITY=y
 CONFIG_JFFS2_COMPRESSION_OPTIONS=y
 CONFIG_JFFS2_ZLIB=y
 CONFIG_JFFS2_LZO=y
@@ -1765,6 +1722,7 @@ CONFIG_JFFS2_RUBIN=y
 CONFIG_JFFS2_CMODE_PRIORITY=y
 # CONFIG_JFFS2_CMODE_SIZE is not set
 # CONFIG_JFFS2_CMODE_FAVOURLZO is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=m
 CONFIG_SQUASHFS=m
 # CONFIG_SQUASHFS_EMBEDDED is not set
@@ -1802,6 +1760,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 CONFIG_SMB_FS=m
 # CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CEPH_FS is not set
 CONFIG_CIFS=m
 CONFIG_CIFS_STATS=y
 # CONFIG_CIFS_STATS2 is not set
@@ -1895,6 +1854,7 @@ CONFIG_DEBUG_SPINLOCK=y
 CONFIG_DEBUG_MUTEXES=y
 CONFIG_DEBUG_LOCK_ALLOC=y
 CONFIG_PROVE_LOCKING=y
+# CONFIG_PROVE_RCU is not set
 CONFIG_LOCKDEP=y
 # CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_LOCKDEP is not set
@@ -1918,6 +1878,7 @@ CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 # CONFIG_SYSCTL_SYSCALL_CHECK is not set
@@ -2061,9 +2022,9 @@ CONFIG_CRC32=y
 CONFIG_CRC7=y
 CONFIG_LIBCRC32C=m
 CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=m
-CONFIG_LZO_COMPRESS=m
-CONFIG_LZO_DECOMPRESS=m
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
 CONFIG_DECOMPRESS_GZIP=y
 CONFIG_DECOMPRESS_BZIP2=y
 CONFIG_DECOMPRESS_LZMA=y
@@ -2075,3 +2036,4 @@ CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
 CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/arm/configs/mmp2_defconfig b/arch/arm/configs/mmp2_defconfig
index 03f76cfc941c..4b55dcb60029 100644
--- a/arch/arm/configs/mmp2_defconfig
+++ b/arch/arm/configs/mmp2_defconfig
@@ -1,13 +1,14 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc2
-# Tue Jan  5 13:55:22 2010
+# Linux kernel version: 2.6.34-rc5
+# Wed Apr 28 11:23:19 2010
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_HAVE_PROC_CPU=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_STACKTRACE_SUPPORT=y
 CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@@ -18,6 +19,7 @@ CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
@@ -32,6 +34,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -52,7 +60,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_GROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -85,10 +92,14 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
 
 #
 # Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
@@ -104,6 +115,7 @@ CONFIG_HAVE_CLK=y
 #
 # GCOV-based kernel profiling
 #
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -170,6 +182,7 @@ CONFIG_MMU=y
 # CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_BCMRING is not set
 # CONFIG_ARCH_CLPS711X is not set
 # CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_EBSA110 is not set
@@ -179,7 +192,6 @@ CONFIG_MMU=y
 # CONFIG_ARCH_STMP3XXX is not set
 # CONFIG_ARCH_NETX is not set
 # CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_IOP13XX is not set
 # CONFIG_ARCH_IOP32X is not set
 # CONFIG_ARCH_IOP33X is not set
@@ -196,21 +208,26 @@ CONFIG_ARCH_MMP=y
 # CONFIG_ARCH_KS8695 is not set
 # CONFIG_ARCH_NS9XXX is not set
 # CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_NUC93X is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
 # CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_SHMOBILE is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
 # CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P6440 is not set
+# CONFIG_ARCH_S5P6442 is not set
 # CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_S5PV210 is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_BCMRING is not set
-# CONFIG_ARCH_U8500 is not set
 # CONFIG_MACH_TAVOREVB is not set
 
 #
@@ -218,8 +235,10 @@ CONFIG_ARCH_MMP=y
 #
 # CONFIG_MACH_ASPENITE is not set
 # CONFIG_MACH_ZYLONITE2 is not set
+# CONFIG_MACH_AVENGERS_LITE is not set
 # CONFIG_MACH_TTC_DKB is not set
 CONFIG_MACH_FLINT=y
+CONFIG_MACH_MARVELL_JASPER=y
 CONFIG_CPU_MMP2=y
 CONFIG_PLAT_PXA=y
 
@@ -246,7 +265,10 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_ICACHE_DISABLE is not set
 # CONFIG_CPU_DCACHE_DISABLE is not set
 # CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_OUTER_CACHE=y
+CONFIG_CACHE_TAUROS2=y
 CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_CPU_HAS_PMU=y
 # CONFIG_ARM_ERRATA_411920 is not set
 CONFIG_COMMON_CLKDEV=y
 
@@ -298,7 +320,7 @@ CONFIG_ALIGNMENT_TRAP=y
 #
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS0,115200 mem=128M user_debug=255"
+CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS2,38400 mem=128M user_debug=255"
 # CONFIG_XIP_KERNEL is not set
 # CONFIG_KEXEC is not set
 
@@ -338,7 +360,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -532,6 +553,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -640,6 +662,7 @@ CONFIG_SERIAL_PXA=y
 CONFIG_SERIAL_PXA_CONSOLE=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
@@ -667,6 +690,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_PXA=y
 # CONFIG_I2C_PXA_SLAVE is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -679,15 +703,9 @@ CONFIG_I2C_PXA=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -702,13 +720,16 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -737,10 +758,12 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 CONFIG_MFD_CORE=y
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_MFD_ASIC3 is not set
 # CONFIG_HTC_EGPIO is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
@@ -749,24 +772,27 @@ CONFIG_MFD_CORE=y
 # CONFIG_MFD_TC6393XB is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+CONFIG_MFD_MAX8925=y
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-CONFIG_MFD_88PM8607=y
 CONFIG_REGULATOR=y
 # CONFIG_REGULATOR_DEBUG is not set
+# CONFIG_REGULATOR_DUMMY is not set
 # CONFIG_REGULATOR_FIXED_VOLTAGE is not set
 # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
 # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
 # CONFIG_REGULATOR_BQ24022 is not set
 # CONFIG_REGULATOR_MAX1586 is not set
-CONFIG_REGULATOR_MAX8660=y
+CONFIG_REGULATOR_MAX8649=y
+# CONFIG_REGULATOR_MAX8660 is not set
+CONFIG_REGULATOR_MAX8925=y
 # CONFIG_REGULATOR_LP3971 is not set
 # CONFIG_REGULATOR_TPS65023 is not set
 # CONFIG_REGULATOR_TPS6507X is not set
-CONFIG_REGULATOR_88PM8607=y
 # CONFIG_MEDIA_SUPPORT is not set
 
 #
@@ -781,6 +807,7 @@ CONFIG_LCD_CLASS_DEVICE=y
 # CONFIG_LCD_PLATFORM is not set
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
 CONFIG_BACKLIGHT_GENERIC=y
+CONFIG_BACKLIGHT_MAX8925=y
 
 #
 # Display device support
@@ -821,6 +848,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_DS1374 is not set
 # CONFIG_RTC_DRV_DS1672 is not set
 # CONFIG_RTC_DRV_MAX6900 is not set
+CONFIG_RTC_DRV_MAX8925=y
 # CONFIG_RTC_DRV_RS5C372 is not set
 # CONFIG_RTC_DRV_ISL1208 is not set
 # CONFIG_RTC_DRV_X1205 is not set
@@ -872,7 +900,6 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_EXT2_FS is not set
 # CONFIG_EXT3_FS is not set
 # CONFIG_EXT4_FS is not set
-CONFIG_EXT4_USE_FOR_EXT23=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
@@ -883,7 +910,7 @@ CONFIG_FS_POSIX_ACL=y
 # CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
-CONFIG_DNOTIFY=y
+# CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
 # CONFIG_QUOTA is not set
@@ -940,6 +967,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -967,6 +995,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
@@ -990,7 +1019,7 @@ CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
 # CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
+CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_SHIRQ is not set
@@ -1032,6 +1061,7 @@ CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 # CONFIG_SYSCTL_SYSCALL_CHECK is not set
@@ -1052,6 +1082,7 @@ CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_KMEMTRACE is not set
 # CONFIG_WORKQUEUE_TRACER is not set
 # CONFIG_BLK_DEV_IO_TRACE is not set
+CONFIG_DYNAMIC_DEBUG=y
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1059,9 +1090,7 @@ CONFIG_ARM_UNWIND=y
 CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_STACK_USAGE is not set
-CONFIG_DEBUG_LL=y
-# CONFIG_EARLY_PRINTK is not set
-# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_DEBUG_LL is not set
 # CONFIG_OC_ETM is not set
 
 #
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index a2d307ec0420..244655d323ea 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -59,6 +59,13 @@ static unsigned long common_pin_config[] __initdata = {
         /* UART1 */
         GPIO107_UART1_RXD,
         GPIO108_UART1_TXD,
+
+        /* SSP1 */
+        GPIO113_I2S_MCLK,
+        GPIO114_I2S_FRM,
+        GPIO115_I2S_BCLK,
+        GPIO116_I2S_RXD,
+        GPIO117_I2S_TXD,
 };
 
 static struct smc91x_platdata smc91x_info = {
@@ -123,12 +130,18 @@ static struct pxa3xx_nand_platform_data aspenite_nand_info = {
         .nr_parts       = ARRAY_SIZE(aspenite_nand_partitions),
 };
 
+static struct i2c_board_info aspenite_i2c_info[] __initdata = {
+        { I2C_BOARD_INFO("wm8753", 0x1b), },
+};
+
 static void __init common_init(void)
 {
         mfp_config(ARRAY_AND_SIZE(common_pin_config));
 
         /* on-chip devices */
         pxa168_add_uart(1);
+        pxa168_add_twsi(1, NULL, ARRAY_AND_SIZE(aspenite_i2c_info));
+        pxa168_add_ssp(1);
         pxa168_add_nand(&aspenite_nand_info);
 
         /* off-chip devices */
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
index ab26d13295c4..ee8b02ed8011 100644
--- a/arch/arm/mach-mmp/include/mach/gpio.h
+++ b/arch/arm/mach-mmp/include/mach/gpio.h
@@ -10,7 +10,7 @@
 #define BANK_OFF(n)     (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
 #define GPIO_REG(x)     (*((volatile u32 *)(GPIO_REGS_VIRT + (x))))
 
-#define NR_BUILTIN_GPIO (128)
+#define NR_BUILTIN_GPIO (192)
 
 #define gpio_to_bank(gpio)      ((gpio) >> 5)
 #define gpio_to_irq(gpio)       (IRQ_GPIO_START + (gpio))
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index 02701196ea03..b379cdec4d38 100644
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -5,10 +5,10 @@
  * Interrupt numbers for PXA168
  */
 #define IRQ_PXA168_NONE                 (-1)
-#define IRQ_PXA168_SSP3                 0
-#define IRQ_PXA168_SSP2                 1
-#define IRQ_PXA168_SSP1                 2
-#define IRQ_PXA168_SSP0                 3
+#define IRQ_PXA168_SSP4                 0
+#define IRQ_PXA168_SSP3                 1
+#define IRQ_PXA168_SSP2                 2
+#define IRQ_PXA168_SSP1                 3
 #define IRQ_PXA168_PMIC_INT             4
 #define IRQ_PXA168_RTC_INT              5
 #define IRQ_PXA168_RTC_ALARM            6
@@ -20,7 +20,7 @@
 #define IRQ_PXA168_TIMER2               14
 #define IRQ_PXA168_TIMER3               15
 #define IRQ_PXA168_CMU                  16
-#define IRQ_PXA168_SSP4                 17
+#define IRQ_PXA168_SSP5                 17
 #define IRQ_PXA168_MSP_WAKEUP           19
 #define IRQ_PXA168_CF_WAKEUP            20
 #define IRQ_PXA168_XD_WAKEUP            21
diff --git a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
index 9f9f8143e272..761c2dacc079 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
@@ -9,6 +9,175 @@
 #define MFP_DRIVE_FAST          (0x8 << 13)
 
 /* GPIO */
+#define GPIO0_GPIO0             MFP_CFG(GPIO0, AF0)
+#define GPIO1_GPIO1             MFP_CFG(GPIO1, AF0)
+#define GPIO2_GPIO2             MFP_CFG(GPIO2, AF0)
+#define GPIO3_GPIO3             MFP_CFG(GPIO3, AF0)
+#define GPIO4_GPIO4             MFP_CFG(GPIO4, AF0)
+#define GPIO5_GPIO5             MFP_CFG(GPIO5, AF0)
+#define GPIO6_GPIO6             MFP_CFG(GPIO6, AF0)
+#define GPIO7_GPIO7             MFP_CFG(GPIO7, AF0)
+#define GPIO8_GPIO8             MFP_CFG(GPIO8, AF0)
+#define GPIO9_GPIO9             MFP_CFG(GPIO9, AF0)
+#define GPIO10_GPIO10           MFP_CFG(GPIO10, AF0)
+#define GPIO11_GPIO11           MFP_CFG(GPIO11, AF0)
+#define GPIO12_GPIO12           MFP_CFG(GPIO12, AF0)
+#define GPIO13_GPIO13           MFP_CFG(GPIO13, AF0)
+#define GPIO14_GPIO14           MFP_CFG(GPIO14, AF0)
+#define GPIO15_GPIO15           MFP_CFG(GPIO15, AF0)
+#define GPIO16_GPIO16           MFP_CFG(GPIO16, AF0)
+#define GPIO17_GPIO17           MFP_CFG(GPIO17, AF0)
+#define GPIO18_GPIO18           MFP_CFG(GPIO18, AF0)
+#define GPIO19_GPIO19           MFP_CFG(GPIO19, AF0)
+#define GPIO20_GPIO20           MFP_CFG(GPIO20, AF0)
+#define GPIO21_GPIO21           MFP_CFG(GPIO21, AF0)
+#define GPIO22_GPIO22           MFP_CFG(GPIO22, AF0)
+#define GPIO23_GPIO23           MFP_CFG(GPIO23, AF0)
+#define GPIO24_GPIO24           MFP_CFG(GPIO24, AF0)
+#define GPIO25_GPIO25           MFP_CFG(GPIO25, AF0)
+#define GPIO26_GPIO26           MFP_CFG(GPIO26, AF0)
+#define GPIO27_GPIO27           MFP_CFG(GPIO27, AF0)
+#define GPIO28_GPIO28           MFP_CFG(GPIO28, AF0)
+#define GPIO29_GPIO29           MFP_CFG(GPIO29, AF0)
+#define GPIO30_GPIO30           MFP_CFG(GPIO30, AF0)
+#define GPIO31_GPIO31           MFP_CFG(GPIO31, AF0)
+#define GPIO32_GPIO32           MFP_CFG(GPIO32, AF0)
+#define GPIO33_GPIO33           MFP_CFG(GPIO33, AF0)
+#define GPIO34_GPIO34           MFP_CFG(GPIO34, AF0)
+#define GPIO35_GPIO35           MFP_CFG(GPIO35, AF0)
+#define GPIO36_GPIO36           MFP_CFG(GPIO36, AF0)
+#define GPIO37_GPIO37           MFP_CFG(GPIO37, AF0)
+#define GPIO38_GPIO38           MFP_CFG(GPIO38, AF0)
+#define GPIO39_GPIO39           MFP_CFG(GPIO39, AF0)
+#define GPIO40_GPIO40           MFP_CFG(GPIO40, AF0)
+#define GPIO41_GPIO41           MFP_CFG(GPIO41, AF0)
+#define GPIO42_GPIO42           MFP_CFG(GPIO42, AF0)
+#define GPIO43_GPIO43           MFP_CFG(GPIO43, AF0)
+#define GPIO44_GPIO44           MFP_CFG(GPIO44, AF0)
+#define GPIO45_GPIO45           MFP_CFG(GPIO45, AF0)
+#define GPIO46_GPIO46           MFP_CFG(GPIO46, AF0)
+#define GPIO47_GPIO47           MFP_CFG(GPIO47, AF0)
+#define GPIO48_GPIO48           MFP_CFG(GPIO48, AF0)
+#define GPIO49_GPIO49           MFP_CFG(GPIO49, AF0)
+#define GPIO50_GPIO50           MFP_CFG(GPIO50, AF0)
+#define GPIO51_GPIO51           MFP_CFG(GPIO51, AF0)
+#define GPIO52_GPIO52           MFP_CFG(GPIO52, AF0)
+#define GPIO53_GPIO53           MFP_CFG(GPIO53, AF0)
+#define GPIO54_GPIO54           MFP_CFG(GPIO54, AF0)
+#define GPIO55_GPIO55           MFP_CFG(GPIO55, AF0)
+#define GPIO56_GPIO56           MFP_CFG(GPIO56, AF0)
+#define GPIO57_GPIO57           MFP_CFG(GPIO57, AF0)
+#define GPIO58_GPIO58           MFP_CFG(GPIO58, AF0)
+#define GPIO59_GPIO59           MFP_CFG(GPIO59, AF0)
+#define GPIO60_GPIO60           MFP_CFG(GPIO60, AF0)
+#define GPIO61_GPIO61           MFP_CFG(GPIO61, AF0)
+#define GPIO62_GPIO62           MFP_CFG(GPIO62, AF0)
+#define GPIO63_GPIO63           MFP_CFG(GPIO63, AF0)
+#define GPIO64_GPIO64           MFP_CFG(GPIO64, AF0)
+#define GPIO65_GPIO65           MFP_CFG(GPIO65, AF0)
+#define GPIO66_GPIO66           MFP_CFG(GPIO66, AF0)
+#define GPIO67_GPIO67           MFP_CFG(GPIO67, AF0)
+#define GPIO68_GPIO68           MFP_CFG(GPIO68, AF0)
+#define GPIO69_GPIO69           MFP_CFG(GPIO69, AF0)
+#define GPIO70_GPIO70           MFP_CFG(GPIO70, AF0)
+#define GPIO71_GPIO71           MFP_CFG(GPIO71, AF0)
+#define GPIO72_GPIO72           MFP_CFG(GPIO72, AF0)
+#define GPIO73_GPIO73           MFP_CFG(GPIO73, AF0)
+#define GPIO74_GPIO74           MFP_CFG(GPIO74, AF0)
+#define GPIO75_GPIO75           MFP_CFG(GPIO75, AF0)
+#define GPIO76_GPIO76           MFP_CFG(GPIO76, AF0)
+#define GPIO77_GPIO77           MFP_CFG(GPIO77, AF0)
+#define GPIO78_GPIO78           MFP_CFG(GPIO78, AF0)
+#define GPIO79_GPIO79           MFP_CFG(GPIO79, AF0)
+#define GPIO80_GPIO80           MFP_CFG(GPIO80, AF0)
+#define GPIO81_GPIO81           MFP_CFG(GPIO81, AF0)
+#define GPIO82_GPIO82           MFP_CFG(GPIO82, AF0)
+#define GPIO83_GPIO83           MFP_CFG(GPIO83, AF0)
+#define GPIO84_GPIO84           MFP_CFG(GPIO84, AF0)
+#define GPIO85_GPIO85           MFP_CFG(GPIO85, AF0)
+#define GPIO86_GPIO86           MFP_CFG(GPIO86, AF0)
+#define GPIO87_GPIO87           MFP_CFG(GPIO87, AF0)
+#define GPIO88_GPIO88           MFP_CFG(GPIO88, AF0)
+#define GPIO89_GPIO89           MFP_CFG(GPIO89, AF0)
+#define GPIO90_GPIO90           MFP_CFG(GPIO90, AF0)
+#define GPIO91_GPIO91           MFP_CFG(GPIO91, AF0)
+#define GPIO92_GPIO92           MFP_CFG(GPIO92, AF0)
+#define GPIO93_GPIO93           MFP_CFG(GPIO93, AF0)
+#define GPIO94_GPIO94           MFP_CFG(GPIO94, AF0)
+#define GPIO95_GPIO95           MFP_CFG(GPIO95, AF0)
+#define GPIO96_GPIO96           MFP_CFG(GPIO96, AF0)
+#define GPIO97_GPIO97           MFP_CFG(GPIO97, AF0)
+#define GPIO98_GPIO98           MFP_CFG(GPIO98, AF0)
+#define GPIO99_GPIO99           MFP_CFG(GPIO99, AF0)
+#define GPIO100_GPIO100         MFP_CFG(GPIO100, AF0)
+#define GPIO101_GPIO101         MFP_CFG(GPIO101, AF0)
+#define GPIO102_GPIO102         MFP_CFG(GPIO102, AF1)
+#define GPIO103_GPIO103         MFP_CFG(GPIO103, AF1)
+#define GPIO104_GPIO104         MFP_CFG(GPIO104, AF1)
+#define GPIO105_GPIO105         MFP_CFG(GPIO105, AF1)
+#define GPIO106_GPIO106         MFP_CFG(GPIO106, AF1)
+#define GPIO107_GPIO107         MFP_CFG(GPIO107, AF1)
+#define GPIO108_GPIO108         MFP_CFG(GPIO108, AF1)
+#define GPIO109_GPIO109         MFP_CFG(GPIO109, AF1)
+#define GPIO110_GPIO110         MFP_CFG(GPIO110, AF1)
+#define GPIO111_GPIO111         MFP_CFG(GPIO111, AF1)
+#define GPIO112_GPIO112         MFP_CFG(GPIO112, AF1)
+#define GPIO113_GPIO113         MFP_CFG(GPIO113, AF1)
+#define GPIO114_GPIO114         MFP_CFG(GPIO114, AF0)
+#define GPIO115_GPIO115         MFP_CFG(GPIO115, AF0)
+#define GPIO116_GPIO116         MFP_CFG(GPIO116, AF0)
+#define GPIO117_GPIO117         MFP_CFG(GPIO117, AF0)
+#define GPIO118_GPIO118         MFP_CFG(GPIO118, AF0)
+#define GPIO119_GPIO119         MFP_CFG(GPIO119, AF0)
+#define GPIO120_GPIO120         MFP_CFG(GPIO120, AF0)
+#define GPIO121_GPIO121         MFP_CFG(GPIO121, AF0)
+#define GPIO122_GPIO122         MFP_CFG(GPIO122, AF0)
+#define GPIO123_GPIO123         MFP_CFG(GPIO123, AF0)
+#define GPIO124_GPIO124         MFP_CFG(GPIO124, AF0)
+#define GPIO125_GPIO125         MFP_CFG(GPIO125, AF0)
+#define GPIO126_GPIO126         MFP_CFG(GPIO126, AF0)
+#define GPIO127_GPIO127         MFP_CFG(GPIO127, AF0)
+#define GPIO128_GPIO128         MFP_CFG(GPIO128, AF0)
+#define GPIO129_GPIO129         MFP_CFG(GPIO129, AF0)
+#define GPIO130_GPIO130         MFP_CFG(GPIO130, AF0)
+#define GPIO131_GPIO131         MFP_CFG(GPIO131, AF0)
+#define GPIO132_GPIO132         MFP_CFG(GPIO132, AF0)
+#define GPIO133_GPIO133         MFP_CFG(GPIO133, AF0)
+#define GPIO134_GPIO134         MFP_CFG(GPIO134, AF0)
+#define GPIO135_GPIO135         MFP_CFG(GPIO135, AF0)
+#define GPIO136_GPIO136         MFP_CFG(GPIO136, AF0)
+#define GPIO137_GPIO137         MFP_CFG(GPIO137, AF0)
+#define GPIO138_GPIO138         MFP_CFG(GPIO138, AF0)
+#define GPIO139_GPIO139         MFP_CFG(GPIO139, AF0)
+#define GPIO140_GPIO140         MFP_CFG(GPIO140, AF0)
+#define GPIO141_GPIO141         MFP_CFG(GPIO141, AF0)
+#define GPIO142_GPIO142         MFP_CFG(GPIO142, AF1)
+#define GPIO143_GPIO143         MFP_CFG(GPIO143, AF1)
+#define GPIO144_GPIO144         MFP_CFG(GPIO144, AF1)
+#define GPIO145_GPIO145         MFP_CFG(GPIO145, AF1)
+#define GPIO146_GPIO146         MFP_CFG(GPIO146, AF1)
+#define GPIO147_GPIO147         MFP_CFG(GPIO147, AF1)
+#define GPIO148_GPIO148         MFP_CFG(GPIO148, AF1)
+#define GPIO149_GPIO149         MFP_CFG(GPIO149, AF1)
+#define GPIO150_GPIO150         MFP_CFG(GPIO150, AF1)
+#define GPIO151_GPIO151         MFP_CFG(GPIO151, AF1)
+#define GPIO152_GPIO152         MFP_CFG(GPIO152, AF1)
+#define GPIO153_GPIO153         MFP_CFG(GPIO153, AF1)
+#define GPIO154_GPIO154         MFP_CFG(GPIO154, AF1)
+#define GPIO155_GPIO155         MFP_CFG(GPIO155, AF1)
+#define GPIO156_GPIO156         MFP_CFG(GPIO156, AF1)
+#define GPIO157_GPIO157         MFP_CFG(GPIO157, AF1)
+#define GPIO158_GPIO158         MFP_CFG(GPIO158, AF1)
+#define GPIO159_GPIO159         MFP_CFG(GPIO159, AF1)
+#define GPIO160_GPIO160         MFP_CFG(GPIO160, AF1)
+#define GPIO161_GPIO161         MFP_CFG(GPIO161, AF1)
+#define GPIO162_GPIO162         MFP_CFG(GPIO162, AF1)
+#define GPIO163_GPIO163         MFP_CFG(GPIO163, AF1)
+#define GPIO164_GPIO164         MFP_CFG(GPIO164, AF1)
+#define GPIO165_GPIO165         MFP_CFG(GPIO165, AF1)
+#define GPIO166_GPIO166         MFP_CFG(GPIO166, AF1)
+#define GPIO167_GPIO167         MFP_CFG(GPIO167, AF1)
+#define GPIO168_GPIO168         MFP_CFG(GPIO168, AF1)
 
 /* DFI */
 #define GPIO108_DFI_D15         MFP_CFG(GPIO108, AF0)
@@ -47,7 +216,6 @@
 
 /* Ethernet */
 #define GPIO155_SM_ADVMUX       MFP_CFG(GPIO155, AF2)
-#define GPIO155_GPIO155         MFP_CFG(GPIO155, AF1)
 
 /* UART1 */
 #define GPIO45_UART1_RXD        MFP_CFG(GPIO45, AF1)
@@ -159,6 +327,8 @@
 #define GPIO44_TWSI2_SDA        MFP_CFG_DRV(GPIO44, AF1, SLOW)
 #define GPIO71_TWSI3_SCL        MFP_CFG_DRV(GPIO71, AF1, SLOW)
 #define GPIO72_TWSI3_SDA        MFP_CFG_DRV(GPIO72, AF1, SLOW)
+#define TWSI4_SCL               MFP_CFG_DRV(TWSI4_SCL, AF0, SLOW)
+#define TWSI4_SDA               MFP_CFG_DRV(TWSI4_SDA, AF0, SLOW)
 #define GPIO99_TWSI5_SCL        MFP_CFG_DRV(GPIO99, AF4, SLOW)
 #define GPIO100_TWSI5_SDA       MFP_CFG_DRV(GPIO100, AF4, SLOW)
 #define GPIO97_TWSI6_SCL        MFP_CFG_DRV(GPIO97, AF2, SLOW)
@@ -218,21 +388,6 @@
 #define GPIO69_CAM_MCLK         MFP_CFG_DRV(GPIO69, AF1, FAST)
 #define GPIO70_CAM_PCLK         MFP_CFG_DRV(GPIO70, AF1, FAST)
 
-/* Wifi */
-#define GPIO45_GPIO45           MFP_CFG(GPIO45, AF0)
-#define GPIO46_GPIO46           MFP_CFG(GPIO46, AF0)
-#define GPIO21_GPIO21           MFP_CFG(GPIO21, AF0)
-#define GPIO22_GPIO22           MFP_CFG(GPIO22, AF0)
-#define GPIO55_GPIO55           MFP_CFG(GPIO55, AF0)
-#define GPIO56_GPIO56           MFP_CFG(GPIO56, AF0)
-#define GPIO57_GPIO57           MFP_CFG(GPIO57, AF0)
-#define GPIO58_GPIO58           MFP_CFG(GPIO58, AF0)
-
-/* Codec*/
-#define GPIO23_GPIO23           MFP_CFG(GPIO23, AF0)
-
-#define GPIO101_GPIO101         MFP_CFG(GPIO101, AF0)
-
 /* PMIC */
 #define PMIC_PMIC_INT           MFP_CFG(PMIC_INT, AF0)
 
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
index 459f3be9cfb2..fec220bd5046 100644
--- a/arch/arm/mach-mmp/include/mach/mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -39,17 +39,17 @@ static inline int mmp2_add_twsi(int id, struct i2c_pxa_platform_data *data,
         int ret;
 
         switch (id) {
-        case 0: d = &mmp2_device_twsi1; break;
-        case 1: d = &mmp2_device_twsi2; break;
-        case 2: d = &mmp2_device_twsi3; break;
-        case 3: d = &mmp2_device_twsi4; break;
-        case 4: d = &mmp2_device_twsi5; break;
-        case 5: d = &mmp2_device_twsi6; break;
+        case 1: d = &mmp2_device_twsi1; break;
+        case 2: d = &mmp2_device_twsi2; break;
+        case 3: d = &mmp2_device_twsi3; break;
+        case 4: d = &mmp2_device_twsi4; break;
+        case 5: d = &mmp2_device_twsi5; break;
+        case 6: d = &mmp2_device_twsi6; break;
         default:
                 return -EINVAL;
         }
 
-        ret = i2c_register_board_info(id, info, size);
+        ret = i2c_register_board_info(id - 1, info, size);
         if (ret)
                 return ret;
 
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index 3ad612cbdf09..3b2bd5d5eb05 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -14,6 +14,11 @@ extern struct pxa_device_desc pxa168_device_pwm1;
 extern struct pxa_device_desc pxa168_device_pwm2;
 extern struct pxa_device_desc pxa168_device_pwm3;
 extern struct pxa_device_desc pxa168_device_pwm4;
+extern struct pxa_device_desc pxa168_device_ssp1;
+extern struct pxa_device_desc pxa168_device_ssp2;
+extern struct pxa_device_desc pxa168_device_ssp3;
+extern struct pxa_device_desc pxa168_device_ssp4;
+extern struct pxa_device_desc pxa168_device_ssp5;
 extern struct pxa_device_desc pxa168_device_nand;
 
 static inline int pxa168_add_uart(int id)
@@ -67,6 +72,22 @@ static inline int pxa168_add_pwm(int id)
         return pxa_register_device(d, NULL, 0);
 }
 
+static inline int pxa168_add_ssp(int id)
+{
+        struct pxa_device_desc *d = NULL;
+
+        switch (id) {
+        case 1: d = &pxa168_device_ssp1; break;
+        case 2: d = &pxa168_device_ssp2; break;
+        case 3: d = &pxa168_device_ssp3; break;
+        case 4: d = &pxa168_device_ssp4; break;
+        case 5: d = &pxa168_device_ssp5; break;
+        default:
+                return -EINVAL;
+        }
+        return pxa_register_device(d, NULL, 0);
+}
+
 static inline int pxa168_add_nand(struct pxa3xx_nand_platform_data *info)
 {
         return pxa_register_device(&pxa168_device_nand, info, sizeof(*info));
diff --git a/arch/arm/mach-mmp/include/mach/regs-apbc.h b/arch/arm/mach-mmp/include/mach/regs-apbc.h
index 712af03fd1af..1a96585336ba 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apbc.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apbc.h
@@ -26,8 +26,6 @@
 #define APBC_PXA168_PWM2        APBC_REG(0x010)
 #define APBC_PXA168_PWM3        APBC_REG(0x014)
 #define APBC_PXA168_PWM4        APBC_REG(0x018)
-#define APBC_PXA168_SSP1        APBC_REG(0x01c)
-#define APBC_PXA168_SSP2        APBC_REG(0x020)
 #define APBC_PXA168_RTC         APBC_REG(0x028)
 #define APBC_PXA168_TWSI0       APBC_REG(0x02c)
 #define APBC_PXA168_KPC         APBC_REG(0x030)
@@ -35,14 +33,16 @@
 #define APBC_PXA168_AIB         APBC_REG(0x03c)
 #define APBC_PXA168_SW_JTAG     APBC_REG(0x040)
 #define APBC_PXA168_ONEWIRE     APBC_REG(0x048)
-#define APBC_PXA168_SSP3        APBC_REG(0x04c)
 #define APBC_PXA168_ASFAR       APBC_REG(0x050)
 #define APBC_PXA168_ASSAR       APBC_REG(0x054)
-#define APBC_PXA168_SSP4        APBC_REG(0x058)
-#define APBC_PXA168_SSP5        APBC_REG(0x05c)
 #define APBC_PXA168_TWSI1       APBC_REG(0x06c)
 #define APBC_PXA168_UART3       APBC_REG(0x070)
 #define APBC_PXA168_AC97        APBC_REG(0x084)
+#define APBC_PXA168_SSP1        APBC_REG(0x81c)
+#define APBC_PXA168_SSP2        APBC_REG(0x820)
+#define APBC_PXA168_SSP3        APBC_REG(0x84c)
+#define APBC_PXA168_SSP4        APBC_REG(0x858)
+#define APBC_PXA168_SSP5        APBC_REG(0x85c)
 
 /*
  * APB Clock register offsets for PXA910
diff --git a/arch/arm/mach-mmp/include/mach/regs-smc.h b/arch/arm/mach-mmp/include/mach/regs-smc.h
new file mode 100644
index 000000000000..e484d40d71bd
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/regs-smc.h
@@ -0,0 +1,37 @@
+/*
+ * linux/arch/arm/mach-mmp/include/mach/regs-smc.h
+ *
+ *  Static Memory Controller Registers
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_MACH_REGS_SMC_H
+#define __ASM_MACH_REGS_SMC_H
+
+#include <mach/addr-map.h>
+
+#define SMC_VIRT_BASE           (AXI_VIRT_BASE + 0x83800)
+#define SMC_REG(x)              (SMC_VIRT_BASE + (x))
+
+#define SMC_MSC0                SMC_REG(0x0020)
+#define SMC_MSC1                SMC_REG(0x0024)
+#define SMC_SXCNFG0             SMC_REG(0x0030)
+#define SMC_SXCNFG1             SMC_REG(0x0034)
+#define SMC_MEMCLKCFG           SMC_REG(0x0068)
+#define SMC_CSDFICFG0           SMC_REG(0x0090)
+#define SMC_CSDFICFG1           SMC_REG(0x0094)
+#define SMC_CLK_RET_DEL         SMC_REG(0x00b0)
+#define SMC_ADV_RET_DEL         SMC_REG(0x00b4)
+#define SMC_CSADRMAP0           SMC_REG(0x00c0)
+#define SMC_CSADRMAP1           SMC_REG(0x00c4)
+#define SMC_WE_AP0              SMC_REG(0x00e0)
+#define SMC_WE_AP1              SMC_REG(0x00e4)
+#define SMC_OE_AP0              SMC_REG(0x00f0)
+#define SMC_OE_AP1              SMC_REG(0x00f4)
+#define SMC_ADV_AP0             SMC_REG(0x0100)
+#define SMC_ADV_AP1             SMC_REG(0x0104)
+
+#endif /* __ASM_MACH_REGS_SMC_H */
diff --git a/arch/arm/mach-mmp/include/mach/timex.h b/arch/arm/mach-mmp/include/mach/timex.h
index 6cebbd0ca8f4..70c9f1d88c02 100644
--- a/arch/arm/mach-mmp/include/mach/timex.h
+++ b/arch/arm/mach-mmp/include/mach/timex.h
@@ -6,4 +6,8 @@
  * published by the Free Software Foundation.
  */
 
+#ifdef CONFIG_CPU_MMP2
+#define CLOCK_TICK_RATE         6500000
+#else
 #define CLOCK_TICK_RATE         3250000
+#endif
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
index cfd4d66ef800..d77dd41d60e1 100644
--- a/arch/arm/mach-mmp/jasper.c
+++ b/arch/arm/mach-mmp/jasper.c
@@ -15,12 +15,16 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 #include <linux/gpio.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/max8649.h>
+#include <linux/mfd/max8925.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <mach/addr-map.h>
 #include <mach/mfp-mmp2.h>
 #include <mach/mmp2.h>
+#include <mach/irqs.h>
 
 #include "common.h"
 
@@ -58,6 +62,63 @@ static unsigned long jasper_pin_config[] __initdata = {
         GPIO149_ND_CLE,
         GPIO112_ND_RDY0,
         GPIO160_ND_RDY1,
+
+        /* PMIC */
+        PMIC_PMIC_INT | MFP_LPM_EDGE_FALL,
+};
+
+static struct regulator_consumer_supply max8649_supply[] = {
+        REGULATOR_SUPPLY("vcc_core", NULL),
+};
+
+static struct regulator_init_data max8649_init_data = {
+        .constraints    = {
+                .name           = "vcc_core range",
+                .min_uV         = 1150000,
+                .max_uV         = 1280000,
+                .always_on      = 1,
+                .boot_on        = 1,
+                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+        },
+        .num_consumer_supplies  = 1,
+        .consumer_supplies      = &max8649_supply[0],
+};
+
+static struct max8649_platform_data jasper_max8649_info = {
+        .mode           = 2,    /* VID1 = 1, VID0 = 0 */
+        .extclk         = 0,
+        .ramp_timing    = MAX8649_RAMP_32MV,
+        .regulator      = &max8649_init_data,
+};
+
+static struct max8925_backlight_pdata jasper_backlight_data = {
+        .dual_string    = 0,
+};
+
+static struct max8925_power_pdata jasper_power_data = {
+        .batt_detect            = 0,    /* can't detect battery by ID pin */
+        .topoff_threshold       = MAX8925_TOPOFF_THR_10PER,
+        .fast_charge            = MAX8925_FCHG_1000MA,
+};
+
+static struct max8925_platform_data jasper_max8925_info = {
+        .backlight              = &jasper_backlight_data,
+        .power                  = &jasper_power_data,
+        .irq_base               = IRQ_BOARD_START,
+};
+
+static struct i2c_board_info jasper_twsi1_info[] = {
+        [0] = {
+                .type           = "max8649",
+                .addr           = 0x60,
+                .platform_data  = &jasper_max8649_info,
+        },
+        [1] = {
+                .type           = "max8925",
+                .addr           = 0x3c,
+                .irq            = IRQ_MMP2_PMIC,
+                .platform_data  = &jasper_max8925_info,
+        },
 };
 
 static void __init jasper_init(void)
@@ -67,6 +128,9 @@ static void __init jasper_init(void)
         /* on-chip devices */
         mmp2_add_uart(1);
         mmp2_add_uart(3);
+        mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(jasper_twsi1_info));
+
+        regulator_has_full_constraints();
 }
 
 MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 72eb9daeea99..7f5eb059bb01 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -15,11 +15,14 @@
 #include <linux/init.h>
 #include <linux/io.h>
 
+#include <asm/hardware/cache-tauros2.h>
+
 #include <mach/addr-map.h>
 #include <mach/regs-apbc.h>
 #include <mach/regs-apmu.h>
 #include <mach/cputype.h>
 #include <mach/irqs.h>
+#include <mach/dma.h>
 #include <mach/mfp.h>
 #include <mach/gpio.h>
 #include <mach/devices.h>
@@ -32,7 +35,50 @@
 #define APMASK(i)       (GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c)
 
 static struct mfp_addr_map mmp2_addr_map[] __initdata = {
+
+        MFP_ADDR_X(GPIO0, GPIO58, 0x54),
+        MFP_ADDR_X(GPIO59, GPIO73, 0x280),
+        MFP_ADDR_X(GPIO74, GPIO101, 0x170),
+
+        MFP_ADDR(GPIO102, 0x0),
+        MFP_ADDR(GPIO103, 0x4),
+        MFP_ADDR(GPIO104, 0x1fc),
+        MFP_ADDR(GPIO105, 0x1f8),
+        MFP_ADDR(GPIO106, 0x1f4),
+        MFP_ADDR(GPIO107, 0x1f0),
+        MFP_ADDR(GPIO108, 0x21c),
+        MFP_ADDR(GPIO109, 0x218),
+        MFP_ADDR(GPIO110, 0x214),
+        MFP_ADDR(GPIO111, 0x200),
+        MFP_ADDR(GPIO112, 0x244),
+        MFP_ADDR(GPIO113, 0x25c),
+        MFP_ADDR(GPIO114, 0x164),
+        MFP_ADDR_X(GPIO115, GPIO122, 0x260),
+
+        MFP_ADDR(GPIO123, 0x148),
+        MFP_ADDR_X(GPIO124, GPIO141, 0xc),
+
+        MFP_ADDR(GPIO142, 0x8),
+        MFP_ADDR_X(GPIO143, GPIO151, 0x220),
+        MFP_ADDR_X(GPIO152, GPIO153, 0x248),
+        MFP_ADDR_X(GPIO154, GPIO155, 0x254),
+        MFP_ADDR_X(GPIO156, GPIO159, 0x14c),
+
+        MFP_ADDR(GPIO160, 0x250),
+        MFP_ADDR(GPIO161, 0x210),
+        MFP_ADDR(GPIO162, 0x20c),
+        MFP_ADDR(GPIO163, 0x208),
+        MFP_ADDR(GPIO164, 0x204),
+        MFP_ADDR(GPIO165, 0x1ec),
+        MFP_ADDR(GPIO166, 0x1e8),
+        MFP_ADDR(GPIO167, 0x1e4),
+        MFP_ADDR(GPIO168, 0x1e0),
+
+        MFP_ADDR_X(TWSI1_SCL, TWSI1_SDA, 0x140),
+        MFP_ADDR_X(TWSI4_SCL, TWSI4_SDA, 0x2bc),
+
         MFP_ADDR(PMIC_INT, 0x2c4),
+        MFP_ADDR(CLK_REQ, 0x160),
 
         MFP_ADDR_END,
 };
@@ -99,9 +145,13 @@ static struct clk_lookup mmp2_clkregs[] = {
 static int __init mmp2_init(void)
 {
         if (cpu_is_mmp2()) {
+#ifdef CONFIG_CACHE_TAUROS2
+                tauros2_init();
+#endif
                 mfp_init_base(MFPR_VIRT_BASE);
                 mfp_init_addr(mmp2_addr_map);
-                clks_register(ARRAY_AND_SIZE(mmp2_clkregs));
+                pxa_init_dma(IRQ_MMP2_DMA_RIQ, 16);
+                clkdev_add_table(ARRAY_AND_SIZE(mmp2_clkregs));
         }
 
         return 0;
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 1873c821df90..652ae660634c 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -72,6 +72,11 @@ static APBC_CLK(pwm1, PXA168_PWM1, 1, 13000000);
 static APBC_CLK(pwm2, PXA168_PWM2, 1, 13000000);
 static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000);
 static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000);
+static APBC_CLK(ssp1, PXA168_SSP1, 4, 0);
+static APBC_CLK(ssp2, PXA168_SSP2, 4, 0);
+static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);
+static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
+static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
 
 static APMU_CLK(nand, NAND, 0x01db, 208000000);
 
@@ -85,6 +90,11 @@ static struct clk_lookup pxa168_clkregs[] = {
         INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL),
         INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL),
         INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL),
+        INIT_CLKREG(&clk_ssp1, "pxa168-ssp.0", NULL),
+        INIT_CLKREG(&clk_ssp2, "pxa168-ssp.1", NULL),
+        INIT_CLKREG(&clk_ssp3, "pxa168-ssp.2", NULL),
+        INIT_CLKREG(&clk_ssp4, "pxa168-ssp.3", NULL),
+        INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
         INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
 };
 
@@ -132,3 +142,8 @@ PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
 PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
 PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
 PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
+PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53);
+PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55);
+PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57);
+PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59);
+PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c
index 8f85f73b83a8..1ee6ce4087b8 100644
--- a/arch/arm/mach-mx5/clock-mx51.c
+++ b/arch/arm/mach-mx5/clock-mx51.c
@@ -16,6 +16,7 @@
 #include <linux/io.h>
 
 #include <asm/clkdev.h>
+#include <asm/div64.h>
 
 #include <mach/hardware.h>
 #include <mach/common.h>
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 5b6ee46fa7f6..3b51741a4810 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -19,7 +19,6 @@ config MACH_MAINSTONE
 config MACH_ZYLONITE
         bool
         select PXA3xx
-        select PXA_SSP
         select HAVE_PWM
         select PXA_HAVE_BOARD_IRQS
 
@@ -39,7 +38,6 @@ config MACH_LITTLETON
         select PXA3xx
         select CPU_PXA300
         select CPU_PXA310
-        select PXA_SSP
 
 config MACH_TAVOREVB
         bool "PXA930 Evaluation Board (aka TavorEVB)"
@@ -98,7 +96,6 @@ config MACH_ARMCORE
         select PXA27x
         select IWMMXT
         select PXA25x
-        select PXA_SSP
 
 config MACH_EM_X270
         bool "CompuLab EM-x270 platform"
@@ -161,7 +158,6 @@ config MACH_XCEP
         select MTD_CFI
         select MTD_CHAR
         select SMC91X
-        select PXA_SSP
         help
           PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash.
           Tuned for usage in Libera instruments for particle accelerators.
@@ -180,7 +176,6 @@ config MACH_TRIZEPS4WL
         depends on TRIZEPS_PXA
         select TRIZEPS_PCMCIA
         select PXA27x
-        select PXA_SSP
 
 choice
         prompt "Select base board for Trizeps module"
@@ -217,7 +212,6 @@ config MACH_PCM027
         bool "Phytec phyCORE-PXA270 CPU module (PCM-027)"
         select PXA27x
         select IWMMXT
-        select PXA_SSP
         select PXA_HAVE_BOARD_IRQS
 
 config MACH_PCM990_BASEBOARD
@@ -255,13 +249,19 @@ config MACH_COLIBRI320
         select PXA3xx
         select CPU_PXA320
 
+config MACH_VPAC270
+        bool "Voipac PXA270"
+        select PXA27x
+        select HAVE_PATA_PLATFORM
+        help
+          PXA270 based Single Board Computer.
+
 comment "End-user Products (sorted by vendor name)"
 
 config MACH_H4700
         bool "HP iPAQ hx4700"
         select PXA27x
         select IWMMXT
-        select PXA_SSP
         select HAVE_PWM
         select PXA_HAVE_BOARD_IRQS
 
@@ -277,7 +277,6 @@ config MACH_MAGICIAN
         bool "Enable HTC Magician Support"
         select PXA27x
         select IWMMXT
-        select PXA_SSP
         select HAVE_PWM
         select PXA_HAVE_BOARD_IRQS
 
@@ -431,13 +430,11 @@ config MACH_RAUMFELD_CONNECTOR
         bool "Raumfeld Connector"
         select PXA3xx
         select CPU_PXA300
-        select PXA_SSP
 
 config MACH_RAUMFELD_SPEAKER
         bool "Raumfeld Speaker"
         select PXA3xx
         select CPU_PXA300
-        select PXA_SSP
 
 config PXA_SHARPSL
         bool "SHARP Zaurus SL-5600, SL-C7xx and SL-Cxx00 Models"
@@ -461,21 +458,11 @@ config SHARPSL_PM_MAX1111
         select HWMON
         select SENSORS_MAX1111
 
-config CORGI_SSP_DEPRECATED
-        bool
-        select PXA_SSP
-        select PXA_SSP_LEGACY
-        help
-          This option will include corgi_ssp.c and corgi_lcd.c
-          that corgi_ts.c and other legacy drivers (corgi_bl.c
-          and sharpsl_pm.c) may depend on.
-
 config MACH_POODLE
         bool "Enable Sharp SL-5600 (Poodle) Support"
         depends on PXA_SHARPSL
         select PXA25x
         select SHARP_LOCOMO
-        select PXA_SSP
         select PXA_HAVE_BOARD_IRQS
 
 config MACH_CORGI
@@ -581,6 +568,12 @@ config MACH_E800
           Say Y here if you intend to run this kernel on a Toshiba
           e800 family PDA.
 
+config MACH_ZIPIT2
+        bool "Zipit Z2 Handheld"
+        select PXA27x
+        select HAVE_PWM
+        select PXA_HAVE_BOARD_IRQS
+
 endmenu
 
 config PXA25x
@@ -645,28 +638,16 @@ config CPU_PXA950
 
 config PXA_SHARP_C7xx
         bool
-        select PXA_SSP
         select SHARPSL_PM
         help
           Enable support for all Sharp C7xx models
 
 config PXA_SHARP_Cxx00
         bool
-        select PXA_SSP
         select SHARPSL_PM
         help
           Enable common support for Sharp Cxx00 models
 
-config PXA_SSP
-        tristate
-        help
-          Enable support for PXA2xx SSP ports
-
-config PXA_SSP_LEGACY
-        bool
-        help
-          Support of legacy SSP API
-
 config TOSA_BT
         tristate "Control the state of built-in bluetooth chip on Sharp SL-6000"
         depends on MACH_TOSA
@@ -675,6 +656,18 @@ config TOSA_BT
           This is a simple driver that is able to control
           the state of built in bluetooth chip on tosa.
 
+config TOSA_USE_EXT_KEYCODES
+        bool "Tosa keyboard: use extended keycodes"
+        depends on MACH_TOSA
+        default n
+        help
+          Say Y here to enable the tosa keyboard driver to generate extended
+          (>= 127) keycodes. Be aware, that they can't be correctly interpreted
+          by either console keyboard driver or by Kdrive keybd driver.
+
+          Say Y only if you know, what you are doing!
+
+
 config PXA_HAVE_BOARD_IRQS
         bool
 
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 86bc87b7f2dd..b8f1f4bc7ca7 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -14,7 +14,6 @@ obj-$(CONFIG_PXA3xx)		+= cpufreq-pxa3xx.o
 endif
 
 # Generic drivers that other drivers may depend upon
-obj-$(CONFIG_PXA_SSP)           += ssp.o
 
 # SoC-specific code
 obj-$(CONFIG_PXA25x)            += mfp-pxa2xx.o pxa2xx.o pxa25x.o
@@ -62,6 +61,7 @@ obj-$(CONFIG_MACH_PCM990_BASEBOARD)	+= pcm990-baseboard.o
 obj-$(CONFIG_MACH_COLIBRI)      += colibri-pxa270.o
 obj-$(CONFIG_MACH_COLIBRI300)   += colibri-pxa3xx.o colibri-pxa300.o
 obj-$(CONFIG_MACH_COLIBRI320)   += colibri-pxa3xx.o colibri-pxa320.o
+obj-$(CONFIG_MACH_VPAC270)      += vpac270.o
 
 # End-user Products
 obj-$(CONFIG_MACH_H4700)        += hx4700.o
@@ -80,7 +80,6 @@ obj-$(CONFIG_MACH_PALMLD)	+= palmld.o
 obj-$(CONFIG_PALM_TREO)         += palmtreo.o
 obj-$(CONFIG_PXA_SHARP_C7xx)    += corgi.o sharpsl_pm.o corgi_pm.o
 obj-$(CONFIG_PXA_SHARP_Cxx00)   += spitz.o sharpsl_pm.o spitz_pm.o
-obj-$(CONFIG_CORGI_SSP_DEPRECATED)      += corgi_ssp.o corgi_lcd.o
 obj-$(CONFIG_MACH_POODLE)       += poodle.o
 obj-$(CONFIG_MACH_TOSA)         += tosa.o
 obj-$(CONFIG_MACH_ICONTROL)     += icontrol.o mxm8x10.o
@@ -94,6 +93,7 @@ obj-$(CONFIG_MACH_E800)		+= e800.o
 obj-$(CONFIG_MACH_RAUMFELD_RC)          += raumfeld.o
 obj-$(CONFIG_MACH_RAUMFELD_CONNECTOR)   += raumfeld.o
 obj-$(CONFIG_MACH_RAUMFELD_SPEAKER)     += raumfeld.o
+obj-$(CONFIG_MACH_ZIPIT2)       += z2.o
 
 # Support for blinky lights
 led-y := leds.o
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index d37cfa132a65..fdda6be6c391 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -30,6 +30,9 @@
 #include <linux/i2c/pca953x.h>
 
 #include <linux/mfd/da903x.h>
+#include <linux/regulator/machine.h>
+#include <linux/power_supply.h>
+#include <linux/apm-emulation.h>
 
 #include <linux/spi/spi.h>
 #include <linux/spi/spi_gpio.h>
@@ -430,7 +433,7 @@ static inline void cm_x300_init_nand(void) {}
 
 #if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
 static struct pxamci_platform_data cm_x300_mci_platform_data = {
-        .detect_delay           = 20,
+        .detect_delay_ms        = 200,
         .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
         .gpio_card_detect       = GPIO82_MMC_IRQ,
         .gpio_card_ro           = GPIO85_MMC_WP,
@@ -451,7 +454,7 @@ static void cm_x300_mci2_exit(struct device *dev, void *data)
 }
 
 static struct pxamci_platform_data cm_x300_mci2_platform_data = {
-        .detect_delay           = 20,
+        .detect_delay_ms        = 200,
         .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
         .init                   = cm_x300_mci2_init,
         .exit                   = cm_x300_mci2_exit,
@@ -584,12 +587,87 @@ static void __init cm_x300_init_rtc(void)
 static inline void cm_x300_init_rtc(void) {}
 #endif
 
+/* Battery */
+struct power_supply_info cm_x300_psy_info = {
+        .name = "battery",
+        .technology = POWER_SUPPLY_TECHNOLOGY_LIPO,
+        .voltage_max_design = 4200000,
+        .voltage_min_design = 3000000,
+        .use_for_apm = 1,
+};
+
+static void cm_x300_battery_low(void)
+{
+#if defined(CONFIG_APM_EMULATION)
+        apm_queue_event(APM_LOW_BATTERY);
+#endif
+}
+
+static void cm_x300_battery_critical(void)
+{
+#if defined(CONFIG_APM_EMULATION)
+        apm_queue_event(APM_CRITICAL_SUSPEND);
+#endif
+}
+
+struct da9030_battery_info cm_x300_battery_info = {
+        .battery_info = &cm_x300_psy_info,
+
+        .charge_milliamp = 1000,
+        .charge_millivolt = 4200,
+
+        .vbat_low = 3600,
+        .vbat_crit = 3400,
+        .vbat_charge_start = 4100,
+        .vbat_charge_stop = 4200,
+        .vbat_charge_restart = 4000,
+
+        .vcharge_min = 3200,
+        .vcharge_max = 5500,
+
+        .tbat_low = 197,
+        .tbat_high = 78,
+        .tbat_restart = 100,
+
+        .batmon_interval = 0,
+
+        .battery_low = cm_x300_battery_low,
+        .battery_critical = cm_x300_battery_critical,
+};
+
+static struct regulator_consumer_supply buck2_consumers[] = {
+        {
+                .dev = NULL,
+                .supply = "vcc_core",
+        },
+};
+
+static struct regulator_init_data buck2_data = {
+        .constraints = {
+                .min_uV = 1375000,
+                .max_uV = 1375000,
+                .state_mem = {
+                        .enabled = 0,
+                },
+                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+                .apply_uV = 1,
+        },
+        .num_consumer_supplies = ARRAY_SIZE(buck2_consumers),
+        .consumer_supplies = buck2_consumers,
+};
+
 /* DA9030 */
 struct da903x_subdev_info cm_x300_da9030_subdevs[] = {
         {
-                .name = "da903x-backlight",
-                .id = DA9030_ID_WLED,
-        }
+                .name = "da903x-battery",
+                .id = DA9030_ID_BAT,
+                .platform_data = &cm_x300_battery_info,
+        },
+        {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_BUCK2,
+                .platform_data = &buck2_data,
+        },
 };
 
 static struct da903x_platform_data cm_x300_da9030_info = {
@@ -599,7 +677,7 @@ static struct da903x_platform_data cm_x300_da9030_info = {
 
 static struct i2c_board_info cm_x300_pmic_info = {
         I2C_BOARD_INFO("da9030", 0x49),
-        .irq = IRQ_GPIO(0),
+        .irq = IRQ_WAKEUP0,
         .platform_data = &cm_x300_da9030_info,
 };
 
@@ -689,13 +767,13 @@ static void __init cm_x300_init(void)
 static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags,
                                  char **cmdline, struct meminfo *mi)
 {
-        mi->nr_banks = 2;
-        mi->bank[0].start = 0xa0000000;
-        mi->bank[0].node = 0;
-        mi->bank[0].size = (64*1024*1024);
-        mi->bank[1].start = 0xc0000000;
-        mi->bank[1].node = 0;
-        mi->bank[1].size = (64*1024*1024);
+        /* Make sure that mi->bank[0].start = PHYS_ADDR */
+        for (; tags->hdr.size; tags = tag_next(tags))
+                if (tags->hdr.tag == ATAG_MEM &&
+                        tags->u.mem.start == 0x80000000) {
+                        tags->u.mem.start = 0xa0000000;
+                        break;
+                }
 }
 
 MACHINE_START(CM_X300, "CM-X300 module")
diff --git a/arch/arm/mach-pxa/colibri-pxa3xx.c b/arch/arm/mach-pxa/colibri-pxa3xx.c
index e6c0a2287eb8..199afa2ae303 100644
--- a/arch/arm/mach-pxa/colibri-pxa3xx.c
+++ b/arch/arm/mach-pxa/colibri-pxa3xx.c
@@ -96,7 +96,7 @@ static void colibri_pxa3xx_mci_exit(struct device *dev, void *data)
 }
 
 static struct pxamci_platform_data colibri_pxa3xx_mci_platform_data = {
-        .detect_delay           = 20,
+        .detect_delay_ms        = 200,
         .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
         .init                   = colibri_pxa3xx_mci_init,
         .exit                   = colibri_pxa3xx_mci_exit,
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index da3156d8690b..3d1dcb9ac08f 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -106,18 +106,18 @@ static unsigned long corgi_pin_config[] __initdata = {
         GPIO8_MMC_CS0,
 
         /* GPIO Matrix Keypad */
-        GPIO66_GPIO,    /* column 0 */
-        GPIO67_GPIO,    /* column 1 */
-        GPIO68_GPIO,    /* column 2 */
-        GPIO69_GPIO,    /* column 3 */
-        GPIO70_GPIO,    /* column 4 */
-        GPIO71_GPIO,    /* column 5 */
-        GPIO72_GPIO,    /* column 6 */
-        GPIO73_GPIO,    /* column 7 */
-        GPIO74_GPIO,    /* column 8 */
-        GPIO75_GPIO,    /* column 9 */
-        GPIO76_GPIO,    /* column 10 */
-        GPIO77_GPIO,    /* column 11 */
+        GPIO66_GPIO | MFP_LPM_DRIVE_HIGH,       /* column 0 */
+        GPIO67_GPIO | MFP_LPM_DRIVE_HIGH,       /* column 1 */
+        GPIO68_GPIO | MFP_LPM_DRIVE_HIGH,       /* column 2 */
+        GPIO69_GPIO | MFP_LPM_DRIVE_HIGH,       /* column 3 */
+        GPIO70_GPIO | MFP_LPM_DRIVE_HIGH,       /* column 4 */
+        GPIO71_GPIO | MFP_LPM_DRIVE_HIGH,       /* column 5 */
+        GPIO72_GPIO | MFP_LPM_DRIVE_HIGH,       /* column 6 */
+        GPIO73_GPIO | MFP_LPM_DRIVE_HIGH,       /* column 7 */
+        GPIO74_GPIO | MFP_LPM_DRIVE_HIGH,       /* column 8 */
+        GPIO75_GPIO | MFP_LPM_DRIVE_HIGH,       /* column 9 */
+        GPIO76_GPIO | MFP_LPM_DRIVE_HIGH,       /* column 10 */
+        GPIO77_GPIO | MFP_LPM_DRIVE_HIGH,       /* column 11 */
         GPIO58_GPIO,    /* row 0 */
         GPIO59_GPIO,    /* row 1 */
         GPIO60_GPIO,    /* row 2 */
@@ -128,13 +128,20 @@ static unsigned long corgi_pin_config[] __initdata = {
         GPIO65_GPIO,    /* row 7 */
 
         /* GPIO */
-        GPIO9_GPIO,     /* CORGI_GPIO_nSD_DETECT */
-        GPIO7_GPIO,     /* CORGI_GPIO_nSD_WP */
-        GPIO33_GPIO,    /* CORGI_GPIO_SD_PWR */
-        GPIO22_GPIO,    /* CORGI_GPIO_IR_ON */
-        GPIO44_GPIO,    /* CORGI_GPIO_HSYNC */
-
-        GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,
+        GPIO9_GPIO,                             /* CORGI_GPIO_nSD_DETECT */
+        GPIO7_GPIO,                             /* CORGI_GPIO_nSD_WP */
+        GPIO11_GPIO | WAKEUP_ON_EDGE_BOTH,      /* CORGI_GPIO_MAIN_BAT_{LOW,COVER} */
+        GPIO13_GPIO | MFP_LPM_KEEP_OUTPUT,      /* CORGI_GPIO_LED_ORANGE */
+        GPIO21_GPIO,                            /* CORGI_GPIO_ADC_TEMP */
+        GPIO22_GPIO,                            /* CORGI_GPIO_IR_ON */
+        GPIO33_GPIO,                            /* CORGI_GPIO_SD_PWR */
+        GPIO38_GPIO | MFP_LPM_KEEP_OUTPUT,      /* CORGI_GPIO_CHRG_ON */
+        GPIO43_GPIO | MFP_LPM_KEEP_OUTPUT,      /* CORGI_GPIO_CHRG_UKN */
+        GPIO44_GPIO,                            /* CORGI_GPIO_HSYNC */
+
+        GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH,       /* CORGI_GPIO_KEY_INT */
+        GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,       /* CORGI_GPIO_AC_IN */
+        GPIO3_GPIO | WAKEUP_ON_EDGE_BOTH,       /* CORGI_GPIO_WAKEUP */
 };
 
 /*
@@ -437,6 +444,7 @@ static struct platform_device corgiled_device = {
  * to give the card a chance to fully insert/eject.
  */
 static struct pxamci_platform_data corgi_mci_platform_data = {
+        .detect_delay_ms        = 250,
         .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
         .gpio_card_detect       = -1,
         .gpio_card_ro           = CORGI_GPIO_nSD_WP,
@@ -672,6 +680,15 @@ static void __init corgi_init(void)
 
         pxa2xx_mfp_config(ARRAY_AND_SIZE(corgi_pin_config));
 
+        /* allow wakeup from various GPIOs */
+        gpio_set_wake(CORGI_GPIO_KEY_INT, 1);
+        gpio_set_wake(CORGI_GPIO_WAKEUP, 1);
+        gpio_set_wake(CORGI_GPIO_AC_IN, 1);
+        gpio_set_wake(CORGI_GPIO_CHRG_FULL, 1);
+
+        if (!machine_is_corgi())
+                gpio_set_wake(CORGI_GPIO_MAIN_BAT_LOW, 1);
+
         pxa_set_ffuart_info(NULL);
         pxa_set_btuart_info(NULL);
         pxa_set_stuart_info(NULL);
@@ -679,7 +696,6 @@ static void __init corgi_init(void)
         corgi_init_spi();
 
         pxa_set_udc_info(&udc_info);
-        corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250);
         pxa_set_mci_info(&corgi_mci_platform_data);
         pxa_set_ficp_info(&corgi_ficp_platform_data);
         pxa_set_i2c_info(NULL);
diff --git a/arch/arm/mach-pxa/corgi_lcd.c b/arch/arm/mach-pxa/corgi_lcd.c
deleted file mode 100644
index d9b96319d498..000000000000
--- a/arch/arm/mach-pxa/corgi_lcd.c
+++ /dev/null
@@ -1,288 +0,0 @@
-/*
- * linux/arch/arm/mach-pxa/corgi_lcd.c
- *
- * Corgi/Spitz LCD Specific Code
- *
- * Copyright (C) 2005 Richard Purdie
- *
- * Connectivity:
- *   Corgi - LCD to ATI Imageon w100 (Wallaby)
- *   Spitz - LCD to PXA Framebuffer
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include <linux/delay.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <mach/corgi.h>
-#include <mach/hardware.h>
-#include <mach/sharpsl.h>
-#include <mach/spitz.h>
-#include <asm/hardware/scoop.h>
-#include <asm/mach/sharpsl_param.h>
-#include "generic.h"
-
-/* Register Addresses */
-#define RESCTL_ADRS     0x00
-#define PHACTRL_ADRS    0x01
-#define DUTYCTRL_ADRS   0x02
-#define POWERREG0_ADRS  0x03
-#define POWERREG1_ADRS  0x04
-#define GPOR3_ADRS      0x05
-#define PICTRL_ADRS     0x06
-#define POLCTRL_ADRS    0x07
-
-/* Register Bit Definitions */
-#define RESCTL_QVGA     0x01
-#define RESCTL_VGA      0x00
-
-#define POWER1_VW_ON    0x01  /* VW Supply FET ON */
-#define POWER1_GVSS_ON  0x02  /* GVSS(-8V) Power Supply ON */
-#define POWER1_VDD_ON   0x04  /* VDD(8V),SVSS(-4V) Power Supply ON */
-
-#define POWER1_VW_OFF   0x00  /* VW Supply FET OFF */
-#define POWER1_GVSS_OFF 0x00  /* GVSS(-8V) Power Supply OFF */
-#define POWER1_VDD_OFF  0x00  /* VDD(8V),SVSS(-4V) Power Supply OFF */
-
-#define POWER0_COM_DCLK 0x01  /* COM Voltage DC Bias DAC Serial Data Clock */
-#define POWER0_COM_DOUT 0x02  /* COM Voltage DC Bias DAC Serial Data Out */
-#define POWER0_DAC_ON   0x04  /* DAC Power Supply ON */
-#define POWER0_COM_ON   0x08  /* COM Power Supply ON */
-#define POWER0_VCC5_ON  0x10  /* VCC5 Power Supply ON */
-
-#define POWER0_DAC_OFF  0x00  /* DAC Power Supply OFF */
-#define POWER0_COM_OFF  0x00  /* COM Power Supply OFF */
-#define POWER0_VCC5_OFF 0x00  /* VCC5 Power Supply OFF */
-
-#define PICTRL_INIT_STATE      0x01
-#define PICTRL_INIOFF          0x02
-#define PICTRL_POWER_DOWN      0x04
-#define PICTRL_COM_SIGNAL_OFF  0x08
-#define PICTRL_DAC_SIGNAL_OFF  0x10
-
-#define POLCTRL_SYNC_POL_FALL  0x01
-#define POLCTRL_EN_POL_FALL    0x02
-#define POLCTRL_DATA_POL_FALL  0x04
-#define POLCTRL_SYNC_ACT_H     0x08
-#define POLCTRL_EN_ACT_L       0x10
-
-#define POLCTRL_SYNC_POL_RISE  0x00
-#define POLCTRL_EN_POL_RISE    0x00
-#define POLCTRL_DATA_POL_RISE  0x00
-#define POLCTRL_SYNC_ACT_L     0x00
-#define POLCTRL_EN_ACT_H       0x00
-
-#define PHACTRL_PHASE_MANUAL   0x01
-#define DEFAULT_PHAD_QVGA     (9)
-#define DEFAULT_COMADJ        (125)
-
-/*
- * This is only a psuedo I2C interface. We can't use the standard kernel
- * routines as the interface is write only. We just assume the data is acked...
- */
-static void lcdtg_ssp_i2c_send(u8 data)
-{
-        corgi_ssp_lcdtg_send(POWERREG0_ADRS, data);
-        udelay(10);
-}
-
-static void lcdtg_i2c_send_bit(u8 data)
-{
-        lcdtg_ssp_i2c_send(data);
-        lcdtg_ssp_i2c_send(data | POWER0_COM_DCLK);
-        lcdtg_ssp_i2c_send(data);
-}
-
-static void lcdtg_i2c_send_start(u8 base)
-{
-        lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT);
-        lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK);
-        lcdtg_ssp_i2c_send(base);
-}
-
-static void lcdtg_i2c_send_stop(u8 base)
-{
-        lcdtg_ssp_i2c_send(base);
-        lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK);
-        lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT);
-}
-
-static void lcdtg_i2c_send_byte(u8 base, u8 data)
-{
-        int i;
-        for (i = 0; i < 8; i++) {
-                if (data & 0x80)
-                        lcdtg_i2c_send_bit(base | POWER0_COM_DOUT);
-                else
-                        lcdtg_i2c_send_bit(base);
-                data <<= 1;
-        }
-}
-
-static void lcdtg_i2c_wait_ack(u8 base)
-{
-        lcdtg_i2c_send_bit(base);
-}
-
-static void lcdtg_set_common_voltage(u8 base_data, u8 data)
-{
-        /* Set Common Voltage to M62332FP via I2C */
-        lcdtg_i2c_send_start(base_data);
-        lcdtg_i2c_send_byte(base_data, 0x9c);
-        lcdtg_i2c_wait_ack(base_data);
-        lcdtg_i2c_send_byte(base_data, 0x00);
-        lcdtg_i2c_wait_ack(base_data);
-        lcdtg_i2c_send_byte(base_data, data);
-        lcdtg_i2c_wait_ack(base_data);
-        lcdtg_i2c_send_stop(base_data);
-}
-
-/* Set Phase Adjust */
-static void lcdtg_set_phadadj(int mode)
-{
-        int adj;
-        switch(mode) {
-                case 480:
-                case 640:
-                        /* Setting for VGA */
-                        adj = sharpsl_param.phadadj;
-                        if (adj < 0) {
-                                adj = PHACTRL_PHASE_MANUAL;
-                        } else {
-                                adj = ((adj & 0x0f) << 1) | PHACTRL_PHASE_MANUAL;
-                        }
-                        break;
-                case 240:
-                case 320:
-                default:
-                        /* Setting for QVGA */
-                        adj = (DEFAULT_PHAD_QVGA << 1) | PHACTRL_PHASE_MANUAL;
-                        break;
-        }
-
-        corgi_ssp_lcdtg_send(PHACTRL_ADRS, adj);
-}
-
-static int lcd_inited;
-
-void corgi_lcdtg_hw_init(int mode)
-{
-        if (!lcd_inited) {
-                int comadj;
-
-                /* Initialize Internal Logic & Port */
-                corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_POWER_DOWN | PICTRL_INIOFF | PICTRL_INIT_STATE
-                                | PICTRL_COM_SIGNAL_OFF | PICTRL_DAC_SIGNAL_OFF);
-
-                corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_OFF
-                                | POWER0_COM_OFF | POWER0_VCC5_OFF);
-
-                corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF);
-
-                /* VDD(+8V), SVSS(-4V) ON */
-                corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON);
-                mdelay(3);
-
-                /* DAC ON */
-                corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON
-                                | POWER0_COM_OFF | POWER0_VCC5_OFF);
-
-                /* INIB = H, INI = L  */
-                /* PICTL[0] = H , PICTL[1] = PICTL[2] = PICTL[4] = L */
-                corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE | PICTRL_COM_SIGNAL_OFF);
-
-                /* Set Common Voltage */
-                comadj = sharpsl_param.comadj;
-                if (comadj < 0)
-                        comadj = DEFAULT_COMADJ;
-                lcdtg_set_common_voltage((POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF), comadj);
-
-                /* VCC5 ON, DAC ON */
-                corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON |
-                                POWER0_COM_OFF | POWER0_VCC5_ON);
-
-                /* GVSS(-8V) ON, VDD ON */
-                corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON);
-                mdelay(2);
-
-                /* COM SIGNAL ON (PICTL[3] = L) */
-                corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE);
-
-                /* COM ON, DAC ON, VCC5_ON */
-                corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON
-                                | POWER0_COM_ON | POWER0_VCC5_ON);
-
-                /* VW ON, GVSS ON, VDD ON */
-                corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_ON | POWER1_GVSS_ON | POWER1_VDD_ON);
-
-                /* Signals output enable */
-                corgi_ssp_lcdtg_send(PICTRL_ADRS, 0);
-
-                /* Set Phase Adjust */
-                lcdtg_set_phadadj(mode);
-
-                /* Initialize for Input Signals from ATI */
-                corgi_ssp_lcdtg_send(POLCTRL_ADRS, POLCTRL_SYNC_POL_RISE | POLCTRL_EN_POL_RISE
-                                | POLCTRL_DATA_POL_RISE | POLCTRL_SYNC_ACT_L | POLCTRL_EN_ACT_H);
-                udelay(1000);
-
-                lcd_inited=1;
-        } else {
-                lcdtg_set_phadadj(mode);
-        }
-
-        switch(mode) {
-                case 480:
-                case 640:
-                        /* Set Lcd Resolution (VGA) */
-                        corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_VGA);
-                        break;
-                case 240:
-                case 320:
-                default:
-                        /* Set Lcd Resolution (QVGA) */
-                        corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_QVGA);
-                        break;
-        }
-}
-
-void corgi_lcdtg_suspend(void)
-{
-        /* 60Hz x 2 frame = 16.7msec x 2 = 33.4 msec */
-        mdelay(34);
-
-        /* (1)VW OFF */
-        corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON);
-
-        /* (2)COM OFF */
-        corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_COM_SIGNAL_OFF);
-        corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON);
-
-        /* (3)Set Common Voltage Bias 0V */
-        lcdtg_set_common_voltage(POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON, 0);
-
-        /* (4)GVSS OFF */
-        corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON);
-
-        /* (5)VCC5 OFF */
-        corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF);
-
-        /* (6)Set PDWN, INIOFF, DACOFF */
-        corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIOFF | PICTRL_DAC_SIGNAL_OFF |
-                        PICTRL_POWER_DOWN | PICTRL_COM_SIGNAL_OFF);
-
-        /* (7)DAC OFF */
-        corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_OFF | POWER0_COM_OFF | POWER0_VCC5_OFF);
-
-        /* (8)VDD OFF */
-        corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF);
-
-        lcd_inited = 0;
-}
-
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index d4a0733e905b..3f1dc74ac048 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -14,6 +14,7 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/delay.h>
+#include <linux/gpio.h>
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/apm-emulation.h>
@@ -25,7 +26,8 @@
 #include <mach/sharpsl.h>
 #include <mach/corgi.h>
 #include <mach/pxa2xx-regs.h>
-#include <mach/pxa2xx-gpio.h>
+
+#include "generic.h"
 #include "sharpsl.h"
 
 #define SHARPSL_CHARGE_ON_VOLT         0x99  /* 2.9V */
@@ -35,87 +37,46 @@
 #define SHARPSL_FATAL_ACIN_VOLT        182   /* 3.45V */
 #define SHARPSL_FATAL_NOACIN_VOLT      170   /* 3.40V */
 
+static struct gpio charger_gpios[] = {
+        { CORGI_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" },
+        { CORGI_GPIO_CHRG_ON,     GPIOF_OUT_INIT_LOW, "Charger On" },
+        { CORGI_GPIO_CHRG_UKN,    GPIOF_OUT_INIT_LOW, "Charger Unknown" },
+        { CORGI_GPIO_KEY_INT,     GPIOF_IN, "Key Interrupt" },
+};
+
 static void corgi_charger_init(void)
 {
-        pxa_gpio_mode(CORGI_GPIO_ADC_TEMP_ON | GPIO_OUT);
-        pxa_gpio_mode(CORGI_GPIO_CHRG_ON | GPIO_OUT);
-        pxa_gpio_mode(CORGI_GPIO_CHRG_UKN | GPIO_OUT);
-        pxa_gpio_mode(CORGI_GPIO_KEY_INT | GPIO_IN);
+        gpio_request_array(ARRAY_AND_SIZE(charger_gpios));
 }
 
 static void corgi_measure_temp(int on)
 {
-        if (on)
-                GPSR(CORGI_GPIO_ADC_TEMP_ON) = GPIO_bit(CORGI_GPIO_ADC_TEMP_ON);
-        else
-                GPCR(CORGI_GPIO_ADC_TEMP_ON) = GPIO_bit(CORGI_GPIO_ADC_TEMP_ON);
+        gpio_set_value(CORGI_GPIO_ADC_TEMP_ON, on);
 }
 
 static void corgi_charge(int on)
 {
         if (on) {
                 if (machine_is_corgi() && (sharpsl_pm.flags & SHARPSL_SUSPENDED)) {
-                        GPCR(CORGI_GPIO_CHRG_ON) = GPIO_bit(CORGI_GPIO_CHRG_ON);
-                        GPSR(CORGI_GPIO_CHRG_UKN) = GPIO_bit(CORGI_GPIO_CHRG_UKN);
+                        gpio_set_value(CORGI_GPIO_CHRG_ON, 0);
+                        gpio_set_value(CORGI_GPIO_CHRG_UKN, 1);
                 } else {
-                        GPSR(CORGI_GPIO_CHRG_ON) = GPIO_bit(CORGI_GPIO_CHRG_ON);
-                        GPCR(CORGI_GPIO_CHRG_UKN) = GPIO_bit(CORGI_GPIO_CHRG_UKN);
+                        gpio_set_value(CORGI_GPIO_CHRG_ON, 1);
+                        gpio_set_value(CORGI_GPIO_CHRG_UKN, 0);
                 }
         } else {
-                GPCR(CORGI_GPIO_CHRG_ON) = GPIO_bit(CORGI_GPIO_CHRG_ON);
-                GPCR(CORGI_GPIO_CHRG_UKN) = GPIO_bit(CORGI_GPIO_CHRG_UKN);
+                gpio_set_value(CORGI_GPIO_CHRG_ON, 0);
+                gpio_set_value(CORGI_GPIO_CHRG_UKN, 0);
         }
 }
 
 static void corgi_discharge(int on)
 {
-        if (on)
-                GPSR(CORGI_GPIO_DISCHARGE_ON) = GPIO_bit(CORGI_GPIO_DISCHARGE_ON);
-        else
-                GPCR(CORGI_GPIO_DISCHARGE_ON) = GPIO_bit(CORGI_GPIO_DISCHARGE_ON);
+        gpio_set_value(CORGI_GPIO_DISCHARGE_ON, on);
 }
 
 static void corgi_presuspend(void)
 {
-        int i;
-        unsigned long wakeup_mask;
-
-        /* charging , so CHARGE_ON bit is HIGH during OFF. */
-        if (READ_GPIO_BIT(CORGI_GPIO_CHRG_ON))
-                PGSR1 |= GPIO_bit(CORGI_GPIO_CHRG_ON);
-        else
-                PGSR1 &= ~GPIO_bit(CORGI_GPIO_CHRG_ON);
-
-        if (READ_GPIO_BIT(CORGI_GPIO_LED_ORANGE))
-                PGSR0 |= GPIO_bit(CORGI_GPIO_LED_ORANGE);
-        else
-                PGSR0 &= ~GPIO_bit(CORGI_GPIO_LED_ORANGE);
-
-        if (READ_GPIO_BIT(CORGI_GPIO_CHRG_UKN))
-                PGSR1 |= GPIO_bit(CORGI_GPIO_CHRG_UKN);
-        else
-                PGSR1 &= ~GPIO_bit(CORGI_GPIO_CHRG_UKN);
-
-        /* Resume on keyboard power key */
-        PGSR2 = (PGSR2 & ~CORGI_GPIO_ALL_STROBE_BIT) | CORGI_GPIO_STROBE_BIT(0);
-
-        wakeup_mask = GPIO_bit(CORGI_GPIO_KEY_INT) | GPIO_bit(CORGI_GPIO_WAKEUP) | GPIO_bit(CORGI_GPIO_AC_IN) | GPIO_bit(CORGI_GPIO_CHRG_FULL);
-
-        if (!machine_is_corgi())
-                wakeup_mask |= GPIO_bit(CORGI_GPIO_MAIN_BAT_LOW);
-
-        PWER = wakeup_mask | PWER_RTC;
-        PRER = wakeup_mask;
-        PFER = wakeup_mask;
-
-        for (i = 0; i <=15; i++) {
-                if (PRER & PFER & GPIO_bit(i)) {
-                        if (GPLR0 & GPIO_bit(i) )
-                                PRER &= ~GPIO_bit(i);
-                        else
-                                PFER &= ~GPIO_bit(i);
-                }
-        }
 }
 
 static void corgi_postsuspend(void)
diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c
deleted file mode 100644
index 9347254f8bcf..000000000000
--- a/arch/arm/mach-pxa/corgi_ssp.c
+++ /dev/null
@@ -1,274 +0,0 @@
-/*
- *  SSP control code for Sharp Corgi devices
- *
- *  Copyright (c) 2004-2005 Richard Purdie
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  published by the Free Software Foundation.
- *
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/delay.h>
-#include <linux/platform_device.h>
-#include <mach/hardware.h>
-#include <asm/mach-types.h>
-
-#include <mach/ssp.h>
-#include <mach/pxa2xx-gpio.h>
-#include <mach/regs-ssp.h>
-#include "sharpsl.h"
-
-static DEFINE_SPINLOCK(corgi_ssp_lock);
-static struct ssp_dev corgi_ssp_dev;
-static struct ssp_state corgi_ssp_state;
-static struct corgissp_machinfo *ssp_machinfo;
-
-/*
- * There are three devices connected to the SSP interface:
- *   1. A touchscreen controller (TI ADS7846 compatible)
- *   2. An LCD controller (with some Backlight functionality)
- *   3. A battery monitoring IC (Maxim MAX1111)
- *
- * Each device uses a different speed/mode of communication.
- *
- * The touchscreen is very sensitive and the most frequently used
- * so the port is left configured for this.
- *
- * Devices are selected using Chip Selects on GPIOs.
- */
-
-/*
- *  ADS7846 Routines
- */
-unsigned long corgi_ssp_ads7846_putget(ulong data)
-{
-        unsigned long flag;
-        u32 ret = 0;
-
-        spin_lock_irqsave(&corgi_ssp_lock, flag);
-        if (ssp_machinfo->cs_ads7846 >= 0)
-                GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
-
-        ssp_write_word(&corgi_ssp_dev,data);
-        ssp_read_word(&corgi_ssp_dev, &ret);
-
-        if (ssp_machinfo->cs_ads7846 >= 0)
-                GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
-        spin_unlock_irqrestore(&corgi_ssp_lock, flag);
-
-        return ret;
-}
-
-/*
- * NOTE: These functions should always be called in interrupt context
- * and use the _lock and _unlock functions. They are very time sensitive.
- */
-void corgi_ssp_ads7846_lock(void)
-{
-        spin_lock(&corgi_ssp_lock);
-        if (ssp_machinfo->cs_ads7846 >= 0)
-                GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
-}
-
-void corgi_ssp_ads7846_unlock(void)
-{
-        if (ssp_machinfo->cs_ads7846 >= 0)
-                GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
-        spin_unlock(&corgi_ssp_lock);
-}
-
-void corgi_ssp_ads7846_put(ulong data)
-{
-        ssp_write_word(&corgi_ssp_dev,data);
-}
-
-unsigned long corgi_ssp_ads7846_get(void)
-{
-        u32 ret = 0;
-        ssp_read_word(&corgi_ssp_dev, &ret);
-        return ret;
-}
-
-EXPORT_SYMBOL(corgi_ssp_ads7846_putget);
-EXPORT_SYMBOL(corgi_ssp_ads7846_lock);
-EXPORT_SYMBOL(corgi_ssp_ads7846_unlock);
-EXPORT_SYMBOL(corgi_ssp_ads7846_put);
-EXPORT_SYMBOL(corgi_ssp_ads7846_get);
-
-
-/*
- *  LCD/Backlight Routines
- */
-unsigned long corgi_ssp_dac_put(ulong data)
-{
-        unsigned long flag, sscr1 = SSCR1_SPH;
-        u32 tmp;
-
-        spin_lock_irqsave(&corgi_ssp_lock, flag);
-
-        if (machine_is_spitz() || machine_is_akita() || machine_is_borzoi())
-                sscr1 = 0;
-
-        ssp_disable(&corgi_ssp_dev);
-        ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), sscr1, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_lcdcon));
-        ssp_enable(&corgi_ssp_dev);
-
-        if (ssp_machinfo->cs_lcdcon >= 0)
-                GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
-        ssp_write_word(&corgi_ssp_dev,data);
-        /* Read null data back from device to prevent SSP overflow */
-        ssp_read_word(&corgi_ssp_dev, &tmp);
-        if (ssp_machinfo->cs_lcdcon >= 0)
-                GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
-
-        ssp_disable(&corgi_ssp_dev);
-        ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
-        ssp_enable(&corgi_ssp_dev);
-
-        spin_unlock_irqrestore(&corgi_ssp_lock, flag);
-
-        return 0;
-}
-
-void corgi_ssp_lcdtg_send(u8 adrs, u8 data)
-{
-        corgi_ssp_dac_put(((adrs & 0x07) << 5) | (data & 0x1f));
-}
-
-void corgi_ssp_blduty_set(int duty)
-{
-        corgi_ssp_lcdtg_send(0x02,duty);
-}
-
-EXPORT_SYMBOL(corgi_ssp_lcdtg_send);
-EXPORT_SYMBOL(corgi_ssp_blduty_set);
-
-/*
- *  Max1111 Routines
- */
-int corgi_ssp_max1111_get(ulong data)
-{
-        unsigned long flag;
-        long voltage = 0, voltage1 = 0, voltage2 = 0;
-
-        spin_lock_irqsave(&corgi_ssp_lock, flag);
-        if (ssp_machinfo->cs_max1111 >= 0)
-                GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
-        ssp_disable(&corgi_ssp_dev);
-        ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_max1111));
-        ssp_enable(&corgi_ssp_dev);
-
-        udelay(1);
-
-        /* TB1/RB1 */
-        ssp_write_word(&corgi_ssp_dev,data);
-        ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); /* null read */
-
-        /* TB12/RB2 */
-        ssp_write_word(&corgi_ssp_dev,0);
-        ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1);
-
-        /* TB13/RB3*/
-        ssp_write_word(&corgi_ssp_dev,0);
-        ssp_read_word(&corgi_ssp_dev, (u32*)&voltage2);
-
-        ssp_disable(&corgi_ssp_dev);
-        ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
-        ssp_enable(&corgi_ssp_dev);
-        if (ssp_machinfo->cs_max1111 >= 0)
-                GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
-        spin_unlock_irqrestore(&corgi_ssp_lock, flag);
-
-        if (voltage1 & 0xc0 || voltage2 & 0x3f)
-                voltage = -1;
-        else
-                voltage = ((voltage1 << 2) & 0xfc) | ((voltage2 >> 6) & 0x03);
-
-        return voltage;
-}
-
-EXPORT_SYMBOL(corgi_ssp_max1111_get);
-
-/*
- *  Support Routines
- */
-
-void __init corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo)
-{
-        ssp_machinfo = machinfo;
-}
-
-static int __devinit corgi_ssp_probe(struct platform_device *dev)
-{
-        int ret;
-
-        /* Chip Select - Disable All */
-        if (ssp_machinfo->cs_lcdcon >= 0)
-                pxa_gpio_mode(ssp_machinfo->cs_lcdcon  | GPIO_OUT | GPIO_DFLT_HIGH);
-        if (ssp_machinfo->cs_max1111 >= 0)
-                pxa_gpio_mode(ssp_machinfo->cs_max1111 | GPIO_OUT | GPIO_DFLT_HIGH);
-        if (ssp_machinfo->cs_ads7846 >= 0)
-                pxa_gpio_mode(ssp_machinfo->cs_ads7846 | GPIO_OUT | GPIO_DFLT_HIGH);
-
-        ret = ssp_init(&corgi_ssp_dev, ssp_machinfo->port, 0);
-
-        if (ret)
-                printk(KERN_ERR "Unable to register SSP handler!\n");
-        else {
-                ssp_disable(&corgi_ssp_dev);
-                ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
-                ssp_enable(&corgi_ssp_dev);
-        }
-
-        return ret;
-}
-
-static int corgi_ssp_remove(struct platform_device *dev)
-{
-        ssp_exit(&corgi_ssp_dev);
-        return 0;
-}
-
-static int corgi_ssp_suspend(struct platform_device *dev, pm_message_t state)
-{
-        ssp_flush(&corgi_ssp_dev);
-        ssp_save_state(&corgi_ssp_dev,&corgi_ssp_state);
-
-        return 0;
-}
-
-static int corgi_ssp_resume(struct platform_device *dev)
-{
-        if (ssp_machinfo->cs_lcdcon >= 0)
-                GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);  /* High - Disable LCD Control/Timing Gen */
-        if (ssp_machinfo->cs_max1111 >= 0)
-                GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/
-        if (ssp_machinfo->cs_ads7846 >= 0)
-                GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/
-        ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state);
-        ssp_enable(&corgi_ssp_dev);
-
-        return 0;
-}
-
-static struct platform_driver corgissp_driver = {
-        .probe          = corgi_ssp_probe,
-        .remove         = corgi_ssp_remove,
-        .suspend        = corgi_ssp_suspend,
-        .resume         = corgi_ssp_resume,
-        .driver         = {
-                .name   = "corgi-ssp",
-        },
-};
-
-int __init corgi_ssp_init(void)
-{
-        return platform_driver_register(&corgissp_driver);
-}
-
-arch_initcall(corgi_ssp_init);
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c
index 88575b87bd33..91fd4fea6a54 100644
--- a/arch/arm/mach-pxa/csb726.c
+++ b/arch/arm/mach-pxa/csb726.c
@@ -125,18 +125,9 @@ static unsigned long csb726_pin_config[] = {
         GPIO118_I2C_SDA,
 };
 
-static struct pxamci_platform_data csb726_mci_data;
-
-static int csb726_mci_init(struct device *dev,
-                irq_handler_t detect, void *data)
-{
-        csb726_mci_data.detect_delay = msecs_to_jiffies(500);
-        return 0;
-}
-
 static struct pxamci_platform_data csb726_mci = {
+        .detect_delay_ms        = 500,
         .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
-        .init                   = csb726_mci_init,
         /* FIXME setpower */
         .gpio_card_detect       = CSB726_GPIO_MMC_DETECT,
         .gpio_card_ro           = CSB726_GPIO_MMC_RO,
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index aab04f33e49b..0517c17978f3 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -626,6 +626,7 @@ static int em_x270_mci_get_ro(struct device *dev)
 }
 
 static struct pxamci_platform_data em_x270_mci_platform_data = {
+        .detect_delay_ms        = 250,
         .ocr_mask               = MMC_VDD_20_21|MMC_VDD_21_22|MMC_VDD_22_23|
                                   MMC_VDD_24_25|MMC_VDD_25_26|MMC_VDD_26_27|
                                   MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|
@@ -643,7 +644,6 @@ static void __init em_x270_init_mmc(void)
         if (machine_is_em_x270())
                 em_x270_mci_platform_data.get_ro = em_x270_mci_get_ro;
 
-        em_x270_mci_platform_data.detect_delay  = msecs_to_jiffies(250);
         pxa_set_mci_info(&em_x270_mci_platform_data);
 }
 #else
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 3126a35aa002..baabb3ce088e 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -28,7 +28,6 @@
 
 #include <mach/reset.h>
 #include <mach/gpio.h>
-#include <mach/pxa2xx-gpio.h>
 
 #include "generic.h"
 
@@ -128,33 +127,3 @@ void __init pxa_map_io(void)
         iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
         get_clk_frequency_khz(1);
 }
-
-/*
- * Configure pins for GPIO or other functions
- */
-int pxa_gpio_mode(int gpio_mode)
-{
-        unsigned long flags;
-        int gpio = gpio_mode & GPIO_MD_MASK_NR;
-        int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
-        int gafr;
-
-        if (gpio > pxa_last_gpio)
-                return -EINVAL;
-
-        local_irq_save(flags);
-        if (gpio_mode & GPIO_DFLT_LOW)
-                GPCR(gpio) = GPIO_bit(gpio);
-        else if (gpio_mode & GPIO_DFLT_HIGH)
-                GPSR(gpio) = GPIO_bit(gpio);
-        if (gpio_mode & GPIO_MD_MASK_DIR)
-                GPDR(gpio) |= GPIO_bit(gpio);
-        else
-                GPDR(gpio) &= ~GPIO_bit(gpio);
-        gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
-        GAFR(gpio) = gafr |  (fn  << (((gpio) & 0xf)*2));
-        local_irq_restore(flags);
-
-        return 0;
-}
-EXPORT_SYMBOL(pxa_gpio_mode);
diff --git a/arch/arm/mach-pxa/include/mach/colibri.h b/arch/arm/mach-pxa/include/mach/colibri.h
index 811743c56147..5f2ba8d9015c 100644
--- a/arch/arm/mach-pxa/include/mach/colibri.h
+++ b/arch/arm/mach-pxa/include/mach/colibri.h
@@ -2,6 +2,7 @@
 #define _COLIBRI_H_
 
 #include <net/ax88796.h>
+#include <mach/mfp.h>
 
 /*
  * common settings for all modules
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
index 7239281788de..585970ef08ce 100644
--- a/arch/arm/mach-pxa/include/mach/corgi.h
+++ b/arch/arm/mach-pxa/include/mach/corgi.h
@@ -113,7 +113,6 @@
  * Shared data structures
  */
 extern struct platform_device corgiscoop_device;
-extern struct platform_device corgissp_device;
 
 #endif /* __ASM_ARCH_CORGI_H  */
 
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index 7515757d6911..3d8d8cb09685 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -202,7 +202,7 @@
 #define __cpu_is_pxa950(id)                             \
         ({                                              \
                 unsigned int _id = (id) >> 4 & 0xfff;   \
-                id == 0x697;                            \
+                _id == 0x697;                           \
          })
 #else
 #define __cpu_is_pxa950(id)     (0)
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
index 658b28ed129b..c54cef25895c 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
@@ -25,6 +25,8 @@
 #define MFP_DIR(x)              (((x) >> 23) & 0x1)
 
 #define MFP_LPM_CAN_WAKEUP      (0x1 << 24)
+#define MFP_LPM_KEEP_OUTPUT     (0x1 << 25)
+
 #define WAKEUP_ON_EDGE_RISE     (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_RISE)
 #define WAKEUP_ON_EDGE_FALL     (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_FALL)
 #define WAKEUP_ON_EDGE_BOTH     (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_BOTH)
diff --git a/arch/arm/mach-pxa/include/mach/mmc.h b/arch/arm/mach-pxa/include/mach/mmc.h
index 02a69dc2ee63..9eb515bb799d 100644
--- a/arch/arm/mach-pxa/include/mach/mmc.h
+++ b/arch/arm/mach-pxa/include/mach/mmc.h
@@ -9,7 +9,7 @@ struct mmc_host;
 
 struct pxamci_platform_data {
         unsigned int ocr_mask;                  /* available voltages */
-        unsigned long detect_delay;             /* delay in jiffies before detecting cards after interrupt */
+        unsigned long detect_delay_ms;          /* delay in millisecond before detecting cards after interrupt */
         int (*init)(struct device *, irq_handler_t , void *);
         int (*get_ro)(struct device *);
         void (*setpower)(struct device *, unsigned int);
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h b/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
deleted file mode 100644
index 1209c44aa6f1..000000000000
--- a/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
+++ /dev/null
@@ -1,375 +0,0 @@
-#ifndef __ASM_ARCH_PXA2XX_GPIO_H
-#define __ASM_ARCH_PXA2XX_GPIO_H
-
-#warning Please use mfp-pxa2[57]x.h instead of pxa2xx-gpio.h
-
-#include <mach/gpio.h>
-
-/* GPIO alternate function assignments */
-
-#define GPIO1_RST               1       /* reset */
-#define GPIO6_MMCCLK            6       /* MMC Clock */
-#define GPIO7_48MHz             7       /* 48 MHz clock output */
-#define GPIO8_MMCCS0            8       /* MMC Chip Select 0 */
-#define GPIO9_MMCCS1            9       /* MMC Chip Select 1 */
-#define GPIO10_RTCCLK           10      /* real time clock (1 Hz) */
-#define GPIO11_3_6MHz           11      /* 3.6 MHz oscillator out */
-#define GPIO12_32KHz            12      /* 32 kHz out */
-#define GPIO12_CIF_DD_7         12      /* Camera data pin 7 */
-#define GPIO13_MBGNT            13      /* memory controller grant */
-#define GPIO14_MBREQ            14      /* alternate bus master request */
-#define GPIO15_nCS_1            15      /* chip select 1 */
-#define GPIO16_PWM0             16      /* PWM0 output */
-#define GPIO17_PWM1             17      /* PWM1 output */
-#define GPIO17_CIF_DD_6         17      /* Camera data pin 6 */
-#define GPIO18_RDY              18      /* Ext. Bus Ready */
-#define GPIO19_DREQ1            19      /* External DMA Request */
-#define GPIO20_DREQ0            20      /* External DMA Request */
-#define GPIO23_SCLK             23      /* SSP clock */
-#define GPIO23_CIF_MCLK         23      /* Camera Master Clock */
-#define GPIO24_SFRM             24      /* SSP Frame */
-#define GPIO24_CIF_FV           24      /* Camera frame start signal */
-#define GPIO25_STXD             25      /* SSP transmit */
-#define GPIO25_CIF_LV           25      /* Camera line start signal */
-#define GPIO26_SRXD             26      /* SSP receive */
-#define GPIO26_CIF_PCLK         26      /* Camera Pixel Clock */
-#define GPIO27_SEXTCLK          27      /* SSP ext_clk */
-#define GPIO27_CIF_DD_0         27      /* Camera data pin 0 */
-#define GPIO28_BITCLK           28      /* AC97/I2S bit_clk */
-#define GPIO29_SDATA_IN         29      /* AC97 Sdata_in0 / I2S Sdata_in */
-#define GPIO30_SDATA_OUT        30      /* AC97/I2S Sdata_out */
-#define GPIO31_SYNC             31      /* AC97/I2S sync */
-#define GPIO32_SDATA_IN1        32      /* AC97 Sdata_in1 */
-#define GPIO32_SYSCLK           32      /* I2S System Clock */
-#define GPIO32_MMCCLK           32      /* MMC Clock (PXA270) */
-#define GPIO33_nCS_5            33      /* chip select 5 */
-#define GPIO34_FFRXD            34      /* FFUART receive */
-#define GPIO34_MMCCS0           34      /* MMC Chip Select 0 */
-#define GPIO35_FFCTS            35      /* FFUART Clear to send */
-#define GPIO36_FFDCD            36      /* FFUART Data carrier detect */
-#define GPIO37_FFDSR            37      /* FFUART data set ready */
-#define GPIO38_FFRI             38      /* FFUART Ring Indicator */
-#define GPIO39_MMCCS1           39      /* MMC Chip Select 1 */
-#define GPIO39_FFTXD            39      /* FFUART transmit data */
-#define GPIO40_FFDTR            40      /* FFUART data terminal Ready */
-#define GPIO41_FFRTS            41      /* FFUART request to send */
-#define GPIO42_BTRXD            42      /* BTUART receive data */
-#define GPIO42_HWRXD            42      /* HWUART receive data */
-#define GPIO42_CIF_MCLK         42      /* Camera Master Clock */
-#define GPIO43_BTTXD            43      /* BTUART transmit data */
-#define GPIO43_HWTXD            43      /* HWUART transmit data */
-#define GPIO43_CIF_FV           43      /* Camera frame start signal */
-#define GPIO44_BTCTS            44      /* BTUART clear to send */
-#define GPIO44_HWCTS            44      /* HWUART clear to send */
-#define GPIO44_CIF_LV           44      /* Camera line start signal */
-#define GPIO45_BTRTS            45      /* BTUART request to send */
-#define GPIO45_HWRTS            45      /* HWUART request to send */
-#define GPIO45_AC97_SYSCLK      45      /* AC97 System Clock */
-#define GPIO45_CIF_PCLK         45      /* Camera Pixel Clock */
-#define GPIO46_ICPRXD           46      /* ICP receive data */
-#define GPIO46_STRXD            46      /* STD_UART receive data */
-#define GPIO47_ICPTXD           47      /* ICP transmit data */
-#define GPIO47_STTXD            47      /* STD_UART transmit data */
-#define GPIO47_CIF_DD_0         47      /* Camera data pin 0 */
-#define GPIO48_nPOE             48      /* Output Enable for Card Space */
-#define GPIO48_CIF_DD_5         48      /* Camera data pin 5 */
-#define GPIO49_nPWE             49      /* Write Enable for Card Space */
-#define GPIO50_nPIOR            50      /* I/O Read for Card Space */
-#define GPIO50_CIF_DD_3         50      /* Camera data pin 3 */
-#define GPIO51_nPIOW            51      /* I/O Write for Card Space */
-#define GPIO51_CIF_DD_2         51      /* Camera data pin 2 */
-#define GPIO52_nPCE_1           52      /* Card Enable for Card Space */
-#define GPIO52_CIF_DD_4         52      /* Camera data pin 4 */
-#define GPIO53_nPCE_2           53      /* Card Enable for Card Space */
-#define GPIO53_MMCCLK           53      /* MMC Clock */
-#define GPIO53_CIF_MCLK         53      /* Camera Master Clock */
-#define GPIO54_MMCCLK           54      /* MMC Clock */
-#define GPIO54_pSKTSEL          54      /* Socket Select for Card Space */
-#define GPIO54_nPCE_2           54      /* Card Enable for Card Space (PXA27x) */
-#define GPIO54_CIF_PCLK         54      /* Camera Pixel Clock */
-#define GPIO55_nPREG            55      /* Card Address bit 26 */
-#define GPIO55_CIF_DD_1         55      /* Camera data pin 1 */
-#define GPIO56_nPWAIT           56      /* Wait signal for Card Space */
-#define GPIO57_nIOIS16          57      /* Bus Width select for I/O Card Space */
-#define GPIO58_LDD_0            58      /* LCD data pin 0 */
-#define GPIO59_LDD_1            59      /* LCD data pin 1 */
-#define GPIO60_LDD_2            60      /* LCD data pin 2 */
-#define GPIO61_LDD_3            61      /* LCD data pin 3 */
-#define GPIO62_LDD_4            62      /* LCD data pin 4 */
-#define GPIO63_LDD_5            63      /* LCD data pin 5 */
-#define GPIO64_LDD_6            64      /* LCD data pin 6 */
-#define GPIO65_LDD_7            65      /* LCD data pin 7 */
-#define GPIO66_LDD_8            66      /* LCD data pin 8 */
-#define GPIO66_MBREQ            66      /* alternate bus master req */
-#define GPIO67_LDD_9            67      /* LCD data pin 9 */
-#define GPIO67_MMCCS0           67      /* MMC Chip Select 0 */
-#define GPIO68_LDD_10           68      /* LCD data pin 10 */
-#define GPIO68_MMCCS1           68      /* MMC Chip Select 1 */
-#define GPIO69_LDD_11           69      /* LCD data pin 11 */
-#define GPIO69_MMCCLK           69      /* MMC_CLK */
-#define GPIO70_LDD_12           70      /* LCD data pin 12 */
-#define GPIO70_RTCCLK           70      /* Real Time clock (1 Hz) */
-#define GPIO71_LDD_13           71      /* LCD data pin 13 */
-#define GPIO71_3_6MHz           71      /* 3.6 MHz Oscillator clock */
-#define GPIO72_LDD_14           72      /* LCD data pin 14 */
-#define GPIO72_32kHz            72      /* 32 kHz clock */
-#define GPIO73_LDD_15           73      /* LCD data pin 15 */
-#define GPIO73_MBGNT            73      /* Memory controller grant */
-#define GPIO74_LCD_FCLK         74      /* LCD Frame clock */
-#define GPIO75_LCD_LCLK         75      /* LCD line clock */
-#define GPIO76_LCD_PCLK         76      /* LCD Pixel clock */
-#define GPIO77_LCD_ACBIAS       77      /* LCD AC Bias */
-#define GPIO78_nCS_2            78      /* chip select 2 */
-#define GPIO79_nCS_3            79      /* chip select 3 */
-#define GPIO80_nCS_4            80      /* chip select 4 */
-#define GPIO81_NSCLK            81      /* NSSP clock */
-#define GPIO81_CIF_DD_0         81      /* Camera data pin 0 */
-#define GPIO82_NSFRM            82      /* NSSP Frame */
-#define GPIO82_CIF_DD_5         82      /* Camera data pin 5 */
-#define GPIO83_NSTXD            83      /* NSSP transmit */
-#define GPIO83_CIF_DD_4         83      /* Camera data pin 4 */
-#define GPIO84_NSRXD            84      /* NSSP receive */
-#define GPIO84_CIF_FV           84      /* Camera frame start signal */
-#define GPIO85_nPCE_1           85      /* Card Enable for Card Space (PXA27x) */
-#define GPIO85_CIF_LV           85      /* Camera line start signal */
-#define GPIO90_CIF_DD_4         90      /* Camera data pin 4 */
-#define GPIO91_CIF_DD_5         91      /* Camera data pin 5 */
-#define GPIO92_MMCDAT0          92      /* MMC DAT0 (PXA27x) */
-#define GPIO93_CIF_DD_6         93      /* Camera data pin 6 */
-#define GPIO94_CIF_DD_5         94      /* Camera data pin 5 */
-#define GPIO95_CIF_DD_4         95      /* Camera data pin 4 */
-#define GPIO96_FFRXD            96      /* FFUART recieve */
-#define GPIO98_FFRTS            98      /* FFUART request to send */
-#define GPIO98_CIF_DD_0         98      /* Camera data pin 0 */
-#define GPIO99_FFTXD            99      /* FFUART transmit data */
-#define GPIO100_FFCTS           100     /* FFUART Clear to send */
-#define GPIO102_nPCE_1          102     /* PCMCIA (PXA27x) */
-#define GPIO103_CIF_DD_3        103     /* Camera data pin 3 */
-#define GPIO104_CIF_DD_2        104     /* Camera data pin 2 */
-#define GPIO105_CIF_DD_1        105     /* Camera data pin 1 */
-#define GPIO106_CIF_DD_9        106     /* Camera data pin 9 */
-#define GPIO107_CIF_DD_8        107     /* Camera data pin 8 */
-#define GPIO108_CIF_DD_7        108     /* Camera data pin 7 */
-#define GPIO109_MMCDAT1         109     /* MMC DAT1 (PXA27x) */
-#define GPIO110_MMCDAT2         110     /* MMC DAT2 (PXA27x) */
-#define GPIO110_MMCCS0          110     /* MMC Chip Select 0 (PXA27x) */
-#define GPIO111_MMCDAT3         111     /* MMC DAT3 (PXA27x) */
-#define GPIO111_MMCCS1          111     /* MMC Chip Select 1 (PXA27x) */
-#define GPIO112_MMCCMD          112     /* MMC CMD (PXA27x) */
-#define GPIO113_I2S_SYSCLK      113     /* I2S System Clock (PXA27x) */
-#define GPIO113_AC97_RESET_N    113     /* AC97 NRESET on (PXA27x) */
-#define GPIO114_CIF_DD_1        114     /* Camera data pin 1 */
-#define GPIO115_CIF_DD_3        115     /* Camera data pin 3 */
-#define GPIO116_CIF_DD_2        116     /* Camera data pin 2 */
-
-/* GPIO alternate function mode & direction */
-
-#define GPIO_IN                 0x000
-#define GPIO_OUT                0x080
-#define GPIO_ALT_FN_1_IN        0x100
-#define GPIO_ALT_FN_1_OUT       0x180
-#define GPIO_ALT_FN_2_IN        0x200
-#define GPIO_ALT_FN_2_OUT       0x280
-#define GPIO_ALT_FN_3_IN        0x300
-#define GPIO_ALT_FN_3_OUT       0x380
-#define GPIO_MD_MASK_NR         0x07f
-#define GPIO_MD_MASK_DIR        0x080
-#define GPIO_MD_MASK_FN         0x300
-#define GPIO_DFLT_LOW           0x400
-#define GPIO_DFLT_HIGH          0x800
-
-#define GPIO1_RTS_MD            ( 1 | GPIO_ALT_FN_1_IN)
-#define GPIO6_MMCCLK_MD         ( 6 | GPIO_ALT_FN_1_OUT)
-#define GPIO7_48MHz_MD          ( 7 | GPIO_ALT_FN_1_OUT)
-#define GPIO8_MMCCS0_MD         ( 8 | GPIO_ALT_FN_1_OUT)
-#define GPIO9_MMCCS1_MD         ( 9 | GPIO_ALT_FN_1_OUT)
-#define GPIO10_RTCCLK_MD        (10 | GPIO_ALT_FN_1_OUT)
-#define GPIO11_3_6MHz_MD        (11 | GPIO_ALT_FN_1_OUT)
-#define GPIO12_32KHz_MD         (12 | GPIO_ALT_FN_1_OUT)
-#define GPIO12_CIF_DD_7_MD      (12 | GPIO_ALT_FN_2_IN)
-#define GPIO13_MBGNT_MD         (13 | GPIO_ALT_FN_2_OUT)
-#define GPIO14_MBREQ_MD         (14 | GPIO_ALT_FN_1_IN)
-#define GPIO15_nCS_1_MD         (15 | GPIO_ALT_FN_2_OUT)
-#define GPIO16_PWM0_MD          (16 | GPIO_ALT_FN_2_OUT)
-#define GPIO17_PWM1_MD          (17 | GPIO_ALT_FN_2_OUT)
-#define GPIO17_CIF_DD_6_MD      (17 | GPIO_ALT_FN_2_IN)
-#define GPIO18_RDY_MD           (18 | GPIO_ALT_FN_1_IN)
-#define GPIO19_DREQ1_MD         (19 | GPIO_ALT_FN_1_IN)
-#define GPIO20_DREQ0_MD         (20 | GPIO_ALT_FN_1_IN)
-#define GPIO23_CIF_MCLK_MD      (23 | GPIO_ALT_FN_1_OUT)
-#define GPIO23_SCLK_MD          (23 | GPIO_ALT_FN_2_OUT)
-#define GPIO24_CIF_FV_MD        (24 | GPIO_ALT_FN_1_OUT)
-#define GPIO24_SFRM_MD          (24 | GPIO_ALT_FN_2_OUT)
-#define GPIO25_CIF_LV_MD        (25 | GPIO_ALT_FN_1_OUT)
-#define GPIO25_STXD_MD          (25 | GPIO_ALT_FN_2_OUT)
-#define GPIO26_SRXD_MD          (26 | GPIO_ALT_FN_1_IN)
-#define GPIO26_CIF_PCLK_MD      (26 | GPIO_ALT_FN_2_IN)
-#define GPIO27_SEXTCLK_MD       (27 | GPIO_ALT_FN_1_IN)
-#define GPIO27_CIF_DD_0_MD      (27 | GPIO_ALT_FN_3_IN)
-#define GPIO28_BITCLK_AC97_MD   (28 | GPIO_ALT_FN_1_IN)
-#define GPIO28_BITCLK_IN_I2S_MD (28 | GPIO_ALT_FN_2_IN)
-#define GPIO28_BITCLK_OUT_I2S_MD        (28 | GPIO_ALT_FN_1_OUT)
-#define GPIO29_SDATA_IN_AC97_MD (29 | GPIO_ALT_FN_1_IN)
-#define GPIO29_SDATA_IN_I2S_MD  (29 | GPIO_ALT_FN_2_IN)
-#define GPIO30_SDATA_OUT_AC97_MD        (30 | GPIO_ALT_FN_2_OUT)
-#define GPIO30_SDATA_OUT_I2S_MD (30 | GPIO_ALT_FN_1_OUT)
-#define GPIO31_SYNC_I2S_MD      (31 | GPIO_ALT_FN_1_OUT)
-#define GPIO31_SYNC_AC97_MD     (31 | GPIO_ALT_FN_2_OUT)
-#define GPIO32_SDATA_IN1_AC97_MD        (32 | GPIO_ALT_FN_1_IN)
-#define GPIO32_SYSCLK_I2S_MD    (32 | GPIO_ALT_FN_1_OUT)
-#define GPIO32_MMCCLK_MD        (32 | GPIO_ALT_FN_2_OUT)
-#define GPIO33_nCS_5_MD         (33 | GPIO_ALT_FN_2_OUT)
-#define GPIO34_FFRXD_MD         (34 | GPIO_ALT_FN_1_IN)
-#define GPIO34_MMCCS0_MD        (34 | GPIO_ALT_FN_2_OUT)
-#define GPIO35_FFCTS_MD         (35 | GPIO_ALT_FN_1_IN)
-#define GPIO35_KP_MKOUT6_MD     (35 | GPIO_ALT_FN_2_OUT)
-#define GPIO36_FFDCD_MD         (36 | GPIO_ALT_FN_1_IN)
-#define GPIO37_FFDSR_MD         (37 | GPIO_ALT_FN_1_IN)
-#define GPIO38_FFRI_MD          (38 | GPIO_ALT_FN_1_IN)
-#define GPIO39_MMCCS1_MD        (39 | GPIO_ALT_FN_1_OUT)
-#define GPIO39_FFTXD_MD         (39 | GPIO_ALT_FN_2_OUT)
-#define GPIO40_FFDTR_MD         (40 | GPIO_ALT_FN_2_OUT)
-#define GPIO41_FFRTS_MD         (41 | GPIO_ALT_FN_2_OUT)
-#define GPIO41_KP_MKOUT7_MD     (41 | GPIO_ALT_FN_1_OUT)
-#define GPIO42_BTRXD_MD         (42 | GPIO_ALT_FN_1_IN)
-#define GPIO42_HWRXD_MD         (42 | GPIO_ALT_FN_3_IN)
-#define GPIO42_CIF_MCLK_MD      (42 | GPIO_ALT_FN_3_OUT)
-#define GPIO43_BTTXD_MD         (43 | GPIO_ALT_FN_2_OUT)
-#define GPIO43_HWTXD_MD         (43 | GPIO_ALT_FN_3_OUT)
-#define GPIO43_CIF_FV_MD        (43 | GPIO_ALT_FN_3_OUT)
-#define GPIO44_BTCTS_MD         (44 | GPIO_ALT_FN_1_IN)
-#define GPIO44_HWCTS_MD         (44 | GPIO_ALT_FN_3_IN)
-#define GPIO44_CIF_LV_MD        (44 | GPIO_ALT_FN_3_OUT)
-#define GPIO45_CIF_PCLK_MD      (45 | GPIO_ALT_FN_3_IN)
-#define GPIO45_BTRTS_MD         (45 | GPIO_ALT_FN_2_OUT)
-#define GPIO45_HWRTS_MD         (45 | GPIO_ALT_FN_3_OUT)
-#define GPIO45_SYSCLK_AC97_MD   (45 | GPIO_ALT_FN_1_OUT)
-#define GPIO46_ICPRXD_MD        (46 | GPIO_ALT_FN_1_IN)
-#define GPIO46_STRXD_MD         (46 | GPIO_ALT_FN_2_IN)
-#define GPIO47_CIF_DD_0_MD      (47 | GPIO_ALT_FN_1_IN)
-#define GPIO47_ICPTXD_MD        (47 | GPIO_ALT_FN_2_OUT)
-#define GPIO47_STTXD_MD         (47 | GPIO_ALT_FN_1_OUT)
-#define GPIO48_CIF_DD_5_MD      (48 | GPIO_ALT_FN_1_IN)
-#define GPIO48_nPOE_MD          (48 | GPIO_ALT_FN_2_OUT)
-#define GPIO48_HWTXD_MD         (48 | GPIO_ALT_FN_1_OUT)
-#define GPIO48_nPOE_MD          (48 | GPIO_ALT_FN_2_OUT)
-#define GPIO49_HWRXD_MD         (49 | GPIO_ALT_FN_1_IN)
-#define GPIO49_nPWE_MD          (49 | GPIO_ALT_FN_2_OUT)
-#define GPIO50_CIF_DD_3_MD      (50 | GPIO_ALT_FN_1_IN)
-#define GPIO50_nPIOR_MD         (50 | GPIO_ALT_FN_2_OUT)
-#define GPIO50_HWCTS_MD         (50 | GPIO_ALT_FN_1_IN)
-#define GPIO50_CIF_DD_3_MD      (50 | GPIO_ALT_FN_1_IN)
-#define GPIO51_CIF_DD_2_MD      (51 | GPIO_ALT_FN_1_IN)
-#define GPIO51_nPIOW_MD         (51 | GPIO_ALT_FN_2_OUT)
-#define GPIO51_HWRTS_MD         (51 | GPIO_ALT_FN_1_OUT)
-#define GPIO51_CIF_DD_2_MD      (51 | GPIO_ALT_FN_1_IN)
-#define GPIO52_nPCE_1_MD        (52 | GPIO_ALT_FN_2_OUT)
-#define GPIO52_CIF_DD_4_MD      (52 | GPIO_ALT_FN_1_IN)
-#define GPIO53_nPCE_2_MD        (53 | GPIO_ALT_FN_2_OUT)
-#define GPIO53_MMCCLK_MD        (53 | GPIO_ALT_FN_1_OUT)
-#define GPIO53_CIF_MCLK_MD      (53 | GPIO_ALT_FN_2_OUT)
-#define GPIO54_MMCCLK_MD        (54 | GPIO_ALT_FN_1_OUT)
-#define GPIO54_nPCE_2_MD        (54 | GPIO_ALT_FN_2_OUT)
-#define GPIO54_pSKTSEL_MD       (54 | GPIO_ALT_FN_2_OUT)
-#define GPIO54_CIF_PCLK_MD      (54 | GPIO_ALT_FN_3_IN)
-#define GPIO55_nPREG_MD         (55 | GPIO_ALT_FN_2_OUT)
-#define GPIO55_CIF_DD_1_MD      (55 | GPIO_ALT_FN_1_IN)
-#define GPIO56_nPWAIT_MD        (56 | GPIO_ALT_FN_1_IN)
-#define GPIO57_nIOIS16_MD       (57 | GPIO_ALT_FN_1_IN)
-#define GPIO58_LDD_0_MD         (58 | GPIO_ALT_FN_2_OUT)
-#define GPIO59_LDD_1_MD         (59 | GPIO_ALT_FN_2_OUT)
-#define GPIO60_LDD_2_MD         (60 | GPIO_ALT_FN_2_OUT)
-#define GPIO61_LDD_3_MD         (61 | GPIO_ALT_FN_2_OUT)
-#define GPIO62_LDD_4_MD         (62 | GPIO_ALT_FN_2_OUT)
-#define GPIO63_LDD_5_MD         (63 | GPIO_ALT_FN_2_OUT)
-#define GPIO64_LDD_6_MD         (64 | GPIO_ALT_FN_2_OUT)
-#define GPIO65_LDD_7_MD         (65 | GPIO_ALT_FN_2_OUT)
-#define GPIO66_LDD_8_MD         (66 | GPIO_ALT_FN_2_OUT)
-#define GPIO66_MBREQ_MD         (66 | GPIO_ALT_FN_1_IN)
-#define GPIO67_LDD_9_MD         (67 | GPIO_ALT_FN_2_OUT)
-#define GPIO67_MMCCS0_MD        (67 | GPIO_ALT_FN_1_OUT)
-#define GPIO68_LDD_10_MD        (68 | GPIO_ALT_FN_2_OUT)
-#define GPIO68_MMCCS1_MD        (68 | GPIO_ALT_FN_1_OUT)
-#define GPIO69_LDD_11_MD        (69 | GPIO_ALT_FN_2_OUT)
-#define GPIO69_MMCCLK_MD        (69 | GPIO_ALT_FN_1_OUT)
-#define GPIO70_LDD_12_MD        (70 | GPIO_ALT_FN_2_OUT)
-#define GPIO70_RTCCLK_MD        (70 | GPIO_ALT_FN_1_OUT)
-#define GPIO71_LDD_13_MD        (71 | GPIO_ALT_FN_2_OUT)
-#define GPIO71_3_6MHz_MD        (71 | GPIO_ALT_FN_1_OUT)
-#define GPIO72_LDD_14_MD        (72 | GPIO_ALT_FN_2_OUT)
-#define GPIO72_32kHz_MD         (72 | GPIO_ALT_FN_1_OUT)
-#define GPIO73_LDD_15_MD        (73 | GPIO_ALT_FN_2_OUT)
-#define GPIO73_MBGNT_MD         (73 | GPIO_ALT_FN_1_OUT)
-#define GPIO74_LCD_FCLK_MD      (74 | GPIO_ALT_FN_2_OUT)
-#define GPIO75_LCD_LCLK_MD      (75 | GPIO_ALT_FN_2_OUT)
-#define GPIO76_LCD_PCLK_MD      (76 | GPIO_ALT_FN_2_OUT)
-#define GPIO77_LCD_ACBIAS_MD    (77 | GPIO_ALT_FN_2_OUT)
-#define GPIO78_nCS_2_MD         (78 | GPIO_ALT_FN_2_OUT)
-#define GPIO78_nPCE_2_MD        (78 | GPIO_ALT_FN_1_OUT)
-#define GPIO79_nCS_3_MD         (79 | GPIO_ALT_FN_2_OUT)
-#define GPIO79_pSKTSEL_MD       (79 | GPIO_ALT_FN_1_OUT)
-#define GPIO80_nCS_4_MD         (80 | GPIO_ALT_FN_2_OUT)
-#define GPIO81_NSSP_CLK_OUT     (81 | GPIO_ALT_FN_1_OUT)
-#define GPIO81_NSSP_CLK_IN      (81 | GPIO_ALT_FN_1_IN)
-#define GPIO81_CIF_DD_0_MD      (81 | GPIO_ALT_FN_2_IN)
-#define GPIO82_NSSP_FRM_OUT     (82 | GPIO_ALT_FN_1_OUT)
-#define GPIO82_NSSP_FRM_IN      (82 | GPIO_ALT_FN_1_IN)
-#define GPIO82_CIF_DD_5_MD      (82 | GPIO_ALT_FN_3_IN)
-#define GPIO83_NSSP_TX          (83 | GPIO_ALT_FN_1_OUT)
-#define GPIO83_NSSP_RX          (83 | GPIO_ALT_FN_2_IN)
-#define GPIO83_CIF_DD_4_MD      (83 | GPIO_ALT_FN_3_IN)
-#define GPIO84_NSSP_TX          (84 | GPIO_ALT_FN_1_OUT)
-#define GPIO84_NSSP_RX          (84 | GPIO_ALT_FN_2_IN)
-#define GPIO84_CIF_FV_MD        (84 | GPIO_ALT_FN_3_IN)
-#define GPIO85_nPCE_1_MD        (85 | GPIO_ALT_FN_1_OUT)
-#define GPIO85_CIF_LV_MD        (85 | GPIO_ALT_FN_3_IN)
-#define GPIO86_nPCE_1_MD        (86 | GPIO_ALT_FN_1_OUT)
-#define GPIO88_USBH1_PWR_MD     (88 | GPIO_ALT_FN_1_IN)
-#define GPIO89_USBH1_PEN_MD     (89 | GPIO_ALT_FN_2_OUT)
-#define GPIO90_CIF_DD_4_MD      (90 | GPIO_ALT_FN_3_IN)
-#define GPIO91_CIF_DD_5_MD      (91 | GPIO_ALT_FN_3_IN)
-#define GPIO92_MMCDAT0_MD       (92 | GPIO_ALT_FN_1_OUT)
-#define GPIO93_CIF_DD_6_MD      (93 | GPIO_ALT_FN_2_IN)
-#define GPIO94_CIF_DD_5_MD      (94 | GPIO_ALT_FN_2_IN)
-#define GPIO95_CIF_DD_4_MD      (95 | GPIO_ALT_FN_2_IN)
-#define GPIO95_KP_MKIN6_MD      (95 | GPIO_ALT_FN_3_IN)
-#define GPIO96_KP_DKIN3_MD      (96 | GPIO_ALT_FN_1_IN)
-#define GPIO96_FFRXD_MD         (96 | GPIO_ALT_FN_3_IN)
-#define GPIO97_KP_MKIN3_MD      (97 | GPIO_ALT_FN_3_IN)
-#define GPIO98_CIF_DD_0_MD      (98 | GPIO_ALT_FN_2_IN)
-#define GPIO98_FFRTS_MD         (98 | GPIO_ALT_FN_3_OUT)
-#define GPIO99_FFTXD_MD         (99 | GPIO_ALT_FN_3_OUT)
-#define GPIO100_KP_MKIN0_MD     (100 | GPIO_ALT_FN_1_IN)
-#define GPIO101_KP_MKIN1_MD     (101 | GPIO_ALT_FN_1_IN)
-#define GPIO102_nPCE_1_MD       (102 | GPIO_ALT_FN_1_OUT)
-#define GPIO102_KP_MKIN2_MD     (102 | GPIO_ALT_FN_1_IN)
-#define GPIO103_CIF_DD_3_MD     (103 | GPIO_ALT_FN_1_IN)
-#define GPIO103_KP_MKOUT0_MD    (103 | GPIO_ALT_FN_2_OUT)
-#define GPIO104_CIF_DD_2_MD     (104 | GPIO_ALT_FN_1_IN)
-#define GPIO104_pSKTSEL_MD      (104 | GPIO_ALT_FN_1_OUT)
-#define GPIO104_KP_MKOUT1_MD    (104 | GPIO_ALT_FN_2_OUT)
-#define GPIO105_CIF_DD_1_MD     (105 | GPIO_ALT_FN_1_IN)
-#define GPIO105_KP_MKOUT2_MD    (105 | GPIO_ALT_FN_2_OUT)
-#define GPIO106_CIF_DD_9_MD     (106 | GPIO_ALT_FN_1_IN)
-#define GPIO106_KP_MKOUT3_MD    (106 | GPIO_ALT_FN_2_OUT)
-#define GPIO107_CIF_DD_8_MD     (107 | GPIO_ALT_FN_1_IN)
-#define GPIO107_KP_MKOUT4_MD    (107 | GPIO_ALT_FN_2_OUT)
-#define GPIO108_CIF_DD_7_MD     (108 | GPIO_ALT_FN_1_IN)
-#define GPIO108_KP_MKOUT5_MD    (108 | GPIO_ALT_FN_2_OUT)
-#define GPIO109_MMCDAT1_MD      (109 | GPIO_ALT_FN_1_OUT)
-#define GPIO110_MMCDAT2_MD      (110 | GPIO_ALT_FN_1_OUT)
-#define GPIO110_MMCCS0_MD       (110 | GPIO_ALT_FN_1_OUT)
-#define GPIO111_MMCDAT3_MD      (111 | GPIO_ALT_FN_1_OUT)
-#define GPIO110_MMCCS1_MD       (111 | GPIO_ALT_FN_1_OUT)
-#define GPIO112_MMCCMD_MD       (112 | GPIO_ALT_FN_1_OUT)
-#define GPIO113_I2S_SYSCLK_MD   (113 | GPIO_ALT_FN_1_OUT)
-#define GPIO113_AC97_RESET_N_MD (113 | GPIO_ALT_FN_2_OUT)
-#define GPIO117_I2CSCL_MD       (117 | GPIO_ALT_FN_1_IN)
-#define GPIO118_I2CSDA_MD       (118 | GPIO_ALT_FN_1_IN)
-
-/*
- * Handy routine to set GPIO alternate functions
- */
-extern int pxa_gpio_mode( int gpio_mode );
-
-#endif /* __ASM_ARCH_PXA2XX_GPIO_H */
diff --git a/arch/arm/mach-pxa/include/mach/regs-u2d.h b/arch/arm/mach-pxa/include/mach/regs-u2d.h
index 44b0b20b69a4..c15c0c57de08 100644
--- a/arch/arm/mach-pxa/include/mach/regs-u2d.h
+++ b/arch/arm/mach-pxa/include/mach/regs-u2d.h
@@ -166,7 +166,8 @@
 #define U2DMACSR_BUSERRTYPE     (7 << 10)       /* PX Bus Error Type */
 #define U2DMACSR_EORINTR        (1 << 9)        /* End Of Receive */
 #define U2DMACSR_REQPEND        (1 << 8)        /* Request Pending */
-#define U2DMACSR_RASINTR        (1 << 4)        /* Request After Channel Stopped (read / write 1 clear) */#define U2DMACSR_STOPINTR     (1 << 3)        /* Stop Interrupt (read only) */
+#define U2DMACSR_RASINTR        (1 << 4)        /* Request After Channel Stopped (read / write 1 clear) */
+#define U2DMACSR_STOPINTR       (1 << 3)        /* Stop Interrupt (read only) */
 #define U2DMACSR_ENDINTR        (1 << 2)        /* End Interrupt (read / write 1 clear) */
 #define U2DMACSR_STARTINTR      (1 << 1)        /* Start Interrupt (read / write 1 clear) */
 #define U2DMACSR_BUSERRINTR     (1 << 0)        /* Bus Error Interrupt (read / write 1 clear) */
diff --git a/arch/arm/mach-pxa/include/mach/ssp.h b/arch/arm/mach-pxa/include/mach/ssp.h
deleted file mode 100644
index be1be5b6db51..000000000000
--- a/arch/arm/mach-pxa/include/mach/ssp.h
+++ /dev/null
@@ -1,109 +0,0 @@
-/*
- *  ssp.h
- *
- *  Copyright (C) 2003 Russell King, All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This driver supports the following PXA CPU/SSP ports:-
- *
- *       PXA250     SSP
- *       PXA255     SSP, NSSP
- *       PXA26x     SSP, NSSP, ASSP
- *       PXA27x     SSP1, SSP2, SSP3
- *       PXA3xx     SSP1, SSP2, SSP3, SSP4
- */
-
-#ifndef __ASM_ARCH_SSP_H
-#define __ASM_ARCH_SSP_H
-
-#include <linux/list.h>
-#include <linux/io.h>
-
-enum pxa_ssp_type {
-        SSP_UNDEFINED = 0,
-        PXA25x_SSP,  /* pxa 210, 250, 255, 26x */
-        PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
-        PXA27x_SSP,
-};
-
-struct ssp_device {
-        struct platform_device *pdev;
-        struct list_head        node;
-
-        struct clk      *clk;
-        void __iomem    *mmio_base;
-        unsigned long   phys_base;
-
-        const char      *label;
-        int             port_id;
-        int             type;
-        int             use_count;
-        int             irq;
-        int             drcmr_rx;
-        int             drcmr_tx;
-};
-
-#ifdef CONFIG_PXA_SSP_LEGACY
-/*
- * SSP initialisation flags
- */
-#define SSP_NO_IRQ      0x1             /* don't register an irq handler in SSP driver */
-
-struct ssp_state {
-        u32     cr0;
-        u32 cr1;
-        u32 to;
-        u32 psp;
-};
-
-struct ssp_dev {
-        struct ssp_device *ssp;
-        u32 port;
-        u32 mode;
-        u32 flags;
-        u32 psp_flags;
-        u32 speed;
-        int irq;
-};
-
-int ssp_write_word(struct ssp_dev *dev, u32 data);
-int ssp_read_word(struct ssp_dev *dev, u32 *data);
-int ssp_flush(struct ssp_dev *dev);
-void ssp_enable(struct ssp_dev *dev);
-void ssp_disable(struct ssp_dev *dev);
-void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp);
-void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp);
-int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags);
-int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed);
-void ssp_exit(struct ssp_dev *dev);
-#endif /* CONFIG_PXA_SSP_LEGACY */
-
-/**
- * ssp_write_reg - Write to a SSP register
- *
- * @dev: SSP device to access
- * @reg: Register to write to
- * @val: Value to be written.
- */
-static inline void ssp_write_reg(struct ssp_device *dev, u32 reg, u32 val)
-{
-        __raw_writel(val, dev->mmio_base + reg);
-}
-
-/**
- * ssp_read_reg - Read from a SSP register
- *
- * @dev: SSP device to access
- * @reg: Register to read from
- */
-static inline u32 ssp_read_reg(struct ssp_device *dev, u32 reg)
-{
-        return __raw_readl(dev->mmio_base + reg);
-}
-
-struct ssp_device *ssp_request(int port, const char *label);
-void ssp_free(struct ssp_device *);
-#endif /* __ASM_ARCH_SSP_H */
diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h
index 4df2d38507dc..1bbd1f2e4beb 100644
--- a/arch/arm/mach-pxa/include/mach/tosa.h
+++ b/arch/arm/mach-pxa/include/mach/tosa.h
@@ -167,7 +167,7 @@
 
 #define TOSA_KEY_SYNC           KEY_102ND /* ??? */
 
-#ifndef CONFIG_KEYBOARD_TOSA_USE_EXT_KEYCODES
+#ifndef CONFIG_TOSA_USE_EXT_KEYCODES
 #define TOSA_KEY_RECORD         KEY_YEN
 #define TOSA_KEY_ADDRESSBOOK    KEY_KATAKANA
 #define TOSA_KEY_CANCEL         KEY_ESC
diff --git a/arch/arm/mach-pxa/include/mach/vpac270.h b/arch/arm/mach-pxa/include/mach/vpac270.h
new file mode 100644
index 000000000000..7bfa3dd0fd5e
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/vpac270.h
@@ -0,0 +1,42 @@
+/*
+ * GPIOs and interrupts for Voipac PXA270
+ *
+ * Copyright (C) 2010
+ * Marek Vasut <marek.vasut@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef _INCLUDE_VPAC270_H_
+#define _INCLUDE_VPAC270_H_
+
+#define GPIO1_VPAC270_USER_BTN          1
+
+#define GPIO15_VPAC270_LED_ORANGE       15
+
+#define GPIO81_VPAC270_BKL_ON           81
+#define GPIO83_VPAC270_NL_ON            83
+
+#define GPIO52_VPAC270_SD_READONLY      52
+#define GPIO53_VPAC270_SD_DETECT_N      53
+
+#define GPIO84_VPAC270_PCMCIA_CD        84
+#define GPIO35_VPAC270_PCMCIA_RDY       35
+#define GPIO107_VPAC270_PCMCIA_PPEN     107
+#define GPIO11_VPAC270_PCMCIA_RESET     11
+#define GPIO17_VPAC270_CF_CD            17
+#define GPIO12_VPAC270_CF_RDY           12
+#define GPIO16_VPAC270_CF_RESET         16
+
+#define GPIO41_VPAC270_UDC_DETECT       41
+
+#define GPIO114_VPAC270_ETH_IRQ         114
+
+#define GPIO36_VPAC270_IDE_IRQ          36
+
+#define GPIO113_VPAC270_TS_IRQ          113
+
+#endif
diff --git a/arch/arm/mach-pxa/include/mach/z2.h b/arch/arm/mach-pxa/include/mach/z2.h
new file mode 100644
index 000000000000..8835c16bc82f
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/z2.h
@@ -0,0 +1,41 @@
+/*
+ *  arch/arm/mach-pxa/include/mach/z2.h
+ *
+ *  Author: Ken McGuire
+ *  Created: Feb 6, 2009
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef ASM_ARCH_ZIPIT2_H
+#define ASM_ARCH_ZIPIT2_H
+
+/* LEDs */
+#define GPIO10_ZIPITZ2_LED_WIFI         10
+#define GPIO85_ZIPITZ2_LED_CHARGED      85
+#define GPIO83_ZIPITZ2_LED_CHARGING     83
+
+/* SD/MMC */
+#define GPIO96_ZIPITZ2_SD_DETECT        96
+
+/* GPIO Buttons */
+#define GPIO1_ZIPITZ2_POWER_BUTTON      1
+#define GPIO98_ZIPITZ2_LID_BUTTON       98
+
+/* Libertas GSPI8686 WiFi */
+#define GPIO14_ZIPITZ2_WIFI_RESET       14
+#define GPIO15_ZIPITZ2_WIFI_POWER       15
+#define GPIO24_ZIPITZ2_WIFI_CS          24
+#define GPIO36_ZIPITZ2_WIFI_IRQ         36
+
+/* LCD */
+#define GPIO19_ZIPITZ2_LCD_RESET        19
+#define GPIO88_ZIPITZ2_LCD_CS           88
+
+/* MISC GPIOs */
+#define GPIO0_ZIPITZ2_AC_DETECT         0
+#define GPIO37_ZIPITZ2_HEADSET_DETECT   37
+
+#endif
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index fa527b258d61..9b9046185b00 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -41,7 +41,6 @@
 
 #include <mach/pxa300.h>
 #include <mach/pxafb.h>
-#include <mach/ssp.h>
 #include <mach/mmc.h>
 #include <mach/pxa2xx_spi.h>
 #include <mach/pxa27x_keypad.h>
@@ -272,7 +271,7 @@ static inline void littleton_init_keypad(void) {}
 
 #if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
 static struct pxamci_platform_data littleton_mci_platform_data = {
-        .detect_delay           = 20,
+        .detect_delay_ms        = 200,
         .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
         .gpio_card_detect       = GPIO_MMC1_CARD_DETECT,
         .gpio_card_ro           = -1,
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 63d65a2a0387..330c3282856e 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -478,7 +478,7 @@ static void lubbock_mci_exit(struct device *dev, void *data)
 
 static struct pxamci_platform_data lubbock_mci_platform_data = {
         .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
-        .detect_delay           = 1,
+        .detect_delay_ms        = 10,
         .init                   = lubbock_mci_init,
         .get_ro                 = lubbock_mci_get_ro,
         .exit                   = lubbock_mci_exit,
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index cf6b720c055f..1d1419b73457 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -81,6 +81,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
                 PGSR(bank) &= ~mask;
                 is_out = 1;
                 break;
+        case MFP_LPM_INPUT:
         case MFP_LPM_DEFAULT:
                 break;
         default:
@@ -178,8 +179,17 @@ int gpio_set_wake(unsigned int gpio, unsigned int on)
         if (!d->valid)
                 return -EINVAL;
 
-        if (d->keypad_gpio)
-                return -EINVAL;
+        /* Allow keypad GPIOs to wakeup system when
+         * configured as generic GPIOs.
+         */
+        if (d->keypad_gpio && (MFP_AF(d->config) == 0) &&
+            (d->config & MFP_LPM_CAN_WAKEUP)) {
+                if (on)
+                        PKWR |= d->mask;
+                else
+                        PKWR &= ~d->mask;
+                return 0;
+        }
 
         mux_taken = (PWER & d->mux_mask) & (~d->mask);
         if (on && mux_taken)
@@ -239,21 +249,25 @@ static int pxa27x_pkwr_gpio[] = {
 int keypad_set_wake(unsigned int on)
 {
         unsigned int i, gpio, mask = 0;
-
-        if (!on) {
-                PKWR = 0;
-                return 0;
-        }
+        struct gpio_desc *d;
 
         for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
 
                 gpio = pxa27x_pkwr_gpio[i];
+                d = &gpio_desc[gpio];
 
-                if (gpio_desc[gpio].config & MFP_LPM_CAN_WAKEUP)
+                /* skip if configured as generic GPIO */
+                if (MFP_AF(d->config) == 0)
+                        continue;
+
+                if (d->config & MFP_LPM_CAN_WAKEUP)
                         mask |= gpio_desc[gpio].mask;
         }
 
-        PKWR = mask;
+        if (on)
+                PKWR |= mask;
+        else
+                PKWR &= ~mask;
         return 0;
 }
 
@@ -328,6 +342,17 @@ static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
 {
         int i;
 
+        /* set corresponding PGSR bit of those marked MFP_LPM_KEEP_OUTPUT */
+        for (i = 0; i < pxa_last_gpio; i++) {
+                if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
+                    (GPDR(i) & GPIO_bit(i))) {
+                        if (GPLR(i) & GPIO_bit(i))
+                                PGSR(i) |= GPIO_bit(i);
+                        else
+                                PGSR(i) &= ~GPIO_bit(i);
+                }
+        }
+
         for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
 
                 saved_gafr[0][i] = GAFR_L(i);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 7a50ed8fce94..d60db87dde08 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -426,6 +426,7 @@ struct gpio_vbus_mach_info gpio_vbus_data = {
  * to give the card a chance to fully insert/eject.
  */
 static struct pxamci_platform_data mioa701_mci_info = {
+        .detect_delay_ms        = 250,
         .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
         .gpio_card_detect       = GPIO15_SDIO_INSERT,
         .gpio_card_ro           = GPIO78_SDIO_RO,
@@ -791,7 +792,6 @@ static void __init mioa701_machine_init(void)
         mio_gpio_request(ARRAY_AND_SIZE(global_gpios));
         bootstrap_init();
         set_pxa_fb_info(&mioa701_pxafb_info);
-        mioa701_mci_info.detect_delay = msecs_to_jiffies(250);
         pxa_set_mci_info(&mioa701_mci_info);
         pxa_set_keypad_info(&mioa701_keypad_info);
         wm97xx_bat_set_pdata(&mioa701_battery_data);
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
index 8c9c6f0d56bb..462167ac05f9 100644
--- a/arch/arm/mach-pxa/mxm8x10.c
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -325,7 +325,7 @@ static mfp_cfg_t mfp_cfg[] __initdata = {
 #if defined(CONFIG_MMC)
 static struct pxamci_platform_data mxm_8x10_mci_platform_data = {
         .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .detect_delay = 1,
+        .detect_delay_ms = 10,
         .gpio_card_detect = MXM_8X10_SD_nCD,
         .gpio_card_ro = MXM_8X10_SD_WP,
         .gpio_power = -1
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index f70c75b38769..1963819dba98 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -168,7 +168,7 @@ static struct pxamci_platform_data palmld_mci_platform_data = {
         .gpio_card_detect       = GPIO_NR_PALMLD_SD_DETECT_N,
         .gpio_card_ro           = GPIO_NR_PALMLD_SD_READONLY,
         .gpio_power             = GPIO_NR_PALMLD_SD_POWER,
-        .detect_delay           = 20,
+        .detect_delay_ms        = 200,
 };
 
 /******************************************************************************
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index d902a813aae3..5305a3993e69 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -110,7 +110,7 @@ static struct pxamci_platform_data palmt5_mci_platform_data = {
         .gpio_card_detect       = GPIO_NR_PALMT5_SD_DETECT_N,
         .gpio_card_ro           = GPIO_NR_PALMT5_SD_READONLY,
         .gpio_power             = GPIO_NR_PALMT5_SD_POWER,
-        .detect_delay           = 20,
+        .detect_delay_ms        = 200,
 };
 
 /******************************************************************************
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index 717d7a638675..033b567e50bb 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -121,7 +121,7 @@ static struct pxamci_platform_data palmtc_mci_platform_data = {
         .gpio_power             = GPIO_NR_PALMTC_SD_POWER,
         .gpio_card_ro           = GPIO_NR_PALMTC_SD_READONLY,
         .gpio_card_detect       = GPIO_NR_PALMTC_SD_DETECT_N,
-        .detect_delay           = 20,
+        .detect_delay_ms        = 200,
 };
 
 /******************************************************************************
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 007b58c11f8d..ecc1a401598e 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -170,7 +170,7 @@ static struct pxamci_platform_data palmtx_mci_platform_data = {
         .gpio_card_detect       = GPIO_NR_PALMTX_SD_DETECT_N,
         .gpio_card_ro           = GPIO_NR_PALMTX_SD_READONLY,
         .gpio_power             = GPIO_NR_PALMTX_SD_POWER,
-        .detect_delay           = 20,
+        .detect_delay_ms        = 200,
 };
 
 /******************************************************************************
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 9d0ecea1760c..f56ae1008759 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -326,7 +326,7 @@ static void pcm990_mci_exit(struct device *dev, void *data)
 #define MSECS_PER_JIFFY (1000/HZ)
 
 static struct pxamci_platform_data pcm990_mci_platform_data = {
-        .detect_delay           = 250 / MSECS_PER_JIFFY,
+        .detect_delay_ms        = 250,
         .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
         .init                   = pcm990_mci_init,
         .setpower               = pcm990_mci_setpower,
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index d58a52415d75..f4abdaafdac4 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -40,13 +40,12 @@
 #include <mach/pxa25x.h>
 #include <mach/mmc.h>
 #include <mach/udc.h>
-#include <plat/i2c.h>
 #include <mach/irda.h>
 #include <mach/poodle.h>
 #include <mach/pxafb.h>
 #include <mach/sharpsl.h>
-#include <mach/ssp.h>
 #include <mach/pxa2xx_spi.h>
+#include <plat/i2c.h>
 
 #include <asm/hardware/scoop.h>
 #include <asm/hardware/locomo.h>
@@ -277,6 +276,7 @@ static void poodle_mci_exit(struct device *dev, void *data)
 }
 
 static struct pxamci_platform_data poodle_mci_platform_data = {
+        .detect_delay_ms        = 250,
         .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
         .init                   = poodle_mci_init,
         .setpower               = poodle_mci_setpower,
@@ -450,7 +450,6 @@ static void __init poodle_init(void)
         set_pxa_fb_parent(&poodle_locomo_device.dev);
         set_pxa_fb_info(&poodle_fb_info);
         pxa_set_udc_info(&udc_info);
-        poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250);
         pxa_set_mci_info(&poodle_mci_platform_data);
         pxa_set_ficp_info(&poodle_ficp_platform_data);
         pxa_set_i2c_info(NULL);
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 4d7c03e72504..f544e58e1536 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -29,7 +29,6 @@
 #include <mach/ohci.h>
 #include <mach/pm.h>
 #include <mach/dma.h>
-#include <mach/ssp.h>
 #include <mach/regs-intc.h>
 #include <plat/i2c.h>
 
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 44bb675e47f1..d4b61b3f08f3 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -714,7 +714,7 @@ static void raumfeld_mci_exit(struct device *dev, void *data)
 static struct pxamci_platform_data raumfeld_mci_platform_data = {
         .init                   = raumfeld_mci_init,
         .exit                   = raumfeld_mci_exit,
-        .detect_delay           = 20,
+        .detect_delay_ms        = 200,
         .gpio_card_detect       = -1,
         .gpio_card_ro           = -1,
         .gpio_power             = -1,
@@ -983,7 +983,7 @@ static void __init raumfeld_common_init(void)
                 int i;
 
                 for (i = 0; i < ARRAY_SIZE(gpio_keys_button); i++)
-                        if (!strcmp(gpio_keys_button[i].desc, "on/off button"))
+                        if (!strcmp(gpio_keys_button[i].desc, "on_off button"))
                                 gpio_keys_button[i].active_low = 1;
         }
 
@@ -1009,8 +1009,7 @@ static void __init raumfeld_common_init(void)
                 gpio_direction_output(GPIO_W2W_PDN, 0);
 
         /* this can be used to switch off the device */
-        ret = gpio_request(GPIO_SHUTDOWN_SUPPLY,
-                                "supply shutdown");
+        ret = gpio_request(GPIO_SHUTDOWN_SUPPLY, "supply shutdown");
         if (ret < 0)
                 pr_warning("Unable to request GPIO_SHUTDOWN_SUPPLY\n");
         else
diff --git a/arch/arm/mach-pxa/sharpsl.h b/arch/arm/mach-pxa/sharpsl.h
index 1439785d3979..0cc1203c5bef 100644
--- a/arch/arm/mach-pxa/sharpsl.h
+++ b/arch/arm/mach-pxa/sharpsl.h
@@ -10,29 +10,6 @@
 #include <mach/sharpsl_pm.h>
 
 /*
- * SharpSL SSP Driver
- */
-struct corgissp_machinfo {
-        int port;
-        int cs_lcdcon;
-        int cs_ads7846;
-        int cs_max1111;
-        int clk_lcdcon;
-        int clk_ads7846;
-        int clk_max1111;
-};
-
-void corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo);
-
-
-/*
- * SharpSL/Corgi LCD Driver
- */
-void corgi_lcdtg_suspend(void);
-void corgi_lcdtg_hw_init(int mode);
-
-
-/*
  * SharpSL Battery/PM Driver
  */
 #define READ_GPIO_BIT(x)    (GPLR(x) & GPIO_bit(x))
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 463d874bb867..cb4767251f3c 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -28,7 +28,6 @@
 #include <asm/mach-types.h>
 #include <mach/pm.h>
 #include <mach/pxa2xx-regs.h>
-#include <mach/pxa2xx-gpio.h>
 #include <mach/regs-rtc.h>
 #include <mach/sharpsl.h>
 #include <mach/sharpsl_pm.h>
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 19b5109d9808..4d2413ed0ffa 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -86,6 +86,7 @@ static unsigned long spitz_pin_config[] __initdata = {
 
         /* GPIOs */
         GPIO9_GPIO,     /* SPITZ_GPIO_nSD_DETECT */
+        GPIO16_GPIO,    /* SPITZ_GPIO_SYNC */
         GPIO81_GPIO,    /* SPITZ_GPIO_nSD_WP */
         GPIO41_GPIO,    /* SPITZ_GPIO_USB_CONNECT */
         GPIO37_GPIO,    /* SPITZ_GPIO_USB_HOST */
@@ -119,7 +120,8 @@ static unsigned long spitz_pin_config[] __initdata = {
         GPIO117_I2C_SCL,
         GPIO118_I2C_SDA,
 
-        GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,
+        GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,       /* SPITZ_GPIO_KEY_INT */
+        GPIO1_GPIO | WAKEUP_ON_EDGE_FALL,       /* SPITZ_GPIO_RESET */
 };
 
 /*
@@ -363,7 +365,7 @@ static struct gpio_keys_button spitz_gpio_keys[] = {
                 .type   = EV_PWR,
                 .code   = KEY_SUSPEND,
                 .gpio   = SPITZ_GPIO_ON_KEY,
-                .desc   = "On/Off",
+                .desc   = "On Off",
                 .wakeup = 1,
         },
         /* Two buttons detecting the lid state */
@@ -537,6 +539,7 @@ static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
 }
 
 static struct pxamci_platform_data spitz_mci_platform_data = {
+        .detect_delay_ms        = 250,
         .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
         .setpower               = spitz_mci_setpower,
         .gpio_card_detect       = SPITZ_GPIO_nSD_DETECT,
@@ -757,7 +760,6 @@ static void __init common_init(void)
         spitz_init_spi();
 
         platform_add_devices(devices, ARRAY_SIZE(devices));
-        spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250);
         pxa_set_mci_info(&spitz_mci_platform_data);
         pxa_set_ohci_info(&spitz_ohci_platform_data);
         pxa_set_ficp_info(&spitz_ficp_platform_data);
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index fc5a70c40358..4209ddf6da61 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -24,9 +24,10 @@
 
 #include <mach/sharpsl.h>
 #include <mach/spitz.h>
-#include <mach/pxa2xx-regs.h>
-#include <mach/pxa2xx-gpio.h>
+#include <mach/pxa27x.h>
+
 #include "sharpsl.h"
+#include "generic.h"
 
 #define SHARPSL_CHARGE_ON_VOLT         0x99  /* 2.9V */
 #define SHARPSL_CHARGE_ON_TEMP         0xe0  /* 2.9V */
@@ -37,10 +38,17 @@
 
 static int spitz_last_ac_status;
 
+static struct gpio spitz_charger_gpios[] = {
+        { SPITZ_GPIO_KEY_INT,   GPIOF_IN, "Keyboard Interrupt" },
+        { SPITZ_GPIO_SYNC,      GPIOF_IN, "Sync" },
+        { SPITZ_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" },
+        { SPITZ_GPIO_JK_B,        GPIOF_OUT_INIT_LOW, "JK B" },
+        { SPITZ_GPIO_CHRG_ON,     GPIOF_OUT_INIT_LOW, "Charger On" },
+};
+
 static void spitz_charger_init(void)
 {
-        pxa_gpio_mode(SPITZ_GPIO_KEY_INT | GPIO_IN);
-        pxa_gpio_mode(SPITZ_GPIO_SYNC | GPIO_IN);
+        gpio_request_array(ARRAY_AND_SIZE(spitz_charger_gpios));
 }
 
 static void spitz_measure_temp(int on)
@@ -76,6 +84,11 @@ static void spitz_discharge1(int on)
         gpio_set_value(SPITZ_GPIO_LED_GREEN, on);
 }
 
+static unsigned long gpio18_config[] = {
+        GPIO18_RDY,
+        GPIO18_GPIO,
+};
+
 static void spitz_presuspend(void)
 {
         spitz_last_ac_status = sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN);
@@ -97,7 +110,9 @@ static void spitz_presuspend(void)
         PGSR3 &= ~SPITZ_GPIO_G3_STROBE_BIT;
         PGSR2 |= GPIO_bit(SPITZ_GPIO_KEY_STROBE0);
 
-        pxa_gpio_mode(GPIO18_RDY|GPIO_OUT | GPIO_DFLT_HIGH);
+        pxa2xx_mfp_config(&gpio18_config[0], 1);
+        gpio_request_one(18, GPIOF_OUT_INIT_HIGH, "Unknown");
+        gpio_free(18);
 
         PRER = GPIO_bit(SPITZ_GPIO_KEY_INT);
         PFER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET);
@@ -114,8 +129,7 @@ static void spitz_presuspend(void)
 
 static void spitz_postsuspend(void)
 {
-        pxa_gpio_mode(GPIO18_RDY_MD);
-        pxa_gpio_mode(10 | GPIO_IN);
+        pxa2xx_mfp_config(&gpio18_config[1], 1);
 }
 
 static int spitz_should_wakeup(unsigned int resume_on_alarm)
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c
deleted file mode 100644
index a81d6dbf662d..000000000000
--- a/arch/arm/mach-pxa/ssp.c
+++ /dev/null
@@ -1,510 +0,0 @@
-/*
- *  linux/arch/arm/mach-pxa/ssp.c
- *
- *  based on linux/arch/arm/mach-sa1100/ssp.c by Russell King
- *
- *  Copyright (C) 2003 Russell King.
- *  Copyright (C) 2003 Wolfson Microelectronics PLC
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- *  PXA2xx SSP driver.  This provides the generic core for simple
- *  IO-based SSP applications and allows easy port setup for DMA access.
- *
- *  Author: Liam Girdwood <liam.girdwood@wolfsonmicro.com>
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
-#include <linux/errno.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/init.h>
-#include <linux/mutex.h>
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-
-#include <asm/irq.h>
-#include <mach/hardware.h>
-#include <mach/ssp.h>
-#include <mach/regs-ssp.h>
-
-#ifdef CONFIG_PXA_SSP_LEGACY
-
-#define TIMEOUT 100000
-
-static irqreturn_t ssp_interrupt(int irq, void *dev_id)
-{
-        struct ssp_dev *dev = dev_id;
-        struct ssp_device *ssp = dev->ssp;
-        unsigned int status;
-
-        status = __raw_readl(ssp->mmio_base + SSSR);
-        __raw_writel(status, ssp->mmio_base + SSSR);
-
-        if (status & SSSR_ROR)
-                printk(KERN_WARNING "SSP(%d): receiver overrun\n", dev->port);
-
-        if (status & SSSR_TUR)
-                printk(KERN_WARNING "SSP(%d): transmitter underrun\n", dev->port);
-
-        if (status & SSSR_BCE)
-                printk(KERN_WARNING "SSP(%d): bit count error\n", dev->port);
-
-        return IRQ_HANDLED;
-}
-
-/**
- * ssp_write_word - write a word to the SSP port
- * @data: 32-bit, MSB justified data to write.
- *
- * Wait for a free entry in the SSP transmit FIFO, and write a data
- * word to the SSP port.
- *
- * The caller is expected to perform the necessary locking.
- *
- * Returns:
- *   %-ETIMEDOUT        timeout occurred
- *   0                  success
- */
-int ssp_write_word(struct ssp_dev *dev, u32 data)
-{
-        struct ssp_device *ssp = dev->ssp;
-        int timeout = TIMEOUT;
-
-        while (!(__raw_readl(ssp->mmio_base + SSSR) & SSSR_TNF)) {
-                if (!--timeout)
-                        return -ETIMEDOUT;
-                cpu_relax();
-        }
-
-        __raw_writel(data, ssp->mmio_base + SSDR);
-
-        return 0;
-}
-
-/**
- * ssp_read_word - read a word from the SSP port
- *
- * Wait for a data word in the SSP receive FIFO, and return the
- * received data.  Data is LSB justified.
- *
- * Note: Currently, if data is not expected to be received, this
- * function will wait for ever.
- *
- * The caller is expected to perform the necessary locking.
- *
- * Returns:
- *   %-ETIMEDOUT        timeout occurred
- *   32-bit data        success
- */
-int ssp_read_word(struct ssp_dev *dev, u32 *data)
-{
-        struct ssp_device *ssp = dev->ssp;
-        int timeout = TIMEOUT;
-
-        while (!(__raw_readl(ssp->mmio_base + SSSR) & SSSR_RNE)) {
-                if (!--timeout)
-                        return -ETIMEDOUT;
-                cpu_relax();
-        }
-
-        *data = __raw_readl(ssp->mmio_base + SSDR);
-        return 0;
-}
-
-/**
- * ssp_flush - flush the transmit and receive FIFOs
- *
- * Wait for the SSP to idle, and ensure that the receive FIFO
- * is empty.
- *
- * The caller is expected to perform the necessary locking.
- */
-int ssp_flush(struct ssp_dev *dev)
-{
-        struct ssp_device *ssp = dev->ssp;
-        int timeout = TIMEOUT * 2;
-
-        /* ensure TX FIFO is empty instead of not full */
-        if (cpu_is_pxa3xx()) {
-                while (__raw_readl(ssp->mmio_base + SSSR) & 0xf00) {
-                        if (!--timeout)
-                                return -ETIMEDOUT;
-                        cpu_relax();
-                }
-                timeout = TIMEOUT * 2;
-        }
-
-        do {
-                while (__raw_readl(ssp->mmio_base + SSSR) & SSSR_RNE) {
-                        if (!--timeout)
-                                return -ETIMEDOUT;
-                        (void)__raw_readl(ssp->mmio_base + SSDR);
-                }
-                if (!--timeout)
-                        return -ETIMEDOUT;
-        } while (__raw_readl(ssp->mmio_base + SSSR) & SSSR_BSY);
-
-        return 0;
-}
-
-/**
- * ssp_enable - enable the SSP port
- *
- * Turn on the SSP port.
- */
-void ssp_enable(struct ssp_dev *dev)
-{
-        struct ssp_device *ssp = dev->ssp;
-        uint32_t sscr0;
-
-        sscr0 = __raw_readl(ssp->mmio_base + SSCR0);
-        sscr0 |= SSCR0_SSE;
-        __raw_writel(sscr0, ssp->mmio_base + SSCR0);
-}
-
-/**
- * ssp_disable - shut down the SSP port
- *
- * Turn off the SSP port, optionally powering it down.
- */
-void ssp_disable(struct ssp_dev *dev)
-{
-        struct ssp_device *ssp = dev->ssp;
-        uint32_t sscr0;
-
-        sscr0 = __raw_readl(ssp->mmio_base + SSCR0);
-        sscr0 &= ~SSCR0_SSE;
-        __raw_writel(sscr0, ssp->mmio_base + SSCR0);
-}
-
-/**
- * ssp_save_state - save the SSP configuration
- * @ssp: pointer to structure to save SSP configuration
- *
- * Save the configured SSP state for suspend.
- */
-void ssp_save_state(struct ssp_dev *dev, struct ssp_state *state)
-{
-        struct ssp_device *ssp = dev->ssp;
-
-        state->cr0 = __raw_readl(ssp->mmio_base + SSCR0);
-        state->cr1 = __raw_readl(ssp->mmio_base + SSCR1);
-        state->to  = __raw_readl(ssp->mmio_base + SSTO);
-        state->psp = __raw_readl(ssp->mmio_base + SSPSP);
-
-        ssp_disable(dev);
-}
-
-/**
- * ssp_restore_state - restore a previously saved SSP configuration
- * @ssp: pointer to configuration saved by ssp_save_state
- *
- * Restore the SSP configuration saved previously by ssp_save_state.
- */
-void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *state)
-{
-        struct ssp_device *ssp = dev->ssp;
-        uint32_t sssr = SSSR_ROR | SSSR_TUR | SSSR_BCE;
-
-        __raw_writel(sssr, ssp->mmio_base + SSSR);
-
-        __raw_writel(state->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0);
-        __raw_writel(state->cr1, ssp->mmio_base + SSCR1);
-        __raw_writel(state->to,  ssp->mmio_base + SSTO);
-        __raw_writel(state->psp, ssp->mmio_base + SSPSP);
-        __raw_writel(state->cr0, ssp->mmio_base + SSCR0);
-}
-
-/**
- * ssp_config - configure SSP port settings
- * @mode: port operating mode
- * @flags: port config flags
- * @psp_flags: port PSP config flags
- * @speed: port speed
- *
- * Port MUST be disabled by ssp_disable before making any config changes.
- */
-int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed)
-{
-        struct ssp_device *ssp = dev->ssp;
-
-        dev->mode = mode;
-        dev->flags = flags;
-        dev->psp_flags = psp_flags;
-        dev->speed = speed;
-
-        /* set up port type, speed, port settings */
-        __raw_writel((dev->speed | dev->mode), ssp->mmio_base + SSCR0);
-        __raw_writel(dev->flags, ssp->mmio_base + SSCR1);
-        __raw_writel(dev->psp_flags, ssp->mmio_base + SSPSP);
-
-        return 0;
-}
-
-/**
- * ssp_init - setup the SSP port
- *
- * initialise and claim resources for the SSP port.
- *
- * Returns:
- *   %-ENODEV   if the SSP port is unavailable
- *   %-EBUSY    if the resources are already in use
- *   %0         on success
- */
-int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags)
-{
-        struct ssp_device *ssp;
-        int ret;
-
-        ssp = ssp_request(port, "SSP");
-        if (ssp == NULL)
-                return -ENODEV;
-
-        dev->ssp = ssp;
-        dev->port = port;
-
-        /* do we need to get irq */
-        if (!(init_flags & SSP_NO_IRQ)) {
-                ret = request_irq(ssp->irq, ssp_interrupt,
-                                0, "SSP", dev);
-                if (ret)
-                        goto out_region;
-                dev->irq = ssp->irq;
-        } else
-                dev->irq = NO_IRQ;
-
-        /* turn on SSP port clock */
-        clk_enable(ssp->clk);
-        return 0;
-
-out_region:
-        ssp_free(ssp);
-        return ret;
-}
-
-/**
- * ssp_exit - undo the effects of ssp_init
- *
- * release and free resources for the SSP port.
- */
-void ssp_exit(struct ssp_dev *dev)
-{
-        struct ssp_device *ssp = dev->ssp;
-
-        ssp_disable(dev);
-        if (dev->irq != NO_IRQ)
-                free_irq(dev->irq, dev);
-        clk_disable(ssp->clk);
-        ssp_free(ssp);
-}
-#endif /* CONFIG_PXA_SSP_LEGACY */
-
-static DEFINE_MUTEX(ssp_lock);
-static LIST_HEAD(ssp_list);
-
-struct ssp_device *ssp_request(int port, const char *label)
-{
-        struct ssp_device *ssp = NULL;
-
-        mutex_lock(&ssp_lock);
-
-        list_for_each_entry(ssp, &ssp_list, node) {
-                if (ssp->port_id == port && ssp->use_count == 0) {
-                        ssp->use_count++;
-                        ssp->label = label;
-                        break;
-                }
-        }
-
-        mutex_unlock(&ssp_lock);
-
-        if (&ssp->node == &ssp_list)
-                return NULL;
-
-        return ssp;
-}
-EXPORT_SYMBOL(ssp_request);
-
-void ssp_free(struct ssp_device *ssp)
-{
-        mutex_lock(&ssp_lock);
-        if (ssp->use_count) {
-                ssp->use_count--;
-                ssp->label = NULL;
-        } else
-                dev_err(&ssp->pdev->dev, "device already free\n");
-        mutex_unlock(&ssp_lock);
-}
-EXPORT_SYMBOL(ssp_free);
-
-static int __devinit ssp_probe(struct platform_device *pdev)
-{
-        const struct platform_device_id *id = platform_get_device_id(pdev);
-        struct resource *res;
-        struct ssp_device *ssp;
-        int ret = 0;
-
-        ssp = kzalloc(sizeof(struct ssp_device), GFP_KERNEL);
-        if (ssp == NULL) {
-                dev_err(&pdev->dev, "failed to allocate memory");
-                return -ENOMEM;
-        }
-        ssp->pdev = pdev;
-
-        ssp->clk = clk_get(&pdev->dev, NULL);
-        if (IS_ERR(ssp->clk)) {
-                ret = PTR_ERR(ssp->clk);
-                goto err_free;
-        }
-
-        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        if (res == NULL) {
-                dev_err(&pdev->dev, "no memory resource defined\n");
-                ret = -ENODEV;
-                goto err_free_clk;
-        }
-
-        res = request_mem_region(res->start, res->end - res->start + 1,
-                        pdev->name);
-        if (res == NULL) {
-                dev_err(&pdev->dev, "failed to request memory resource\n");
-                ret = -EBUSY;
-                goto err_free_clk;
-        }
-
-        ssp->phys_base = res->start;
-
-        ssp->mmio_base = ioremap(res->start, res->end - res->start + 1);
-        if (ssp->mmio_base == NULL) {
-                dev_err(&pdev->dev, "failed to ioremap() registers\n");
-                ret = -ENODEV;
-                goto err_free_mem;
-        }
-
-        ssp->irq = platform_get_irq(pdev, 0);
-        if (ssp->irq < 0) {
-                dev_err(&pdev->dev, "no IRQ resource defined\n");
-                ret = -ENODEV;
-                goto err_free_io;
-        }
-
-        res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
-        if (res == NULL) {
-                dev_err(&pdev->dev, "no SSP RX DRCMR defined\n");
-                ret = -ENODEV;
-                goto err_free_io;
-        }
-        ssp->drcmr_rx = res->start;
-
-        res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
-        if (res == NULL) {
-                dev_err(&pdev->dev, "no SSP TX DRCMR defined\n");
-                ret = -ENODEV;
-                goto err_free_io;
-        }
-        ssp->drcmr_tx = res->start;
-
-        /* PXA2xx/3xx SSP ports starts from 1 and the internal pdev->id
-         * starts from 0, do a translation here
-         */
-        ssp->port_id = pdev->id + 1;
-        ssp->use_count = 0;
-        ssp->type = (int)id->driver_data;
-
-        mutex_lock(&ssp_lock);
-        list_add(&ssp->node, &ssp_list);
-        mutex_unlock(&ssp_lock);
-
-        platform_set_drvdata(pdev, ssp);
-        return 0;
-
-err_free_io:
-        iounmap(ssp->mmio_base);
-err_free_mem:
-        release_mem_region(res->start, res->end - res->start + 1);
-err_free_clk:
-        clk_put(ssp->clk);
-err_free:
-        kfree(ssp);
-        return ret;
-}
-
-static int __devexit ssp_remove(struct platform_device *pdev)
-{
-        struct resource *res;
-        struct ssp_device *ssp;
-
-        ssp = platform_get_drvdata(pdev);
-        if (ssp == NULL)
-                return -ENODEV;
-
-        iounmap(ssp->mmio_base);
-
-        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        release_mem_region(res->start, res->end - res->start + 1);
-
-        clk_put(ssp->clk);
-
-        mutex_lock(&ssp_lock);
-        list_del(&ssp->node);
-        mutex_unlock(&ssp_lock);
-
-        kfree(ssp);
-        return 0;
-}
-
-static const struct platform_device_id ssp_id_table[] = {
-        { "pxa25x-ssp",         PXA25x_SSP },
-        { "pxa25x-nssp",        PXA25x_NSSP },
-        { "pxa27x-ssp",         PXA27x_SSP },
-        { },
-};
-
-static struct platform_driver ssp_driver = {
-        .probe          = ssp_probe,
-        .remove         = __devexit_p(ssp_remove),
-        .driver         = {
-                .owner  = THIS_MODULE,
-                .name   = "pxa2xx-ssp",
-        },
-        .id_table       = ssp_id_table,
-};
-
-static int __init pxa_ssp_init(void)
-{
-        return platform_driver_register(&ssp_driver);
-}
-
-static void __exit pxa_ssp_exit(void)
-{
-        platform_driver_unregister(&ssp_driver);
-}
-
-arch_initcall(pxa_ssp_init);
-module_exit(pxa_ssp_exit);
-
-#ifdef CONFIG_PXA_SSP_LEGACY
-EXPORT_SYMBOL(ssp_write_word);
-EXPORT_SYMBOL(ssp_read_word);
-EXPORT_SYMBOL(ssp_flush);
-EXPORT_SYMBOL(ssp_enable);
-EXPORT_SYMBOL(ssp_disable);
-EXPORT_SYMBOL(ssp_save_state);
-EXPORT_SYMBOL(ssp_restore_state);
-EXPORT_SYMBOL(ssp_init);
-EXPORT_SYMBOL(ssp_exit);
-EXPORT_SYMBOL(ssp_config);
-#endif
-
-MODULE_DESCRIPTION("PXA SSP driver");
-MODULE_AUTHOR("Liam Girdwood");
-MODULE_LICENSE("GPL");
-
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 2041eb1d90ba..af40d2a12d37 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -464,8 +464,6 @@ static struct platform_device smc91x_device = {
 
 
 
-static struct pxamci_platform_data stargate2_mci_platform_data;
-
 /*
  * The card detect interrupt isn't debounced so we delay it by 250ms
  * to give the card a chance to fully insert / eject.
@@ -489,8 +487,6 @@ static int stargate2_mci_init(struct device *dev,
                 goto free_power_en;
         }
         gpio_direction_input(SG2_GPIO_nSD_DETECT);
-        /* Delay to allow for full insertion */
-        stargate2_mci_platform_data.detect_delay = msecs_to_jiffies(250);
 
         err = request_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT),
                           stargate2_detect_int,
@@ -529,6 +525,7 @@ static void stargate2_mci_exit(struct device *dev, void *data)
 }
 
 static struct pxamci_platform_data stargate2_mci_platform_data = {
+        .detect_delay_ms = 250,
         .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
         .init = stargate2_mci_init,
         .setpower = stargate2_mci_setpower,
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index ad552791c4ce..7512b822c6ca 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -275,6 +275,7 @@ static void tosa_mci_exit(struct device *dev, void *data)
 }
 
 static struct pxamci_platform_data tosa_mci_platform_data = {
+        .detect_delay_ms        = 250,
         .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
         .init                   = tosa_mci_init,
         .exit                   = tosa_mci_exit,
@@ -926,7 +927,6 @@ static void __init tosa_init(void)
         dummy = gpiochip_reserve(TOSA_SCOOP_JC_GPIO_BASE, 12);
         dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16);
 
-        tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250);
         pxa_set_mci_info(&tosa_mci_platform_data);
         pxa_set_udc_info(&udc_info);
         pxa_set_ficp_info(&tosa_ficp_platform_data);
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 797f2544d0ce..69689112eae7 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -349,7 +349,7 @@ static void trizeps4_mci_exit(struct device *dev, void *data)
 
 static struct pxamci_platform_data trizeps4_mci_platform_data = {
         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
-        .detect_delay   = 1,
+        .detect_delay_ms= 10,
         .init           = trizeps4_mci_init,
         .exit           = trizeps4_mci_exit,
         .get_ro         = NULL, /* write-protection not supported */
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 9e0c5c3988a1..e90114a7e246 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -34,6 +34,7 @@
 #include <linux/pm.h>
 #include <linux/sched.h>
 #include <linux/gpio.h>
+#include <linux/jiffies.h>
 #include <linux/i2c-gpio.h>
 #include <linux/serial_8250.h>
 #include <linux/smc91x.h>
@@ -454,7 +455,7 @@ static struct i2c_gpio_platform_data i2c_bus_data = {
         .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
         .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
         .udelay  = 10,
-        .timeout = 100,
+        .timeout = HZ,
 };
 
 static struct platform_device i2c_bus_device = {
@@ -779,7 +780,7 @@ static void __init viper_tpm_init(void)
                 .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
                 .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
                 .udelay  = 10,
-                .timeout = 100,
+                .timeout = HZ,
         };
         char *errstr;
 
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
new file mode 100644
index 000000000000..9884fa978f16
--- /dev/null
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -0,0 +1,615 @@
+/*
+ * Hardware definitions for Voipac PXA270
+ *
+ * Copyright (C) 2010
+ * Marek Vasut <marek.vasut@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/gpio.h>
+#include <linux/sysdev.h>
+#include <linux/usb/gpio_vbus.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/onenand.h>
+#include <linux/dm9000.h>
+#include <linux/ucb1400.h>
+#include <linux/ata_platform.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/pxa27x.h>
+#include <mach/audio.h>
+#include <mach/vpac270.h>
+#include <mach/mmc.h>
+#include <mach/pxafb.h>
+#include <mach/ohci.h>
+#include <mach/pxa27x-udc.h>
+#include <mach/udc.h>
+
+#include <plat/i2c.h>
+
+#include "generic.h"
+#include "devices.h"
+
+/******************************************************************************
+ * Pin configuration
+ ******************************************************************************/
+static unsigned long vpac270_pin_config[] __initdata = {
+        /* MMC */
+        GPIO32_MMC_CLK,
+        GPIO92_MMC_DAT_0,
+        GPIO109_MMC_DAT_1,
+        GPIO110_MMC_DAT_2,
+        GPIO111_MMC_DAT_3,
+        GPIO112_MMC_CMD,
+        GPIO53_GPIO,    /* SD detect */
+        GPIO52_GPIO,    /* SD r/o switch */
+
+        /* GPIO KEYS */
+        GPIO1_GPIO,     /* USER BTN */
+
+        /* LEDs */
+        GPIO15_GPIO,    /* orange led */
+
+        /* FFUART */
+        GPIO34_FFUART_RXD,
+        GPIO39_FFUART_TXD,
+        GPIO27_FFUART_RTS,
+        GPIO100_FFUART_CTS,
+        GPIO33_FFUART_DSR,
+        GPIO40_FFUART_DTR,
+        GPIO10_FFUART_DCD,
+        GPIO38_FFUART_RI,
+
+        /* LCD */
+        GPIO58_LCD_LDD_0,
+        GPIO59_LCD_LDD_1,
+        GPIO60_LCD_LDD_2,
+        GPIO61_LCD_LDD_3,
+        GPIO62_LCD_LDD_4,
+        GPIO63_LCD_LDD_5,
+        GPIO64_LCD_LDD_6,
+        GPIO65_LCD_LDD_7,
+        GPIO66_LCD_LDD_8,
+        GPIO67_LCD_LDD_9,
+        GPIO68_LCD_LDD_10,
+        GPIO69_LCD_LDD_11,
+        GPIO70_LCD_LDD_12,
+        GPIO71_LCD_LDD_13,
+        GPIO72_LCD_LDD_14,
+        GPIO73_LCD_LDD_15,
+        GPIO86_LCD_LDD_16,
+        GPIO87_LCD_LDD_17,
+        GPIO74_LCD_FCLK,
+        GPIO75_LCD_LCLK,
+        GPIO76_LCD_PCLK,
+        GPIO77_LCD_BIAS,
+
+        /* PCMCIA */
+        GPIO48_nPOE,
+        GPIO49_nPWE,
+        GPIO50_nPIOR,
+        GPIO51_nPIOW,
+        GPIO85_nPCE_1,
+        GPIO54_nPCE_2,
+        GPIO55_nPREG,
+        GPIO57_nIOIS16,
+        GPIO56_nPWAIT,
+        GPIO104_PSKTSEL,
+        GPIO84_GPIO,    /* PCMCIA CD */
+        GPIO35_GPIO,    /* PCMCIA RDY */
+        GPIO107_GPIO,   /* PCMCIA PPEN */
+        GPIO11_GPIO,    /* PCMCIA RESET */
+        GPIO17_GPIO,    /* CF CD */
+        GPIO12_GPIO,    /* CF RDY */
+        GPIO16_GPIO,    /* CF RESET */
+
+        /* UHC */
+        GPIO88_USBH1_PWR,
+        GPIO89_USBH1_PEN,
+        GPIO119_USBH2_PWR,
+        GPIO120_USBH2_PEN,
+
+        /* UDC */
+        GPIO41_GPIO,
+
+        /* Ethernet */
+        GPIO114_GPIO,   /* IRQ */
+
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+        GPIO95_AC97_nRESET,
+        GPIO98_AC97_SYSCLK,
+        GPIO113_GPIO,   /* TS IRQ */
+
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
+
+        /* IDE */
+        GPIO36_GPIO,    /* IDE IRQ */
+        GPIO80_DREQ_1,
+};
+
+/******************************************************************************
+ * NOR Flash
+ ******************************************************************************/
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+static struct mtd_partition vpac270_nor_partitions[] = {
+        {
+                .name           = "Flash",
+                .offset         = 0x00000000,
+                .size           = MTDPART_SIZ_FULL,
+        }
+};
+
+static struct physmap_flash_data vpac270_flash_data[] = {
+        {
+                .width          = 2,    /* bankwidth in bytes */
+                .parts          = vpac270_nor_partitions,
+                .nr_parts       = ARRAY_SIZE(vpac270_nor_partitions)
+        }
+};
+
+static struct resource vpac270_flash_resource = {
+        .start  = PXA_CS0_PHYS,
+        .end    = PXA_CS0_PHYS + SZ_64M - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+static struct platform_device vpac270_flash = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .resource       = &vpac270_flash_resource,
+        .num_resources  = 1,
+        .dev            = {
+                .platform_data = vpac270_flash_data,
+        },
+};
+static void __init vpac270_nor_init(void)
+{
+        platform_device_register(&vpac270_flash);
+}
+#else
+static inline void vpac270_nor_init(void) {}
+#endif
+
+/******************************************************************************
+ * OneNAND Flash
+ ******************************************************************************/
+#if defined(CONFIG_MTD_ONENAND) || defined(CONFIG_MTD_ONENAND_MODULE)
+static struct mtd_partition vpac270_onenand_partitions[] = {
+        {
+                .name           = "Flash",
+                .offset         = 0x00000000,
+                .size           = MTDPART_SIZ_FULL,
+        }
+};
+
+static struct onenand_platform_data vpac270_onenand_info = {
+        .parts          = vpac270_onenand_partitions,
+        .nr_parts       = ARRAY_SIZE(vpac270_onenand_partitions),
+};
+
+static struct resource vpac270_onenand_resources[] = {
+        [0] = {
+                .start  = PXA_CS0_PHYS,
+                .end    = PXA_CS0_PHYS + SZ_1M,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device vpac270_onenand = {
+        .name           = "onenand-flash",
+        .id             = -1,
+        .resource       = vpac270_onenand_resources,
+        .num_resources  = ARRAY_SIZE(vpac270_onenand_resources),
+        .dev            = {
+                .platform_data  = &vpac270_onenand_info,
+        },
+};
+
+static void __init vpac270_onenand_init(void)
+{
+        platform_device_register(&vpac270_onenand);
+}
+#else
+static void __init vpac270_onenand_init(void) {}
+#endif
+
+/******************************************************************************
+ * SD/MMC card controller
+ ******************************************************************************/
+#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
+static struct pxamci_platform_data vpac270_mci_platform_data = {
+        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .gpio_card_detect       = GPIO53_VPAC270_SD_DETECT_N,
+        .gpio_card_ro           = GPIO52_VPAC270_SD_READONLY,
+        .detect_delay_ms        = 200,
+};
+
+static void __init vpac270_mmc_init(void)
+{
+        pxa_set_mci_info(&vpac270_mci_platform_data);
+}
+#else
+static inline void vpac270_mmc_init(void) {}
+#endif
+
+/******************************************************************************
+ * GPIO keys
+ ******************************************************************************/
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+static struct gpio_keys_button vpac270_pxa_buttons[] = {
+        {KEY_POWER, GPIO1_VPAC270_USER_BTN, 0, "USER BTN"},
+};
+
+static struct gpio_keys_platform_data vpac270_pxa_keys_data = {
+        .buttons        = vpac270_pxa_buttons,
+        .nbuttons       = ARRAY_SIZE(vpac270_pxa_buttons),
+};
+
+static struct platform_device vpac270_pxa_keys = {
+        .name   = "gpio-keys",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &vpac270_pxa_keys_data,
+        },
+};
+
+static void __init vpac270_keys_init(void)
+{
+        platform_device_register(&vpac270_pxa_keys);
+}
+#else
+static inline void vpac270_keys_init(void) {}
+#endif
+
+/******************************************************************************
+ * LED
+ ******************************************************************************/
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+struct gpio_led vpac270_gpio_leds[] = {
+{
+        .name                   = "vpac270:orange:user",
+        .default_trigger        = "none",
+        .gpio                   = GPIO15_VPAC270_LED_ORANGE,
+        .active_low             = 1,
+}
+};
+
+static struct gpio_led_platform_data vpac270_gpio_led_info = {
+        .leds           = vpac270_gpio_leds,
+        .num_leds       = ARRAY_SIZE(vpac270_gpio_leds),
+};
+
+static struct platform_device vpac270_leds = {
+        .name   = "leds-gpio",
+        .id     = -1,
+        .dev    = {
+                .platform_data  = &vpac270_gpio_led_info,
+        }
+};
+
+static void __init vpac270_leds_init(void)
+{
+        platform_device_register(&vpac270_leds);
+}
+#else
+static inline void vpac270_leds_init(void) {}
+#endif
+
+/******************************************************************************
+ * USB Host
+ ******************************************************************************/
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
+static int vpac270_ohci_init(struct device *dev)
+{
+        UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
+        return 0;
+}
+
+static struct pxaohci_platform_data vpac270_ohci_info = {
+        .port_mode      = PMM_PERPORT_MODE,
+        .flags          = ENABLE_PORT1 | ENABLE_PORT2 |
+                        POWER_CONTROL_LOW | POWER_SENSE_LOW,
+        .init           = vpac270_ohci_init,
+};
+
+static void __init vpac270_uhc_init(void)
+{
+        pxa_set_ohci_info(&vpac270_ohci_info);
+}
+#else
+static inline void vpac270_uhc_init(void) {}
+#endif
+
+/******************************************************************************
+ * USB Gadget
+ ******************************************************************************/
+#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+static struct gpio_vbus_mach_info vpac270_gpio_vbus_info = {
+        .gpio_vbus              = GPIO41_VPAC270_UDC_DETECT,
+        .gpio_pullup            = -1,
+};
+
+static struct platform_device vpac270_gpio_vbus = {
+        .name   = "gpio-vbus",
+        .id     = -1,
+        .dev    = {
+                .platform_data  = &vpac270_gpio_vbus_info,
+        },
+};
+
+static void vpac270_udc_command(int cmd)
+{
+        if (cmd == PXA2XX_UDC_CMD_CONNECT)
+                UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE;
+        else if (cmd == PXA2XX_UDC_CMD_DISCONNECT)
+                UP2OCR = UP2OCR_HXOE;
+}
+
+static struct pxa2xx_udc_mach_info vpac270_udc_info __initdata = {
+        .udc_command            = vpac270_udc_command,
+        .gpio_pullup            = -1,
+};
+
+static void __init vpac270_udc_init(void)
+{
+        pxa_set_udc_info(&vpac270_udc_info);
+        platform_device_register(&vpac270_gpio_vbus);
+}
+#else
+static inline void vpac270_udc_init(void) {}
+#endif
+
+/******************************************************************************
+ * Ethernet
+ ******************************************************************************/
+#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
+static struct resource vpac270_dm9000_resources[] = {
+        [0] = {
+                .start  = PXA_CS2_PHYS + 0x300,
+                .end    = PXA_CS2_PHYS + 0x303,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = PXA_CS2_PHYS + 0x304,
+                .end    = PXA_CS2_PHYS + 0x343,
+                .flags  = IORESOURCE_MEM,
+        },
+        [2] = {
+                .start  = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ),
+                .end    = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ),
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
+        },
+};
+
+static struct dm9000_plat_data vpac270_dm9000_platdata = {
+        .flags          = DM9000_PLATF_32BITONLY,
+};
+
+static struct platform_device vpac270_dm9000_device = {
+        .name           = "dm9000",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(vpac270_dm9000_resources),
+        .resource       = vpac270_dm9000_resources,
+        .dev            = {
+                .platform_data = &vpac270_dm9000_platdata,
+        }
+};
+
+static void __init vpac270_eth_init(void)
+{
+        platform_device_register(&vpac270_dm9000_device);
+}
+#else
+static inline void vpac270_eth_init(void) {}
+#endif
+
+/******************************************************************************
+ * Audio and Touchscreen
+ ******************************************************************************/
+#if     defined(CONFIG_TOUCHSCREEN_UCB1400) || \
+        defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
+static pxa2xx_audio_ops_t vpac270_ac97_pdata = {
+        .reset_gpio     = 95,
+};
+
+static struct ucb1400_pdata vpac270_ucb1400_pdata = {
+        .irq            = IRQ_GPIO(GPIO113_VPAC270_TS_IRQ),
+};
+
+static struct platform_device vpac270_ucb1400_device = {
+        .name           = "ucb1400_core",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &vpac270_ucb1400_pdata,
+        },
+};
+
+static void __init vpac270_ts_init(void)
+{
+        pxa_set_ac97_info(&vpac270_ac97_pdata);
+        platform_device_register(&vpac270_ucb1400_device);
+}
+#else
+static inline void vpac270_ts_init(void) {}
+#endif
+
+/******************************************************************************
+ * RTC
+ ******************************************************************************/
+#if defined(CONFIG_RTC_DRV_DS1307) || defined(CONFIG_RTC_DRV_DS1307_MODULE)
+static struct i2c_board_info __initdata vpac270_i2c_devs[] = {
+        {
+                I2C_BOARD_INFO("ds1339", 0x68),
+        },
+};
+
+static void __init vpac270_rtc_init(void)
+{
+        pxa_set_i2c_info(NULL);
+        i2c_register_board_info(0, ARRAY_AND_SIZE(vpac270_i2c_devs));
+}
+#else
+static inline void vpac270_rtc_init(void) {}
+#endif
+
+/******************************************************************************
+ * Framebuffer
+ ******************************************************************************/
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
+static struct pxafb_mode_info vpac270_lcd_modes[] = {
+{
+        .pixclock       = 57692,
+        .xres           = 640,
+        .yres           = 480,
+        .bpp            = 32,
+        .depth          = 18,
+
+        .left_margin    = 144,
+        .right_margin   = 32,
+        .upper_margin   = 13,
+        .lower_margin   = 30,
+
+        .hsync_len      = 32,
+        .vsync_len      = 2,
+
+        .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+},
+};
+
+static struct pxafb_mach_info vpac270_lcd_screen = {
+        .modes          = vpac270_lcd_modes,
+        .num_modes      = ARRAY_SIZE(vpac270_lcd_modes),
+        .lcd_conn       = LCD_COLOR_TFT_18BPP,
+};
+
+static void vpac270_lcd_power(int on, struct fb_var_screeninfo *info)
+{
+        gpio_set_value(GPIO81_VPAC270_BKL_ON, on);
+}
+
+static void __init vpac270_lcd_init(void)
+{
+        int ret;
+
+        ret = gpio_request(GPIO81_VPAC270_BKL_ON, "BKL-ON");
+        if (ret) {
+                pr_err("Requesting BKL-ON GPIO failed!\n");
+                goto err;
+        }
+
+        ret = gpio_direction_output(GPIO81_VPAC270_BKL_ON, 1);
+        if (ret) {
+                pr_err("Setting BKL-ON GPIO direction failed!\n");
+                goto err2;
+        }
+
+        vpac270_lcd_screen.pxafb_lcd_power = vpac270_lcd_power;
+        set_pxa_fb_info(&vpac270_lcd_screen);
+        return;
+
+err2:
+        gpio_free(GPIO81_VPAC270_BKL_ON);
+err:
+        return;
+}
+#else
+static inline void vpac270_lcd_init(void) {}
+#endif
+
+/******************************************************************************
+ * PATA IDE
+ ******************************************************************************/
+#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
+static struct pata_platform_info vpac270_pata_pdata = {
+        .ioport_shift   = 1,
+        .irq_flags      = IRQF_TRIGGER_RISING,
+};
+
+static struct resource vpac270_ide_resources[] = {
+        [0] = { /* I/O Base address */
+               .start   = PXA_CS3_PHYS + 0x120,
+               .end     = PXA_CS3_PHYS + 0x13f,
+               .flags   = IORESOURCE_MEM
+        },
+        [1] = { /* CTL Base address */
+               .start   = PXA_CS3_PHYS + 0x15c,
+               .end     = PXA_CS3_PHYS + 0x15f,
+               .flags   = IORESOURCE_MEM
+        },
+        [2] = { /* IDE IRQ pin */
+               .start   = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ),
+               .end     = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ),
+               .flags   = IORESOURCE_IRQ
+        }
+};
+
+static struct platform_device vpac270_ide_device = {
+        .name           = "pata_platform",
+        .num_resources  = ARRAY_SIZE(vpac270_ide_resources),
+        .resource       = vpac270_ide_resources,
+        .dev            = {
+                .platform_data  = &vpac270_pata_pdata,
+        }
+};
+
+static void __init vpac270_ide_init(void)
+{
+        platform_device_register(&vpac270_ide_device);
+}
+#else
+static inline void vpac270_ide_init(void) {}
+#endif
+
+/******************************************************************************
+ * Machine init
+ ******************************************************************************/
+static void __init vpac270_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(vpac270_pin_config));
+
+        pxa_set_ffuart_info(NULL);
+        pxa_set_btuart_info(NULL);
+        pxa_set_stuart_info(NULL);
+
+        vpac270_lcd_init();
+        vpac270_mmc_init();
+        vpac270_nor_init();
+        vpac270_onenand_init();
+        vpac270_leds_init();
+        vpac270_keys_init();
+        vpac270_uhc_init();
+        vpac270_udc_init();
+        vpac270_eth_init();
+        vpac270_ts_init();
+        vpac270_rtc_init();
+        vpac270_ide_init();
+}
+
+MACHINE_START(VPAC270, "Voipac PXA270")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa27x_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = vpac270_init
+MACHINE_END
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
new file mode 100644
index 000000000000..f5d1ae3db3a4
--- /dev/null
+++ b/arch/arm/mach-pxa/z2.c
@@ -0,0 +1,609 @@
+/*
+ *  linux/arch/arm/mach-pxa/z2.c
+ *
+ *  Support for the Zipit Z2 Handheld device.
+ *
+ *  Author:     Ken McGuire
+ *  Created:    Jan 25, 2009
+ *  Based on mainstone.c as modified for the Zipit Z2.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/pwm_backlight.h>
+#include <linux/dma-mapping.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/libertas_spi.h>
+#include <linux/spi/lms283gf05.h>
+#include <linux/power_supply.h>
+#include <linux/mtd/physmap.h>
+#include <linux/gpio.h>
+#include <linux/gpio_keys.h>
+#include <linux/delay.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/pxa27x.h>
+#include <mach/mfp-pxa27x.h>
+#include <mach/z2.h>
+#include <mach/pxafb.h>
+#include <mach/mmc.h>
+#include <mach/pxa27x_keypad.h>
+#include <mach/pxa2xx_spi.h>
+
+#include <plat/i2c.h>
+
+#include "generic.h"
+#include "devices.h"
+
+/******************************************************************************
+ * Pin configuration
+ ******************************************************************************/
+static unsigned long z2_pin_config[] = {
+
+        /* LCD - 16bpp Active TFT */
+        GPIO58_LCD_LDD_0,
+        GPIO59_LCD_LDD_1,
+        GPIO60_LCD_LDD_2,
+        GPIO61_LCD_LDD_3,
+        GPIO62_LCD_LDD_4,
+        GPIO63_LCD_LDD_5,
+        GPIO64_LCD_LDD_6,
+        GPIO65_LCD_LDD_7,
+        GPIO66_LCD_LDD_8,
+        GPIO67_LCD_LDD_9,
+        GPIO68_LCD_LDD_10,
+        GPIO69_LCD_LDD_11,
+        GPIO70_LCD_LDD_12,
+        GPIO71_LCD_LDD_13,
+        GPIO72_LCD_LDD_14,
+        GPIO73_LCD_LDD_15,
+        GPIO74_LCD_FCLK,
+        GPIO75_LCD_LCLK,
+        GPIO76_LCD_PCLK,
+        GPIO77_LCD_BIAS,
+        GPIO19_GPIO,            /* LCD reset */
+        GPIO88_GPIO,            /* LCD chipselect */
+
+        /* PWM */
+        GPIO115_PWM1_OUT,       /* Keypad Backlight */
+        GPIO11_PWM2_OUT,        /* LCD Backlight */
+
+        /* MMC */
+        GPIO32_MMC_CLK,
+        GPIO112_MMC_CMD,
+        GPIO92_MMC_DAT_0,
+        GPIO109_MMC_DAT_1,
+        GPIO110_MMC_DAT_2,
+        GPIO111_MMC_DAT_3,
+        GPIO96_GPIO,            /* SD detect */
+
+        /* STUART */
+        GPIO46_STUART_RXD,
+        GPIO47_STUART_TXD,
+
+        /* Keypad */
+        GPIO100_KP_MKIN_0       | WAKEUP_ON_LEVEL_HIGH,
+        GPIO101_KP_MKIN_1       | WAKEUP_ON_LEVEL_HIGH,
+        GPIO102_KP_MKIN_2       | WAKEUP_ON_LEVEL_HIGH,
+        GPIO34_KP_MKIN_3        | WAKEUP_ON_LEVEL_HIGH,
+        GPIO38_KP_MKIN_4        | WAKEUP_ON_LEVEL_HIGH,
+        GPIO16_KP_MKIN_5        | WAKEUP_ON_LEVEL_HIGH,
+        GPIO17_KP_MKIN_6        | WAKEUP_ON_LEVEL_HIGH,
+        GPIO103_KP_MKOUT_0,
+        GPIO104_KP_MKOUT_1,
+        GPIO105_KP_MKOUT_2,
+        GPIO106_KP_MKOUT_3,
+        GPIO107_KP_MKOUT_4,
+        GPIO108_KP_MKOUT_5,
+        GPIO35_KP_MKOUT_6,
+        GPIO41_KP_MKOUT_7,
+
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
+
+        /* SSP1 */
+        GPIO23_SSP1_SCLK,       /* SSP1_SCK */
+        GPIO25_SSP1_TXD,        /* SSP1_TXD */
+        GPIO26_SSP1_RXD,        /* SSP1_RXD */
+
+        /* SSP2 */
+        GPIO22_SSP2_SCLK,       /* SSP2_SCK */
+        GPIO13_SSP2_TXD,        /* SSP2_TXD */
+        GPIO40_SSP2_RXD,        /* SSP2_RXD */
+
+        /* LEDs */
+        GPIO10_GPIO,            /* WiFi LED */
+        GPIO83_GPIO,            /* Charging LED */
+        GPIO85_GPIO,            /* Charged LED */
+
+        /* I2S */
+        GPIO28_I2S_BITCLK_OUT,
+        GPIO29_I2S_SDATA_IN,
+        GPIO30_I2S_SDATA_OUT,
+        GPIO31_I2S_SYNC,
+        GPIO113_I2S_SYSCLK,
+
+        /* MISC */
+        GPIO0_GPIO,             /* AC power detect */
+        GPIO1_GPIO,             /* Power button */
+        GPIO37_GPIO,            /* Headphone detect */
+        GPIO98_GPIO,            /* Lid switch */
+        GPIO14_GPIO,            /* WiFi Reset */
+        GPIO15_GPIO,            /* WiFi Power */
+        GPIO24_GPIO,            /* WiFi CS */
+        GPIO36_GPIO,            /* WiFi IRQ */
+        GPIO88_GPIO,            /* LCD CS */
+};
+
+/******************************************************************************
+ * NOR Flash
+ ******************************************************************************/
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+static struct resource z2_flash_resource = {
+        .start  = PXA_CS0_PHYS,
+        .end    = PXA_CS0_PHYS + SZ_8M - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+static struct mtd_partition z2_flash_parts[] = {
+        {
+                .name   = "U-Boot Bootloader",
+                .offset = 0x0,
+                .size   = 0x20000,
+        },
+        {
+                .name   = "Linux Kernel",
+                .offset = 0x20000,
+                .size   = 0x220000,
+        },
+        {
+                .name   = "Filesystem",
+                .offset = 0x240000,
+                .size   = 0x5b0000,
+        },
+        {
+                .name   = "U-Boot Environment",
+                .offset = 0x7f0000,
+                .size   = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data z2_flash_data = {
+        .width          = 2,
+        .parts          = z2_flash_parts,
+        .nr_parts       = ARRAY_SIZE(z2_flash_parts),
+};
+
+static struct platform_device z2_flash = {
+        .name           = "physmap-flash",
+        .id             = -1,
+        .resource       = &z2_flash_resource,
+        .num_resources  = 1,
+        .dev = {
+                .platform_data  = &z2_flash_data,
+        },
+};
+
+static void __init z2_nor_init(void)
+{
+        platform_device_register(&z2_flash);
+}
+#else
+static inline void z2_nor_init(void) {}
+#endif
+
+/******************************************************************************
+ * Backlight
+ ******************************************************************************/
+#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
+static struct platform_pwm_backlight_data z2_backlight_data[] = {
+        [0] = {
+                /* Keypad Backlight */
+                .pwm_id         = 1,
+                .max_brightness = 1023,
+                .dft_brightness = 512,
+                .pwm_period_ns  = 1260320,
+        },
+        [1] = {
+                /* LCD Backlight */
+                .pwm_id         = 2,
+                .max_brightness = 1023,
+                .dft_brightness = 512,
+                .pwm_period_ns  = 1260320,
+        },
+};
+
+static struct platform_device z2_backlight_devices[2] = {
+        {
+                .name   = "pwm-backlight",
+                .id     = 0,
+                .dev    = {
+                        .platform_data  = &z2_backlight_data[1],
+                },
+        },
+        {
+                .name   = "pwm-backlight",
+                .id     = 1,
+                .dev    = {
+                        .platform_data  = &z2_backlight_data[0],
+                },
+        },
+};
+static void __init z2_pwm_init(void)
+{
+        platform_device_register(&z2_backlight_devices[0]);
+        platform_device_register(&z2_backlight_devices[1]);
+}
+#else
+static inline void z2_pwm_init(void) {}
+#endif
+
+/******************************************************************************
+ * Framebuffer
+ ******************************************************************************/
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
+static struct pxafb_mode_info z2_lcd_modes[] = {
+{
+        .pixclock       = 192000,
+        .xres           = 240,
+        .yres           = 320,
+        .bpp            = 16,
+
+        .left_margin    = 4,
+        .right_margin   = 8,
+        .upper_margin   = 4,
+        .lower_margin   = 8,
+
+        .hsync_len      = 4,
+        .vsync_len      = 4,
+},
+};
+
+static struct pxafb_mach_info z2_lcd_screen = {
+        .modes          = z2_lcd_modes,
+        .num_modes      = ARRAY_SIZE(z2_lcd_modes),
+        .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_BIAS_ACTIVE_LOW |
+                          LCD_ALTERNATE_MAPPING,
+};
+
+static void __init z2_lcd_init(void)
+{
+        set_pxa_fb_info(&z2_lcd_screen);
+}
+#else
+static inline void z2_lcd_init(void) {}
+#endif
+
+/******************************************************************************
+ * SD/MMC card controller
+ ******************************************************************************/
+#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
+static struct pxamci_platform_data z2_mci_platform_data = {
+        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .gpio_card_detect       = GPIO96_ZIPITZ2_SD_DETECT,
+        .gpio_power             = -1,
+        .gpio_card_ro           = -1,
+        .detect_delay_ms        = 200,
+};
+
+static void __init z2_mmc_init(void)
+{
+        pxa_set_mci_info(&z2_mci_platform_data);
+}
+#else
+static inline void z2_mmc_init(void) {}
+#endif
+
+/******************************************************************************
+ * LEDs
+ ******************************************************************************/
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+struct gpio_led z2_gpio_leds[] = {
+{
+        .name                   = "z2:green:wifi",
+        .default_trigger        = "none",
+        .gpio                   = GPIO10_ZIPITZ2_LED_WIFI,
+        .active_low             = 1,
+}, {
+        .name                   = "z2:green:charged",
+        .default_trigger        = "none",
+        .gpio                   = GPIO85_ZIPITZ2_LED_CHARGED,
+        .active_low             = 1,
+}, {
+        .name                   = "z2:amber:charging",
+        .default_trigger        = "none",
+        .gpio                   = GPIO83_ZIPITZ2_LED_CHARGING,
+        .active_low             = 1,
+},
+};
+
+static struct gpio_led_platform_data z2_gpio_led_info = {
+        .leds           = z2_gpio_leds,
+        .num_leds       = ARRAY_SIZE(z2_gpio_leds),
+};
+
+static struct platform_device z2_leds = {
+        .name   = "leds-gpio",
+        .id     = -1,
+        .dev    = {
+                .platform_data  = &z2_gpio_led_info,
+        }
+};
+
+static void __init z2_leds_init(void)
+{
+        platform_device_register(&z2_leds);
+}
+#else
+static inline void z2_leds_init(void) {}
+#endif
+
+/******************************************************************************
+ * GPIO keyboard
+ ******************************************************************************/
+#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
+static unsigned int z2_matrix_keys[] = {
+        KEY(0, 0, KEY_OPTION),
+        KEY(1, 0, KEY_UP),
+        KEY(2, 0, KEY_DOWN),
+        KEY(3, 0, KEY_LEFT),
+        KEY(4, 0, KEY_RIGHT),
+        KEY(5, 0, KEY_END),
+        KEY(6, 0, KEY_KPPLUS),
+
+        KEY(0, 1, KEY_HOME),
+        KEY(1, 1, KEY_Q),
+        KEY(2, 1, KEY_I),
+        KEY(3, 1, KEY_G),
+        KEY(4, 1, KEY_X),
+        KEY(5, 1, KEY_ENTER),
+        KEY(6, 1, KEY_KPMINUS),
+
+        KEY(0, 2, KEY_PAGEUP),
+        KEY(1, 2, KEY_W),
+        KEY(2, 2, KEY_O),
+        KEY(3, 2, KEY_H),
+        KEY(4, 2, KEY_C),
+        KEY(5, 2, KEY_LEFTALT),
+
+        KEY(0, 3, KEY_PAGEDOWN),
+        KEY(1, 3, KEY_E),
+        KEY(2, 3, KEY_P),
+        KEY(3, 3, KEY_J),
+        KEY(4, 3, KEY_V),
+        KEY(5, 3, KEY_LEFTSHIFT),
+
+        KEY(0, 4, KEY_ESC),
+        KEY(1, 4, KEY_R),
+        KEY(2, 4, KEY_A),
+        KEY(3, 4, KEY_K),
+        KEY(4, 4, KEY_B),
+        KEY(5, 4, KEY_LEFTCTRL),
+
+        KEY(0, 5, KEY_TAB),
+        KEY(1, 5, KEY_T),
+        KEY(2, 5, KEY_S),
+        KEY(3, 5, KEY_L),
+        KEY(4, 5, KEY_N),
+        KEY(5, 5, KEY_SPACE),
+
+        KEY(0, 6, KEY_STOPCD),
+        KEY(1, 6, KEY_Y),
+        KEY(2, 6, KEY_D),
+        KEY(3, 6, KEY_BACKSPACE),
+        KEY(4, 6, KEY_M),
+        KEY(5, 6, KEY_COMMA),
+
+        KEY(0, 7, KEY_PLAYCD),
+        KEY(1, 7, KEY_U),
+        KEY(2, 7, KEY_F),
+        KEY(3, 7, KEY_Z),
+        KEY(4, 7, KEY_SEMICOLON),
+        KEY(5, 7, KEY_DOT),
+};
+
+static struct pxa27x_keypad_platform_data z2_keypad_platform_data = {
+        .matrix_key_rows        = 7,
+        .matrix_key_cols        = 8,
+        .matrix_key_map         = z2_matrix_keys,
+        .matrix_key_map_size    = ARRAY_SIZE(z2_matrix_keys),
+
+        .debounce_interval      = 30,
+};
+
+static void __init z2_mkp_init(void)
+{
+        pxa_set_keypad_info(&z2_keypad_platform_data);
+}
+#else
+static inline void z2_mkp_init(void) {}
+#endif
+
+/******************************************************************************
+ * GPIO keys
+ ******************************************************************************/
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+static struct gpio_keys_button z2_pxa_buttons[] = {
+        {KEY_POWER, GPIO1_ZIPITZ2_POWER_BUTTON, 0, "Power Button" },
+        {KEY_CLOSE, GPIO98_ZIPITZ2_LID_BUTTON, 0, "Lid Button" },
+};
+
+static struct gpio_keys_platform_data z2_pxa_keys_data = {
+        .buttons        = z2_pxa_buttons,
+        .nbuttons       = ARRAY_SIZE(z2_pxa_buttons),
+};
+
+static struct platform_device z2_pxa_keys = {
+        .name   = "gpio-keys",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &z2_pxa_keys_data,
+        },
+};
+
+static void __init z2_keys_init(void)
+{
+        platform_device_register(&z2_pxa_keys);
+}
+#else
+static inline void z2_keys_init(void) {}
+#endif
+
+/******************************************************************************
+ * SSP Devices - WiFi and LCD control
+ ******************************************************************************/
+#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
+/* WiFi */
+static int z2_lbs_spi_setup(struct spi_device *spi)
+{
+        int ret = 0;
+
+        ret = gpio_request(GPIO15_ZIPITZ2_WIFI_POWER, "WiFi Power");
+        if (ret)
+                goto err;
+
+        ret = gpio_direction_output(GPIO15_ZIPITZ2_WIFI_POWER, 1);
+        if (ret)
+                goto err2;
+
+        ret = gpio_request(GPIO14_ZIPITZ2_WIFI_RESET, "WiFi Reset");
+        if (ret)
+                goto err2;
+
+        ret = gpio_direction_output(GPIO14_ZIPITZ2_WIFI_RESET, 0);
+        if (ret)
+                goto err3;
+
+        /* Reset the card */
+        mdelay(180);
+        gpio_set_value(GPIO14_ZIPITZ2_WIFI_RESET, 1);
+        mdelay(20);
+
+        spi->bits_per_word = 16;
+        spi->mode = SPI_MODE_2,
+
+        spi_setup(spi);
+
+        return 0;
+
+err3:
+        gpio_free(GPIO14_ZIPITZ2_WIFI_RESET);
+err2:
+        gpio_free(GPIO15_ZIPITZ2_WIFI_POWER);
+err:
+        return ret;
+};
+
+static int z2_lbs_spi_teardown(struct spi_device *spi)
+{
+        gpio_set_value(GPIO14_ZIPITZ2_WIFI_RESET, 0);
+        gpio_set_value(GPIO15_ZIPITZ2_WIFI_POWER, 0);
+        gpio_free(GPIO14_ZIPITZ2_WIFI_RESET);
+        gpio_free(GPIO15_ZIPITZ2_WIFI_POWER);
+        return 0;
+
+};
+
+static struct pxa2xx_spi_chip z2_lbs_chip_info = {
+        .rx_threshold   = 8,
+        .tx_threshold   = 8,
+        .timeout        = 1000,
+        .gpio_cs        = GPIO24_ZIPITZ2_WIFI_CS,
+};
+
+static struct libertas_spi_platform_data z2_lbs_pdata = {
+        .use_dummy_writes       = 1,
+        .setup                  = z2_lbs_spi_setup,
+        .teardown               = z2_lbs_spi_teardown,
+};
+
+/* LCD */
+static struct pxa2xx_spi_chip lms283_chip_info = {
+        .rx_threshold   = 1,
+        .tx_threshold   = 1,
+        .timeout        = 64,
+        .gpio_cs        = GPIO88_ZIPITZ2_LCD_CS,
+};
+
+static const struct lms283gf05_pdata lms283_pdata = {
+        .reset_gpio     = GPIO19_ZIPITZ2_LCD_RESET,
+};
+
+static struct spi_board_info spi_board_info[] __initdata = {
+{
+        .modalias               = "libertas_spi",
+        .platform_data          = &z2_lbs_pdata,
+        .controller_data        = &z2_lbs_chip_info,
+        .irq                    = gpio_to_irq(GPIO36_ZIPITZ2_WIFI_IRQ),
+        .max_speed_hz           = 13000000,
+        .bus_num                = 1,
+        .chip_select            = 0,
+},
+{
+        .modalias               = "lms283gf05",
+        .controller_data        = &lms283_chip_info,
+        .platform_data          = &lms283_pdata,
+        .max_speed_hz           = 400000,
+        .bus_num                = 2,
+        .chip_select            = 0,
+},
+};
+
+static struct pxa2xx_spi_master pxa_ssp1_master_info = {
+        .clock_enable   = CKEN_SSP,
+        .num_chipselect = 1,
+        .enable_dma     = 1,
+};
+
+static struct pxa2xx_spi_master pxa_ssp2_master_info = {
+        .clock_enable   = CKEN_SSP2,
+        .num_chipselect = 1,
+};
+
+static void __init z2_spi_init(void)
+{
+        pxa2xx_set_spi_info(1, &pxa_ssp1_master_info);
+        pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
+        spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
+}
+#else
+static inline void z2_spi_init(void) {}
+#endif
+
+/******************************************************************************
+ * Machine init
+ ******************************************************************************/
+static void __init z2_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(z2_pin_config));
+
+        z2_lcd_init();
+        z2_mmc_init();
+        z2_mkp_init();
+
+        pxa_set_i2c_info(NULL);
+
+        z2_spi_init();
+        z2_nor_init();
+        z2_pwm_init();
+        z2_leds_init();
+        z2_keys_init();
+}
+
+MACHINE_START(ZIPIT2, "Zipit Z2")
+        .phys_io        = 0x40000000,
+        .boot_params    = 0xa0000100,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa27x_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = z2_init,
+MACHINE_END
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 39896d883584..3680f6a90623 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -644,7 +644,7 @@ static struct pxafb_mach_info zeus_fb_info = {
 
 static struct pxamci_platform_data zeus_mci_platform_data = {
         .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
-        .detect_delay           = HZ/4,
+        .detect_delay_ms        = 250,
         .gpio_card_detect       = ZEUS_MMC_CD_GPIO,
         .gpio_card_ro           = ZEUS_MMC_WP_GPIO,
         .gpio_card_ro_invert    = 1,
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 2b4043c04d0c..c479cbecf784 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -218,7 +218,7 @@ static inline void zylonite_init_lcd(void) {}
 
 #if defined(CONFIG_MMC)
 static struct pxamci_platform_data zylonite_mci_platform_data = {
-        .detect_delay   = 20,
+        .detect_delay_ms= 200,
         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
         .gpio_card_detect = EXT_GPIO(0),
         .gpio_card_ro   = EXT_GPIO(2),
@@ -226,7 +226,7 @@ static struct pxamci_platform_data zylonite_mci_platform_data = {
 };
 
 static struct pxamci_platform_data zylonite_mci2_platform_data = {
-        .detect_delay   = 20,
+        .detect_delay_ms= 200,
         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
         .gpio_card_detect = EXT_GPIO(1),
         .gpio_card_ro   = EXT_GPIO(3),
@@ -234,7 +234,7 @@ static struct pxamci_platform_data zylonite_mci2_platform_data = {
 };
 
 static struct pxamci_platform_data zylonite_mci3_platform_data = {
-        .detect_delay   = 20,
+        .detect_delay_ms= 200,
         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
         .gpio_card_detect = EXT_GPIO(30),
         .gpio_card_ro   = EXT_GPIO(31),
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index d3022dabb4aa..3e62aae2225a 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -771,7 +771,7 @@ config CACHE_L2X0
 
 config CACHE_TAUROS2
         bool "Enable the Tauros2 L2 cache controller"
-        depends on ARCH_DOVE
+        depends on (ARCH_DOVE || ARCH_MMP)
         default y
         select OUTER_CACHE
         help
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 83db12a68d56..0ed29bfeba1c 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -86,9 +86,6 @@ void show_mem(void)
         printk("Mem-info:\n");
         show_free_areas();
         for_each_online_node(node) {
-                pg_data_t *n = NODE_DATA(node);
-                struct page *map = pgdat_page_nr(n, 0) - n->node_start_pfn;
-
                 for_each_nodebank (i,mi,node) {
                         struct membank *bank = &mi->bank[i];
                         unsigned int pfn1, pfn2;
@@ -97,8 +94,8 @@ void show_mem(void)
                         pfn1 = bank_pfn_start(bank);
                         pfn2 = bank_pfn_end(bank);
 
-                        page = map + pfn1;
-                        end  = map + pfn2;
+                        page = pfn_to_page(pfn1);
+                        end  = pfn_to_page(pfn2 - 1) + 1;
 
                         do {
                                 total++;
@@ -603,9 +600,6 @@ void __init mem_init(void)
         reserved_pages = free_pages = 0;
 
         for_each_online_node(node) {
-                pg_data_t *n = NODE_DATA(node);
-                struct page *map = pgdat_page_nr(n, 0) - n->node_start_pfn;
-
                 for_each_nodebank(i, &meminfo, node) {
                         struct membank *bank = &meminfo.bank[i];
                         unsigned int pfn1, pfn2;
@@ -614,8 +608,8 @@ void __init mem_init(void)
                         pfn1 = bank_pfn_start(bank);
                         pfn2 = bank_pfn_end(bank);
 
-                        page = map + pfn1;
-                        end  = map + pfn2;
+                        page = pfn_to_page(pfn1);
+                        end  = pfn_to_page(pfn2 - 1) + 1;
 
                         do {
                                 if (PageReserved(page))
diff --git a/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h b/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
index 07be8ad7ec37..7c4870bd5a21 100644
--- a/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
+++ b/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
@@ -31,7 +31,13 @@
 #define DMA_MODE_WRITE          1
 #define DMA_MODE_MASK           1
 
-#define DMA_BASE IO_ADDRESS(DMA_BASE_ADDR)
+#define MX1_DMA_REG(offset)     MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR + (offset))
+
+/* DMA Interrupt Mask Register */
+#define MX1_DMA_DIMR            MX1_DMA_REG(0x08)
+
+/* Channel Control Register */
+#define MX1_DMA_CCR(x)          MX1_DMA_REG(0x8c + ((x) << 6))
 
 #define IMX_DMA_MEMSIZE_32      (0 << 4)
 #define IMX_DMA_MEMSIZE_8       (1 << 4)
diff --git a/arch/arm/plat-pxa/Kconfig b/arch/arm/plat-pxa/Kconfig
index b158e98038ed..da53395a17c6 100644
--- a/arch/arm/plat-pxa/Kconfig
+++ b/arch/arm/plat-pxa/Kconfig
@@ -1,3 +1,8 @@
 if PLAT_PXA
 
+config PXA_SSP
+        tristate
+        help
+          Enable support for PXA2xx SSP ports
+
 endif
diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile
index 0264bfb0ca4f..4aacdd12c9cc 100644
--- a/arch/arm/plat-pxa/Makefile
+++ b/arch/arm/plat-pxa/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_PXA3xx)		+= mfp.o
 obj-$(CONFIG_ARCH_MMP)          += mfp.o
 
 obj-$(CONFIG_HAVE_PWM)          += pwm.o
+obj-$(CONFIG_PXA_SSP)           += ssp.o
diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h
index 857a6839071c..9e604c80618f 100644
--- a/arch/arm/plat-pxa/include/plat/mfp.h
+++ b/arch/arm/plat-pxa/include/plat/mfp.h
@@ -316,6 +316,13 @@ enum {
         MFP_PIN_PMIC_INT,
         MFP_PIN_RDY,
 
+        /* additional pins on MMP2 */
+        MFP_PIN_TWSI1_SCL,
+        MFP_PIN_TWSI1_SDA,
+        MFP_PIN_TWSI4_SCL,
+        MFP_PIN_TWSI4_SDA,
+        MFP_PIN_CLK_REQ,
+
         MFP_PIN_MAX,
 };
 
diff --git a/arch/arm/mach-pxa/include/mach/regs-ssp.h b/arch/arm/plat-pxa/include/plat/ssp.h
index 6a2ed35acd59..fe43150690ed 100644
--- a/arch/arm/mach-pxa/include/mach/regs-ssp.h
+++ b/arch/arm/plat-pxa/include/plat/ssp.h
@@ -1,5 +1,26 @@
-#ifndef __ASM_ARCH_REGS_SSP_H
-#define __ASM_ARCH_REGS_SSP_H
+/*
+ *  ssp.h
+ *
+ *  Copyright (C) 2003 Russell King, All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This driver supports the following PXA CPU/SSP ports:-
+ *
+ *       PXA250     SSP
+ *       PXA255     SSP, NSSP
+ *       PXA26x     SSP, NSSP, ASSP
+ *       PXA27x     SSP1, SSP2, SSP3
+ *       PXA3xx     SSP1, SSP2, SSP3, SSP4
+ */
+
+#ifndef __ASM_ARCH_SSP_H
+#define __ASM_ARCH_SSP_H
+
+#include <linux/list.h>
+#include <linux/io.h>
 
 /*
  * SSP Serial Port Registers
@@ -19,10 +40,7 @@
 #define SSRSA           (0x34)  /* SSP Rx Timeslot Active */
 #define SSTSS           (0x38)  /* SSP Timeslot Status */
 #define SSACD           (0x3C)  /* SSP Audio Clock Divider */
-
-#if defined(CONFIG_PXA3xx)
 #define SSACDD          (0x40)  /* SSP Audio Clock Dither Divider */
-#endif
 
 /* Common PXA2xx bits first */
 #define SSCR0_DSS       (0x0000000f)    /* Data Size Select (mask) */
@@ -33,29 +51,19 @@
 #define SSCR0_National  (0x2 << 4)      /* National Microwire */
 #define SSCR0_ECS       (1 << 6)        /* External clock select */
 #define SSCR0_SSE       (1 << 7)        /* Synchronous Serial Port Enable */
+#define SSCR0_SCR(x)    ((x) << 8)      /* Serial Clock Rate (mask) */
 
-#if defined(CONFIG_PXA25x)
-#define SSCR0_SCR       (0x0000ff00)    /* Serial Clock Rate (mask) */
-#define SSCR0_SerClkDiv(x) ((((x) - 2)/2) << 8) /* Divisor [2..512] */
-#elif defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
-#define SSCR0_SCR       (0x000fff00)    /* Serial Clock Rate (mask) */
-#define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */
-#endif
-
-#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
+/* PXA27x, PXA3xx */
 #define SSCR0_EDSS      (1 << 20)       /* Extended data size select */
 #define SSCR0_NCS       (1 << 21)       /* Network clock select */
 #define SSCR0_RIM       (1 << 22)       /* Receive FIFO overrrun interrupt mask */
 #define SSCR0_TUM       (1 << 23)       /* Transmit FIFO underrun interrupt mask */
 #define SSCR0_FRDC      (0x07000000)    /* Frame rate divider control (mask) */
 #define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24)  /* Time slots per frame [1..8] */
+#define SSCR0_FPCKE     (1 << 29)       /* FIFO packing enable */
 #define SSCR0_ACS       (1 << 30)       /* Audio clock select */
 #define SSCR0_MOD       (1 << 31)       /* Mode (normal or network) */
-#endif
 
-#if defined(CONFIG_PXA3xx)
-#define SSCR0_FPCKE     (1 << 29)       /* FIFO packing enable */
-#endif
 
 #define SSCR1_RIE       (1 << 0)        /* Receive FIFO Interrupt Enable */
 #define SSCR1_TIE       (1 << 1)        /* Transmit FIFO Interrupt Enable */
@@ -75,10 +83,6 @@
 #define SSSR_RFS        (1 << 6)        /* Receive FIFO Service Request */
 #define SSSR_ROR        (1 << 7)        /* Receive FIFO Overrun */
 
-#define SSCR0_TIM               (1 << 23)       /* Transmit FIFO Under Run Interrupt Mask */
-#define SSCR0_RIM               (1 << 22)       /* Receive FIFO Over Run interrupt Mask */
-#define SSCR0_NCS               (1 << 21)       /* Network Clock Select */
-#define SSCR0_EDSS              (1 << 20)       /* Extended Data Size Select */
 
 /* extra bits in PXA255, PXA26x and PXA27x SSP ports */
 #define SSCR0_TISSP             (1 << 4)        /* TI Sync Serial Protocol */
@@ -108,27 +112,75 @@
 #define SSSR_TINT               (1 << 19)       /* Receiver Time-out Interrupt */
 #define SSSR_PINT               (1 << 18)       /* Peripheral Trailing Byte Interrupt */
 
-#if defined(CONFIG_PXA3xx)
-#define SSPSP_EDMYSTOP(x)       ((x) << 28)     /* Extended Dummy Stop */
-#define SSPSP_EDMYSTRT(x)       ((x) << 26)     /* Extended Dummy Start */
-#endif
 
-#define SSPSP_FSRT              (1 << 25)       /* Frame Sync Relative Timing */
-#define SSPSP_DMYSTOP(x)        ((x) << 23)     /* Dummy Stop */
-#define SSPSP_SFRMWDTH(x)       ((x) << 16)     /* Serial Frame Width */
-#define SSPSP_SFRMDLY(x)        ((x) << 9)      /* Serial Frame Delay */
-#define SSPSP_DMYSTRT(x)        ((x) << 7)      /* Dummy Start */
-#define SSPSP_STRTDLY(x)        ((x) << 4)      /* Start Delay */
-#define SSPSP_ETDS              (1 << 3)        /* End of Transfer data State */
-#define SSPSP_SFRMP             (1 << 2)        /* Serial Frame Polarity */
 #define SSPSP_SCMODE(x)         ((x) << 0)      /* Serial Bit Rate Clock Mode */
+#define SSPSP_SFRMP             (1 << 2)        /* Serial Frame Polarity */
+#define SSPSP_ETDS              (1 << 3)        /* End of Transfer data State */
+#define SSPSP_STRTDLY(x)        ((x) << 4)      /* Start Delay */
+#define SSPSP_DMYSTRT(x)        ((x) << 7)      /* Dummy Start */
+#define SSPSP_SFRMDLY(x)        ((x) << 9)      /* Serial Frame Delay */
+#define SSPSP_SFRMWDTH(x)       ((x) << 16)     /* Serial Frame Width */
+#define SSPSP_DMYSTOP(x)        ((x) << 23)     /* Dummy Stop */
+#define SSPSP_FSRT              (1 << 25)       /* Frame Sync Relative Timing */
+
+/* PXA3xx */
+#define SSPSP_EDMYSTRT(x)       ((x) << 26)     /* Extended Dummy Start */
+#define SSPSP_EDMYSTOP(x)       ((x) << 28)     /* Extended Dummy Stop */
+#define SSPSP_TIMING_MASK       (0x7f8001f0)
 
 #define SSACD_SCDB              (1 << 3)        /* SSPSYSCLK Divider Bypass */
 #define SSACD_ACPS(x)           ((x) << 4)      /* Audio clock PLL select */
 #define SSACD_ACDS(x)           ((x) << 0)      /* Audio clock divider select */
-#if defined(CONFIG_PXA3xx)
 #define SSACD_SCDX8             (1 << 7)        /* SYSCLK division ratio select */
-#endif
-
 
-#endif /* __ASM_ARCH_REGS_SSP_H */
+enum pxa_ssp_type {
+        SSP_UNDEFINED = 0,
+        PXA25x_SSP,  /* pxa 210, 250, 255, 26x */
+        PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
+        PXA27x_SSP,
+        PXA168_SSP,
+};
+
+struct ssp_device {
+        struct platform_device *pdev;
+        struct list_head        node;
+
+        struct clk      *clk;
+        void __iomem    *mmio_base;
+        unsigned long   phys_base;
+
+        const char      *label;
+        int             port_id;
+        int             type;
+        int             use_count;
+        int             irq;
+        int             drcmr_rx;
+        int             drcmr_tx;
+};
+
+/**
+ * pxa_ssp_write_reg - Write to a SSP register
+ *
+ * @dev: SSP device to access
+ * @reg: Register to write to
+ * @val: Value to be written.
+ */
+static inline void pxa_ssp_write_reg(struct ssp_device *dev, u32 reg, u32 val)
+{
+        __raw_writel(val, dev->mmio_base + reg);
+}
+
+/**
+ * pxa_ssp_read_reg - Read from a SSP register
+ *
+ * @dev: SSP device to access
+ * @reg: Register to read from
+ */
+static inline u32 pxa_ssp_read_reg(struct ssp_device *dev, u32 reg)
+{
+        return __raw_readl(dev->mmio_base + reg);
+}
+
+struct ssp_device *pxa_ssp_request(int port, const char *label);
+void pxa_ssp_free(struct ssp_device *);
+#endif /* __ASM_ARCH_SSP_H */
diff --git a/arch/arm/plat-pxa/mfp.c b/arch/arm/plat-pxa/mfp.c
index be58f9fe65b0..b77e018d36c1 100644
--- a/arch/arm/plat-pxa/mfp.c
+++ b/arch/arm/plat-pxa/mfp.c
@@ -110,6 +110,7 @@ static const unsigned long mfpr_lpm[] = {
         MFPR_LPM_PULL_LOW,
         MFPR_LPM_PULL_HIGH,
         MFPR_LPM_FLOAT,
+        MFPR_LPM_INPUT,
 };
 
 /* mapping of MFP_PULL_* definitions to MFPR_PULL_* register bits */
diff --git a/arch/arm/plat-pxa/ssp.c b/arch/arm/plat-pxa/ssp.c
new file mode 100644
index 000000000000..c6357e554aba
--- /dev/null
+++ b/arch/arm/plat-pxa/ssp.c
@@ -0,0 +1,224 @@
+/*
+ *  linux/arch/arm/mach-pxa/ssp.c
+ *
+ *  based on linux/arch/arm/mach-sa1100/ssp.c by Russell King
+ *
+ *  Copyright (C) 2003 Russell King.
+ *  Copyright (C) 2003 Wolfson Microelectronics PLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  PXA2xx SSP driver.  This provides the generic core for simple
+ *  IO-based SSP applications and allows easy port setup for DMA access.
+ *
+ *  Author: Liam Girdwood <liam.girdwood@wolfsonmicro.com>
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/mutex.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+
+#include <asm/irq.h>
+#include <mach/hardware.h>
+#include <plat/ssp.h>
+
+static DEFINE_MUTEX(ssp_lock);
+static LIST_HEAD(ssp_list);
+
+struct ssp_device *pxa_ssp_request(int port, const char *label)
+{
+        struct ssp_device *ssp = NULL;
+
+        mutex_lock(&ssp_lock);
+
+        list_for_each_entry(ssp, &ssp_list, node) {
+                if (ssp->port_id == port && ssp->use_count == 0) {
+                        ssp->use_count++;
+                        ssp->label = label;
+                        break;
+                }
+        }
+
+        mutex_unlock(&ssp_lock);
+
+        if (&ssp->node == &ssp_list)
+                return NULL;
+
+        return ssp;
+}
+EXPORT_SYMBOL(pxa_ssp_request);
+
+void pxa_ssp_free(struct ssp_device *ssp)
+{
+        mutex_lock(&ssp_lock);
+        if (ssp->use_count) {
+                ssp->use_count--;
+                ssp->label = NULL;
+        } else
+                dev_err(&ssp->pdev->dev, "device already free\n");
+        mutex_unlock(&ssp_lock);
+}
+EXPORT_SYMBOL(pxa_ssp_free);
+
+static int __devinit pxa_ssp_probe(struct platform_device *pdev)
+{
+        const struct platform_device_id *id = platform_get_device_id(pdev);
+        struct resource *res;
+        struct ssp_device *ssp;
+        int ret = 0;
+
+        ssp = kzalloc(sizeof(struct ssp_device), GFP_KERNEL);
+        if (ssp == NULL) {
+                dev_err(&pdev->dev, "failed to allocate memory");
+                return -ENOMEM;
+        }
+        ssp->pdev = pdev;
+
+        ssp->clk = clk_get(&pdev->dev, NULL);
+        if (IS_ERR(ssp->clk)) {
+                ret = PTR_ERR(ssp->clk);
+                goto err_free;
+        }
+
+        res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
+        if (res == NULL) {
+                dev_err(&pdev->dev, "no SSP RX DRCMR defined\n");
+                ret = -ENODEV;
+                goto err_free_clk;
+        }
+        ssp->drcmr_rx = res->start;
+
+        res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
+        if (res == NULL) {
+                dev_err(&pdev->dev, "no SSP TX DRCMR defined\n");
+                ret = -ENODEV;
+                goto err_free_clk;
+        }
+        ssp->drcmr_tx = res->start;
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (res == NULL) {
+                dev_err(&pdev->dev, "no memory resource defined\n");
+                ret = -ENODEV;
+                goto err_free_clk;
+        }
+
+        res = request_mem_region(res->start, resource_size(res),
+                        pdev->name);
+        if (res == NULL) {
+                dev_err(&pdev->dev, "failed to request memory resource\n");
+                ret = -EBUSY;
+                goto err_free_clk;
+        }
+
+        ssp->phys_base = res->start;
+
+        ssp->mmio_base = ioremap(res->start, resource_size(res));
+        if (ssp->mmio_base == NULL) {
+                dev_err(&pdev->dev, "failed to ioremap() registers\n");
+                ret = -ENODEV;
+                goto err_free_mem;
+        }
+
+        ssp->irq = platform_get_irq(pdev, 0);
+        if (ssp->irq < 0) {
+                dev_err(&pdev->dev, "no IRQ resource defined\n");
+                ret = -ENODEV;
+                goto err_free_io;
+        }
+
+        /* PXA2xx/3xx SSP ports starts from 1 and the internal pdev->id
+         * starts from 0, do a translation here
+         */
+        ssp->port_id = pdev->id + 1;
+        ssp->use_count = 0;
+        ssp->type = (int)id->driver_data;
+
+        mutex_lock(&ssp_lock);
+        list_add(&ssp->node, &ssp_list);
+        mutex_unlock(&ssp_lock);
+
+        platform_set_drvdata(pdev, ssp);
+        return 0;
+
+err_free_io:
+        iounmap(ssp->mmio_base);
+err_free_mem:
+        release_mem_region(res->start, resource_size(res));
+err_free_clk:
+        clk_put(ssp->clk);
+err_free:
+        kfree(ssp);
+        return ret;
+}
+
+static int __devexit pxa_ssp_remove(struct platform_device *pdev)
+{
+        struct resource *res;
+        struct ssp_device *ssp;
+
+        ssp = platform_get_drvdata(pdev);
+        if (ssp == NULL)
+                return -ENODEV;
+
+        iounmap(ssp->mmio_base);
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        release_mem_region(res->start, resource_size(res));
+
+        clk_put(ssp->clk);
+
+        mutex_lock(&ssp_lock);
+        list_del(&ssp->node);
+        mutex_unlock(&ssp_lock);
+
+        kfree(ssp);
+        return 0;
+}
+
+static const struct platform_device_id ssp_id_table[] = {
+        { "pxa25x-ssp",         PXA25x_SSP },
+        { "pxa25x-nssp",        PXA25x_NSSP },
+        { "pxa27x-ssp",         PXA27x_SSP },
+        { "pxa168-ssp",         PXA168_SSP },
+        { },
+};
+
+static struct platform_driver pxa_ssp_driver = {
+        .probe          = pxa_ssp_probe,
+        .remove         = __devexit_p(pxa_ssp_remove),
+        .driver         = {
+                .owner  = THIS_MODULE,
+                .name   = "pxa2xx-ssp",
+        },
+        .id_table       = ssp_id_table,
+};
+
+static int __init pxa_ssp_init(void)
+{
+        return platform_driver_register(&pxa_ssp_driver);
+}
+
+static void __exit pxa_ssp_exit(void)
+{
+        platform_driver_unregister(&pxa_ssp_driver);
+}
+
+arch_initcall(pxa_ssp_init);
+module_exit(pxa_ssp_exit);
+
+MODULE_DESCRIPTION("PXA SSP driver");
+MODULE_AUTHOR("Liam Girdwood");
+MODULE_LICENSE("GPL");