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authorGreg KH <greg@press.(none)>2005-10-28 13:13:16 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2005-10-28 13:13:16 -0400
commit6fbfddcb52d8d9fa2cd209f5ac2a1c87497d55b5 (patch)
treec0414e89678fcef7ce3493e048d855bde781ae8d /arch/arm
parent1a222bca26ca691e83be1b08f5e96ae96d0d8cae (diff)
parent27d1097d39509494706eaa2620ef3b1e780a3224 (diff)
Merge ../bleed-2.6
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig4
-rw-r--r--arch/arm/boot/compressed/head.S3
-rw-r--r--arch/arm/configs/mp1000_defconfig897
-rw-r--r--arch/arm/kernel/module.c1
-rw-r--r--arch/arm/kernel/traps.c4
-rw-r--r--arch/arm/lib/Makefile2
-rw-r--r--arch/arm/lib/sha1.S206
-rw-r--r--arch/arm/mach-aaec2000/Makefile2
-rw-r--r--arch/arm/mach-aaec2000/aaed2000.c50
-rw-r--r--arch/arm/mach-aaec2000/clock.c110
-rw-r--r--arch/arm/mach-aaec2000/clock.h23
-rw-r--r--arch/arm/mach-aaec2000/core.c135
-rw-r--r--arch/arm/mach-aaec2000/core.h11
-rw-r--r--arch/arm/mach-clps711x/Kconfig11
-rw-r--r--arch/arm/mach-clps711x/Makefile1
-rw-r--r--arch/arm/mach-clps711x/autcpu12.c12
-rw-r--r--arch/arm/mach-clps711x/cdb89712.c7
-rw-r--r--arch/arm/mach-clps711x/ceiva.c12
-rw-r--r--arch/arm/mach-clps711x/edb7211-mm.c30
-rw-r--r--arch/arm/mach-clps711x/mm.c8
-rw-r--r--arch/arm/mach-clps711x/mp1000-mach.c49
-rw-r--r--arch/arm/mach-clps711x/mp1000-mm.c47
-rw-r--r--arch/arm/mach-clps711x/mp1000-seprom.c195
-rw-r--r--arch/arm/mach-clps711x/p720t.c14
-rw-r--r--arch/arm/mach-clps7500/core.c25
-rw-r--r--arch/arm/mach-ebsa110/core.c38
-rw-r--r--arch/arm/mach-ebsa110/io.c1
-rw-r--r--arch/arm/mach-epxa10db/mm.c37
-rw-r--r--arch/arm/mach-footbridge/common.c57
-rw-r--r--arch/arm/mach-h720x/common.c7
-rw-r--r--arch/arm/mach-imx/generic.c8
-rw-r--r--arch/arm/mach-imx/mx1ads.c38
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c79
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c67
-rw-r--r--arch/arm/mach-iop3xx/iop321-setup.c18
-rw-r--r--arch/arm/mach-iop3xx/iop331-setup.c18
-rw-r--r--arch/arm/mach-iop3xx/iq31244-mm.c10
-rw-r--r--arch/arm/mach-iop3xx/iq80321-mm.c10
-rw-r--r--arch/arm/mach-ixp2000/core.c16
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x00.c2
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x01.c2
-rw-r--r--arch/arm/mach-ixp4xx/common.c8
-rw-r--r--arch/arm/mach-lh7a40x/arch-kev7a400.c13
-rw-r--r--arch/arm/mach-lh7a40x/arch-lpd7a40x.c86
-rw-r--r--arch/arm/mach-omap1/board-innovator.c8
-rw-r--r--arch/arm/mach-omap1/board-perseus2.c8
-rw-r--r--arch/arm/mach-omap1/io.c46
-rw-r--r--arch/arm/mach-pxa/generic.c82
-rw-r--r--arch/arm/mach-pxa/idp.c21
-rw-r--r--arch/arm/mach-pxa/lubbock.c27
-rw-r--r--arch/arm/mach-pxa/mainstone.c32
-rw-r--r--arch/arm/mach-pxa/pxa25x.c2
-rw-r--r--arch/arm/mach-pxa/pxa27x.c2
-rw-r--r--arch/arm/mach-pxa/sleep.S7
-rw-r--r--arch/arm/mach-pxa/standby.S2
-rw-r--r--arch/arm/mach-rpc/riscpc.c19
-rw-r--r--arch/arm/mach-s3c2410/cpu.h2
-rw-r--r--arch/arm/mach-s3c2410/devs.c36
-rw-r--r--arch/arm/mach-s3c2410/gpio.c22
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c40
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c3
-rw-r--r--arch/arm/mach-s3c2410/mach-smdk2440.c70
-rw-r--r--arch/arm/mach-sa1100/assabet.c14
-rw-r--r--arch/arm/mach-sa1100/badge4.c20
-rw-r--r--arch/arm/mach-sa1100/cerf.c8
-rw-r--r--arch/arm/mach-sa1100/collie.c14
-rw-r--r--arch/arm/mach-sa1100/generic.c26
-rw-r--r--arch/arm/mach-sa1100/h3600.c20
-rw-r--r--arch/arm/mach-sa1100/hackkit.c8
-rw-r--r--arch/arm/mach-sa1100/jornada720.c20
-rw-r--r--arch/arm/mach-sa1100/lart.c14
-rw-r--r--arch/arm/mach-sa1100/neponset.c14
-rw-r--r--arch/arm/mach-sa1100/simpad.c16
-rw-r--r--arch/arm/mach-shark/core.c7
-rw-r--r--arch/arm/mach-versatile/core.c83
-rw-r--r--arch/arm/mm/consistent.c8
-rw-r--r--arch/arm/mm/init.c480
-rw-r--r--arch/arm/mm/ioremap.c1
-rw-r--r--arch/arm/mm/mm-armv.c172
-rw-r--r--arch/arm/oprofile/Makefile4
-rw-r--r--arch/arm/oprofile/common.c185
-rw-r--r--arch/arm/oprofile/init.c33
-rw-r--r--arch/arm/oprofile/op_arm_model.h4
-rw-r--r--arch/arm/plat-omap/sram.c6
84 files changed, 3215 insertions, 745 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 11fff042aa81..682367bd0f65 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -204,6 +204,7 @@ config ARCH_H720X
204 204
205config ARCH_AAEC2000 205config ARCH_AAEC2000
206 bool "Agilent AAEC-2000 based" 206 bool "Agilent AAEC-2000 based"
207 select ARM_AMBA
207 help 208 help
208 This enables support for systems based on the Agilent AAEC-2000 209 This enables support for systems based on the Agilent AAEC-2000
209 210
@@ -687,7 +688,8 @@ source "drivers/acorn/block/Kconfig"
687 688
688if PCMCIA || ARCH_CLPS7500 || ARCH_IOP3XX || ARCH_IXP4XX \ 689if PCMCIA || ARCH_CLPS7500 || ARCH_IOP3XX || ARCH_IXP4XX \
689 || ARCH_L7200 || ARCH_LH7A40X || ARCH_PXA || ARCH_RPC \ 690 || ARCH_L7200 || ARCH_LH7A40X || ARCH_PXA || ARCH_RPC \
690 || ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE 691 || ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE \
692 || MACH_MP1000
691source "drivers/ide/Kconfig" 693source "drivers/ide/Kconfig"
692endif 694endif
693 695
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 7c7f475e213e..a54d2eb64892 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -39,7 +39,8 @@
39 defined(CONFIG_ARCH_IXP4XX) || \ 39 defined(CONFIG_ARCH_IXP4XX) || \
40 defined(CONFIG_ARCH_IXP2000) || \ 40 defined(CONFIG_ARCH_IXP2000) || \
41 defined(CONFIG_ARCH_LH7A40X) || \ 41 defined(CONFIG_ARCH_LH7A40X) || \
42 defined(CONFIG_ARCH_OMAP) 42 defined(CONFIG_ARCH_OMAP) || \
43 defined(CONFIG_MACH_MP1000)
43 .macro loadsp, rb 44 .macro loadsp, rb
44 addruart \rb 45 addruart \rb
45 .endm 46 .endm
diff --git a/arch/arm/configs/mp1000_defconfig b/arch/arm/configs/mp1000_defconfig
new file mode 100644
index 000000000000..d2cbc6fada1d
--- /dev/null
+++ b/arch/arm/configs/mp1000_defconfig
@@ -0,0 +1,897 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.14-rc1
4# Fri Sep 16 15:48:13 2005
5#
6CONFIG_ARM=y
7CONFIG_MMU=y
8CONFIG_UID16=y
9CONFIG_RWSEM_GENERIC_SPINLOCK=y
10CONFIG_GENERIC_CALIBRATE_DELAY=y
11
12#
13# Code maturity level options
14#
15CONFIG_EXPERIMENTAL=y
16# CONFIG_CLEAN_COMPILE is not set
17CONFIG_BROKEN=y
18CONFIG_BROKEN_ON_SMP=y
19CONFIG_LOCK_KERNEL=y
20CONFIG_INIT_ENV_ARG_LIMIT=32
21
22#
23# General setup
24#
25CONFIG_LOCALVERSION=""
26CONFIG_LOCALVERSION_AUTO=y
27CONFIG_SWAP=y
28CONFIG_SYSVIPC=y
29# CONFIG_POSIX_MQUEUE is not set
30# CONFIG_BSD_PROCESS_ACCT is not set
31CONFIG_SYSCTL=y
32# CONFIG_AUDIT is not set
33# CONFIG_HOTPLUG is not set
34CONFIG_KOBJECT_UEVENT=y
35CONFIG_IKCONFIG=y
36CONFIG_IKCONFIG_PROC=y
37CONFIG_INITRAMFS_SOURCE=""
38CONFIG_EMBEDDED=y
39CONFIG_KALLSYMS=y
40# CONFIG_KALLSYMS_ALL is not set
41# CONFIG_KALLSYMS_EXTRA_PASS is not set
42CONFIG_PRINTK=y
43CONFIG_BUG=y
44CONFIG_BASE_FULL=y
45CONFIG_FUTEX=y
46CONFIG_EPOLL=y
47CONFIG_CC_OPTIMIZE_FOR_SIZE=y
48CONFIG_SHMEM=y
49CONFIG_CC_ALIGN_FUNCTIONS=0
50CONFIG_CC_ALIGN_LABELS=0
51CONFIG_CC_ALIGN_LOOPS=0
52CONFIG_CC_ALIGN_JUMPS=0
53# CONFIG_TINY_SHMEM is not set
54CONFIG_BASE_SMALL=0
55
56#
57# Loadable module support
58#
59CONFIG_MODULES=y
60CONFIG_MODULE_UNLOAD=y
61# CONFIG_MODULE_FORCE_UNLOAD is not set
62CONFIG_OBSOLETE_MODPARM=y
63# CONFIG_MODVERSIONS is not set
64# CONFIG_MODULE_SRCVERSION_ALL is not set
65CONFIG_KMOD=y
66
67#
68# System Type
69#
70# CONFIG_ARCH_CLPS7500 is not set
71CONFIG_ARCH_CLPS711X=y
72# CONFIG_ARCH_CO285 is not set
73# CONFIG_ARCH_EBSA110 is not set
74# CONFIG_ARCH_CAMELOT is not set
75# CONFIG_ARCH_FOOTBRIDGE is not set
76# CONFIG_ARCH_INTEGRATOR is not set
77# CONFIG_ARCH_IOP3XX is not set
78# CONFIG_ARCH_IXP4XX is not set
79# CONFIG_ARCH_IXP2000 is not set
80# CONFIG_ARCH_L7200 is not set
81# CONFIG_ARCH_PXA is not set
82# CONFIG_ARCH_RPC is not set
83# CONFIG_ARCH_SA1100 is not set
84# CONFIG_ARCH_S3C2410 is not set
85# CONFIG_ARCH_SHARK is not set
86# CONFIG_ARCH_LH7A40X is not set
87# CONFIG_ARCH_OMAP is not set
88# CONFIG_ARCH_VERSATILE is not set
89# CONFIG_ARCH_IMX is not set
90# CONFIG_ARCH_H720X is not set
91# CONFIG_ARCH_AAEC2000 is not set
92
93#
94# CLPS711X/EP721X Implementations
95#
96# CONFIG_ARCH_AUTCPU12 is not set
97# CONFIG_ARCH_CDB89712 is not set
98# CONFIG_ARCH_CEIVA is not set
99# CONFIG_ARCH_CLEP7312 is not set
100# CONFIG_ARCH_EDB7211 is not set
101# CONFIG_ARCH_P720T is not set
102# CONFIG_ARCH_FORTUNET is not set
103CONFIG_MACH_MP1000=y
104CONFIG_MP1000_90MHZ=y
105
106#
107# Processor Type
108#
109CONFIG_CPU_32=y
110CONFIG_CPU_ARM720T=y
111CONFIG_CPU_32v4=y
112CONFIG_CPU_ABRT_LV4T=y
113CONFIG_CPU_CACHE_V4=y
114CONFIG_CPU_CACHE_VIVT=y
115CONFIG_CPU_COPY_V4WT=y
116CONFIG_CPU_TLB_V4WT=y
117
118#
119# Processor Features
120#
121CONFIG_ARM_THUMB=y
122
123#
124# Bus support
125#
126CONFIG_ISA_DMA_API=y
127
128#
129# PCCARD (PCMCIA/CardBus) support
130#
131# CONFIG_PCCARD is not set
132
133#
134# Kernel Features
135#
136# CONFIG_SMP is not set
137CONFIG_PREEMPT=y
138# CONFIG_NO_IDLE_HZ is not set
139# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
140CONFIG_SELECT_MEMORY_MODEL=y
141CONFIG_FLATMEM_MANUAL=y
142# CONFIG_DISCONTIGMEM_MANUAL is not set
143# CONFIG_SPARSEMEM_MANUAL is not set
144CONFIG_FLATMEM=y
145CONFIG_FLAT_NODE_MEM_MAP=y
146# CONFIG_SPARSEMEM_STATIC is not set
147CONFIG_ALIGNMENT_TRAP=y
148
149#
150# Boot options
151#
152CONFIG_ZBOOT_ROM_TEXT=0x0
153CONFIG_ZBOOT_ROM_BSS=0x0
154CONFIG_CMDLINE="console=ttyCL,38400 root=/dev/discs/disc0/part1 ip=any cs89x0_media=rj45"
155# CONFIG_XIP_KERNEL is not set
156
157#
158# Floating point emulation
159#
160
161#
162# At least one emulation must be selected
163#
164CONFIG_FPE_NWFPE=y
165# CONFIG_FPE_NWFPE_XP is not set
166# CONFIG_FPE_FASTFPE is not set
167
168#
169# Userspace binary formats
170#
171CONFIG_BINFMT_ELF=y
172# CONFIG_BINFMT_AOUT is not set
173CONFIG_BINFMT_MISC=y
174# CONFIG_ARTHUR is not set
175
176#
177# Power management options
178#
179# CONFIG_PM is not set
180
181#
182# Networking
183#
184CONFIG_NET=y
185
186#
187# Networking options
188#
189CONFIG_PACKET=y
190# CONFIG_PACKET_MMAP is not set
191CONFIG_UNIX=y
192# CONFIG_NET_KEY is not set
193CONFIG_INET=y
194# CONFIG_IP_MULTICAST is not set
195# CONFIG_IP_ADVANCED_ROUTER is not set
196CONFIG_IP_FIB_HASH=y
197CONFIG_IP_PNP=y
198CONFIG_IP_PNP_DHCP=y
199CONFIG_IP_PNP_BOOTP=y
200CONFIG_IP_PNP_RARP=y
201# CONFIG_NET_IPIP is not set
202# CONFIG_NET_IPGRE is not set
203# CONFIG_ARPD is not set
204# CONFIG_SYN_COOKIES is not set
205# CONFIG_INET_AH is not set
206# CONFIG_INET_ESP is not set
207# CONFIG_INET_IPCOMP is not set
208# CONFIG_INET_TUNNEL is not set
209CONFIG_INET_DIAG=y
210CONFIG_INET_TCP_DIAG=y
211# CONFIG_TCP_CONG_ADVANCED is not set
212CONFIG_TCP_CONG_BIC=y
213CONFIG_IPV6=y
214# CONFIG_IPV6_PRIVACY is not set
215# CONFIG_INET6_AH is not set
216# CONFIG_INET6_ESP is not set
217# CONFIG_INET6_IPCOMP is not set
218# CONFIG_INET6_TUNNEL is not set
219# CONFIG_IPV6_TUNNEL is not set
220# CONFIG_NETFILTER is not set
221
222#
223# DCCP Configuration (EXPERIMENTAL)
224#
225# CONFIG_IP_DCCP is not set
226
227#
228# SCTP Configuration (EXPERIMENTAL)
229#
230# CONFIG_IP_SCTP is not set
231# CONFIG_ATM is not set
232# CONFIG_BRIDGE is not set
233# CONFIG_VLAN_8021Q is not set
234# CONFIG_DECNET is not set
235# CONFIG_LLC2 is not set
236# CONFIG_IPX is not set
237# CONFIG_ATALK is not set
238# CONFIG_X25 is not set
239# CONFIG_LAPB is not set
240# CONFIG_NET_DIVERT is not set
241# CONFIG_ECONET is not set
242# CONFIG_WAN_ROUTER is not set
243# CONFIG_NET_SCHED is not set
244# CONFIG_NET_CLS_ROUTE is not set
245
246#
247# Network testing
248#
249# CONFIG_NET_PKTGEN is not set
250# CONFIG_NETFILTER_NETLINK is not set
251# CONFIG_HAMRADIO is not set
252# CONFIG_IRDA is not set
253# CONFIG_BT is not set
254# CONFIG_IEEE80211 is not set
255
256#
257# Device Drivers
258#
259
260#
261# Generic Driver Options
262#
263CONFIG_STANDALONE=y
264CONFIG_PREVENT_FIRMWARE_BUILD=y
265# CONFIG_FW_LOADER is not set
266# CONFIG_DEBUG_DRIVER is not set
267
268#
269# Memory Technology Devices (MTD)
270#
271CONFIG_MTD=y
272CONFIG_MTD_DEBUG=y
273CONFIG_MTD_DEBUG_VERBOSE=3
274# CONFIG_MTD_CONCAT is not set
275CONFIG_MTD_PARTITIONS=y
276CONFIG_MTD_REDBOOT_PARTS=m
277CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
278CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
279# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
280CONFIG_MTD_CMDLINE_PARTS=y
281# CONFIG_MTD_AFS_PARTS is not set
282
283#
284# User Modules And Translation Layers
285#
286CONFIG_MTD_CHAR=y
287CONFIG_MTD_BLOCK=y
288# CONFIG_FTL is not set
289# CONFIG_NFTL is not set
290# CONFIG_INFTL is not set
291
292#
293# RAM/ROM/Flash chip drivers
294#
295CONFIG_MTD_CFI=m
296# CONFIG_MTD_JEDECPROBE is not set
297CONFIG_MTD_GEN_PROBE=m
298CONFIG_MTD_CFI_ADV_OPTIONS=y
299CONFIG_MTD_CFI_NOSWAP=y
300# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
301# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
302CONFIG_MTD_CFI_GEOMETRY=y
303# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
304# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set
305CONFIG_MTD_MAP_BANK_WIDTH_4=y
306# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
307# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
308# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
309# CONFIG_MTD_CFI_I1 is not set
310CONFIG_MTD_CFI_I2=y
311# CONFIG_MTD_CFI_I4 is not set
312# CONFIG_MTD_CFI_I8 is not set
313# CONFIG_MTD_OTP is not set
314CONFIG_MTD_CFI_INTELEXT=m
315# CONFIG_MTD_CFI_AMDSTD is not set
316# CONFIG_MTD_CFI_STAA is not set
317CONFIG_MTD_CFI_UTIL=m
318# CONFIG_MTD_RAM is not set
319# CONFIG_MTD_ROM is not set
320# CONFIG_MTD_ABSENT is not set
321# CONFIG_MTD_OBSOLETE_CHIPS is not set
322# CONFIG_MTD_XIP is not set
323
324#
325# Mapping drivers for chip access
326#
327# CONFIG_MTD_COMPLEX_MAPPINGS is not set
328CONFIG_MTD_PHYSMAP=m
329CONFIG_MTD_PHYSMAP_START=0x0000000
330CONFIG_MTD_PHYSMAP_LEN=0x4000000
331CONFIG_MTD_PHYSMAP_BANKWIDTH=2
332# CONFIG_MTD_ARM_INTEGRATOR is not set
333CONFIG_MTD_EDB7312=m
334# CONFIG_MTD_PLATRAM is not set
335
336#
337# Self-contained MTD device drivers
338#
339# CONFIG_MTD_SLRAM is not set
340# CONFIG_MTD_PHRAM is not set
341# CONFIG_MTD_MTDRAM is not set
342# CONFIG_MTD_BLKMTD is not set
343# CONFIG_MTD_BLOCK2MTD is not set
344
345#
346# Disk-On-Chip Device Drivers
347#
348# CONFIG_MTD_DOC2000 is not set
349# CONFIG_MTD_DOC2001 is not set
350# CONFIG_MTD_DOC2001PLUS is not set
351
352#
353# NAND Flash Device Drivers
354#
355CONFIG_MTD_NAND=y
356# CONFIG_MTD_NAND_VERIFY_WRITE is not set
357CONFIG_MTD_NAND_MP1000=y
358CONFIG_MTD_NAND_IDS=y
359# CONFIG_MTD_NAND_DISKONCHIP is not set
360# CONFIG_MTD_NAND_NANDSIM is not set
361
362#
363# Parallel port support
364#
365# CONFIG_PARPORT is not set
366
367#
368# Plug and Play support
369#
370
371#
372# Block devices
373#
374# CONFIG_BLK_DEV_COW_COMMON is not set
375CONFIG_BLK_DEV_LOOP=m
376# CONFIG_BLK_DEV_CRYPTOLOOP is not set
377# CONFIG_BLK_DEV_NBD is not set
378CONFIG_BLK_DEV_RAM=y
379CONFIG_BLK_DEV_RAM_COUNT=2
380CONFIG_BLK_DEV_RAM_SIZE=16384
381CONFIG_BLK_DEV_INITRD=y
382# CONFIG_CDROM_PKTCDVD is not set
383
384#
385# IO Schedulers
386#
387CONFIG_IOSCHED_NOOP=y
388CONFIG_IOSCHED_AS=y
389CONFIG_IOSCHED_DEADLINE=y
390CONFIG_IOSCHED_CFQ=y
391# CONFIG_ATA_OVER_ETH is not set
392
393#
394# ATA/ATAPI/MFM/RLL support
395#
396CONFIG_IDE=y
397CONFIG_BLK_DEV_IDE=y
398
399#
400# Please see Documentation/ide.txt for help/info on IDE drives
401#
402# CONFIG_BLK_DEV_IDE_SATA is not set
403# CONFIG_BLK_DEV_HD_IDE is not set
404CONFIG_BLK_DEV_IDEDISK=y
405# CONFIG_IDEDISK_MULTI_MODE is not set
406# CONFIG_BLK_DEV_IDECD is not set
407# CONFIG_BLK_DEV_IDETAPE is not set
408# CONFIG_BLK_DEV_IDEFLOPPY is not set
409# CONFIG_IDE_TASK_IOCTL is not set
410
411#
412# IDE chipset support/bugfixes
413#
414# CONFIG_IDE_GENERIC is not set
415CONFIG_IDE_ARM=y
416CONFIG_BLK_DEV_IDE_MP1000=y
417# CONFIG_BLK_DEV_IDEDMA is not set
418# CONFIG_IDEDMA_AUTO is not set
419# CONFIG_BLK_DEV_HD is not set
420
421#
422# SCSI device support
423#
424# CONFIG_RAID_ATTRS is not set
425# CONFIG_SCSI is not set
426
427#
428# Multi-device support (RAID and LVM)
429#
430CONFIG_MD=y
431# CONFIG_BLK_DEV_MD is not set
432CONFIG_BLK_DEV_DM=y
433# CONFIG_DM_CRYPT is not set
434# CONFIG_DM_SNAPSHOT is not set
435# CONFIG_DM_MIRROR is not set
436# CONFIG_DM_ZERO is not set
437# CONFIG_DM_MULTIPATH is not set
438
439#
440# Fusion MPT device support
441#
442# CONFIG_FUSION is not set
443
444#
445# IEEE 1394 (FireWire) support
446#
447# CONFIG_IEEE1394 is not set
448
449#
450# I2O device support
451#
452
453#
454# Network device support
455#
456CONFIG_NETDEVICES=y
457# CONFIG_DUMMY is not set
458# CONFIG_BONDING is not set
459# CONFIG_EQUALIZER is not set
460# CONFIG_TUN is not set
461
462#
463# PHY device support
464#
465# CONFIG_PHYLIB is not set
466
467#
468# Ethernet (10 or 100Mbit)
469#
470CONFIG_NET_ETHERNET=y
471# CONFIG_MII is not set
472# CONFIG_SMC91X is not set
473# CONFIG_DM9000 is not set
474CONFIG_CS89x0=y
475
476#
477# Ethernet (1000 Mbit)
478#
479
480#
481# Ethernet (10000 Mbit)
482#
483
484#
485# Token Ring devices
486#
487
488#
489# Wireless LAN (non-hamradio)
490#
491# CONFIG_NET_RADIO is not set
492
493#
494# Wan interfaces
495#
496# CONFIG_WAN is not set
497# CONFIG_PPP is not set
498# CONFIG_SLIP is not set
499# CONFIG_SHAPER is not set
500# CONFIG_NETCONSOLE is not set
501# CONFIG_NETPOLL is not set
502# CONFIG_NET_POLL_CONTROLLER is not set
503
504#
505# ISDN subsystem
506#
507# CONFIG_ISDN is not set
508
509#
510# Input device support
511#
512CONFIG_INPUT=y
513
514#
515# Userland interfaces
516#
517# CONFIG_INPUT_MOUSEDEV is not set
518# CONFIG_INPUT_JOYDEV is not set
519# CONFIG_INPUT_TSDEV is not set
520# CONFIG_INPUT_EVDEV is not set
521CONFIG_INPUT_EVBUG=y
522
523#
524# Input Device Drivers
525#
526# CONFIG_INPUT_KEYBOARD is not set
527# CONFIG_INPUT_MOUSE is not set
528# CONFIG_INPUT_JOYSTICK is not set
529# CONFIG_INPUT_TOUCHSCREEN is not set
530# CONFIG_INPUT_MISC is not set
531
532#
533# Hardware I/O ports
534#
535CONFIG_SERIO=y
536CONFIG_SERIO_SERPORT=y
537# CONFIG_SERIO_LIBPS2 is not set
538# CONFIG_SERIO_RAW is not set
539# CONFIG_GAMEPORT is not set
540
541#
542# Character devices
543#
544CONFIG_VT=y
545CONFIG_VT_CONSOLE=y
546CONFIG_HW_CONSOLE=y
547# CONFIG_SERIAL_NONSTANDARD is not set
548
549#
550# Serial drivers
551#
552CONFIG_SERIAL_8250=y
553CONFIG_SERIAL_8250_CONSOLE=y
554CONFIG_SERIAL_8250_NR_UARTS=2
555# CONFIG_SERIAL_8250_EXTENDED is not set
556
557#
558# Non-8250 serial port support
559#
560CONFIG_SERIAL_CLPS711X=y
561CONFIG_SERIAL_CLPS711X_CONSOLE=y
562CONFIG_SERIAL_CORE=y
563CONFIG_SERIAL_CORE_CONSOLE=y
564CONFIG_UNIX98_PTYS=y
565CONFIG_LEGACY_PTYS=y
566CONFIG_LEGACY_PTY_COUNT=256
567
568#
569# IPMI
570#
571# CONFIG_IPMI_HANDLER is not set
572
573#
574# Watchdog Cards
575#
576# CONFIG_WATCHDOG is not set
577CONFIG_NVRAM=y
578CONFIG_RTC=y
579# CONFIG_DTLK is not set
580# CONFIG_R3964 is not set
581
582#
583# Ftape, the floppy tape device driver
584#
585# CONFIG_RAW_DRIVER is not set
586
587#
588# TPM devices
589#
590
591#
592# I2C support
593#
594# CONFIG_I2C is not set
595
596#
597# Hardware Monitoring support
598#
599CONFIG_HWMON=y
600# CONFIG_HWMON_VID is not set
601# CONFIG_HWMON_DEBUG_CHIP is not set
602
603#
604# Misc devices
605#
606
607#
608# Multimedia Capabilities Port drivers
609#
610
611#
612# Multimedia devices
613#
614# CONFIG_VIDEO_DEV is not set
615
616#
617# Digital Video Broadcasting Devices
618#
619# CONFIG_DVB is not set
620
621#
622# Graphics support
623#
624# CONFIG_FB is not set
625
626#
627# Console display driver support
628#
629# CONFIG_VGA_CONSOLE is not set
630CONFIG_DUMMY_CONSOLE=y
631
632#
633# Sound
634#
635# CONFIG_SOUND is not set
636
637#
638# USB support
639#
640CONFIG_USB_ARCH_HAS_HCD=y
641# CONFIG_USB_ARCH_HAS_OHCI is not set
642# CONFIG_USB is not set
643
644#
645# USB Gadget Support
646#
647# CONFIG_USB_GADGET is not set
648
649#
650# MMC/SD Card support
651#
652# CONFIG_MMC is not set
653
654#
655# File systems
656#
657CONFIG_EXT2_FS=y
658CONFIG_EXT2_FS_XATTR=y
659# CONFIG_EXT2_FS_POSIX_ACL is not set
660# CONFIG_EXT2_FS_SECURITY is not set
661# CONFIG_EXT2_FS_XIP is not set
662CONFIG_EXT3_FS=y
663CONFIG_EXT3_FS_XATTR=y
664# CONFIG_EXT3_FS_POSIX_ACL is not set
665# CONFIG_EXT3_FS_SECURITY is not set
666CONFIG_JBD=y
667# CONFIG_JBD_DEBUG is not set
668CONFIG_FS_MBCACHE=y
669CONFIG_REISERFS_FS=m
670# CONFIG_REISERFS_CHECK is not set
671# CONFIG_REISERFS_PROC_INFO is not set
672# CONFIG_REISERFS_FS_XATTR is not set
673# CONFIG_JFS_FS is not set
674CONFIG_FS_POSIX_ACL=y
675# CONFIG_XFS_FS is not set
676# CONFIG_MINIX_FS is not set
677# CONFIG_ROMFS_FS is not set
678CONFIG_INOTIFY=y
679CONFIG_QUOTA=y
680# CONFIG_QFMT_V1 is not set
681# CONFIG_QFMT_V2 is not set
682CONFIG_QUOTACTL=y
683CONFIG_DNOTIFY=y
684# CONFIG_AUTOFS_FS is not set
685# CONFIG_AUTOFS4_FS is not set
686# CONFIG_FUSE_FS is not set
687
688#
689# CD-ROM/DVD Filesystems
690#
691# CONFIG_ISO9660_FS is not set
692# CONFIG_UDF_FS is not set
693
694#
695# DOS/FAT/NT Filesystems
696#
697# CONFIG_MSDOS_FS is not set
698# CONFIG_VFAT_FS is not set
699# CONFIG_NTFS_FS is not set
700
701#
702# Pseudo filesystems
703#
704CONFIG_PROC_FS=y
705CONFIG_SYSFS=y
706CONFIG_TMPFS=y
707# CONFIG_HUGETLBFS is not set
708# CONFIG_HUGETLB_PAGE is not set
709CONFIG_RAMFS=y
710# CONFIG_RELAYFS_FS is not set
711
712#
713# Miscellaneous filesystems
714#
715# CONFIG_ADFS_FS is not set
716# CONFIG_AFFS_FS is not set
717# CONFIG_HFS_FS is not set
718# CONFIG_HFSPLUS_FS is not set
719# CONFIG_BEFS_FS is not set
720# CONFIG_BFS_FS is not set
721# CONFIG_EFS_FS is not set
722# CONFIG_JFFS_FS is not set
723CONFIG_JFFS2_FS=m
724CONFIG_JFFS2_FS_DEBUG=0
725CONFIG_JFFS2_FS_WRITEBUFFER=y
726# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
727CONFIG_JFFS2_ZLIB=y
728CONFIG_JFFS2_RTIME=y
729# CONFIG_JFFS2_RUBIN is not set
730CONFIG_CRAMFS=m
731# CONFIG_VXFS_FS is not set
732# CONFIG_HPFS_FS is not set
733# CONFIG_QNX4FS_FS is not set
734# CONFIG_SYSV_FS is not set
735# CONFIG_UFS_FS is not set
736
737#
738# Network File Systems
739#
740CONFIG_NFS_FS=y
741CONFIG_NFS_V3=y
742# CONFIG_NFS_V3_ACL is not set
743CONFIG_NFS_V4=y
744# CONFIG_NFS_DIRECTIO is not set
745CONFIG_NFSD=y
746CONFIG_NFSD_V3=y
747# CONFIG_NFSD_V3_ACL is not set
748CONFIG_NFSD_V4=y
749CONFIG_NFSD_TCP=y
750CONFIG_ROOT_NFS=y
751CONFIG_LOCKD=y
752CONFIG_LOCKD_V4=y
753CONFIG_EXPORTFS=y
754CONFIG_NFS_COMMON=y
755CONFIG_SUNRPC=y
756CONFIG_SUNRPC_GSS=y
757CONFIG_RPCSEC_GSS_KRB5=y
758# CONFIG_RPCSEC_GSS_SPKM3 is not set
759CONFIG_SMB_FS=m
760# CONFIG_SMB_NLS_DEFAULT is not set
761CONFIG_CIFS=m
762# CONFIG_CIFS_STATS is not set
763# CONFIG_CIFS_XATTR is not set
764# CONFIG_CIFS_EXPERIMENTAL is not set
765# CONFIG_NCP_FS is not set
766# CONFIG_CODA_FS is not set
767# CONFIG_AFS_FS is not set
768# CONFIG_9P_FS is not set
769
770#
771# Partition Types
772#
773# CONFIG_PARTITION_ADVANCED is not set
774CONFIG_MSDOS_PARTITION=y
775
776#
777# Native Language Support
778#
779CONFIG_NLS=y
780CONFIG_NLS_DEFAULT="iso8859-1"
781CONFIG_NLS_CODEPAGE_437=y
782# CONFIG_NLS_CODEPAGE_737 is not set
783# CONFIG_NLS_CODEPAGE_775 is not set
784# CONFIG_NLS_CODEPAGE_850 is not set
785# CONFIG_NLS_CODEPAGE_852 is not set
786# CONFIG_NLS_CODEPAGE_855 is not set
787# CONFIG_NLS_CODEPAGE_857 is not set
788# CONFIG_NLS_CODEPAGE_860 is not set
789# CONFIG_NLS_CODEPAGE_861 is not set
790# CONFIG_NLS_CODEPAGE_862 is not set
791# CONFIG_NLS_CODEPAGE_863 is not set
792# CONFIG_NLS_CODEPAGE_864 is not set
793# CONFIG_NLS_CODEPAGE_865 is not set
794# CONFIG_NLS_CODEPAGE_866 is not set
795# CONFIG_NLS_CODEPAGE_869 is not set
796# CONFIG_NLS_CODEPAGE_936 is not set
797# CONFIG_NLS_CODEPAGE_950 is not set
798# CONFIG_NLS_CODEPAGE_932 is not set
799# CONFIG_NLS_CODEPAGE_949 is not set
800# CONFIG_NLS_CODEPAGE_874 is not set
801# CONFIG_NLS_ISO8859_8 is not set
802# CONFIG_NLS_CODEPAGE_1250 is not set
803# CONFIG_NLS_CODEPAGE_1251 is not set
804# CONFIG_NLS_ASCII is not set
805# CONFIG_NLS_ISO8859_1 is not set
806# CONFIG_NLS_ISO8859_2 is not set
807# CONFIG_NLS_ISO8859_3 is not set
808# CONFIG_NLS_ISO8859_4 is not set
809# CONFIG_NLS_ISO8859_5 is not set
810# CONFIG_NLS_ISO8859_6 is not set
811# CONFIG_NLS_ISO8859_7 is not set
812# CONFIG_NLS_ISO8859_9 is not set
813# CONFIG_NLS_ISO8859_13 is not set
814# CONFIG_NLS_ISO8859_14 is not set
815# CONFIG_NLS_ISO8859_15 is not set
816# CONFIG_NLS_KOI8_R is not set
817# CONFIG_NLS_KOI8_U is not set
818# CONFIG_NLS_UTF8 is not set
819
820#
821# Profiling support
822#
823# CONFIG_PROFILING is not set
824
825#
826# Kernel hacking
827#
828CONFIG_PRINTK_TIME=y
829CONFIG_DEBUG_KERNEL=y
830# CONFIG_MAGIC_SYSRQ is not set
831CONFIG_LOG_BUF_SHIFT=14
832CONFIG_DETECT_SOFTLOCKUP=y
833# CONFIG_SCHEDSTATS is not set
834# CONFIG_DEBUG_SLAB is not set
835CONFIG_DEBUG_PREEMPT=y
836# CONFIG_DEBUG_SPINLOCK is not set
837# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
838# CONFIG_DEBUG_KOBJECT is not set
839# CONFIG_DEBUG_BUGVERBOSE is not set
840CONFIG_DEBUG_INFO=y
841# CONFIG_DEBUG_FS is not set
842CONFIG_FRAME_POINTER=y
843CONFIG_DEBUG_USER=y
844CONFIG_DEBUG_WAITQ=y
845CONFIG_DEBUG_ERRORS=y
846CONFIG_DEBUG_LL=y
847# CONFIG_DEBUG_ICEDCC is not set
848# CONFIG_DEBUG_CLPS711X_UART2 is not set
849
850#
851# Security options
852#
853# CONFIG_KEYS is not set
854# CONFIG_SECURITY is not set
855
856#
857# Cryptographic options
858#
859CONFIG_CRYPTO=y
860# CONFIG_CRYPTO_HMAC is not set
861# CONFIG_CRYPTO_NULL is not set
862# CONFIG_CRYPTO_MD4 is not set
863CONFIG_CRYPTO_MD5=y
864# CONFIG_CRYPTO_SHA1 is not set
865# CONFIG_CRYPTO_SHA256 is not set
866# CONFIG_CRYPTO_SHA512 is not set
867# CONFIG_CRYPTO_WP512 is not set
868# CONFIG_CRYPTO_TGR192 is not set
869CONFIG_CRYPTO_DES=y
870# CONFIG_CRYPTO_BLOWFISH is not set
871# CONFIG_CRYPTO_TWOFISH is not set
872# CONFIG_CRYPTO_SERPENT is not set
873# CONFIG_CRYPTO_AES is not set
874# CONFIG_CRYPTO_CAST5 is not set
875# CONFIG_CRYPTO_CAST6 is not set
876# CONFIG_CRYPTO_TEA is not set
877# CONFIG_CRYPTO_ARC4 is not set
878# CONFIG_CRYPTO_KHAZAD is not set
879# CONFIG_CRYPTO_ANUBIS is not set
880# CONFIG_CRYPTO_DEFLATE is not set
881# CONFIG_CRYPTO_MICHAEL_MIC is not set
882# CONFIG_CRYPTO_CRC32C is not set
883# CONFIG_CRYPTO_TEST is not set
884
885#
886# Hardware crypto devices
887#
888
889#
890# Library routines
891#
892# CONFIG_CRC_CCITT is not set
893# CONFIG_CRC16 is not set
894CONFIG_CRC32=y
895# CONFIG_LIBCRC32C is not set
896CONFIG_ZLIB_INFLATE=m
897CONFIG_ZLIB_DEFLATE=m
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index 1a85cfdad5ac..6055e1427ba3 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -11,6 +11,7 @@
11 */ 11 */
12#include <linux/config.h> 12#include <linux/config.h>
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/moduleloader.h>
14#include <linux/kernel.h> 15#include <linux/kernel.h>
15#include <linux/elf.h> 16#include <linux/elf.h>
16#include <linux/vmalloc.h> 17#include <linux/vmalloc.h>
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index f6de76e0a45d..baa09601a64e 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -345,7 +345,9 @@ static int bad_syscall(int n, struct pt_regs *regs)
345 struct thread_info *thread = current_thread_info(); 345 struct thread_info *thread = current_thread_info();
346 siginfo_t info; 346 siginfo_t info;
347 347
348 if (current->personality != PER_LINUX && thread->exec_domain->handler) { 348 if (current->personality != PER_LINUX &&
349 current->personality != PER_LINUX_32BIT &&
350 thread->exec_domain->handler) {
349 thread->exec_domain->handler(n, regs); 351 thread->exec_domain->handler(n, regs);
350 return regs->ARM_r0; 352 return regs->ARM_r0;
351 } 353 }
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 8725d63e4219..71e5b99e519e 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -11,7 +11,7 @@ lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \
11 strnlen_user.o strchr.o strrchr.o testchangebit.o \ 11 strnlen_user.o strchr.o strrchr.o testchangebit.o \
12 testclearbit.o testsetbit.o uaccess.o getuser.o \ 12 testclearbit.o testsetbit.o uaccess.o getuser.o \
13 putuser.o ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ 13 putuser.o ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
14 ucmpdi2.o lib1funcs.o div64.o \ 14 ucmpdi2.o lib1funcs.o div64.o sha1.o \
15 io-readsb.o io-writesb.o io-readsl.o io-writesl.o 15 io-readsb.o io-writesb.o io-readsl.o io-writesl.o
16 16
17ifeq ($(CONFIG_CPU_32v3),y) 17ifeq ($(CONFIG_CPU_32v3),y)
diff --git a/arch/arm/lib/sha1.S b/arch/arm/lib/sha1.S
new file mode 100644
index 000000000000..ff6ece487ffc
--- /dev/null
+++ b/arch/arm/lib/sha1.S
@@ -0,0 +1,206 @@
1/*
2 * linux/arch/arm/lib/sha1.S
3 *
4 * SHA transform optimized for ARM
5 *
6 * Copyright: (C) 2005 by Nicolas Pitre <nico@cam.org>
7 * Created: September 17, 2005
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * The reference implementation for this code is linux/lib/sha1.c
14 */
15
16#include <linux/linkage.h>
17
18 .text
19
20
21/*
22 * void sha_transform(__u32 *digest, const char *in, __u32 *W)
23 *
24 * Note: the "in" ptr may be unaligned.
25 */
26
27ENTRY(sha_transform)
28
29 stmfd sp!, {r4 - r8, lr}
30
31 @ for (i = 0; i < 16; i++)
32 @ W[i] = be32_to_cpu(in[i]); */
33
34#ifdef __ARMEB__
35 mov r4, r0
36 mov r0, r2
37 mov r2, #64
38 bl memcpy
39 mov r2, r0
40 mov r0, r4
41#else
42 mov r3, r2
43 mov lr, #16
441: ldrb r4, [r1], #1
45 ldrb r5, [r1], #1
46 ldrb r6, [r1], #1
47 ldrb r7, [r1], #1
48 subs lr, lr, #1
49 orr r5, r5, r4, lsl #8
50 orr r6, r6, r5, lsl #8
51 orr r7, r7, r6, lsl #8
52 str r7, [r3], #4
53 bne 1b
54#endif
55
56 @ for (i = 0; i < 64; i++)
57 @ W[i+16] = ror(W[i+13] ^ W[i+8] ^ W[i+2] ^ W[i], 31);
58
59 sub r3, r2, #4
60 mov lr, #64
612: ldr r4, [r3, #4]!
62 subs lr, lr, #1
63 ldr r5, [r3, #8]
64 ldr r6, [r3, #32]
65 ldr r7, [r3, #52]
66 eor r4, r4, r5
67 eor r4, r4, r6
68 eor r4, r4, r7
69 mov r4, r4, ror #31
70 str r4, [r3, #64]
71 bne 2b
72
73 /*
74 * The SHA functions are:
75 *
76 * f1(B,C,D) = (D ^ (B & (C ^ D)))
77 * f2(B,C,D) = (B ^ C ^ D)
78 * f3(B,C,D) = ((B & C) | (D & (B | C)))
79 *
80 * Then the sub-blocks are processed as follows:
81 *
82 * A' = ror(A, 27) + f(B,C,D) + E + K + *W++
83 * B' = A
84 * C' = ror(B, 2)
85 * D' = C
86 * E' = D
87 *
88 * We therefore unroll each loop 5 times to avoid register shuffling.
89 * Also the ror for C (and also D and E which are successivelyderived
90 * from it) is applied in place to cut on an additional mov insn for
91 * each round.
92 */
93
94 .macro sha_f1, A, B, C, D, E
95 ldr r3, [r2], #4
96 eor ip, \C, \D
97 add \E, r1, \E, ror #2
98 and ip, \B, ip, ror #2
99 add \E, \E, \A, ror #27
100 eor ip, ip, \D, ror #2
101 add \E, \E, r3
102 add \E, \E, ip
103 .endm
104
105 .macro sha_f2, A, B, C, D, E
106 ldr r3, [r2], #4
107 add \E, r1, \E, ror #2
108 eor ip, \B, \C, ror #2
109 add \E, \E, \A, ror #27
110 eor ip, ip, \D, ror #2
111 add \E, \E, r3
112 add \E, \E, ip
113 .endm
114
115 .macro sha_f3, A, B, C, D, E
116 ldr r3, [r2], #4
117 add \E, r1, \E, ror #2
118 orr ip, \B, \C, ror #2
119 add \E, \E, \A, ror #27
120 and ip, ip, \D, ror #2
121 add \E, \E, r3
122 and r3, \B, \C, ror #2
123 orr ip, ip, r3
124 add \E, \E, ip
125 .endm
126
127 ldmia r0, {r4 - r8}
128
129 mov lr, #4
130 ldr r1, .L_sha_K + 0
131
132 /* adjust initial values */
133 mov r6, r6, ror #30
134 mov r7, r7, ror #30
135 mov r8, r8, ror #30
136
1373: subs lr, lr, #1
138 sha_f1 r4, r5, r6, r7, r8
139 sha_f1 r8, r4, r5, r6, r7
140 sha_f1 r7, r8, r4, r5, r6
141 sha_f1 r6, r7, r8, r4, r5
142 sha_f1 r5, r6, r7, r8, r4
143 bne 3b
144
145 ldr r1, .L_sha_K + 4
146 mov lr, #4
147
1484: subs lr, lr, #1
149 sha_f2 r4, r5, r6, r7, r8
150 sha_f2 r8, r4, r5, r6, r7
151 sha_f2 r7, r8, r4, r5, r6
152 sha_f2 r6, r7, r8, r4, r5
153 sha_f2 r5, r6, r7, r8, r4
154 bne 4b
155
156 ldr r1, .L_sha_K + 8
157 mov lr, #4
158
1595: subs lr, lr, #1
160 sha_f3 r4, r5, r6, r7, r8
161 sha_f3 r8, r4, r5, r6, r7
162 sha_f3 r7, r8, r4, r5, r6
163 sha_f3 r6, r7, r8, r4, r5
164 sha_f3 r5, r6, r7, r8, r4
165 bne 5b
166
167 ldr r1, .L_sha_K + 12
168 mov lr, #4
169
1706: subs lr, lr, #1
171 sha_f2 r4, r5, r6, r7, r8
172 sha_f2 r8, r4, r5, r6, r7
173 sha_f2 r7, r8, r4, r5, r6
174 sha_f2 r6, r7, r8, r4, r5
175 sha_f2 r5, r6, r7, r8, r4
176 bne 6b
177
178 ldmia r0, {r1, r2, r3, ip, lr}
179 add r4, r1, r4
180 add r5, r2, r5
181 add r6, r3, r6, ror #2
182 add r7, ip, r7, ror #2
183 add r8, lr, r8, ror #2
184 stmia r0, {r4 - r8}
185
186 ldmfd sp!, {r4 - r8, pc}
187
188.L_sha_K:
189 .word 0x5a827999, 0x6ed9eba1, 0x8f1bbcdc, 0xca62c1d6
190
191
192/*
193 * void sha_init(__u32 *buf)
194 */
195
196.L_sha_initial_digest:
197 .word 0x67452301, 0xefcdab89, 0x98badcfe, 0x10325476, 0xc3d2e1f0
198
199ENTRY(sha_init)
200
201 str lr, [sp, #-4]!
202 adr r1, .L_sha_initial_digest
203 ldmia r1, {r1, r2, r3, ip, lr}
204 stmia r0, {r1, r2, r3, ip, lr}
205 ldr pc, [sp], #4
206
diff --git a/arch/arm/mach-aaec2000/Makefile b/arch/arm/mach-aaec2000/Makefile
index 20ec83896c37..a8e462f58bc9 100644
--- a/arch/arm/mach-aaec2000/Makefile
+++ b/arch/arm/mach-aaec2000/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Common support (must be linked before board specific support) 5# Common support (must be linked before board specific support)
6obj-y += core.o 6obj-y += core.o clock.o
7 7
8# Specific board support 8# Specific board support
9obj-$(CONFIG_MACH_AAED2000) += aaed2000.o 9obj-$(CONFIG_MACH_AAED2000) += aaed2000.o
diff --git a/arch/arm/mach-aaec2000/aaed2000.c b/arch/arm/mach-aaec2000/aaed2000.c
index c9d899886648..f5ef69702296 100644
--- a/arch/arm/mach-aaec2000/aaed2000.c
+++ b/arch/arm/mach-aaec2000/aaed2000.c
@@ -27,16 +27,65 @@
27#include <asm/mach/map.h> 27#include <asm/mach/map.h>
28#include <asm/mach/irq.h> 28#include <asm/mach/irq.h>
29 29
30#include <asm/arch/aaed2000.h>
31
30#include "core.h" 32#include "core.h"
31 33
34static void aaed2000_clcd_disable(struct clcd_fb *fb)
35{
36 AAED_EXT_GPIO &= ~AAED_EGPIO_LCD_PWR_EN;
37}
38
39static void aaed2000_clcd_enable(struct clcd_fb *fb)
40{
41 AAED_EXT_GPIO |= AAED_EGPIO_LCD_PWR_EN;
42}
43
44struct aaec2000_clcd_info clcd_info = {
45 .enable = aaed2000_clcd_enable,
46 .disable = aaed2000_clcd_disable,
47 .panel = {
48 .mode = {
49 .name = "Sharp",
50 .refresh = 60,
51 .xres = 640,
52 .yres = 480,
53 .pixclock = 39721,
54 .left_margin = 20,
55 .right_margin = 44,
56 .upper_margin = 21,
57 .lower_margin = 34,
58 .hsync_len = 96,
59 .vsync_len = 2,
60 .sync = 0,
61 .vmode = FB_VMODE_NONINTERLACED,
62 },
63 .width = -1,
64 .height = -1,
65 .tim2 = TIM2_IVS | TIM2_IHS,
66 .cntl = CNTL_LCDTFT,
67 .bpp = 16,
68 },
69};
70
32static void __init aaed2000_init_irq(void) 71static void __init aaed2000_init_irq(void)
33{ 72{
34 aaec2000_init_irq(); 73 aaec2000_init_irq();
35} 74}
36 75
76static void __init aaed2000_init(void)
77{
78 aaec2000_set_clcd_plat_data(&clcd_info);
79}
80
81static struct map_desc aaed2000_io_desc[] __initdata = {
82 { EXT_GPIO_VBASE, EXT_GPIO_PBASE, EXT_GPIO_LENGTH, MT_DEVICE }, /* Ext GPIO */
83};
84
37static void __init aaed2000_map_io(void) 85static void __init aaed2000_map_io(void)
38{ 86{
39 aaec2000_map_io(); 87 aaec2000_map_io();
88 iotable_init(aaed2000_io_desc, ARRAY_SIZE(aaed2000_io_desc));
40} 89}
41 90
42MACHINE_START(AAED2000, "Agilent AAED-2000 Development Platform") 91MACHINE_START(AAED2000, "Agilent AAED-2000 Development Platform")
@@ -47,4 +96,5 @@ MACHINE_START(AAED2000, "Agilent AAED-2000 Development Platform")
47 .map_io = aaed2000_map_io, 96 .map_io = aaed2000_map_io,
48 .init_irq = aaed2000_init_irq, 97 .init_irq = aaed2000_init_irq,
49 .timer = &aaec2000_timer, 98 .timer = &aaec2000_timer,
99 .init_machine = aaed2000_init,
50MACHINE_END 100MACHINE_END
diff --git a/arch/arm/mach-aaec2000/clock.c b/arch/arm/mach-aaec2000/clock.c
new file mode 100644
index 000000000000..99e019169dda
--- /dev/null
+++ b/arch/arm/mach-aaec2000/clock.c
@@ -0,0 +1,110 @@
1/*
2 * linux/arch/arm/mach-aaec2000/clock.c
3 *
4 * Copyright (C) 2005 Nicolas Bellido Y Ortega
5 *
6 * Based on linux/arch/arm/mach-integrator/clock.c
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/list.h>
15#include <linux/errno.h>
16#include <linux/err.h>
17
18#include <asm/semaphore.h>
19#include <asm/hardware/clock.h>
20
21#include "clock.h"
22
23static LIST_HEAD(clocks);
24static DECLARE_MUTEX(clocks_sem);
25
26struct clk *clk_get(struct device *dev, const char *id)
27{
28 struct clk *p, *clk = ERR_PTR(-ENOENT);
29
30 down(&clocks_sem);
31 list_for_each_entry(p, &clocks, node) {
32 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
33 clk = p;
34 break;
35 }
36 }
37 up(&clocks_sem);
38
39 return clk;
40}
41EXPORT_SYMBOL(clk_get);
42
43void clk_put(struct clk *clk)
44{
45 module_put(clk->owner);
46}
47EXPORT_SYMBOL(clk_put);
48
49int clk_enable(struct clk *clk)
50{
51 return 0;
52}
53EXPORT_SYMBOL(clk_enable);
54
55void clk_disable(struct clk *clk)
56{
57}
58EXPORT_SYMBOL(clk_disable);
59
60int clk_use(struct clk *clk)
61{
62 return 0;
63}
64EXPORT_SYMBOL(clk_use);
65
66void clk_unuse(struct clk *clk)
67{
68}
69EXPORT_SYMBOL(clk_unuse);
70
71unsigned long clk_get_rate(struct clk *clk)
72{
73 return clk->rate;
74}
75EXPORT_SYMBOL(clk_get_rate);
76
77long clk_round_rate(struct clk *clk, unsigned long rate)
78{
79 return rate;
80}
81EXPORT_SYMBOL(clk_round_rate);
82
83int clk_set_rate(struct clk *clk, unsigned long rate)
84{
85 return 0;
86}
87EXPORT_SYMBOL(clk_set_rate);
88
89int clk_register(struct clk *clk)
90{
91 down(&clocks_sem);
92 list_add(&clk->node, &clocks);
93 up(&clocks_sem);
94 return 0;
95}
96EXPORT_SYMBOL(clk_register);
97
98void clk_unregister(struct clk *clk)
99{
100 down(&clocks_sem);
101 list_del(&clk->node);
102 up(&clocks_sem);
103}
104EXPORT_SYMBOL(clk_unregister);
105
106static int __init clk_init(void)
107{
108 return 0;
109}
110arch_initcall(clk_init);
diff --git a/arch/arm/mach-aaec2000/clock.h b/arch/arm/mach-aaec2000/clock.h
new file mode 100644
index 000000000000..d4bb74ff613f
--- /dev/null
+++ b/arch/arm/mach-aaec2000/clock.h
@@ -0,0 +1,23 @@
1/*
2 * linux/arch/arm/mach-aaec2000/clock.h
3 *
4 * Copyright (C) 2005 Nicolas Bellido Y Ortega
5 *
6 * Based on linux/arch/arm/mach-integrator/clock.h
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12struct module;
13
14struct clk {
15 struct list_head node;
16 unsigned long rate;
17 struct module *owner;
18 const char *name;
19 void *data;
20};
21
22int clk_register(struct clk *clk);
23void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c
index aece0cd4f0a3..0c53dab80905 100644
--- a/arch/arm/mach-aaec2000/core.c
+++ b/arch/arm/mach-aaec2000/core.c
@@ -13,19 +13,27 @@
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/device.h>
16#include <linux/list.h> 17#include <linux/list.h>
17#include <linux/errno.h> 18#include <linux/errno.h>
19#include <linux/dma-mapping.h>
18#include <linux/interrupt.h> 20#include <linux/interrupt.h>
19#include <linux/timex.h> 21#include <linux/timex.h>
20#include <linux/signal.h> 22#include <linux/signal.h>
21 23
22#include <asm/hardware.h> 24#include <asm/hardware.h>
23#include <asm/irq.h> 25#include <asm/irq.h>
26#include <asm/sizes.h>
27#include <asm/hardware/amba.h>
24 28
29#include <asm/mach/flash.h>
25#include <asm/mach/irq.h> 30#include <asm/mach/irq.h>
26#include <asm/mach/time.h> 31#include <asm/mach/time.h>
27#include <asm/mach/map.h> 32#include <asm/mach/map.h>
28 33
34#include "core.h"
35#include "clock.h"
36
29/* 37/*
30 * Common I/O mapping: 38 * Common I/O mapping:
31 * 39 *
@@ -40,9 +48,17 @@
40 * default mapping provided here. 48 * default mapping provided here.
41 */ 49 */
42static struct map_desc standard_io_desc[] __initdata = { 50static struct map_desc standard_io_desc[] __initdata = {
43 /* virtual physical length type */ 51 {
44 { VIO_APB_BASE, PIO_APB_BASE, IO_APB_LENGTH, MT_DEVICE }, 52 .virtual = VIO_APB_BASE,
45 { VIO_AHB_BASE, PIO_AHB_BASE, IO_AHB_LENGTH, MT_DEVICE } 53 .physical = __phys_to_pfn(PIO_APB_BASE),
54 .length = IO_APB_LENGTH,
55 .type = MT_DEVICE
56 }, {
57 .virtual = VIO_AHB_BASE,
58 .physical = __phys_to_pfn(PIO_AHB_BASE),
59 .length = IO_AHB_LENGTH,
60 .type = MT_DEVICE
61 }
46}; 62};
47 63
48void __init aaec2000_map_io(void) 64void __init aaec2000_map_io(void)
@@ -155,3 +171,116 @@ struct sys_timer aaec2000_timer = {
155 .offset = aaec2000_gettimeoffset, 171 .offset = aaec2000_gettimeoffset,
156}; 172};
157 173
174static struct clcd_panel mach_clcd_panel;
175
176static int aaec2000_clcd_setup(struct clcd_fb *fb)
177{
178 dma_addr_t dma;
179
180 fb->panel = &mach_clcd_panel;
181
182 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, SZ_1M,
183 &dma, GFP_KERNEL);
184
185 if (!fb->fb.screen_base) {
186 printk(KERN_ERR "CLCD: unable to map framebuffer\n");
187 return -ENOMEM;
188 }
189
190 fb->fb.fix.smem_start = dma;
191 fb->fb.fix.smem_len = SZ_1M;
192
193 return 0;
194}
195
196static int aaec2000_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
197{
198 return dma_mmap_writecombine(&fb->dev->dev, vma,
199 fb->fb.screen_base,
200 fb->fb.fix.smem_start,
201 fb->fb.fix.smem_len);
202}
203
204static void aaec2000_clcd_remove(struct clcd_fb *fb)
205{
206 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
207 fb->fb.screen_base, fb->fb.fix.smem_start);
208}
209
210static struct clcd_board clcd_plat_data = {
211 .name = "AAEC-2000",
212 .check = clcdfb_check,
213 .decode = clcdfb_decode,
214 .setup = aaec2000_clcd_setup,
215 .mmap = aaec2000_clcd_mmap,
216 .remove = aaec2000_clcd_remove,
217};
218
219static struct amba_device clcd_device = {
220 .dev = {
221 .bus_id = "mb:16",
222 .coherent_dma_mask = ~0,
223 .platform_data = &clcd_plat_data,
224 },
225 .res = {
226 .start = AAEC_CLCD_PHYS,
227 .end = AAEC_CLCD_PHYS + SZ_4K - 1,
228 .flags = IORESOURCE_MEM,
229 },
230 .irq = { INT_LCD, NO_IRQ },
231 .periphid = 0x41110,
232};
233
234static struct amba_device *amba_devs[] __initdata = {
235 &clcd_device,
236};
237
238static struct clk aaec2000_clcd_clk = {
239 .name = "CLCDCLK",
240};
241
242void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *clcd)
243{
244 clcd_plat_data.enable = clcd->enable;
245 clcd_plat_data.disable = clcd->disable;
246 memcpy(&mach_clcd_panel, &clcd->panel, sizeof(struct clcd_panel));
247}
248
249static struct flash_platform_data aaec2000_flash_data = {
250 .map_name = "cfi_probe",
251 .width = 4,
252};
253
254static struct resource aaec2000_flash_resource = {
255 .start = AAEC_FLASH_BASE,
256 .end = AAEC_FLASH_BASE + AAEC_FLASH_SIZE,
257 .flags = IORESOURCE_MEM,
258};
259
260static struct platform_device aaec2000_flash_device = {
261 .name = "armflash",
262 .id = 0,
263 .dev = {
264 .platform_data = &aaec2000_flash_data,
265 },
266 .num_resources = 1,
267 .resource = &aaec2000_flash_resource,
268};
269
270static int __init aaec2000_init(void)
271{
272 int i;
273
274 clk_register(&aaec2000_clcd_clk);
275
276 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
277 struct amba_device *d = amba_devs[i];
278 amba_device_register(d, &iomem_resource);
279 }
280
281 platform_device_register(&aaec2000_flash_device);
282
283 return 0;
284};
285arch_initcall(aaec2000_init);
286
diff --git a/arch/arm/mach-aaec2000/core.h b/arch/arm/mach-aaec2000/core.h
index 91893d848c16..daefc0ea14a1 100644
--- a/arch/arm/mach-aaec2000/core.h
+++ b/arch/arm/mach-aaec2000/core.h
@@ -9,8 +9,19 @@
9 * 9 *
10 */ 10 */
11 11
12#include <asm/hardware/amba_clcd.h>
13
12struct sys_timer; 14struct sys_timer;
13 15
14extern struct sys_timer aaec2000_timer; 16extern struct sys_timer aaec2000_timer;
15extern void __init aaec2000_map_io(void); 17extern void __init aaec2000_map_io(void);
16extern void __init aaec2000_init_irq(void); 18extern void __init aaec2000_init_irq(void);
19
20struct aaec2000_clcd_info {
21 struct clcd_panel panel;
22 void (*disable)(struct clcd_fb *);
23 void (*enable)(struct clcd_fb *);
24};
25
26extern void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *);
27
diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig
index 0793dcf54f2e..d5c155045762 100644
--- a/arch/arm/mach-clps711x/Kconfig
+++ b/arch/arm/mach-clps711x/Kconfig
@@ -69,6 +69,17 @@ config EP72XX_ROM_BOOT
69 69
70 You almost surely want to say N here. 70 You almost surely want to say N here.
71 71
72config MACH_MP1000
73 bool "MACH_MP1000"
74 help
75 Say Y if you intend to run the kernel on the Comdial MP1000 platform.
76
77config MP1000_90MHZ
78 bool "MP1000_90MHZ"
79 depends on MACH_MP1000
80 help
81 Say Y if you have the MP1000 configured to be set at 90MHZ rather than 74MHZ
82
72endmenu 83endmenu
73 84
74endif 85endif
diff --git a/arch/arm/mach-clps711x/Makefile b/arch/arm/mach-clps711x/Makefile
index 4a197315f0cf..8a6dc1ccf8fe 100644
--- a/arch/arm/mach-clps711x/Makefile
+++ b/arch/arm/mach-clps711x/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o
15obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o 15obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o
16obj-$(CONFIG_ARCH_EDB7211) += edb7211-arch.o edb7211-mm.o 16obj-$(CONFIG_ARCH_EDB7211) += edb7211-arch.o edb7211-mm.o
17obj-$(CONFIG_ARCH_FORTUNET) += fortunet.o 17obj-$(CONFIG_ARCH_FORTUNET) += fortunet.o
18obj-$(CONFIG_MACH_MP1000) += mp1000-mach.o mp1000-mm.o mp1000-seprom.o
18obj-$(CONFIG_ARCH_P720T) += p720t.o 19obj-$(CONFIG_ARCH_P720T) += p720t.o
19leds-$(CONFIG_ARCH_P720T) += p720t-leds.o 20leds-$(CONFIG_ARCH_P720T) += p720t-leds.o
20obj-$(CONFIG_LEDS) += $(leds-y) 21obj-$(CONFIG_LEDS) += $(leds-y)
diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c
index dc73feb1ffb0..43b9423d1440 100644
--- a/arch/arm/mach-clps711x/autcpu12.c
+++ b/arch/arm/mach-clps711x/autcpu12.c
@@ -46,10 +46,14 @@
46*/ 46*/
47 47
48static struct map_desc autcpu12_io_desc[] __initdata = { 48static struct map_desc autcpu12_io_desc[] __initdata = {
49 /* virtual, physical, length, type */ 49 /* memory-mapped extra io and CS8900A Ethernet chip */
50 /* memory-mapped extra io and CS8900A Ethernet chip */ 50 /* ethernet chip */
51 /* ethernet chip */ 51 {
52 { AUTCPU12_VIRT_CS8900A, AUTCPU12_PHYS_CS8900A, SZ_1M, MT_DEVICE } 52 .virtual = AUTCPU12_VIRT_CS8900A,
53 .pfn = __phys_to_pfn(AUTCPU12_PHYS_CS8900A),
54 .length = SZ_1M,
55 .type = MT_DEVICE
56 }
53}; 57};
54 58
55void __init autcpu12_map_io(void) 59void __init autcpu12_map_io(void)
diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c
index a46c82cd2711..cba7be5a06c3 100644
--- a/arch/arm/mach-clps711x/cdb89712.c
+++ b/arch/arm/mach-clps711x/cdb89712.c
@@ -39,7 +39,12 @@
39 * ethernet driver, perhaps. 39 * ethernet driver, perhaps.
40 */ 40 */
41static struct map_desc cdb89712_io_desc[] __initdata = { 41static struct map_desc cdb89712_io_desc[] __initdata = {
42 { ETHER_BASE, ETHER_START, ETHER_SIZE, MT_DEVICE } 42 {
43 .virtual = ETHER_BASE,
44 .pfn =__phys_to_pfn(ETHER_START),
45 .length = ETHER_SIZE,
46 .type = MT_DEVICE
47 }
43}; 48};
44 49
45static void __init cdb89712_map_io(void) 50static void __init cdb89712_map_io(void)
diff --git a/arch/arm/mach-clps711x/ceiva.c b/arch/arm/mach-clps711x/ceiva.c
index 780d91805984..35d51a759b59 100644
--- a/arch/arm/mach-clps711x/ceiva.c
+++ b/arch/arm/mach-clps711x/ceiva.c
@@ -37,11 +37,13 @@
37#include "common.h" 37#include "common.h"
38 38
39static struct map_desc ceiva_io_desc[] __initdata = { 39static struct map_desc ceiva_io_desc[] __initdata = {
40 /* virtual, physical, length, type */ 40 /* SED1355 controlled video RAM & registers */
41 41 {
42 /* SED1355 controlled video RAM & registers */ 42 .virtual = CEIVA_VIRT_SED1355,
43 { CEIVA_VIRT_SED1355, CEIVA_PHYS_SED1355, SZ_2M, MT_DEVICE } 43 .pfn = __phys_to_pfn(CEIVA_PHYS_SED1355),
44 44 .length = SZ_2M,
45 .type = MT_DEVICE
46 }
45}; 47};
46 48
47 49
diff --git a/arch/arm/mach-clps711x/edb7211-mm.c b/arch/arm/mach-clps711x/edb7211-mm.c
index 7fd7b01822d0..72f8bb05d55e 100644
--- a/arch/arm/mach-clps711x/edb7211-mm.c
+++ b/arch/arm/mach-clps711x/edb7211-mm.c
@@ -51,15 +51,27 @@ extern void clps711x_map_io(void);
51 * happens). 51 * happens).
52 */ 52 */
53static struct map_desc edb7211_io_desc[] __initdata = { 53static struct map_desc edb7211_io_desc[] __initdata = {
54 /* virtual, physical, length, type */ 54 { /* memory-mapped extra keyboard row */
55 55 .virtual = EP7211_VIRT_EXTKBD,
56 /* memory-mapped extra keyboard row and CS8900A Ethernet chip */ 56 .pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD),
57 { EP7211_VIRT_EXTKBD, EP7211_PHYS_EXTKBD, SZ_1M, MT_DEVICE }, 57 .length = SZ_1M,
58 { EP7211_VIRT_CS8900A, EP7211_PHYS_CS8900A, SZ_1M, MT_DEVICE }, 58 .type - MT_DEVICE
59 59 }, { /* and CS8900A Ethernet chip */
60 /* flash banks */ 60 .virtual = EP7211_VIRT_CS8900A,
61 { EP7211_VIRT_FLASH1, EP7211_PHYS_FLASH1, SZ_8M, MT_DEVICE }, 61 .pfn = __phys_to_pfn(EP7211_PHYS_CS8900A),
62 { EP7211_VIRT_FLASH2, EP7211_PHYS_FLASH2, SZ_8M, MT_DEVICE } 62 .length = SZ_1M,
63 .type = MT_DEVICE
64 }, { /* flash banks */
65 .virtual = EP7211_VIRT_FLASH1,
66 .pfn = __phys_to_pfn(EP7211_PHYS_FLASH1),
67 .length = SZ_8M,
68 .type = MT_DEVICE
69 }, {
70 .virtual = EP7211_VIRT_FLASH2,
71 .pfn = __phys_to_pfn(EP7211_PHYS_FLASH2),
72 .length = SZ_8M,
73 .type = MT_DEVICE
74 }
63}; 75};
64 76
65void __init edb7211_map_io(void) 77void __init edb7211_map_io(void)
diff --git a/arch/arm/mach-clps711x/mm.c b/arch/arm/mach-clps711x/mm.c
index 120b7cac84b5..a00f77ef8df8 100644
--- a/arch/arm/mach-clps711x/mm.c
+++ b/arch/arm/mach-clps711x/mm.c
@@ -24,6 +24,7 @@
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/bootmem.h> 25#include <linux/bootmem.h>
26 26
27#include <asm/sizes.h>
27#include <asm/hardware.h> 28#include <asm/hardware.h>
28#include <asm/pgtable.h> 29#include <asm/pgtable.h>
29#include <asm/page.h> 30#include <asm/page.h>
@@ -34,7 +35,12 @@
34 * This maps the generic CLPS711x registers 35 * This maps the generic CLPS711x registers
35 */ 36 */
36static struct map_desc clps711x_io_desc[] __initdata = { 37static struct map_desc clps711x_io_desc[] __initdata = {
37 { CLPS7111_VIRT_BASE, CLPS7111_PHYS_BASE, 1048576, MT_DEVICE } 38 {
39 .virtual = CLPS7111_VIRT_BASE,
40 .pfn = __phys_to_pfn(CLPS7111_PHYS_BASE),
41 .length = SZ_1M,
42 .type = MT_DEVICE
43 }
38}; 44};
39 45
40void __init clps711x_map_io(void) 46void __init clps711x_map_io(void)
diff --git a/arch/arm/mach-clps711x/mp1000-mach.c b/arch/arm/mach-clps711x/mp1000-mach.c
new file mode 100644
index 000000000000..c2816bcde5e7
--- /dev/null
+++ b/arch/arm/mach-clps711x/mp1000-mach.c
@@ -0,0 +1,49 @@
1/*
2 * linux/arch/arm/mach-mp1000/mp1000.c
3 *
4 * Copyright (C) 2005 Comdial Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include <linux/init.h>
21#include <linux/types.h>
22#include <linux/string.h>
23
24#include <asm/setup.h>
25#include <asm/mach-types.h>
26#include <asm/mach/arch.h>
27#include <asm/arch/mp1000-seprom.h>
28
29#include "common.h"
30
31extern void mp1000_map_io(void);
32
33static void __init mp1000_init(void)
34{
35 seprom_init();
36}
37
38MACHINE_START(MP1000, "Comdial MP1000")
39 /* Maintainer: Jon Ringle */
40 .phys_ram = 0xc0000000,
41 .phys_io = 0x80000000,
42 .io_pg_offst = ((0xff000000) >> 18) & 0xfffc,
43 .boot_params = 0xc0015100,
44 .map_io = mp1000_map_io,
45 .init_irq = clps711x_init_irq,
46 .init_machine = mp1000_init,
47 .timer = &clps711x_timer,
48MACHINE_END
49
diff --git a/arch/arm/mach-clps711x/mp1000-mm.c b/arch/arm/mach-clps711x/mp1000-mm.c
new file mode 100644
index 000000000000..20e810b0ec0c
--- /dev/null
+++ b/arch/arm/mach-clps711x/mp1000-mm.c
@@ -0,0 +1,47 @@
1/*
2 * linux/arch/arm/mach-mp1000/mm.c
3 *
4 * Extra MM routines for the MP1000
5 *
6 * Copyright (C) 2005 Comdial Corporation
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22#include <linux/kernel.h>
23#include <linux/init.h>
24
25#include <asm/hardware.h>
26#include <asm/page.h>
27#include <asm/pgtable.h>
28#include <asm/sizes.h>
29
30#include <asm/mach/map.h>
31
32extern void clps711x_map_io(void);
33
34static struct map_desc mp1000_io_desc[] __initdata = {
35 { MP1000_EIO_BASE, MP1000_EIO_START, MP1000_EIO_SIZE, MT_DEVICE },
36 { MP1000_FIO_BASE, MP1000_FIO_START, MP1000_FIO_SIZE, MT_DEVICE },
37 { MP1000_LIO_BASE, MP1000_LIO_START, MP1000_LIO_SIZE, MT_DEVICE },
38 { MP1000_NIO_BASE, MP1000_NIO_START, MP1000_NIO_SIZE, MT_DEVICE },
39 { MP1000_IDE_BASE, MP1000_IDE_START, MP1000_IDE_SIZE, MT_DEVICE },
40 { MP1000_DSP_BASE, MP1000_DSP_START, MP1000_DSP_SIZE, MT_DEVICE }
41};
42
43void __init mp1000_map_io(void)
44{
45 clps711x_map_io();
46 iotable_init(mp1000_io_desc, ARRAY_SIZE(mp1000_io_desc));
47}
diff --git a/arch/arm/mach-clps711x/mp1000-seprom.c b/arch/arm/mach-clps711x/mp1000-seprom.c
new file mode 100644
index 000000000000..b22d0bebb851
--- /dev/null
+++ b/arch/arm/mach-clps711x/mp1000-seprom.c
@@ -0,0 +1,195 @@
1/*`
2 * mp1000-seprom.c
3 *
4 * This file contains the Serial EEPROM code for the MP1000 board
5 *
6 * Copyright (C) 2005 Comdial Corporation
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24#include <linux/kernel.h>
25#include <linux/init.h>
26#include <asm/hardware.h>
27#include <asm/hardware/clps7111.h>
28#include <asm/arch/mp1000-seprom.h>
29
30/* If SepromInit() can initialize and checksum the seprom successfully, */
31/* then it will point seprom_data_ptr at the shadow copy. */
32
33static eeprom_struct seprom_data; /* shadow copy of seprom content */
34
35eeprom_struct *seprom_data_ptr = 0; /* 0 => not initialized */
36
37/*
38 * Port D Bit 5 is Chip Select for EEPROM
39 * Port E Bit 0 is Input, Data out from EEPROM
40 * Port E Bit 1 is Output, Data in to EEPROM
41 * Port E Bit 2 is Output, CLK to EEPROM
42 */
43
44static char *port_d_ptr = (char *)(CLPS7111_VIRT_BASE + PDDR);
45static char *port_e_ptr = (char *)(CLPS7111_VIRT_BASE + PEDR);
46
47#define NO_OF_SHORTS 64 // Device is 64 x 16 bits
48#define ENABLE_RW 0
49#define DISABLE_RW 1
50
51static inline void toggle_seprom_clock(void)
52{
53 *port_e_ptr |= HwPortESepromCLK;
54 *port_e_ptr &= ~(HwPortESepromCLK);
55}
56
57static inline void select_eeprom(void)
58{
59 *port_d_ptr |= HwPortDEECS;
60 *port_e_ptr &= ~(HwPortESepromCLK);
61}
62
63static inline void deselect_eeprom(void)
64{
65 *port_d_ptr &= ~(HwPortDEECS);
66 *port_e_ptr &= ~(HwPortESepromDIn);
67}
68
69/*
70 * GetSepromDataPtr - returns pointer to shadow (RAM) copy of seprom
71 * and returns 0 if seprom is not initialized or
72 * has a checksum error.
73 */
74
75eeprom_struct* get_seprom_ptr(void)
76{
77 return seprom_data_ptr;
78}
79
80unsigned char* get_eeprom_mac_address(void)
81{
82 return seprom_data_ptr->variant.eprom_struct.mac_Address;
83}
84
85/*
86 * ReadSProm, Physically reads data from the Serial PROM
87 */
88static void read_sprom(short address, int length, eeprom_struct *buffer)
89{
90 short data = COMMAND_READ | (address & 0x3F);
91 short bit;
92 int i;
93
94 select_eeprom();
95
96 // Clock in 9 bits of the command
97 for (i = 0, bit = 0x100; i < 9; i++, bit >>= 1) {
98 if (data & bit)
99 *port_e_ptr |= HwPortESepromDIn;
100 else
101 *port_e_ptr &= ~(HwPortESepromDIn);
102
103 toggle_seprom_clock();
104 }
105
106 //
107 // Now read one or more shorts of data from the Seprom
108 //
109 while (length-- > 0) {
110 data = 0;
111
112 // Read 16 bits at a time
113 for (i = 0; i < 16; i++) {
114 data <<= 1;
115 toggle_seprom_clock();
116 data |= *port_e_ptr & HwPortESepromDOut;
117
118 }
119
120 buffer->variant.eprom_short_data[address++] = data;
121 }
122
123 deselect_eeprom();
124
125 return;
126}
127
128
129
130/*
131 * ReadSerialPROM
132 *
133 * Input: Pointer to array of 64 x 16 Bits
134 *
135 * Output: if no problem reading data is filled in
136 */
137static void read_serial_prom(eeprom_struct *data)
138{
139 read_sprom(0, 64, data);
140}
141
142
143//
144// Compute Serial EEPROM checksum
145//
146// Input: Pointer to struct with Eprom data
147//
148// Output: The computed Eprom checksum
149//
150static short compute_seprom_checksum(eeprom_struct *data)
151{
152 short checksum = 0;
153 int i;
154
155 for (i = 0; i < 126; i++) {
156 checksum += (short)data->variant.eprom_byte_data[i];
157 }
158
159 return((short)(0x5555 - (checksum & 0xFFFF)));
160}
161
162//
163// Make sure the data port bits for the SEPROM are correctly initialised
164//
165
166void __init seprom_init(void)
167{
168 short checksum;
169
170 // Init Port D
171 *(char *)(CLPS7111_VIRT_BASE + PDDDR) = 0x0;
172 *(char *)(CLPS7111_VIRT_BASE + PDDR) = 0x15;
173
174 // Init Port E
175 *(int *)(CLPS7111_VIRT_BASE + PEDDR) = 0x06;
176 *(int *)(CLPS7111_VIRT_BASE + PEDR) = 0x04;
177
178 //
179 // Make sure that EEPROM struct size never exceeds 128 bytes
180 //
181 if (sizeof(eeprom_struct) > 128) {
182 panic("Serial PROM struct size > 128, aborting read\n");
183 }
184
185 read_serial_prom(&seprom_data);
186
187 checksum = compute_seprom_checksum(&seprom_data);
188
189 if (checksum != seprom_data.variant.eprom_short_data[63]) {
190 panic("Serial EEPROM checksum failed\n");
191 }
192
193 seprom_data_ptr = &seprom_data;
194}
195
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c
index 5bdb90edf992..a1acb945fb51 100644
--- a/arch/arm/mach-clps711x/p720t.c
+++ b/arch/arm/mach-clps711x/p720t.c
@@ -29,6 +29,7 @@
29#include <asm/pgtable.h> 29#include <asm/pgtable.h>
30#include <asm/page.h> 30#include <asm/page.h>
31#include <asm/setup.h> 31#include <asm/setup.h>
32#include <asm/sizes.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 35#include <asm/mach/map.h>
@@ -42,8 +43,17 @@
42 * We map both here. 43 * We map both here.
43 */ 44 */
44static struct map_desc p720t_io_desc[] __initdata = { 45static struct map_desc p720t_io_desc[] __initdata = {
45 { SYSPLD_VIRT_BASE, SYSPLD_PHYS_BASE, 1048576, MT_DEVICE }, 46 {
46 { 0xfe400000, 0x10400000, 1048576, MT_DEVICE } 47 .virtual = SYSPLD_VIRT_BASE,
48 .pfn = __phys_to_pfn(SYSPLD_PHYS_BASE),
49 .length = SZ_1M,
50 .type = MT_DEVICE
51 }, {
52 .virtual = 0xfe400000,
53 .pfn = __phys_to_pfn(0x10400000),
54 .length = SZ_1M,
55 .type = MT_DEVICE
56 }
47}; 57};
48 58
49static void __init 59static void __init
diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c
index e216ab8b9e8f..0364ba4b539e 100644
--- a/arch/arm/mach-clps7500/core.c
+++ b/arch/arm/mach-clps7500/core.c
@@ -259,10 +259,27 @@ static void __init clps7500_init_irq(void)
259} 259}
260 260
261static struct map_desc cl7500_io_desc[] __initdata = { 261static struct map_desc cl7500_io_desc[] __initdata = {
262 { IO_BASE, IO_START, IO_SIZE, MT_DEVICE }, /* IO space */ 262 { /* IO space */
263 { ISA_BASE, ISA_START, ISA_SIZE, MT_DEVICE }, /* ISA space */ 263 .virtual = IO_BASE,
264 { FLASH_BASE, FLASH_START, FLASH_SIZE, MT_DEVICE }, /* Flash */ 264 .pfn = __phys_to_pfn(IO_START),
265 { LED_BASE, LED_START, LED_SIZE, MT_DEVICE } /* LED */ 265 .length = IO_SIZE,
266 .type = MT_DEVICE
267 }, { /* ISA space */
268 .virtual = ISA_BASE,
269 .pfn = __phys_to_pfn(ISA_START),
270 .length = ISA_SIZE,
271 .type = MT_DEVICE
272 }, { /* Flash */
273 .virtual = FLASH_BASE,
274 .pfn = __phys_to_pfn(FLASH_START),
275 .length = FLASH_SIZE,
276 .type = MT_DEVICE
277 }, { /* LED */
278 .virtual = LED_BASE,
279 .pfn = __phys_to_pfn(LED_START),
280 .length = LED_SIZE,
281 .type = MT_DEVICE
282 }
266}; 283};
267 284
268static void __init clps7500_map_io(void) 285static void __init clps7500_map_io(void)
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 5aeadfd72143..15261646dcdd 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -76,16 +76,42 @@ static struct map_desc ebsa110_io_desc[] __initdata = {
76 /* 76 /*
77 * sparse external-decode ISAIO space 77 * sparse external-decode ISAIO space
78 */ 78 */
79 { IRQ_STAT, TRICK4_PHYS, PGDIR_SIZE, MT_DEVICE }, /* IRQ_STAT/IRQ_MCLR */ 79 { /* IRQ_STAT/IRQ_MCLR */
80 { IRQ_MASK, TRICK3_PHYS, PGDIR_SIZE, MT_DEVICE }, /* IRQ_MASK/IRQ_MSET */ 80 .virtual = IRQ_STAT,
81 { SOFT_BASE, TRICK1_PHYS, PGDIR_SIZE, MT_DEVICE }, /* SOFT_BASE */ 81 .pfn = __phys_to_pfn(TRICK4_PHYS),
82 { PIT_BASE, TRICK0_PHYS, PGDIR_SIZE, MT_DEVICE }, /* PIT_BASE */ 82 .length = PGDIR_SIZE,
83 .type = MT_DEVICE
84 }, { /* IRQ_MASK/IRQ_MSET */
85 .virtual = IRQ_MASK,
86 .pfn = __phys_to_pfn(TRICK3_PHYS),
87 .length = PGDIR_SIZE,
88 .type = MT_DEVICE
89 }, { /* SOFT_BASE */
90 .virtual = SOFT_BASE,
91 .pfn = __phys_to_pfn(TRICK1_PHYS),
92 .length = PGDIR_SIZE,
93 .type = MT_DEVICE
94 }, { /* PIT_BASE */
95 .virtual = PIT_BASE,
96 .pfn = __phys_to_pfn(TRICK0_PHYS),
97 .length = PGDIR_SIZE,
98 .type = MT_DEVICE
99 },
83 100
84 /* 101 /*
85 * self-decode ISAIO space 102 * self-decode ISAIO space
86 */ 103 */
87 { ISAIO_BASE, ISAIO_PHYS, ISAIO_SIZE, MT_DEVICE }, 104 {
88 { ISAMEM_BASE, ISAMEM_PHYS, ISAMEM_SIZE, MT_DEVICE } 105 .virtual = ISAIO_BASE,
106 .pfn = __phys_to_pfn(ISAIO_PHYS),
107 .length = ISAIO_SIZE,
108 .type = MT_DEVICE
109 }, {
110 .virtual = ISAMEM_BASE,
111 .pfn = __phys_to_pfn(ISAMEM_PHYS),
112 .length = ISAMEM_SIZE,
113 .type = MT_DEVICE
114 }
89}; 115};
90 116
91static void __init ebsa110_map_io(void) 117static void __init ebsa110_map_io(void)
diff --git a/arch/arm/mach-ebsa110/io.c b/arch/arm/mach-ebsa110/io.c
index ef7eb5dc91bd..c648bfb676a1 100644
--- a/arch/arm/mach-ebsa110/io.c
+++ b/arch/arm/mach-ebsa110/io.c
@@ -24,6 +24,7 @@
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/types.h> 25#include <linux/types.h>
26 26
27#include <asm/hardware.h>
27#include <asm/io.h> 28#include <asm/io.h>
28#include <asm/page.h> 29#include <asm/page.h>
29 30
diff --git a/arch/arm/mach-epxa10db/mm.c b/arch/arm/mach-epxa10db/mm.c
index 2aa57fa46da3..e8832d0910ee 100644
--- a/arch/arm/mach-epxa10db/mm.c
+++ b/arch/arm/mach-epxa10db/mm.c
@@ -31,12 +31,37 @@
31/* Page table mapping for I/O region */ 31/* Page table mapping for I/O region */
32 32
33static struct map_desc epxa10db_io_desc[] __initdata = { 33static struct map_desc epxa10db_io_desc[] __initdata = {
34 { IO_ADDRESS(EXC_REGISTERS_BASE), EXC_REGISTERS_BASE, SZ_16K, MT_DEVICE }, 34 {
35 { IO_ADDRESS(EXC_PLD_BLOCK0_BASE), EXC_PLD_BLOCK0_BASE, SZ_16K, MT_DEVICE }, 35 .virtual = IO_ADDRESS(EXC_REGISTERS_BASE),
36 { IO_ADDRESS(EXC_PLD_BLOCK1_BASE), EXC_PLD_BLOCK1_BASE, SZ_16K, MT_DEVICE }, 36 .pfn = __phys_to_pfn(EXC_REGISTERS_BASE),
37 { IO_ADDRESS(EXC_PLD_BLOCK2_BASE), EXC_PLD_BLOCK2_BASE, SZ_16K, MT_DEVICE }, 37 .length = SZ_16K,
38 { IO_ADDRESS(EXC_PLD_BLOCK3_BASE), EXC_PLD_BLOCK3_BASE, SZ_16K, MT_DEVICE }, 38 .type = MT_DEVICE
39 { FLASH_VADDR(EXC_EBI_BLOCK0_BASE), EXC_EBI_BLOCK0_BASE, SZ_16M, MT_DEVICE } 39 }, {
40 .virtual = IO_ADDRESS(EXC_PLD_BLOCK0_BASE),
41 .pfn = __phys_to_pfn(EXC_PLD_BLOCK0_BASE),
42 .length = SZ_16K,
43 .type = MT_DEVICE
44 }, {
45 .virtual = IO_ADDRESS(EXC_PLD_BLOCK1_BASE),
46 .pfn =__phys_to_pfn(EXC_PLD_BLOCK1_BASE),
47 .length = SZ_16K,
48 .type = MT_DEVICE
49 }, {
50 .virtual = IO_ADDRESS(EXC_PLD_BLOCK2_BASE),
51 .physical = __phys_to_pfn(EXC_PLD_BLOCK2_BASE),
52 .length = SZ_16K,
53 .type = MT_DEVICE
54 }, {
55 .virtual = IO_ADDRESS(EXC_PLD_BLOCK3_BASE),
56 .pfn = __phys_to_pfn(EXC_PLD_BLOCK3_BASE),
57 .length = SZ_16K,
58 .type = MT_DEVICE
59 }, {
60 .virtual = FLASH_VADDR(EXC_EBI_BLOCK0_BASE),
61 .pfn = __phys_to_pfn(EXC_EBI_BLOCK0_BASE),
62 .length = SZ_16M,
63 .type = MT_DEVICE
64 }
40}; 65};
41 66
42void __init epxa10db_map_io(void) 67void __init epxa10db_map_io(void)
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index eb8238c1ef06..dc09fd200c16 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -130,8 +130,17 @@ void __init footbridge_init_irq(void)
130 * it means that we have extra bullet protection on our feet. 130 * it means that we have extra bullet protection on our feet.
131 */ 131 */
132static struct map_desc fb_common_io_desc[] __initdata = { 132static struct map_desc fb_common_io_desc[] __initdata = {
133 { ARMCSR_BASE, DC21285_ARMCSR_BASE, ARMCSR_SIZE, MT_DEVICE }, 133 {
134 { XBUS_BASE, 0x40000000, XBUS_SIZE, MT_DEVICE } 134 .virtual = ARMCSR_BASE,
135 .pfn = DC21285_ARMCSR_BASE,
136 .length = ARMCSR_SIZE,
137 .type = MT_DEVICE
138 }, {
139 .virtual = XBUS_BASE,
140 .pfn = __phys_to_pfn(0x40000000),
141 .length = XBUS_SIZE,
142 .type = MT_DEVICE
143 }
135}; 144};
136 145
137/* 146/*
@@ -140,11 +149,32 @@ static struct map_desc fb_common_io_desc[] __initdata = {
140 */ 149 */
141static struct map_desc ebsa285_host_io_desc[] __initdata = { 150static struct map_desc ebsa285_host_io_desc[] __initdata = {
142#if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST) 151#if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST)
143 { PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, MT_DEVICE }, 152 {
144 { PCICFG0_BASE, DC21285_PCI_TYPE_0_CONFIG, PCICFG0_SIZE, MT_DEVICE }, 153 .virtual = PCIMEM_BASE,
145 { PCICFG1_BASE, DC21285_PCI_TYPE_1_CONFIG, PCICFG1_SIZE, MT_DEVICE }, 154 .pfn = __phys_to_pfn(DC21285_PCI_MEM),
146 { PCIIACK_BASE, DC21285_PCI_IACK, PCIIACK_SIZE, MT_DEVICE }, 155 .length = PCIMEM_SIZE,
147 { PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, MT_DEVICE } 156 .type = MT_DEVICE
157 }, {
158 .virtual = PCICFG0_BASE,
159 .pfn = __phys_to_pfn(DC21285_PCI_TYPE_0_CONFIG),
160 .length = PCICFG0_SIZE,
161 .type = MT_DEVICE
162 }, {
163 .virtual = PCICFG1_BASE,
164 .pfn = __phys_to_pfn(DC21285_PCI_TYPE_1_CONFIG),
165 .length = PCICFG1_SIZE,
166 .type = MT_DEVICE
167 }, {
168 .virtual = PCIIACK_BASE,
169 .pfn = __phys_to_pfn(DC21285_PCI_IACK),
170 .length = PCIIACK_SIZE,
171 .type = MT_DEVICE
172 }, {
173 .virtual = PCIO_BASE,
174 .pfn = __phys_to_pfn(DC21285_PCI_IO),
175 .length = PCIO_SIZE,
176 .type = MT_DEVICE
177 }
148#endif 178#endif
149}; 179};
150 180
@@ -153,8 +183,17 @@ static struct map_desc ebsa285_host_io_desc[] __initdata = {
153 */ 183 */
154static struct map_desc co285_io_desc[] __initdata = { 184static struct map_desc co285_io_desc[] __initdata = {
155#ifdef CONFIG_ARCH_CO285 185#ifdef CONFIG_ARCH_CO285
156 { PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, MT_DEVICE }, 186 {
157 { PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, MT_DEVICE } 187 .virtual = PCIO_BASE,
188 .pfn = __phys_to_pfn(DC21285_PCI_IO),
189 .length = PCIO_SIZE,
190 .type = MT_DEVICE
191 }, {
192 .virtual = PCIMEM_BASE,
193 .pfn = __phys_to_pfn(DC21285_PCI_MEM),
194 .length = PCIMEM_SIZE,
195 .type = MT_DEVICE
196 }
158#endif 197#endif
159}; 198};
160 199
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index 5110e2e65ddd..c096b4569308 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -237,7 +237,12 @@ void __init h720x_init_irq (void)
237} 237}
238 238
239static struct map_desc h720x_io_desc[] __initdata = { 239static struct map_desc h720x_io_desc[] __initdata = {
240 { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE }, 240 {
241 .virtual = IO_VIRT,
242 .pfn = __phys_to_pfn(IO_PHYS),
243 .length = IO_SIZE,
244 .type = MT_DEVICE
245 },
241}; 246};
242 247
243/* Initialize io tables */ 248/* Initialize io tables */
diff --git a/arch/arm/mach-imx/generic.c b/arch/arm/mach-imx/generic.c
index f8a742bb2d5b..cb14b0682cef 100644
--- a/arch/arm/mach-imx/generic.c
+++ b/arch/arm/mach-imx/generic.c
@@ -273,8 +273,12 @@ static struct platform_device *devices[] __initdata = {
273}; 273};
274 274
275static struct map_desc imx_io_desc[] __initdata = { 275static struct map_desc imx_io_desc[] __initdata = {
276 /* virtual physical length type */ 276 {
277 {IMX_IO_BASE, IMX_IO_PHYS, IMX_IO_SIZE, MT_DEVICE}, 277 .virtual = IMX_IO_BASE,
278 .pfn = __phys_to_pfn(IMX_IO_PHYS),
279 .length = IMX_IO_SIZE,
280 .type = MT_DEVICE
281 }
278}; 282};
279 283
280void __init 284void __init
diff --git a/arch/arm/mach-imx/mx1ads.c b/arch/arm/mach-imx/mx1ads.c
index a7511ddfe364..4cbdc1fe04b1 100644
--- a/arch/arm/mach-imx/mx1ads.c
+++ b/arch/arm/mach-imx/mx1ads.c
@@ -61,13 +61,37 @@ mx1ads_init(void)
61} 61}
62 62
63static struct map_desc mx1ads_io_desc[] __initdata = { 63static struct map_desc mx1ads_io_desc[] __initdata = {
64 /* virtual physical length type */ 64 {
65 {IMX_CS0_VIRT, IMX_CS0_PHYS, IMX_CS0_SIZE, MT_DEVICE}, 65 .virtual = IMX_CS0_VIRT,
66 {IMX_CS1_VIRT, IMX_CS1_PHYS, IMX_CS1_SIZE, MT_DEVICE}, 66 .pfn = __phys_to_pfn(IMX_CS0_PHYS),
67 {IMX_CS2_VIRT, IMX_CS2_PHYS, IMX_CS2_SIZE, MT_DEVICE}, 67 .length = IMX_CS0_SIZE,
68 {IMX_CS3_VIRT, IMX_CS3_PHYS, IMX_CS3_SIZE, MT_DEVICE}, 68 .type = MT_DEVICE
69 {IMX_CS4_VIRT, IMX_CS4_PHYS, IMX_CS4_SIZE, MT_DEVICE}, 69 }, {
70 {IMX_CS5_VIRT, IMX_CS5_PHYS, IMX_CS5_SIZE, MT_DEVICE}, 70 .virtual = IMX_CS1_VIRT,
71 .pfn = __phys_to_pfn(IMX_CS1_PHYS),
72 .length = IMX_CS1_SIZE,
73 .type = MT_DEVICE
74 }, {
75 .virtual = IMX_CS2_VIRT,
76 .pfn = __phys_to_pfn(IMX_CS2_PHYS),
77 .length = IMX_CS2_SIZE,
78 .type = MT_DEVICE
79 }, {
80 .virtual = IMX_CS3_VIRT,
81 .pfn = __phys_to_pfn(IMX_CS3_PHYS),
82 .length = IMX_CS3_SIZE,
83 .type = MT_DEVICE
84 }, {
85 .virtual = IMX_CS4_VIRT,
86 .pfn = __phys_to_pfn(IMX_CS4_PHYS),
87 .length = IMX_CS4_SIZE,
88 .type = MT_DEVICE
89 }, {
90 .virtual = IMX_CS5_VIRT,
91 .pfn = __phys_to_pfn(IMX_CS5_PHYS),
92 .length = IMX_CS5_SIZE,
93 .type = MT_DEVICE
94 }
71}; 95};
72 96
73static void __init 97static void __init
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 36e2b6eb67b7..f368b85f0447 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -75,19 +75,72 @@
75 */ 75 */
76 76
77static struct map_desc ap_io_desc[] __initdata = { 77static struct map_desc ap_io_desc[] __initdata = {
78 { IO_ADDRESS(INTEGRATOR_HDR_BASE), INTEGRATOR_HDR_BASE, SZ_4K, MT_DEVICE }, 78 {
79 { IO_ADDRESS(INTEGRATOR_SC_BASE), INTEGRATOR_SC_BASE, SZ_4K, MT_DEVICE }, 79 .virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE),
80 { IO_ADDRESS(INTEGRATOR_EBI_BASE), INTEGRATOR_EBI_BASE, SZ_4K, MT_DEVICE }, 80 .pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE),
81 { IO_ADDRESS(INTEGRATOR_CT_BASE), INTEGRATOR_CT_BASE, SZ_4K, MT_DEVICE }, 81 .length = SZ_4K,
82 { IO_ADDRESS(INTEGRATOR_IC_BASE), INTEGRATOR_IC_BASE, SZ_4K, MT_DEVICE }, 82 .type = MT_DEVICE
83 { IO_ADDRESS(INTEGRATOR_UART0_BASE), INTEGRATOR_UART0_BASE, SZ_4K, MT_DEVICE }, 83 }, {
84 { IO_ADDRESS(INTEGRATOR_UART1_BASE), INTEGRATOR_UART1_BASE, SZ_4K, MT_DEVICE }, 84 .virtual = IO_ADDRESS(INTEGRATOR_SC_BASE),
85 { IO_ADDRESS(INTEGRATOR_DBG_BASE), INTEGRATOR_DBG_BASE, SZ_4K, MT_DEVICE }, 85 .pfn = __phys_to_pfn(INTEGRATOR_SC_BASE),
86 { IO_ADDRESS(INTEGRATOR_GPIO_BASE), INTEGRATOR_GPIO_BASE, SZ_4K, MT_DEVICE }, 86 .length = SZ_4K,
87 { PCI_MEMORY_VADDR, PHYS_PCI_MEM_BASE, SZ_16M, MT_DEVICE }, 87 .type = MT_DEVICE
88 { PCI_CONFIG_VADDR, PHYS_PCI_CONFIG_BASE, SZ_16M, MT_DEVICE }, 88 }, {
89 { PCI_V3_VADDR, PHYS_PCI_V3_BASE, SZ_64K, MT_DEVICE }, 89 .virtual = IO_ADDRESS(INTEGRATOR_EBI_BASE),
90 { PCI_IO_VADDR, PHYS_PCI_IO_BASE, SZ_64K, MT_DEVICE } 90 .pfn = __phys_to_pfn(INTEGRATOR_EBI_BASE),
91 .length = SZ_4K,
92 .type = MT_DEVICE
93 }, {
94 .virtual = IO_ADDRESS(INTEGRATOR_CT_BASE),
95 .pfn = __phys_to_pfn(INTEGRATOR_CT_BASE),
96 .length = SZ_4K,
97 .type = MT_DEVICE
98 }, {
99 .virtual = IO_ADDRESS(INTEGRATOR_IC_BASE),
100 .pfn = __phys_to_pfn(INTEGRATOR_IC_BASE),
101 .length = SZ_4K,
102 .type = MT_DEVICE
103 }, {
104 .virtual = IO_ADDRESS(INTEGRATOR_UART0_BASE),
105 .pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE),
106 .length = SZ_4K,
107 .type = MT_DEVICE
108 }, {
109 .virtual = IO_ADDRESS(INTEGRATOR_UART1_BASE),
110 .pfn = __phys_to_pfn(INTEGRATOR_UART1_BASE),
111 .length = SZ_4K,
112 .type = MT_DEVICE
113 }, {
114 .virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE),
115 .pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE),
116 .length = SZ_4K,
117 .type = MT_DEVICE
118 }, {
119 .virtual = IO_ADDRESS(INTEGRATOR_GPIO_BASE),
120 .pfn = __phys_to_pfn(INTEGRATOR_GPIO_BASE),
121 .length = SZ_4K,
122 .type = MT_DEVICE
123 }, {
124 .virtual = PCI_MEMORY_VADDR,
125 .pfn = __phys_to_pfn(PHYS_PCI_MEM_BASE),
126 .length = SZ_16M,
127 .type = MT_DEVICE
128 }, {
129 .virtual = PCI_CONFIG_VADDR,
130 .pfn = __phys_to_pfn(PHYS_PCI_CONFIG_BASE),
131 .length = SZ_16M,
132 .type = MT_DEVICE
133 }, {
134 .virtual = PCI_V3_VADDR,
135 .pfn = __phys_to_pfn(PHYS_PCI_V3_BASE),
136 .length = SZ_64K,
137 .type = MT_DEVICE
138 }, {
139 .virtual = PCI_IO_VADDR,
140 .pfn = __phys_to_pfn(PHYS_PCI_IO_BASE),
141 .length = SZ_64K,
142 .type = MT_DEVICE
143 }
91}; 144};
92 145
93static void __init ap_map_io(void) 146static void __init ap_map_io(void)
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 2be5c03ab87f..aa34c58b96c4 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -74,17 +74,62 @@
74 */ 74 */
75 75
76static struct map_desc intcp_io_desc[] __initdata = { 76static struct map_desc intcp_io_desc[] __initdata = {
77 { IO_ADDRESS(INTEGRATOR_HDR_BASE), INTEGRATOR_HDR_BASE, SZ_4K, MT_DEVICE }, 77 {
78 { IO_ADDRESS(INTEGRATOR_SC_BASE), INTEGRATOR_SC_BASE, SZ_4K, MT_DEVICE }, 78 .virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE),
79 { IO_ADDRESS(INTEGRATOR_EBI_BASE), INTEGRATOR_EBI_BASE, SZ_4K, MT_DEVICE }, 79 .pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE),
80 { IO_ADDRESS(INTEGRATOR_CT_BASE), INTEGRATOR_CT_BASE, SZ_4K, MT_DEVICE }, 80 .length = SZ_4K,
81 { IO_ADDRESS(INTEGRATOR_IC_BASE), INTEGRATOR_IC_BASE, SZ_4K, MT_DEVICE }, 81 .type = MT_DEVICE
82 { IO_ADDRESS(INTEGRATOR_UART0_BASE), INTEGRATOR_UART0_BASE, SZ_4K, MT_DEVICE }, 82 }, {
83 { IO_ADDRESS(INTEGRATOR_UART1_BASE), INTEGRATOR_UART1_BASE, SZ_4K, MT_DEVICE }, 83 .virtual = IO_ADDRESS(INTEGRATOR_SC_BASE),
84 { IO_ADDRESS(INTEGRATOR_DBG_BASE), INTEGRATOR_DBG_BASE, SZ_4K, MT_DEVICE }, 84 .pfn = __phys_to_pfn(INTEGRATOR_SC_BASE),
85 { IO_ADDRESS(INTEGRATOR_GPIO_BASE), INTEGRATOR_GPIO_BASE, SZ_4K, MT_DEVICE }, 85 .length = SZ_4K,
86 { 0xfca00000, 0xca000000, SZ_4K, MT_DEVICE }, 86 .type = MT_DEVICE
87 { 0xfcb00000, 0xcb000000, SZ_4K, MT_DEVICE }, 87 }, {
88 .virtual = IO_ADDRESS(INTEGRATOR_EBI_BASE),
89 .pfn = __phys_to_pfn(INTEGRATOR_EBI_BASE),
90 .length = SZ_4K,
91 .type = MT_DEVICE
92 }, {
93 .virtual = IO_ADDRESS(INTEGRATOR_CT_BASE),
94 .pfn = __phys_to_pfn(INTEGRATOR_CT_BASE),
95 .length = SZ_4K,
96 .type = MT_DEVICE
97 }, {
98 .virtual = IO_ADDRESS(INTEGRATOR_IC_BASE),
99 .pfn = __phys_to_pfn(INTEGRATOR_IC_BASE),
100 .length = SZ_4K,
101 .type = MT_DEVICE
102 }, {
103 .virtual = IO_ADDRESS(INTEGRATOR_UART0_BASE),
104 .pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE),
105 .length = SZ_4K,
106 .type = MT_DEVICE
107 }, {
108 .virtual = IO_ADDRESS(INTEGRATOR_UART1_BASE),
109 .pfn = __phys_to_pfn(INTEGRATOR_UART1_BASE),
110 .length = SZ_4K,
111 .type = MT_DEVICE
112 }, {
113 .virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE),
114 .pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE),
115 .length = SZ_4K,
116 .type = MT_DEVICE
117 }, {
118 .virtual = IO_ADDRESS(INTEGRATOR_GPIO_BASE),
119 .pfn = __phys_to_pfn(INTEGRATOR_GPIO_BASE),
120 .length = SZ_4K,
121 .type = MT_DEVICE
122 }, {
123 .virtual = 0xfca00000,
124 .pfn = __phys_to_pfn(0xca000000),
125 .length = SZ_4K,
126 .type = MT_DEVICE
127 }, {
128 .virtual = 0xfcb00000,
129 .pfn = __phys_to_pfn(0xcb000000),
130 .length = SZ_4K,
131 .type = MT_DEVICE
132 }
88}; 133};
89 134
90static void __init intcp_map_io(void) 135static void __init intcp_map_io(void)
diff --git a/arch/arm/mach-iop3xx/iop321-setup.c b/arch/arm/mach-iop3xx/iop321-setup.c
index 0f921ba2750c..bb5091223b63 100644
--- a/arch/arm/mach-iop3xx/iop321-setup.c
+++ b/arch/arm/mach-iop3xx/iop321-setup.c
@@ -38,13 +38,17 @@
38 * Standard IO mapping for all IOP321 based systems 38 * Standard IO mapping for all IOP321 based systems
39 */ 39 */
40static struct map_desc iop321_std_desc[] __initdata = { 40static struct map_desc iop321_std_desc[] __initdata = {
41 /* virtual physical length type */ 41 { /* mem mapped registers */
42 42 .virtual = IOP321_VIRT_MEM_BASE,
43 /* mem mapped registers */ 43 .pfn = __phys_to_pfn(IOP321_PHYS_MEM_BASE),
44 { IOP321_VIRT_MEM_BASE, IOP321_PHYS_MEM_BASE, 0x00002000, MT_DEVICE }, 44 .length = 0x00002000,
45 45 .type = MT_DEVICE
46 /* PCI IO space */ 46 }, { /* PCI IO space */
47 { IOP321_PCI_LOWER_IO_VA, IOP321_PCI_LOWER_IO_PA, IOP321_PCI_IO_WINDOW_SIZE, MT_DEVICE } 47 .virtual = IOP321_PCI_LOWER_IO_VA,
48 .pfn = __phys_to_pfn(IOP321_PCI_LOWER_IO_PA),
49 .length = IOP321_PCI_IO_WINDOW_SIZE,
50 .type = MT_DEVICE
51 }
48}; 52};
49 53
50#ifdef CONFIG_ARCH_IQ80321 54#ifdef CONFIG_ARCH_IQ80321
diff --git a/arch/arm/mach-iop3xx/iop331-setup.c b/arch/arm/mach-iop3xx/iop331-setup.c
index fc74b722f72f..a2533c3ab42f 100644
--- a/arch/arm/mach-iop3xx/iop331-setup.c
+++ b/arch/arm/mach-iop3xx/iop331-setup.c
@@ -37,13 +37,17 @@
37 * Standard IO mapping for all IOP331 based systems 37 * Standard IO mapping for all IOP331 based systems
38 */ 38 */
39static struct map_desc iop331_std_desc[] __initdata = { 39static struct map_desc iop331_std_desc[] __initdata = {
40 /* virtual physical length type */ 40 { /* mem mapped registers */
41 41 .virtual = IOP331_VIRT_MEM_BASE,
42 /* mem mapped registers */ 42 .pfn = __phys_to_pfn(IOP331_PHYS_MEM_BASE),
43 { IOP331_VIRT_MEM_BASE, IOP331_PHYS_MEM_BASE, 0x00002000, MT_DEVICE }, 43 .length = 0x00002000,
44 44 .type = MT_DEVICE
45 /* PCI IO space */ 45 }, { /* PCI IO space */
46 { IOP331_PCI_LOWER_IO_VA, IOP331_PCI_LOWER_IO_PA, IOP331_PCI_IO_WINDOW_SIZE, MT_DEVICE } 46 .virtual = IOP331_PCI_LOWER_IO_VA,
47 .pfn = __phys_to_pfn(IOP331_PCI_LOWER_IO_PA),
48 .length = IOP331_PCI_IO_WINDOW_SIZE,
49 .type = MT_DEVICE
50 }
47}; 51};
48 52
49static struct uart_port iop331_serial_ports[] = { 53static struct uart_port iop331_serial_ports[] = {
diff --git a/arch/arm/mach-iop3xx/iq31244-mm.c b/arch/arm/mach-iop3xx/iq31244-mm.c
index 55992ab586ba..e874b54eefe3 100644
--- a/arch/arm/mach-iop3xx/iq31244-mm.c
+++ b/arch/arm/mach-iop3xx/iq31244-mm.c
@@ -29,10 +29,12 @@
29 * We use RedBoot's setup for the onboard devices. 29 * We use RedBoot's setup for the onboard devices.
30 */ 30 */
31static struct map_desc iq31244_io_desc[] __initdata = { 31static struct map_desc iq31244_io_desc[] __initdata = {
32 /* virtual physical length type */ 32 { /* on-board devices */
33 33 .virtual = IQ31244_UART,
34 /* on-board devices */ 34 .pfn = __phys_to_pfn(IQ31244_UART),
35 { IQ31244_UART, IQ31244_UART, 0x00100000, MT_DEVICE } 35 .length = 0x00100000,
36 .type = MT_DEVICE
37 }
36}; 38};
37 39
38void __init iq31244_map_io(void) 40void __init iq31244_map_io(void)
diff --git a/arch/arm/mach-iop3xx/iq80321-mm.c b/arch/arm/mach-iop3xx/iq80321-mm.c
index bb3e9e5a9aff..d9cac5e1fc3d 100644
--- a/arch/arm/mach-iop3xx/iq80321-mm.c
+++ b/arch/arm/mach-iop3xx/iq80321-mm.c
@@ -29,10 +29,12 @@
29 * We use RedBoot's setup for the onboard devices. 29 * We use RedBoot's setup for the onboard devices.
30 */ 30 */
31static struct map_desc iq80321_io_desc[] __initdata = { 31static struct map_desc iq80321_io_desc[] __initdata = {
32 /* virtual physical length type */ 32 { /* on-board devices */
33 33 .virtual = IQ80321_UART,
34 /* on-board devices */ 34 .pfn = __phys_to_pfn(IQ80321_UART),
35 { IQ80321_UART, IQ80321_UART, 0x00100000, MT_DEVICE } 35 .length = 0x00100000,
36 .type = MT_DEVICE
37 }
36}; 38};
37 39
38void __init iq80321_map_io(void) 40void __init iq80321_map_io(void)
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index f4d7f1f6ef85..01c393c504d0 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -83,42 +83,42 @@ void ixp2000_release_slowport(struct slowport_cfg *old_cfg)
83static struct map_desc ixp2000_io_desc[] __initdata = { 83static struct map_desc ixp2000_io_desc[] __initdata = {
84 { 84 {
85 .virtual = IXP2000_CAP_VIRT_BASE, 85 .virtual = IXP2000_CAP_VIRT_BASE,
86 .physical = IXP2000_CAP_PHYS_BASE, 86 .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE),
87 .length = IXP2000_CAP_SIZE, 87 .length = IXP2000_CAP_SIZE,
88 .type = MT_DEVICE 88 .type = MT_DEVICE
89 }, { 89 }, {
90 .virtual = IXP2000_INTCTL_VIRT_BASE, 90 .virtual = IXP2000_INTCTL_VIRT_BASE,
91 .physical = IXP2000_INTCTL_PHYS_BASE, 91 .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE),
92 .length = IXP2000_INTCTL_SIZE, 92 .length = IXP2000_INTCTL_SIZE,
93 .type = MT_DEVICE 93 .type = MT_DEVICE
94 }, { 94 }, {
95 .virtual = IXP2000_PCI_CREG_VIRT_BASE, 95 .virtual = IXP2000_PCI_CREG_VIRT_BASE,
96 .physical = IXP2000_PCI_CREG_PHYS_BASE, 96 .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE),
97 .length = IXP2000_PCI_CREG_SIZE, 97 .length = IXP2000_PCI_CREG_SIZE,
98 .type = MT_DEVICE 98 .type = MT_DEVICE
99 }, { 99 }, {
100 .virtual = IXP2000_PCI_CSR_VIRT_BASE, 100 .virtual = IXP2000_PCI_CSR_VIRT_BASE,
101 .physical = IXP2000_PCI_CSR_PHYS_BASE, 101 .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE),
102 .length = IXP2000_PCI_CSR_SIZE, 102 .length = IXP2000_PCI_CSR_SIZE,
103 .type = MT_DEVICE 103 .type = MT_DEVICE
104 }, { 104 }, {
105 .virtual = IXP2000_MSF_VIRT_BASE, 105 .virtual = IXP2000_MSF_VIRT_BASE,
106 .physical = IXP2000_MSF_PHYS_BASE, 106 .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE),
107 .length = IXP2000_MSF_SIZE, 107 .length = IXP2000_MSF_SIZE,
108 .type = MT_DEVICE 108 .type = MT_DEVICE
109 }, { 109 }, {
110 .virtual = IXP2000_PCI_IO_VIRT_BASE, 110 .virtual = IXP2000_PCI_IO_VIRT_BASE,
111 .physical = IXP2000_PCI_IO_PHYS_BASE, 111 .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE),
112 .length = IXP2000_PCI_IO_SIZE, 112 .length = IXP2000_PCI_IO_SIZE,
113 .type = MT_DEVICE 113 .type = MT_DEVICE
114 }, { 114 }, {
115 .virtual = IXP2000_PCI_CFG0_VIRT_BASE, 115 .virtual = IXP2000_PCI_CFG0_VIRT_BASE,
116 .physical = IXP2000_PCI_CFG0_PHYS_BASE, 116 .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE),
117 .length = IXP2000_PCI_CFG0_SIZE, 117 .length = IXP2000_PCI_CFG0_SIZE,
118 .type = MT_DEVICE 118 .type = MT_DEVICE
119 }, { 119 }, {
120 .virtual = IXP2000_PCI_CFG1_VIRT_BASE, 120 .virtual = IXP2000_PCI_CFG1_VIRT_BASE,
121 .physical = IXP2000_PCI_CFG1_PHYS_BASE, 121 .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE),
122 .length = IXP2000_PCI_CFG1_SIZE, 122 .length = IXP2000_PCI_CFG1_SIZE,
123 .type = MT_DEVICE 123 .type = MT_DEVICE
124 } 124 }
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index 63ba0191aa65..8b4a839b6279 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -176,7 +176,7 @@ void ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long
176 *************************************************************************/ 176 *************************************************************************/
177static struct map_desc ixdp2x00_io_desc __initdata = { 177static struct map_desc ixdp2x00_io_desc __initdata = {
178 .virtual = IXDP2X00_VIRT_CPLD_BASE, 178 .virtual = IXDP2X00_VIRT_CPLD_BASE,
179 .physical = IXDP2X00_PHYS_CPLD_BASE, 179 .pfn = __phys_to_pfn(IXDP2X00_PHYS_CPLD_BASE),
180 .length = IXDP2X00_CPLD_SIZE, 180 .length = IXDP2X00_CPLD_SIZE,
181 .type = MT_DEVICE 181 .type = MT_DEVICE
182}; 182};
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 7a5109921287..fee1d7b73503 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -136,7 +136,7 @@ void __init ixdp2x01_init_irq(void)
136 *************************************************************************/ 136 *************************************************************************/
137static struct map_desc ixdp2x01_io_desc __initdata = { 137static struct map_desc ixdp2x01_io_desc __initdata = {
138 .virtual = IXDP2X01_VIRT_CPLD_BASE, 138 .virtual = IXDP2X01_VIRT_CPLD_BASE,
139 .physical = IXDP2X01_PHYS_CPLD_BASE, 139 .pfn = __phys_to_pfn(IXDP2X01_PHYS_CPLD_BASE),
140 .length = IXDP2X01_CPLD_REGION_SIZE, 140 .length = IXDP2X01_CPLD_REGION_SIZE,
141 .type = MT_DEVICE 141 .type = MT_DEVICE
142}; 142};
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 36b6045213ee..6c396447c4e0 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -44,24 +44,24 @@
44static struct map_desc ixp4xx_io_desc[] __initdata = { 44static struct map_desc ixp4xx_io_desc[] __initdata = {
45 { /* UART, Interrupt ctrl, GPIO, timers, NPEs, MACs, USB .... */ 45 { /* UART, Interrupt ctrl, GPIO, timers, NPEs, MACs, USB .... */
46 .virtual = IXP4XX_PERIPHERAL_BASE_VIRT, 46 .virtual = IXP4XX_PERIPHERAL_BASE_VIRT,
47 .physical = IXP4XX_PERIPHERAL_BASE_PHYS, 47 .pfn = __phys_to_pfn(IXP4XX_PERIPHERAL_BASE_PHYS),
48 .length = IXP4XX_PERIPHERAL_REGION_SIZE, 48 .length = IXP4XX_PERIPHERAL_REGION_SIZE,
49 .type = MT_DEVICE 49 .type = MT_DEVICE
50 }, { /* Expansion Bus Config Registers */ 50 }, { /* Expansion Bus Config Registers */
51 .virtual = IXP4XX_EXP_CFG_BASE_VIRT, 51 .virtual = IXP4XX_EXP_CFG_BASE_VIRT,
52 .physical = IXP4XX_EXP_CFG_BASE_PHYS, 52 .pfn = __phys_to_pfn(IXP4XX_EXP_CFG_BASE_PHYS),
53 .length = IXP4XX_EXP_CFG_REGION_SIZE, 53 .length = IXP4XX_EXP_CFG_REGION_SIZE,
54 .type = MT_DEVICE 54 .type = MT_DEVICE
55 }, { /* PCI Registers */ 55 }, { /* PCI Registers */
56 .virtual = IXP4XX_PCI_CFG_BASE_VIRT, 56 .virtual = IXP4XX_PCI_CFG_BASE_VIRT,
57 .physical = IXP4XX_PCI_CFG_BASE_PHYS, 57 .pfn = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS),
58 .length = IXP4XX_PCI_CFG_REGION_SIZE, 58 .length = IXP4XX_PCI_CFG_REGION_SIZE,
59 .type = MT_DEVICE 59 .type = MT_DEVICE
60 }, 60 },
61#ifdef CONFIG_DEBUG_LL 61#ifdef CONFIG_DEBUG_LL
62 { /* Debug UART mapping */ 62 { /* Debug UART mapping */
63 .virtual = IXP4XX_DEBUG_UART_BASE_VIRT, 63 .virtual = IXP4XX_DEBUG_UART_BASE_VIRT,
64 .physical = IXP4XX_DEBUG_UART_BASE_PHYS, 64 .pfn = __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS),
65 .length = IXP4XX_DEBUG_UART_REGION_SIZE, 65 .length = IXP4XX_DEBUG_UART_REGION_SIZE,
66 .type = MT_DEVICE 66 .type = MT_DEVICE
67 } 67 }
diff --git a/arch/arm/mach-lh7a40x/arch-kev7a400.c b/arch/arm/mach-lh7a40x/arch-kev7a400.c
index cb3dcd3bd00a..19f2fa2244c4 100644
--- a/arch/arm/mach-lh7a40x/arch-kev7a400.c
+++ b/arch/arm/mach-lh7a40x/arch-kev7a400.c
@@ -26,8 +26,17 @@
26 /* This function calls the board specific IRQ initialization function. */ 26 /* This function calls the board specific IRQ initialization function. */
27 27
28static struct map_desc kev7a400_io_desc[] __initdata = { 28static struct map_desc kev7a400_io_desc[] __initdata = {
29 { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE }, 29 {
30 { CPLD_VIRT, CPLD_PHYS, CPLD_SIZE, MT_DEVICE }, 30 .virtual = IO_VIRT,
31 .pfn = __phys_to_pfn(IO_PHYS),
32 .length = IO_SIZE,
33 .type = MT_DEVICE
34 }, {
35 .virtual = CPLD_VIRT,
36 .pfn = __phys_to_pfn(CPLD_PHYS),
37 .length = CPLD_SIZE,
38 .type = MT_DEVICE
39 }
31}; 40};
32 41
33void __init kev7a400_map_io(void) 42void __init kev7a400_map_io(void)
diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
index 6eb61a17c63b..a20eabc132b0 100644
--- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
@@ -227,23 +227,79 @@ void __init lh7a40x_init_board_irq (void)
227} 227}
228 228
229static struct map_desc lpd7a400_io_desc[] __initdata = { 229static struct map_desc lpd7a400_io_desc[] __initdata = {
230 { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE }, 230 {
231 /* Mapping added to work around chip select problems */ 231 .virtual = IO_VIRT,
232 { IOBARRIER_VIRT, IOBARRIER_PHYS, IOBARRIER_SIZE, MT_DEVICE }, 232 .pfn = __phys_to_pfn(IO_PHYS),
233 { CF_VIRT, CF_PHYS, CF_SIZE, MT_DEVICE }, 233 .length = IO_SIZE,
234 .type = MT_DEVICE
235 }, { /* Mapping added to work around chip select problems */
236 .virtual = IOBARRIER_VIRT,
237 .pfn = __phys_to_pfn(IOBARRIER_PHYS),
238 .length = IOBARRIER_SIZE,
239 .type = MT_DEVICE
240 }, {
241 .virtual = CF_VIRT,
242 .pfn = __phys_to_pfn(CF_PHYS),
243 .length = CF_SIZE,
244 .type = MT_DEVICE
245 }, {
246 .virtual = CPLD02_VIRT,
247 .pfn = __phys_to_pfn(CPLD02_PHYS),
248 .length = CPLD02_SIZE,
249 .type = MT_DEVICE
250 }, {
251 .virtual = CPLD06_VIRT,
252 .pfn = __phys_to_pfn(CPLD06_PHYS),
253 .length = CPLD06_SIZE,
254 .type = MT_DEVICE
255 }, {
256 .virtual = CPLD08_VIRT,
257 .pfn = __phys_to_pfn(CPLD08_PHYS),
258 .length = CPLD08_SIZE,
259 .type = MT_DEVICE
260 }, {
261 .virtual = CPLD0C_VIRT,
262 .pfn = __phys_to_pfn(CPLD0C_PHYS),
263 .length = CPLD0C_SIZE,
264 .type = MT_DEVICE
265 }, {
266 .virtual = CPLD0E_VIRT,
267 .pfn = __phys_to_pfn(CPLD0E_PHYS),
268 .length = CPLD0E_SIZE,
269 .type = MT_DEVICE
270 }, {
271 .virtual = CPLD10_VIRT,
272 .pfn = __phys_to_pfn(CPLD10_PHYS),
273 .length = CPLD10_SIZE,
274 .type = MT_DEVICE
275 }, {
276 .virtual = CPLD12_VIRT,
277 .pfn = __phys_to_pfn(CPLD12_PHYS),
278 .length = CPLD12_SIZE,
279 .type = MT_DEVICE
280 }, {
281 .virtual = CPLD14_VIRT,
282 .pfn = __phys_to_pfn(CPLD14_PHYS),
283 .length = CPLD14_SIZE,
284 .type = MT_DEVICE
285 }, {
286 .virtual = CPLD16_VIRT,
287 .pfn = __phys_to_pfn(CPLD16_PHYS),
288 .length = CPLD16_SIZE,
289 .type = MT_DEVICE
290 }, {
291 .virtual = CPLD18_VIRT,
292 .pfn = __phys_to_pfn(CPLD18_PHYS),
293 .length = CPLD18_SIZE,
294 .type = MT_DEVICE
295 }, {
296 .virtual = CPLD1A_VIRT,
297 .pfn = __phys_to_pfn(CPLD1A_PHYS),
298 .length = CPLD1A_SIZE,
299 .type = MT_DEVICE
300 },
234 /* This mapping is redundant since the smc driver performs another. */ 301 /* This mapping is redundant since the smc driver performs another. */
235/* { CPLD00_VIRT, CPLD00_PHYS, CPLD00_SIZE, MT_DEVICE }, */ 302/* { CPLD00_VIRT, CPLD00_PHYS, CPLD00_SIZE, MT_DEVICE }, */
236 { CPLD02_VIRT, CPLD02_PHYS, CPLD02_SIZE, MT_DEVICE },
237 { CPLD06_VIRT, CPLD06_PHYS, CPLD06_SIZE, MT_DEVICE },
238 { CPLD08_VIRT, CPLD08_PHYS, CPLD08_SIZE, MT_DEVICE },
239 { CPLD0C_VIRT, CPLD0C_PHYS, CPLD0C_SIZE, MT_DEVICE },
240 { CPLD0E_VIRT, CPLD0E_PHYS, CPLD0E_SIZE, MT_DEVICE },
241 { CPLD10_VIRT, CPLD10_PHYS, CPLD10_SIZE, MT_DEVICE },
242 { CPLD12_VIRT, CPLD12_PHYS, CPLD12_SIZE, MT_DEVICE },
243 { CPLD14_VIRT, CPLD14_PHYS, CPLD14_SIZE, MT_DEVICE },
244 { CPLD16_VIRT, CPLD16_PHYS, CPLD16_SIZE, MT_DEVICE },
245 { CPLD18_VIRT, CPLD18_PHYS, CPLD18_SIZE, MT_DEVICE },
246 { CPLD1A_VIRT, CPLD1A_PHYS, CPLD1A_SIZE, MT_DEVICE },
247}; 303};
248 304
249void __init 305void __init
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index df0312b596e4..fd9183ff2ed5 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -103,8 +103,12 @@ static struct platform_device innovator_flash_device = {
103 103
104/* Only FPGA needs to be mapped here. All others are done with ioremap */ 104/* Only FPGA needs to be mapped here. All others are done with ioremap */
105static struct map_desc innovator1510_io_desc[] __initdata = { 105static struct map_desc innovator1510_io_desc[] __initdata = {
106{ OMAP1510_FPGA_BASE, OMAP1510_FPGA_START, OMAP1510_FPGA_SIZE, 106 {
107 MT_DEVICE }, 107 .virtual = OMAP1510_FPGA_BASE,
108 .pfn = __phys_to_pfn(OMAP1510_FPGA_START),
109 .length = OMAP1510_FPGA_SIZE,
110 .type = MT_DEVICE
111 }
108}; 112};
109 113
110static struct resource innovator1510_smc91x_resources[] = { 114static struct resource innovator1510_smc91x_resources[] = {
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 107c68c8ab54..2ba26e239108 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -134,8 +134,12 @@ void omap_perseus2_init_irq(void)
134 134
135/* Only FPGA needs to be mapped here. All others are done with ioremap */ 135/* Only FPGA needs to be mapped here. All others are done with ioremap */
136static struct map_desc omap_perseus2_io_desc[] __initdata = { 136static struct map_desc omap_perseus2_io_desc[] __initdata = {
137 {H2P2_DBG_FPGA_BASE, H2P2_DBG_FPGA_START, H2P2_DBG_FPGA_SIZE, 137 {
138 MT_DEVICE}, 138 .virtual = H2P2_DBG_FPGA_BASE,
139 .pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
140 .length = H2P2_DBG_FPGA_SIZE,
141 .type = MT_DEVICE
142 }
139}; 143};
140 144
141static void __init omap_perseus2_map_io(void) 145static void __init omap_perseus2_map_io(void)
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index eb8261d7dead..79fb86535ebc 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -26,27 +26,59 @@ extern void omap_sram_init(void);
26 * default mapping provided here. 26 * default mapping provided here.
27 */ 27 */
28static struct map_desc omap_io_desc[] __initdata = { 28static struct map_desc omap_io_desc[] __initdata = {
29 { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE }, 29 {
30 .virtual = IO_VIRT,
31 .pfn = __phys_to_pfn(IO_PHYS),
32 .length = IO_SIZE,
33 .type = MT_DEVICE
34 }
30}; 35};
31 36
32#ifdef CONFIG_ARCH_OMAP730 37#ifdef CONFIG_ARCH_OMAP730
33static struct map_desc omap730_io_desc[] __initdata = { 38static struct map_desc omap730_io_desc[] __initdata = {
34 { OMAP730_DSP_BASE, OMAP730_DSP_START, OMAP730_DSP_SIZE, MT_DEVICE }, 39 {
35 { OMAP730_DSPREG_BASE, OMAP730_DSPREG_START, OMAP730_DSPREG_SIZE, MT_DEVICE }, 40 .virtual = OMAP730_DSP_BASE,
41 .pfn = __phys_to_pfn(OMAP730_DSP_START),
42 .length = OMAP730_DSP_SIZE,
43 .type = MT_DEVICE
44 }, {
45 .virtual = OMAP730_DSPREG_BASE,
46 .pfn = __phys_to_pfn(OMAP730_DSPREG_START),
47 .length = OMAP730_DSPREG_SIZE,
48 .type = MT_DEVICE
49 }
36}; 50};
37#endif 51#endif
38 52
39#ifdef CONFIG_ARCH_OMAP1510 53#ifdef CONFIG_ARCH_OMAP1510
40static struct map_desc omap1510_io_desc[] __initdata = { 54static struct map_desc omap1510_io_desc[] __initdata = {
41 { OMAP1510_DSP_BASE, OMAP1510_DSP_START, OMAP1510_DSP_SIZE, MT_DEVICE }, 55 {
42 { OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_START, OMAP1510_DSPREG_SIZE, MT_DEVICE }, 56 .virtual = OMAP1510_DSP_BASE,
57 .pfn = __phys_to_pfn(OMAP1510_DSP_START),
58 .length = OMAP1510_DSP_SIZE,
59 .type = MT_DEVICE
60 }, {
61 .virtual = OMAP1510_DSPREG_BASE,
62 .pfn = __phys_to_pfn(OMAP1510_DSPREG_START),
63 .length = OMAP1510_DSPREG_SIZE,
64 .type = MT_DEVICE
65 }
43}; 66};
44#endif 67#endif
45 68
46#if defined(CONFIG_ARCH_OMAP16XX) 69#if defined(CONFIG_ARCH_OMAP16XX)
47static struct map_desc omap16xx_io_desc[] __initdata = { 70static struct map_desc omap16xx_io_desc[] __initdata = {
48 { OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE }, 71 {
49 { OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE }, 72 .virtual = OMAP16XX_DSP_BASE,
73 .pfn = __phys_to_pfn(OMAP16XX_DSP_START),
74 .length = OMAP16XX_DSP_SIZE,
75 .type = MT_DEVICE
76 }, {
77 .virtual = OMAP16XX_DSPREG_BASE,
78 .pfn = __phys_to_pfn(OMAP16XX_DSPREG_START),
79 .length = OMAP16XX_DSPREG_SIZE,
80 .type = MT_DEVICE
81 }
50}; 82};
51#endif 83#endif
52 84
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 1d7677669a76..3248bc9b9495 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -34,6 +34,7 @@
34#include <asm/arch/udc.h> 34#include <asm/arch/udc.h>
35#include <asm/arch/pxafb.h> 35#include <asm/arch/pxafb.h>
36#include <asm/arch/mmc.h> 36#include <asm/arch/mmc.h>
37#include <asm/arch/irda.h>
37#include <asm/arch/i2c.h> 38#include <asm/arch/i2c.h>
38 39
39#include "generic.h" 40#include "generic.h"
@@ -92,14 +93,42 @@ EXPORT_SYMBOL(pxa_set_cken);
92 * and cache flush area. 93 * and cache flush area.
93 */ 94 */
94static struct map_desc standard_io_desc[] __initdata = { 95static struct map_desc standard_io_desc[] __initdata = {
95 /* virtual physical length type */ 96 { /* Devs */
96 { 0xf2000000, 0x40000000, 0x02000000, MT_DEVICE }, /* Devs */ 97 .virtual = 0xf2000000,
97 { 0xf4000000, 0x44000000, 0x00100000, MT_DEVICE }, /* LCD */ 98 .pfn = __phys_to_pfn(0x40000000),
98 { 0xf6000000, 0x48000000, 0x00100000, MT_DEVICE }, /* Mem Ctl */ 99 .length = 0x02000000,
99 { 0xf8000000, 0x4c000000, 0x00100000, MT_DEVICE }, /* USB host */ 100 .type = MT_DEVICE
100 { 0xfa000000, 0x50000000, 0x00100000, MT_DEVICE }, /* Camera */ 101 }, { /* LCD */
101 { 0xfe000000, 0x58000000, 0x00100000, MT_DEVICE }, /* IMem ctl */ 102 .virtual = 0xf4000000,
102 { 0xff000000, 0x00000000, 0x00100000, MT_DEVICE } /* UNCACHED_PHYS_0 */ 103 .pfn = __phys_to_pfn(0x44000000),
104 .length = 0x00100000,
105 .type = MT_DEVICE
106 }, { /* Mem Ctl */
107 .virtual = 0xf6000000,
108 .pfn = __phys_to_pfn(0x48000000),
109 .length = 0x00100000,
110 .type = MT_DEVICE
111 }, { /* USB host */
112 .virtual = 0xf8000000,
113 .pfn = __phys_to_pfn(0x4c000000),
114 .length = 0x00100000,
115 .type = MT_DEVICE
116 }, { /* Camera */
117 .virtual = 0xfa000000,
118 .pfn = __phys_to_pfn(0x50000000),
119 .length = 0x00100000,
120 .type = MT_DEVICE
121 }, { /* IMem ctl */
122 .virtual = 0xfe000000,
123 .pfn = __phys_to_pfn(0x58000000),
124 .length = 0x00100000,
125 .type = MT_DEVICE
126 }, { /* UNCACHED_PHYS_0 */
127 .virtual = 0xff000000,
128 .pfn = __phys_to_pfn(0x00000000),
129 .length = 0x00100000,
130 .type = MT_DEVICE
131 }
103}; 132};
104 133
105void __init pxa_map_io(void) 134void __init pxa_map_io(void)
@@ -225,6 +254,10 @@ static struct platform_device stuart_device = {
225 .name = "pxa2xx-uart", 254 .name = "pxa2xx-uart",
226 .id = 2, 255 .id = 2,
227}; 256};
257static struct platform_device hwuart_device = {
258 .name = "pxa2xx-uart",
259 .id = 3,
260};
228 261
229static struct resource i2c_resources[] = { 262static struct resource i2c_resources[] = {
230 { 263 {
@@ -265,10 +298,26 @@ static struct resource i2s_resources[] = {
265static struct platform_device i2s_device = { 298static struct platform_device i2s_device = {
266 .name = "pxa2xx-i2s", 299 .name = "pxa2xx-i2s",
267 .id = -1, 300 .id = -1,
268 .resource = i2c_resources, 301 .resource = i2s_resources,
269 .num_resources = ARRAY_SIZE(i2s_resources), 302 .num_resources = ARRAY_SIZE(i2s_resources),
270}; 303};
271 304
305static u64 pxaficp_dmamask = ~(u32)0;
306
307static struct platform_device pxaficp_device = {
308 .name = "pxa2xx-ir",
309 .id = -1,
310 .dev = {
311 .dma_mask = &pxaficp_dmamask,
312 .coherent_dma_mask = 0xffffffff,
313 },
314};
315
316void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
317{
318 pxaficp_device.dev.platform_data = info;
319}
320
272static struct platform_device *devices[] __initdata = { 321static struct platform_device *devices[] __initdata = {
273 &pxamci_device, 322 &pxamci_device,
274 &udc_device, 323 &udc_device,
@@ -276,13 +325,26 @@ static struct platform_device *devices[] __initdata = {
276 &ffuart_device, 325 &ffuart_device,
277 &btuart_device, 326 &btuart_device,
278 &stuart_device, 327 &stuart_device,
328 &pxaficp_device,
279 &i2c_device, 329 &i2c_device,
280 &i2s_device, 330 &i2s_device,
281}; 331};
282 332
283static int __init pxa_init(void) 333static int __init pxa_init(void)
284{ 334{
285 return platform_add_devices(devices, ARRAY_SIZE(devices)); 335 int cpuid, ret;
336
337 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
338 if (ret)
339 return ret;
340
341 /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
342 cpuid = read_cpuid(CPUID_ID);
343 if (((cpuid >> 4) & 0xfff) == 0x2d0 ||
344 ((cpuid >> 4) & 0xfff) == 0x290)
345 ret = platform_device_register(&hwuart_device);
346
347 return ret;
286} 348}
287 349
288subsys_initcall(pxa_init); 350subsys_initcall(pxa_init);
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index 386e107b53cc..01a83ab09ac3 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -152,16 +152,17 @@ static void __init idp_init_irq(void)
152} 152}
153 153
154static struct map_desc idp_io_desc[] __initdata = { 154static struct map_desc idp_io_desc[] __initdata = {
155 /* virtual physical length type */ 155 {
156 156 .virtual = IDP_COREVOLT_VIRT,
157 { IDP_COREVOLT_VIRT, 157 .pfn = __phys_to_pfn(IDP_COREVOLT_PHYS),
158 IDP_COREVOLT_PHYS, 158 .length = IDP_COREVOLT_SIZE,
159 IDP_COREVOLT_SIZE, 159 .type = MT_DEVICE
160 MT_DEVICE }, 160 }, {
161 { IDP_CPLD_VIRT, 161 .virtual = IDP_CPLD_VIRT,
162 IDP_CPLD_PHYS, 162 .pfn = __phys_to_pfn(IDP_CPLD_PHYS),
163 IDP_CPLD_SIZE, 163 .length = IDP_CPLD_SIZE,
164 MT_DEVICE } 164 .type = MT_DEVICE
165 }
165}; 166};
166 167
167static void __init idp_map_io(void) 168static void __init idp_map_io(void)
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 1f38033921e9..beccf455f796 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -35,6 +35,7 @@
35#include <asm/arch/pxa-regs.h> 35#include <asm/arch/pxa-regs.h>
36#include <asm/arch/lubbock.h> 36#include <asm/arch/lubbock.h>
37#include <asm/arch/udc.h> 37#include <asm/arch/udc.h>
38#include <asm/arch/irda.h>
38#include <asm/arch/pxafb.h> 39#include <asm/arch/pxafb.h>
39#include <asm/arch/mmc.h> 40#include <asm/arch/mmc.h>
40 41
@@ -237,16 +238,40 @@ static struct pxamci_platform_data lubbock_mci_platform_data = {
237 .init = lubbock_mci_init, 238 .init = lubbock_mci_init,
238}; 239};
239 240
241static void lubbock_irda_transceiver_mode(struct device *dev, int mode)
242{
243 unsigned long flags;
244
245 local_irq_save(flags);
246 if (mode & IR_SIRMODE) {
247 LUB_MISC_WR &= ~(1 << 4);
248 } else if (mode & IR_FIRMODE) {
249 LUB_MISC_WR |= 1 << 4;
250 }
251 local_irq_restore(flags);
252}
253
254static struct pxaficp_platform_data lubbock_ficp_platform_data = {
255 .transceiver_cap = IR_SIRMODE | IR_FIRMODE,
256 .transceiver_mode = lubbock_irda_transceiver_mode,
257};
258
240static void __init lubbock_init(void) 259static void __init lubbock_init(void)
241{ 260{
242 pxa_set_udc_info(&udc_info); 261 pxa_set_udc_info(&udc_info);
243 set_pxa_fb_info(&sharp_lm8v31); 262 set_pxa_fb_info(&sharp_lm8v31);
244 pxa_set_mci_info(&lubbock_mci_platform_data); 263 pxa_set_mci_info(&lubbock_mci_platform_data);
264 pxa_set_ficp_info(&lubbock_ficp_platform_data);
245 (void) platform_add_devices(devices, ARRAY_SIZE(devices)); 265 (void) platform_add_devices(devices, ARRAY_SIZE(devices));
246} 266}
247 267
248static struct map_desc lubbock_io_desc[] __initdata = { 268static struct map_desc lubbock_io_desc[] __initdata = {
249 { LUBBOCK_FPGA_VIRT, LUBBOCK_FPGA_PHYS, 0x00100000, MT_DEVICE }, /* CPLD */ 269 { /* CPLD */
270 .virtual = LUBBOCK_FPGA_VIRT,
271 .pfn = __phys_to_pfn(LUBBOCK_FPGA_PHYS),
272 .length = 0x00100000,
273 .type = MT_DEVICE
274 }
250}; 275};
251 276
252static void __init lubbock_map_io(void) 277static void __init lubbock_map_io(void)
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 85fdb5b1470a..a48c64026e1f 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -37,6 +37,7 @@
37#include <asm/arch/audio.h> 37#include <asm/arch/audio.h>
38#include <asm/arch/pxafb.h> 38#include <asm/arch/pxafb.h>
39#include <asm/arch/mmc.h> 39#include <asm/arch/mmc.h>
40#include <asm/arch/irda.h>
40 41
41#include "generic.h" 42#include "generic.h"
42 43
@@ -294,6 +295,29 @@ static struct pxamci_platform_data mainstone_mci_platform_data = {
294 .exit = mainstone_mci_exit, 295 .exit = mainstone_mci_exit,
295}; 296};
296 297
298static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
299{
300 unsigned long flags;
301
302 local_irq_save(flags);
303 if (mode & IR_SIRMODE) {
304 MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
305 } else if (mode & IR_FIRMODE) {
306 MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
307 }
308 if (mode & IR_OFF) {
309 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
310 } else {
311 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
312 }
313 local_irq_restore(flags);
314}
315
316static struct pxaficp_platform_data mainstone_ficp_platform_data = {
317 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
318 .transceiver_mode = mainstone_irda_transceiver_mode,
319};
320
297static void __init mainstone_init(void) 321static void __init mainstone_init(void)
298{ 322{
299 /* 323 /*
@@ -313,11 +337,17 @@ static void __init mainstone_init(void)
313 set_pxa_fb_info(&toshiba_ltm035a776c); 337 set_pxa_fb_info(&toshiba_ltm035a776c);
314 338
315 pxa_set_mci_info(&mainstone_mci_platform_data); 339 pxa_set_mci_info(&mainstone_mci_platform_data);
340 pxa_set_ficp_info(&mainstone_ficp_platform_data);
316} 341}
317 342
318 343
319static struct map_desc mainstone_io_desc[] __initdata = { 344static struct map_desc mainstone_io_desc[] __initdata = {
320 { MST_FPGA_VIRT, MST_FPGA_PHYS, 0x00100000, MT_DEVICE }, /* CPLD */ 345 { /* CPLD */
346 .virtual = MST_FPGA_VIRT,
347 .pfn = __phys_to_pfn(MST_FPGA_PHYS),
348 .length = 0x00100000,
349 .type = MT_DEVICE
350 }
321}; 351};
322 352
323static void __init mainstone_map_io(void) 353static void __init mainstone_map_io(void)
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 7869c3b4e62f..573a5758e781 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -129,7 +129,7 @@ void pxa_cpu_pm_enter(suspend_state_t state)
129 case PM_SUSPEND_MEM: 129 case PM_SUSPEND_MEM:
130 /* set resume return address */ 130 /* set resume return address */
131 PSPR = virt_to_phys(pxa_cpu_resume); 131 PSPR = virt_to_phys(pxa_cpu_resume);
132 pxa_cpu_suspend(3); 132 pxa_cpu_suspend(PWRMODE_SLEEP);
133 break; 133 break;
134 } 134 }
135} 135}
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 9a791b07118d..09a5d593f04b 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -157,7 +157,7 @@ void pxa_cpu_pm_enter(suspend_state_t state)
157 case PM_SUSPEND_MEM: 157 case PM_SUSPEND_MEM:
158 /* set resume return address */ 158 /* set resume return address */
159 PSPR = virt_to_phys(pxa_cpu_resume); 159 PSPR = virt_to_phys(pxa_cpu_resume);
160 pxa_cpu_suspend(3); 160 pxa_cpu_suspend(PWRMODE_SLEEP);
161 break; 161 break;
162 } 162 }
163} 163}
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S
index 5786ccad938c..c9862688ff3d 100644
--- a/arch/arm/mach-pxa/sleep.S
+++ b/arch/arm/mach-pxa/sleep.S
@@ -28,7 +28,9 @@
28/* 28/*
29 * pxa_cpu_suspend() 29 * pxa_cpu_suspend()
30 * 30 *
31 * Forces CPU into sleep state 31 * Forces CPU into sleep state.
32 *
33 * r0 = value for PWRMODE M field for desired sleep state
32 */ 34 */
33 35
34ENTRY(pxa_cpu_suspend) 36ENTRY(pxa_cpu_suspend)
@@ -53,6 +55,7 @@ ENTRY(pxa_cpu_suspend)
53 mov r10, sp 55 mov r10, sp
54 stmfd sp!, {r3 - r10} 56 stmfd sp!, {r3 - r10}
55 57
58 mov r5, r0 @ save sleep mode
56 @ preserve phys address of stack 59 @ preserve phys address of stack
57 mov r0, sp 60 mov r0, sp
58 bl sleep_phys_sp 61 bl sleep_phys_sp
@@ -66,7 +69,7 @@ ENTRY(pxa_cpu_suspend)
66 @ (also workaround for sighting 28071) 69 @ (also workaround for sighting 28071)
67 70
68 @ prepare value for sleep mode 71 @ prepare value for sleep mode
69 mov r1, #3 @ sleep mode 72 mov r1, r5 @ sleep mode
70 73
71 @ prepare pointer to physical address 0 (virtual mapping in generic.c) 74 @ prepare pointer to physical address 0 (virtual mapping in generic.c)
72 mov r2, #UNCACHED_PHYS_0 75 mov r2, #UNCACHED_PHYS_0
diff --git a/arch/arm/mach-pxa/standby.S b/arch/arm/mach-pxa/standby.S
index 8a3f27b76784..6f6dbbd08021 100644
--- a/arch/arm/mach-pxa/standby.S
+++ b/arch/arm/mach-pxa/standby.S
@@ -21,7 +21,7 @@
21ENTRY(pxa_cpu_standby) 21ENTRY(pxa_cpu_standby)
22 ldr r0, =PSSR 22 ldr r0, =PSSR
23 mov r1, #(PSSR_PH | PSSR_STS) 23 mov r1, #(PSSR_PH | PSSR_STS)
24 mov r2, #2 24 mov r2, #PWRMODE_STANDBY
25 mov r3, #UNCACHED_PHYS_0 @ Read mem context in. 25 mov r3, #UNCACHED_PHYS_0 @ Read mem context in.
26 ldr ip, [r3] 26 ldr ip, [r3]
27 b 1f 27 b 1f
diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c
index e3587efec4bf..5c4ac1c008a6 100644
--- a/arch/arm/mach-rpc/riscpc.c
+++ b/arch/arm/mach-rpc/riscpc.c
@@ -61,9 +61,22 @@ static int __init parse_tag_acorn(const struct tag *tag)
61__tagtable(ATAG_ACORN, parse_tag_acorn); 61__tagtable(ATAG_ACORN, parse_tag_acorn);
62 62
63static struct map_desc rpc_io_desc[] __initdata = { 63static struct map_desc rpc_io_desc[] __initdata = {
64 { SCREEN_BASE, SCREEN_START, 2*1048576, MT_DEVICE }, /* VRAM */ 64 { /* VRAM */
65 { (u32)IO_BASE, IO_START, IO_SIZE , MT_DEVICE }, /* IO space */ 65 .virtual = SCREEN_BASE,
66 { EASI_BASE, EASI_START, EASI_SIZE, MT_DEVICE } /* EASI space */ 66 .pfn = __phys_to_pfn(SCREEN_START),
67 .length = 2*1048576,
68 .type = MT_DEVICE
69 }, { /* IO space */
70 .virtual = (u32)IO_BASE,
71 .pfn = __phys_to_pfn(IO_START),
72 .length = IO_SIZE ,
73 .type = MT_DEVICE
74 }, { /* EASI space */
75 .virtual = EASI_BASE,
76 .pfn = __phys_to_pfn(EASI_START),
77 .length = EASI_SIZE,
78 .type = MT_DEVICE
79 }
67}; 80};
68 81
69static void __init rpc_map_io(void) 82static void __init rpc_map_io(void)
diff --git a/arch/arm/mach-s3c2410/cpu.h b/arch/arm/mach-s3c2410/cpu.h
index 478c15c0e36a..9cbe5eef492b 100644
--- a/arch/arm/mach-s3c2410/cpu.h
+++ b/arch/arm/mach-s3c2410/cpu.h
@@ -21,7 +21,7 @@
21 21
22/* todo - fix when rmk changes iodescs to use `void __iomem *` */ 22/* todo - fix when rmk changes iodescs to use `void __iomem *` */
23 23
24#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, S3C2410_PA_##x, S3C24XX_SZ_##x, MT_DEVICE } 24#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C2410_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
25 25
26#ifndef MHZ 26#ifndef MHZ
27#define MHZ (1000*1000) 27#define MHZ (1000*1000)
diff --git a/arch/arm/mach-s3c2410/devs.c b/arch/arm/mach-s3c2410/devs.c
index 0077937a7ab8..08bc7d95a45d 100644
--- a/arch/arm/mach-s3c2410/devs.c
+++ b/arch/arm/mach-s3c2410/devs.c
@@ -47,7 +47,7 @@ struct platform_device *s3c24xx_uart_devs[3];
47static struct resource s3c_usb_resource[] = { 47static struct resource s3c_usb_resource[] = {
48 [0] = { 48 [0] = {
49 .start = S3C2410_PA_USBHOST, 49 .start = S3C2410_PA_USBHOST,
50 .end = S3C2410_PA_USBHOST + S3C24XX_SZ_USBHOST, 50 .end = S3C2410_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
51 .flags = IORESOURCE_MEM, 51 .flags = IORESOURCE_MEM,
52 }, 52 },
53 [1] = { 53 [1] = {
@@ -77,7 +77,7 @@ EXPORT_SYMBOL(s3c_device_usb);
77static struct resource s3c_lcd_resource[] = { 77static struct resource s3c_lcd_resource[] = {
78 [0] = { 78 [0] = {
79 .start = S3C2410_PA_LCD, 79 .start = S3C2410_PA_LCD,
80 .end = S3C2410_PA_LCD + S3C24XX_SZ_LCD, 80 .end = S3C2410_PA_LCD + S3C24XX_SZ_LCD - 1,
81 .flags = IORESOURCE_MEM, 81 .flags = IORESOURCE_MEM,
82 }, 82 },
83 [1] = { 83 [1] = {
@@ -103,21 +103,25 @@ struct platform_device s3c_device_lcd = {
103 103
104EXPORT_SYMBOL(s3c_device_lcd); 104EXPORT_SYMBOL(s3c_device_lcd);
105 105
106static struct s3c2410fb_mach_info s3c2410fb_info; 106void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
107
108void __init set_s3c2410fb_info(struct s3c2410fb_mach_info *hard_s3c2410fb_info)
109{ 107{
110 memcpy(&s3c2410fb_info,hard_s3c2410fb_info,sizeof(struct s3c2410fb_mach_info)); 108 struct s3c2410fb_mach_info *npd;
111 s3c_device_lcd.dev.platform_data = &s3c2410fb_info; 109
110 npd = kmalloc(sizeof(*npd), GFP_KERNEL);
111 if (npd) {
112 memcpy(npd, pd, sizeof(*npd));
113 s3c_device_lcd.dev.platform_data = npd;
114 } else {
115 printk(KERN_ERR "no memory for LCD platform data\n");
116 }
112} 117}
113EXPORT_SYMBOL(set_s3c2410fb_info);
114 118
115/* NAND Controller */ 119/* NAND Controller */
116 120
117static struct resource s3c_nand_resource[] = { 121static struct resource s3c_nand_resource[] = {
118 [0] = { 122 [0] = {
119 .start = S3C2410_PA_NAND, 123 .start = S3C2410_PA_NAND,
120 .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND, 124 .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND - 1,
121 .flags = IORESOURCE_MEM, 125 .flags = IORESOURCE_MEM,
122 } 126 }
123}; 127};
@@ -136,7 +140,7 @@ EXPORT_SYMBOL(s3c_device_nand);
136static struct resource s3c_usbgadget_resource[] = { 140static struct resource s3c_usbgadget_resource[] = {
137 [0] = { 141 [0] = {
138 .start = S3C2410_PA_USBDEV, 142 .start = S3C2410_PA_USBDEV,
139 .end = S3C2410_PA_USBDEV + S3C24XX_SZ_USBDEV, 143 .end = S3C2410_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
140 .flags = IORESOURCE_MEM, 144 .flags = IORESOURCE_MEM,
141 }, 145 },
142 [1] = { 146 [1] = {
@@ -161,7 +165,7 @@ EXPORT_SYMBOL(s3c_device_usbgadget);
161static struct resource s3c_wdt_resource[] = { 165static struct resource s3c_wdt_resource[] = {
162 [0] = { 166 [0] = {
163 .start = S3C2410_PA_WATCHDOG, 167 .start = S3C2410_PA_WATCHDOG,
164 .end = S3C2410_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG, 168 .end = S3C2410_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
165 .flags = IORESOURCE_MEM, 169 .flags = IORESOURCE_MEM,
166 }, 170 },
167 [1] = { 171 [1] = {
@@ -186,7 +190,7 @@ EXPORT_SYMBOL(s3c_device_wdt);
186static struct resource s3c_i2c_resource[] = { 190static struct resource s3c_i2c_resource[] = {
187 [0] = { 191 [0] = {
188 .start = S3C2410_PA_IIC, 192 .start = S3C2410_PA_IIC,
189 .end = S3C2410_PA_IIC + S3C24XX_SZ_IIC, 193 .end = S3C2410_PA_IIC + S3C24XX_SZ_IIC - 1,
190 .flags = IORESOURCE_MEM, 194 .flags = IORESOURCE_MEM,
191 }, 195 },
192 [1] = { 196 [1] = {
@@ -211,7 +215,7 @@ EXPORT_SYMBOL(s3c_device_i2c);
211static struct resource s3c_iis_resource[] = { 215static struct resource s3c_iis_resource[] = {
212 [0] = { 216 [0] = {
213 .start = S3C2410_PA_IIS, 217 .start = S3C2410_PA_IIS,
214 .end = S3C2410_PA_IIS + S3C24XX_SZ_IIS, 218 .end = S3C2410_PA_IIS + S3C24XX_SZ_IIS -1,
215 .flags = IORESOURCE_MEM, 219 .flags = IORESOURCE_MEM,
216 } 220 }
217}; 221};
@@ -265,7 +269,7 @@ EXPORT_SYMBOL(s3c_device_rtc);
265static struct resource s3c_adc_resource[] = { 269static struct resource s3c_adc_resource[] = {
266 [0] = { 270 [0] = {
267 .start = S3C2410_PA_ADC, 271 .start = S3C2410_PA_ADC,
268 .end = S3C2410_PA_ADC + S3C24XX_SZ_ADC, 272 .end = S3C2410_PA_ADC + S3C24XX_SZ_ADC - 1,
269 .flags = IORESOURCE_MEM, 273 .flags = IORESOURCE_MEM,
270 }, 274 },
271 [1] = { 275 [1] = {
@@ -288,7 +292,7 @@ struct platform_device s3c_device_adc = {
288static struct resource s3c_sdi_resource[] = { 292static struct resource s3c_sdi_resource[] = {
289 [0] = { 293 [0] = {
290 .start = S3C2410_PA_SDI, 294 .start = S3C2410_PA_SDI,
291 .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI, 295 .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1,
292 .flags = IORESOURCE_MEM, 296 .flags = IORESOURCE_MEM,
293 }, 297 },
294 [1] = { 298 [1] = {
@@ -465,7 +469,7 @@ EXPORT_SYMBOL(s3c_device_timer3);
465static struct resource s3c_camif_resource[] = { 469static struct resource s3c_camif_resource[] = {
466 [0] = { 470 [0] = {
467 .start = S3C2440_PA_CAMIF, 471 .start = S3C2440_PA_CAMIF,
468 .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF, 472 .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
469 .flags = IORESOURCE_MEM, 473 .flags = IORESOURCE_MEM,
470 }, 474 },
471 [1] = { 475 [1] = {
diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c
index 94f1776cf312..23ea3d5fa09c 100644
--- a/arch/arm/mach-s3c2410/gpio.c
+++ b/arch/arm/mach-s3c2410/gpio.c
@@ -30,6 +30,7 @@
30 * 04-Oct-2004 BJD Added irq filter controls for GPIO 30 * 04-Oct-2004 BJD Added irq filter controls for GPIO
31 * 05-Nov-2004 BJD EXPORT_SYMBOL() added for all code 31 * 05-Nov-2004 BJD EXPORT_SYMBOL() added for all code
32 * 13-Mar-2005 BJD Updates for __iomem 32 * 13-Mar-2005 BJD Updates for __iomem
33 * 26-Oct-2005 BJD Added generic configuration types
33 */ 34 */
34 35
35 36
@@ -58,6 +59,27 @@ void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
58 mask = 3 << S3C2410_GPIO_OFFSET(pin)*2; 59 mask = 3 << S3C2410_GPIO_OFFSET(pin)*2;
59 } 60 }
60 61
62 switch (function) {
63 case S3C2410_GPIO_LEAVE:
64 mask = 0;
65 function = 0;
66 break;
67
68 case S3C2410_GPIO_INPUT:
69 case S3C2410_GPIO_OUTPUT:
70 case S3C2410_GPIO_SFN2:
71 case S3C2410_GPIO_SFN3:
72 if (pin < S3C2410_GPIO_BANKB) {
73 function &= 1;
74 function <<= S3C2410_GPIO_OFFSET(pin);
75 } else {
76 function &= 3;
77 function <<= S3C2410_GPIO_OFFSET(pin)*2;
78 }
79 }
80
81 /* modify the specified register wwith IRQs off */
82
61 local_irq_save(flags); 83 local_irq_save(flags);
62 84
63 con = __raw_readl(base + 0x00); 85 con = __raw_readl(base + 0x00);
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 7b51bfd0ba6d..c1b5c63ec24a 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -32,6 +32,7 @@
32 * 25-Jul-2005 BJD Removed ASIX static mappings 32 * 25-Jul-2005 BJD Removed ASIX static mappings
33 * 27-Jul-2005 BJD Ensure maximum frequency of i2c bus 33 * 27-Jul-2005 BJD Ensure maximum frequency of i2c bus
34 * 20-Sep-2005 BJD Added static to non-exported items 34 * 20-Sep-2005 BJD Added static to non-exported items
35 * 26-Oct-2005 BJD Added FB platform data
35*/ 36*/
36 37
37#include <linux/kernel.h> 38#include <linux/kernel.h>
@@ -61,8 +62,10 @@
61#include <asm/arch/regs-gpio.h> 62#include <asm/arch/regs-gpio.h>
62#include <asm/arch/regs-mem.h> 63#include <asm/arch/regs-mem.h>
63#include <asm/arch/regs-lcd.h> 64#include <asm/arch/regs-lcd.h>
65
64#include <asm/arch/nand.h> 66#include <asm/arch/nand.h>
65#include <asm/arch/iic.h> 67#include <asm/arch/iic.h>
68#include <asm/arch/fb.h>
66 69
67#include <linux/mtd/mtd.h> 70#include <linux/mtd/mtd.h>
68#include <linux/mtd/nand.h> 71#include <linux/mtd/nand.h>
@@ -399,6 +402,38 @@ static struct s3c2410_platform_i2c bast_i2c_info = {
399 .max_freq = 130*1000, 402 .max_freq = 130*1000,
400}; 403};
401 404
405
406static struct s3c2410fb_mach_info __initdata bast_lcd_info = {
407 .width = 640,
408 .height = 480,
409
410 .xres = {
411 .min = 320,
412 .max = 1024,
413 .defval = 640,
414 },
415
416 .yres = {
417 .min = 240,
418 .max = 600,
419 .defval = 480,
420 },
421
422 .bpp = {
423 .min = 4,
424 .max = 16,
425 .defval = 8,
426 },
427
428 .regs = {
429 .lcdcon1 = 0x00000176,
430 .lcdcon2 = 0x1d77c7c2,
431 .lcdcon3 = 0x013a7f13,
432 .lcdcon4 = 0x00000057,
433 .lcdcon5 = 0x00014b02,
434 }
435};
436
402/* Standard BAST devices */ 437/* Standard BAST devices */
403 438
404static struct platform_device *bast_devices[] __initdata = { 439static struct platform_device *bast_devices[] __initdata = {
@@ -454,6 +489,10 @@ static void __init bast_map_io(void)
454 usb_simtec_init(); 489 usb_simtec_init();
455} 490}
456 491
492static void __init bast_init(void)
493{
494 s3c24xx_fb_set_platdata(&bast_lcd_info);
495}
457 496
458MACHINE_START(BAST, "Simtec-BAST") 497MACHINE_START(BAST, "Simtec-BAST")
459 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ 498 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
@@ -463,5 +502,6 @@ MACHINE_START(BAST, "Simtec-BAST")
463 .boot_params = S3C2410_SDRAM_PA + 0x100, 502 .boot_params = S3C2410_SDRAM_PA + 0x100,
464 .map_io = bast_map_io, 503 .map_io = bast_map_io,
465 .init_irq = s3c24xx_init_irq, 504 .init_irq = s3c24xx_init_irq,
505 .init_machine = bast_init,
466 .timer = &s3c24xx_timer, 506 .timer = &s3c24xx_timer,
467MACHINE_END 507MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index fb3cb01266e5..7efeaaad2361 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -25,6 +25,7 @@
25 * 14-Jan-2005 BJD Added clock init 25 * 14-Jan-2005 BJD Added clock init
26 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA 26 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
27 * 20-Sep-2005 BJD Added static to non-exported items 27 * 20-Sep-2005 BJD Added static to non-exported items
28 * 26-Oct-2005 BJD Changed name of fb init call
28*/ 29*/
29 30
30#include <linux/kernel.h> 31#include <linux/kernel.h>
@@ -164,7 +165,7 @@ static void __init h1940_init_irq(void)
164 165
165static void __init h1940_init(void) 166static void __init h1940_init(void)
166{ 167{
167 set_s3c2410fb_info(&h1940_lcdcfg); 168 s3c24xx_fb_set_platdata(&h1940_lcdcfg);
168} 169}
169 170
170MACHINE_START(H1940, "IPAQ-H1940") 171MACHINE_START(H1940, "IPAQ-H1940")
diff --git a/arch/arm/mach-s3c2410/mach-smdk2440.c b/arch/arm/mach-s3c2410/mach-smdk2440.c
index 722ef46b630a..6950e61b7914 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2440.c
@@ -19,6 +19,7 @@
19 * 10-Mar-2005 LCVR Replaced S3C2410_VA by S3C24XX_VA 19 * 10-Mar-2005 LCVR Replaced S3C2410_VA by S3C24XX_VA
20 * 14-Mar-2005 BJD void __iomem fixes 20 * 14-Mar-2005 BJD void __iomem fixes
21 * 20-Sep-2005 BJD Added static to non-exported items 21 * 20-Sep-2005 BJD Added static to non-exported items
22 * 26-Oct-2005 BJD Added framebuffer data
22*/ 23*/
23 24
24#include <linux/kernel.h> 25#include <linux/kernel.h>
@@ -41,7 +42,10 @@
41//#include <asm/debug-ll.h> 42//#include <asm/debug-ll.h>
42#include <asm/arch/regs-serial.h> 43#include <asm/arch/regs-serial.h>
43#include <asm/arch/regs-gpio.h> 44#include <asm/arch/regs-gpio.h>
45#include <asm/arch/regs-lcd.h>
46
44#include <asm/arch/idle.h> 47#include <asm/arch/idle.h>
48#include <asm/arch/fb.h>
45 49
46#include "s3c2410.h" 50#include "s3c2410.h"
47#include "s3c2440.h" 51#include "s3c2440.h"
@@ -86,6 +90,70 @@ static struct s3c2410_uartcfg smdk2440_uartcfgs[] = {
86 } 90 }
87}; 91};
88 92
93/* LCD driver info */
94
95static struct s3c2410fb_mach_info smdk2440_lcd_cfg __initdata = {
96 .regs = {
97
98 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
99 S3C2410_LCDCON1_TFT |
100 S3C2410_LCDCON1_CLKVAL(0x04),
101
102 .lcdcon2 = S3C2410_LCDCON2_VBPD(7) |
103 S3C2410_LCDCON2_LINEVAL(319) |
104 S3C2410_LCDCON2_VFPD(6) |
105 S3C2410_LCDCON2_VSPW(3),
106
107 .lcdcon3 = S3C2410_LCDCON3_HBPD(19) |
108 S3C2410_LCDCON3_HOZVAL(239) |
109 S3C2410_LCDCON3_HFPD(7),
110
111 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
112 S3C2410_LCDCON4_HSPW(3),
113
114 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
115 S3C2410_LCDCON5_INVVLINE |
116 S3C2410_LCDCON5_INVVFRAME |
117 S3C2410_LCDCON5_PWREN |
118 S3C2410_LCDCON5_HWSWP,
119 },
120
121#if 0
122 /* currently setup by downloader */
123 .gpccon = 0xaa940659,
124 .gpccon_mask = 0xffffffff,
125 .gpcup = 0x0000ffff,
126 .gpcup_mask = 0xffffffff,
127 .gpdcon = 0xaa84aaa0,
128 .gpdcon_mask = 0xffffffff,
129 .gpdup = 0x0000faff,
130 .gpdup_mask = 0xffffffff,
131#endif
132
133 .lpcsel = ((0xCE6) & ~7) | 1<<4,
134
135 .width = 240,
136 .height = 320,
137
138 .xres = {
139 .min = 240,
140 .max = 240,
141 .defval = 240,
142 },
143
144 .yres = {
145 .min = 320,
146 .max = 320,
147 .defval = 320,
148 },
149
150 .bpp = {
151 .min = 16,
152 .max = 16,
153 .defval = 16,
154 },
155};
156
89static struct platform_device *smdk2440_devices[] __initdata = { 157static struct platform_device *smdk2440_devices[] __initdata = {
90 &s3c_device_usb, 158 &s3c_device_usb,
91 &s3c_device_lcd, 159 &s3c_device_lcd,
@@ -121,6 +189,8 @@ static void __init smdk2440_machine_init(void)
121 s3c2410_gpio_setpin(S3C2410_GPF6, 0); 189 s3c2410_gpio_setpin(S3C2410_GPF6, 0);
122 s3c2410_gpio_setpin(S3C2410_GPF7, 0); 190 s3c2410_gpio_setpin(S3C2410_GPF7, 0);
123 191
192 s3c24xx_fb_set_platdata(&smdk2440_lcd_cfg);
193
124 s3c2410_pm_init(); 194 s3c2410_pm_init();
125} 195}
126 196
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index 24687f511bf5..75efb5da5b6d 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -388,9 +388,17 @@ static struct sa1100_port_fns assabet_port_fns __initdata = {
388}; 388};
389 389
390static struct map_desc assabet_io_desc[] __initdata = { 390static struct map_desc assabet_io_desc[] __initdata = {
391 /* virtual physical length type */ 391 { /* Board Control Register */
392 { 0xf1000000, 0x12000000, 0x00100000, MT_DEVICE }, /* Board Control Register */ 392 .virtual = 0xf1000000,
393 { 0xf2800000, 0x4b800000, 0x00800000, MT_DEVICE } /* MQ200 */ 393 .pfn = __phys_to_pfn(0x12000000),
394 .length = 0x00100000,
395 .type = MT_DEVICE
396 }, { /* MQ200 */
397 .virtual = 0xf2800000,
398 .pfn = __phys_to_pfn(0x4b800000),
399 .length = 0x00800000,
400 .type = MT_DEVICE
401 }
394}; 402};
395 403
396static void __init assabet_map_io(void) 404static void __init assabet_map_io(void)
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c
index b6169cb09196..c92cebff7f8e 100644
--- a/arch/arm/mach-sa1100/badge4.c
+++ b/arch/arm/mach-sa1100/badge4.c
@@ -254,10 +254,22 @@ EXPORT_SYMBOL(badge4_set_5V);
254 254
255 255
256static struct map_desc badge4_io_desc[] __initdata = { 256static struct map_desc badge4_io_desc[] __initdata = {
257 /* virtual physical length type */ 257 { /* SRAM bank 1 */
258 {0xf1000000, 0x08000000, 0x00100000, MT_DEVICE },/* SRAM bank 1 */ 258 .virtual = 0xf1000000,
259 {0xf2000000, 0x10000000, 0x00100000, MT_DEVICE },/* SRAM bank 2 */ 259 .pfn = __phys_to_pfn(0x08000000),
260 {0xf4000000, 0x48000000, 0x00100000, MT_DEVICE } /* SA-1111 */ 260 .length = 0x00100000,
261 .type = MT_DEVICE
262 }, { /* SRAM bank 2 */
263 .virtual = 0xf2000000,
264 .pfn = __phys_to_pfn(0x10000000),
265 .length = 0x00100000,
266 .type = MT_DEVICE
267 }, { /* SA-1111 */
268 .virtual = 0xf4000000,
269 .pfn = __phys_to_pfn(0x48000000),
270 .length = 0x00100000,
271 .type = MT_DEVICE
272 }
261}; 273};
262 274
263static void 275static void
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c
index 9484be7dc671..23cb74885275 100644
--- a/arch/arm/mach-sa1100/cerf.c
+++ b/arch/arm/mach-sa1100/cerf.c
@@ -100,8 +100,12 @@ static void __init cerf_init_irq(void)
100} 100}
101 101
102static struct map_desc cerf_io_desc[] __initdata = { 102static struct map_desc cerf_io_desc[] __initdata = {
103 /* virtual physical length type */ 103 { /* Crystal Ethernet Chip */
104 { 0xf0000000, 0x08000000, 0x00100000, MT_DEVICE } /* Crystal Ethernet Chip */ 104 .virtual = 0xf0000000,
105 .pfn = __phys_to_pfn(0x08000000),
106 .length = 0x00100000,
107 .type = MT_DEVICE
108 }
105}; 109};
106 110
107static void __init cerf_map_io(void) 111static void __init cerf_map_io(void)
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index 6ecab7e2c238..7fd6e29c36b7 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -171,9 +171,17 @@ static void __init collie_init(void)
171} 171}
172 172
173static struct map_desc collie_io_desc[] __initdata = { 173static struct map_desc collie_io_desc[] __initdata = {
174 /* virtual physical length type */ 174 { /* 32M main flash (cs0) */
175 {0xe8000000, 0x00000000, 0x02000000, MT_DEVICE}, /* 32M main flash (cs0) */ 175 .virtual = 0xe8000000,
176 {0xea000000, 0x08000000, 0x02000000, MT_DEVICE}, /* 32M boot flash (cs1) */ 176 .pfn = __phys_to_pfn(0x00000000),
177 .length = 0x02000000,
178 .type = MT_DEVICE
179 }, { /* 32M boot flash (cs1) */
180 .virtual = 0xea000000,
181 .pfn = __phys_to_pfn(0x08000000),
182 .length = 0x02000000,
183 .type = MT_DEVICE
184 }
177}; 185};
178 186
179static void __init collie_map_io(void) 187static void __init collie_map_io(void)
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 3f1e358455e5..93619497779c 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -369,11 +369,27 @@ EXPORT_SYMBOL(sa1100fb_lcd_power);
369 */ 369 */
370 370
371static struct map_desc standard_io_desc[] __initdata = { 371static struct map_desc standard_io_desc[] __initdata = {
372 /* virtual physical length type */ 372 { /* PCM */
373 { 0xf8000000, 0x80000000, 0x00100000, MT_DEVICE }, /* PCM */ 373 .virtual = 0xf8000000,
374 { 0xfa000000, 0x90000000, 0x00100000, MT_DEVICE }, /* SCM */ 374 .pfn = __phys_to_pfn(0x80000000),
375 { 0xfc000000, 0xa0000000, 0x00100000, MT_DEVICE }, /* MER */ 375 .length = 0x00100000,
376 { 0xfe000000, 0xb0000000, 0x00200000, MT_DEVICE } /* LCD + DMA */ 376 .type = MT_DEVICE
377 }, { /* SCM */
378 .virtual = 0xfa000000,
379 .pfn = __phys_to_pfn(0x90000000),
380 .length = 0x00100000,
381 .type = MT_DEVICE
382 }, { /* MER */
383 .virtual = 0xfc000000,
384 .pfn = __phys_to_pfn(0xa0000000),
385 .length = 0x00100000,
386 .type = MT_DEVICE
387 }, { /* LCD + DMA */
388 .virtual = 0xfe000000,
389 .pfn = __phys_to_pfn(0xb0000000),
390 .length = 0x00200000,
391 .type = MT_DEVICE
392 },
377}; 393};
378 394
379void __init sa1100_map_io(void) 395void __init sa1100_map_io(void)
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c
index e7aa2681ca64..e8352b7f74b0 100644
--- a/arch/arm/mach-sa1100/h3600.c
+++ b/arch/arm/mach-sa1100/h3600.c
@@ -223,10 +223,22 @@ static void h3xxx_lcd_power(int enable)
223} 223}
224 224
225static struct map_desc h3600_io_desc[] __initdata = { 225static struct map_desc h3600_io_desc[] __initdata = {
226 /* virtual physical length type */ 226 { /* static memory bank 2 CS#2 */
227 { H3600_BANK_2_VIRT, SA1100_CS2_PHYS, 0x02800000, MT_DEVICE }, /* static memory bank 2 CS#2 */ 227 .virtual = H3600_BANK_2_VIRT,
228 { H3600_BANK_4_VIRT, SA1100_CS4_PHYS, 0x00800000, MT_DEVICE }, /* static memory bank 4 CS#4 */ 228 .pfn = __phys_to_pfn(SA1100_CS2_PHYS),
229 { H3600_EGPIO_VIRT, H3600_EGPIO_PHYS, 0x01000000, MT_DEVICE }, /* EGPIO 0 CS#5 */ 229 .length = 0x02800000,
230 .type = MT_DEVICE
231 }, { /* static memory bank 4 CS#4 */
232 .virtual = H3600_BANK_4_VIRT,
233 .pfn = __phys_to_pfn(SA1100_CS4_PHYS),
234 .length = 0x00800000,
235 .type = MT_DEVICE
236 }, { /* EGPIO 0 CS#5 */
237 .virtual = H3600_EGPIO_VIRT,
238 .pfn = __phys_to_pfn(H3600_EGPIO_PHYS),
239 .length = 0x01000000,
240 .type = MT_DEVICE
241 }
230}; 242};
231 243
232/* 244/*
diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c
index 502d65cfe654..c922e043c424 100644
--- a/arch/arm/mach-sa1100/hackkit.c
+++ b/arch/arm/mach-sa1100/hackkit.c
@@ -57,8 +57,12 @@ static void hackkit_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
57 */ 57 */
58 58
59static struct map_desc hackkit_io_desc[] __initdata = { 59static struct map_desc hackkit_io_desc[] __initdata = {
60 /* virtual physical length type */ 60 { /* Flash bank 0 */
61 { 0xe8000000, 0x00000000, 0x01000000, MT_DEVICE } /* Flash bank 0 */ 61 .virtual = 0xe8000000,
62 .pfn = __phys_to_pfn(0x00000000),
63 .length = 0x01000000,
64 .type = MT_DEVICE
65 },
62}; 66};
63 67
64static struct sa1100_port_fns hackkit_port_fns __initdata = { 68static struct sa1100_port_fns hackkit_port_fns __initdata = {
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c
index 2f497112c96a..9c363bfcf310 100644
--- a/arch/arm/mach-sa1100/jornada720.c
+++ b/arch/arm/mach-sa1100/jornada720.c
@@ -81,10 +81,22 @@ static int __init jornada720_init(void)
81arch_initcall(jornada720_init); 81arch_initcall(jornada720_init);
82 82
83static struct map_desc jornada720_io_desc[] __initdata = { 83static struct map_desc jornada720_io_desc[] __initdata = {
84 /* virtual physical length type */ 84 { /* Epson registers */
85 { 0xf0000000, 0x48000000, 0x00100000, MT_DEVICE }, /* Epson registers */ 85 .virtual = 0xf0000000,
86 { 0xf1000000, 0x48200000, 0x00100000, MT_DEVICE }, /* Epson frame buffer */ 86 .pfn = __phys_to_pfn(0x48000000),
87 { 0xf4000000, 0x40000000, 0x00100000, MT_DEVICE } /* SA-1111 */ 87 .length = 0x00100000,
88 .type = MT_DEVICE
89 }, { /* Epson frame buffer */
90 .virtual = 0xf1000000,
91 .pfn = __phys_to_pfn(0x48200000),
92 .length = 0x00100000,
93 .type = MT_DEVICE
94 }, { /* SA-1111 */
95 .virtual = 0xf4000000,
96 .pfn = __phys_to_pfn(0x40000000),
97 .length = 0x00100000,
98 .type = MT_DEVICE
99 }
88}; 100};
89 101
90static void __init jornada720_map_io(void) 102static void __init jornada720_map_io(void)
diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c
index ed6744d480af..8c9e3dd52942 100644
--- a/arch/arm/mach-sa1100/lart.c
+++ b/arch/arm/mach-sa1100/lart.c
@@ -31,9 +31,17 @@ static void __init lart_init(void)
31} 31}
32 32
33static struct map_desc lart_io_desc[] __initdata = { 33static struct map_desc lart_io_desc[] __initdata = {
34 /* virtual physical length type */ 34 { /* main flash memory */
35 { 0xe8000000, 0x00000000, 0x00400000, MT_DEVICE }, /* main flash memory */ 35 .virtual = 0xe8000000,
36 { 0xec000000, 0x08000000, 0x00400000, MT_DEVICE } /* main flash, alternative location */ 36 .pfn = __phys_to_pfn(0x00000000),
37 .length = 0x00400000,
38 .type = MT_DEVICE
39 }, { /* main flash, alternative location */
40 .virtual = 0xec000000,
41 .pfn = __phys_to_pfn(0x08000000),
42 .length = 0x00400000,
43 .type = MT_DEVICE
44 }
37}; 45};
38 46
39static void __init lart_map_io(void) 47static void __init lart_map_io(void)
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 7609d69cf1cc..052e4caedb89 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -325,9 +325,17 @@ static int __init neponset_init(void)
325subsys_initcall(neponset_init); 325subsys_initcall(neponset_init);
326 326
327static struct map_desc neponset_io_desc[] __initdata = { 327static struct map_desc neponset_io_desc[] __initdata = {
328 /* virtual physical length type */ 328 { /* System Registers */
329 { 0xf3000000, 0x10000000, SZ_1M, MT_DEVICE }, /* System Registers */ 329 .virtual = 0xf3000000,
330 { 0xf4000000, 0x40000000, SZ_1M, MT_DEVICE } /* SA-1111 */ 330 .pfn = __phys_to_pfn(0x10000000),
331 .length = SZ_1M,
332 .type = MT_DEVICE
333 }, { /* SA-1111 */
334 .virtual = 0xf4000000,
335 .pfn = __phys_to_pfn(0x40000000),
336 .length = SZ_1M,
337 .type = MT_DEVICE
338 }
331}; 339};
332 340
333void __init neponset_map_io(void) 341void __init neponset_map_io(void)
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
index 07f6d5fd7bb0..cfb6658e5cdf 100644
--- a/arch/arm/mach-sa1100/simpad.c
+++ b/arch/arm/mach-sa1100/simpad.c
@@ -60,11 +60,17 @@ EXPORT_SYMBOL(set_cs3_bit);
60EXPORT_SYMBOL(clear_cs3_bit); 60EXPORT_SYMBOL(clear_cs3_bit);
61 61
62static struct map_desc simpad_io_desc[] __initdata = { 62static struct map_desc simpad_io_desc[] __initdata = {
63 /* virtual physical length type */ 63 { /* MQ200 */
64 /* MQ200 */ 64 .virtual = 0xf2800000,
65 { 0xf2800000, 0x4b800000, 0x00800000, MT_DEVICE }, 65 .pfn = __phys_to_pfn(0x4b800000),
66 /* Paules CS3, write only */ 66 .length = 0x00800000,
67 { 0xf1000000, 0x18000000, 0x00100000, MT_DEVICE }, 67 .type = MT_DEVICE
68 }, { /* Paules CS3, write only */
69 .virtual = 0xf1000000,
70 .pfn = __phys_to_pfn(0x18000000),
71 .length = 0x00100000,
72 .type = MT_DEVICE
73 },
68}; 74};
69 75
70 76
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index 946c0d11c73b..2d428b6dbb58 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -62,7 +62,12 @@ arch_initcall(shark_init);
62extern void shark_init_irq(void); 62extern void shark_init_irq(void);
63 63
64static struct map_desc shark_io_desc[] __initdata = { 64static struct map_desc shark_io_desc[] __initdata = {
65 { IO_BASE , IO_START , IO_SIZE , MT_DEVICE } 65 {
66 .virtual = IO_BASE,
67 .pfn = __phys_to_pfn(IO_START),
68 .length = IO_SIZE,
69 .type = MT_DEVICE
70 }
66}; 71};
67 72
68static void __init shark_map_io(void) 73static void __init shark_map_io(void)
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index a30e0451df72..7e4bdd07f4af 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -186,25 +186,82 @@ void __init versatile_init_irq(void)
186} 186}
187 187
188static struct map_desc versatile_io_desc[] __initdata = { 188static struct map_desc versatile_io_desc[] __initdata = {
189 { IO_ADDRESS(VERSATILE_SYS_BASE), VERSATILE_SYS_BASE, SZ_4K, MT_DEVICE }, 189 {
190 { IO_ADDRESS(VERSATILE_SIC_BASE), VERSATILE_SIC_BASE, SZ_4K, MT_DEVICE }, 190 .virtual = IO_ADDRESS(VERSATILE_SYS_BASE),
191 { IO_ADDRESS(VERSATILE_VIC_BASE), VERSATILE_VIC_BASE, SZ_4K, MT_DEVICE }, 191 .pfn = __phys_to_pfn(VERSATILE_SYS_BASE),
192 { IO_ADDRESS(VERSATILE_SCTL_BASE), VERSATILE_SCTL_BASE, SZ_4K * 9, MT_DEVICE }, 192 .length = SZ_4K,
193 .type = MT_DEVICE
194 }, {
195 .virtual = IO_ADDRESS(VERSATILE_SIC_BASE),
196 .pfn = __phys_to_pfn(VERSATILE_SIC_BASE),
197 .length = SZ_4K,
198 .type = MT_DEVICE
199 }, {
200 .virtual = IO_ADDRESS(VERSATILE_VIC_BASE),
201 .pfn = __phys_to_pfn(VERSATILE_VIC_BASE),
202 .length = SZ_4K,
203 .type = MT_DEVICE
204 }, {
205 .virtual = IO_ADDRESS(VERSATILE_SCTL_BASE),
206 .pfn = __phys_to_pfn(VERSATILE_SCTL_BASE),
207 .length = SZ_4K * 9,
208 .type = MT_DEVICE
209 },
193#ifdef CONFIG_MACH_VERSATILE_AB 210#ifdef CONFIG_MACH_VERSATILE_AB
194 { IO_ADDRESS(VERSATILE_GPIO0_BASE), VERSATILE_GPIO0_BASE, SZ_4K, MT_DEVICE }, 211 {
195 { IO_ADDRESS(VERSATILE_IB2_BASE), VERSATILE_IB2_BASE, SZ_64M, MT_DEVICE }, 212 .virtual = IO_ADDRESS(VERSATILE_GPIO0_BASE),
213 .pfn = __phys_to_pfn(VERSATILE_GPIO0_BASE),
214 .length = SZ_4K,
215 .type = MT_DEVICE
216 }, {
217 .virtual = IO_ADDRESS(VERSATILE_IB2_BASE),
218 .pfn = __phys_to_pfn(VERSATILE_IB2_BASE),
219 .length = SZ_64M,
220 .type = MT_DEVICE
221 },
196#endif 222#endif
197#ifdef CONFIG_DEBUG_LL 223#ifdef CONFIG_DEBUG_LL
198 { IO_ADDRESS(VERSATILE_UART0_BASE), VERSATILE_UART0_BASE, SZ_4K, MT_DEVICE }, 224 {
225 .virtual = IO_ADDRESS(VERSATILE_UART0_BASE),
226 .pfn = __phys_to_pfn(VERSATILE_UART0_BASE),
227 .length = SZ_4K,
228 .type = MT_DEVICE
229 },
199#endif 230#endif
200#ifdef CONFIG_PCI 231#ifdef CONFIG_PCI
201 { IO_ADDRESS(VERSATILE_PCI_CORE_BASE), VERSATILE_PCI_CORE_BASE, SZ_4K, MT_DEVICE }, 232 {
202 { VERSATILE_PCI_VIRT_BASE, VERSATILE_PCI_BASE, VERSATILE_PCI_BASE_SIZE, MT_DEVICE }, 233 .virtual = IO_ADDRESS(VERSATILE_PCI_CORE_BASE),
203 { VERSATILE_PCI_CFG_VIRT_BASE, VERSATILE_PCI_CFG_BASE, VERSATILE_PCI_CFG_BASE_SIZE, MT_DEVICE }, 234 .pfn = __phys_to_pfn(VERSATILE_PCI_CORE_BASE),
235 .length = SZ_4K,
236 .type = MT_DEVICE
237 }, {
238 .virtual = VERSATILE_PCI_VIRT_BASE,
239 .pfn = __phys_to_pfn(VERSATILE_PCI_BASE),
240 .length = VERSATILE_PCI_BASE_SIZE,
241 .type = MT_DEVICE
242 }, {
243 .virtual = VERSATILE_PCI_CFG_VIRT_BASE,
244 .pfn = __phys_to_pfn(VERSATILE_PCI_CFG_BASE),
245 .length = VERSATILE_PCI_CFG_BASE_SIZE,
246 .type = MT_DEVICE
247 },
204#if 0 248#if 0
205 { VERSATILE_PCI_VIRT_MEM_BASE0, VERSATILE_PCI_MEM_BASE0, SZ_16M, MT_DEVICE }, 249 {
206 { VERSATILE_PCI_VIRT_MEM_BASE1, VERSATILE_PCI_MEM_BASE1, SZ_16M, MT_DEVICE }, 250 .virtual = VERSATILE_PCI_VIRT_MEM_BASE0,
207 { VERSATILE_PCI_VIRT_MEM_BASE2, VERSATILE_PCI_MEM_BASE2, SZ_16M, MT_DEVICE }, 251 .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE0),
252 .length = SZ_16M,
253 .type = MT_DEVICE
254 }, {
255 .virtual = VERSATILE_PCI_VIRT_MEM_BASE1,
256 .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE1),
257 .length = SZ_16M,
258 .type = MT_DEVICE
259 }, {
260 .virtual = VERSATILE_PCI_VIRT_MEM_BASE2,
261 .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE2),
262 .length = SZ_16M,
263 .type = MT_DEVICE
264 },
208#endif 265#endif
209#endif 266#endif
210}; 267};
diff --git a/arch/arm/mm/consistent.c b/arch/arm/mm/consistent.c
index 26356ce4da54..82f4d5e27c54 100644
--- a/arch/arm/mm/consistent.c
+++ b/arch/arm/mm/consistent.c
@@ -75,7 +75,7 @@ static struct vm_region consistent_head = {
75}; 75};
76 76
77static struct vm_region * 77static struct vm_region *
78vm_region_alloc(struct vm_region *head, size_t size, int gfp) 78vm_region_alloc(struct vm_region *head, size_t size, gfp_t gfp)
79{ 79{
80 unsigned long addr = head->vm_start, end = head->vm_end - size; 80 unsigned long addr = head->vm_start, end = head->vm_end - size;
81 unsigned long flags; 81 unsigned long flags;
@@ -133,7 +133,7 @@ static struct vm_region *vm_region_find(struct vm_region *head, unsigned long ad
133#endif 133#endif
134 134
135static void * 135static void *
136__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, int gfp, 136__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
137 pgprot_t prot) 137 pgprot_t prot)
138{ 138{
139 struct page *page; 139 struct page *page;
@@ -251,7 +251,7 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, int gfp,
251 * virtual and bus address for that space. 251 * virtual and bus address for that space.
252 */ 252 */
253void * 253void *
254dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, int gfp) 254dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
255{ 255{
256 return __dma_alloc(dev, size, handle, gfp, 256 return __dma_alloc(dev, size, handle, gfp,
257 pgprot_noncached(pgprot_kernel)); 257 pgprot_noncached(pgprot_kernel));
@@ -263,7 +263,7 @@ EXPORT_SYMBOL(dma_alloc_coherent);
263 * dma_alloc_coherent above. 263 * dma_alloc_coherent above.
264 */ 264 */
265void * 265void *
266dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, int gfp) 266dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
267{ 267{
268 return __dma_alloc(dev, size, handle, gfp, 268 return __dma_alloc(dev, size, handle, gfp,
269 pgprot_writecombine(pgprot_kernel)); 269 pgprot_writecombine(pgprot_kernel));
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index edffa47a4b2a..f4496813615a 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/arch/arm/mm/init.c 2 * linux/arch/arm/mm/init.c
3 * 3 *
4 * Copyright (C) 1995-2002 Russell King 4 * Copyright (C) 1995-2005 Russell King
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
@@ -86,14 +86,19 @@ void show_mem(void)
86 printk("%d pages swap cached\n", cached); 86 printk("%d pages swap cached\n", cached);
87} 87}
88 88
89struct node_info { 89static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt)
90 unsigned int start; 90{
91 unsigned int end; 91 return pmd_offset(pgd, virt);
92 int bootmap_pages; 92}
93}; 93
94static inline pmd_t *pmd_off_k(unsigned long virt)
95{
96 return pmd_off(pgd_offset_k(virt), virt);
97}
94 98
95#define O_PFN_DOWN(x) ((x) >> PAGE_SHIFT) 99#define for_each_nodebank(iter,mi,no) \
96#define O_PFN_UP(x) (PAGE_ALIGN(x) >> PAGE_SHIFT) 100 for (iter = 0; iter < mi->nr_banks; iter++) \
101 if (mi->bank[iter].node == no)
97 102
98/* 103/*
99 * FIXME: We really want to avoid allocating the bootmap bitmap 104 * FIXME: We really want to avoid allocating the bootmap bitmap
@@ -106,15 +111,12 @@ find_bootmap_pfn(int node, struct meminfo *mi, unsigned int bootmap_pages)
106{ 111{
107 unsigned int start_pfn, bank, bootmap_pfn; 112 unsigned int start_pfn, bank, bootmap_pfn;
108 113
109 start_pfn = O_PFN_UP(__pa(&_end)); 114 start_pfn = PAGE_ALIGN(__pa(&_end)) >> PAGE_SHIFT;
110 bootmap_pfn = 0; 115 bootmap_pfn = 0;
111 116
112 for (bank = 0; bank < mi->nr_banks; bank ++) { 117 for_each_nodebank(bank, mi, node) {
113 unsigned int start, end; 118 unsigned int start, end;
114 119
115 if (mi->bank[bank].node != node)
116 continue;
117
118 start = mi->bank[bank].start >> PAGE_SHIFT; 120 start = mi->bank[bank].start >> PAGE_SHIFT;
119 end = (mi->bank[bank].size + 121 end = (mi->bank[bank].size +
120 mi->bank[bank].start) >> PAGE_SHIFT; 122 mi->bank[bank].start) >> PAGE_SHIFT;
@@ -140,92 +142,6 @@ find_bootmap_pfn(int node, struct meminfo *mi, unsigned int bootmap_pages)
140 return bootmap_pfn; 142 return bootmap_pfn;
141} 143}
142 144
143/*
144 * Scan the memory info structure and pull out:
145 * - the end of memory
146 * - the number of nodes
147 * - the pfn range of each node
148 * - the number of bootmem bitmap pages
149 */
150static unsigned int __init
151find_memend_and_nodes(struct meminfo *mi, struct node_info *np)
152{
153 unsigned int i, bootmem_pages = 0, memend_pfn = 0;
154
155 for (i = 0; i < MAX_NUMNODES; i++) {
156 np[i].start = -1U;
157 np[i].end = 0;
158 np[i].bootmap_pages = 0;
159 }
160
161 for (i = 0; i < mi->nr_banks; i++) {
162 unsigned long start, end;
163 int node;
164
165 if (mi->bank[i].size == 0) {
166 /*
167 * Mark this bank with an invalid node number
168 */
169 mi->bank[i].node = -1;
170 continue;
171 }
172
173 node = mi->bank[i].node;
174
175 /*
176 * Make sure we haven't exceeded the maximum number of nodes
177 * that we have in this configuration. If we have, we're in
178 * trouble. (maybe we ought to limit, instead of bugging?)
179 */
180 if (node >= MAX_NUMNODES)
181 BUG();
182 node_set_online(node);
183
184 /*
185 * Get the start and end pfns for this bank
186 */
187 start = mi->bank[i].start >> PAGE_SHIFT;
188 end = (mi->bank[i].start + mi->bank[i].size) >> PAGE_SHIFT;
189
190 if (np[node].start > start)
191 np[node].start = start;
192
193 if (np[node].end < end)
194 np[node].end = end;
195
196 if (memend_pfn < end)
197 memend_pfn = end;
198 }
199
200 /*
201 * Calculate the number of pages we require to
202 * store the bootmem bitmaps.
203 */
204 for_each_online_node(i) {
205 if (np[i].end == 0)
206 continue;
207
208 np[i].bootmap_pages = bootmem_bootmap_pages(np[i].end -
209 np[i].start);
210 bootmem_pages += np[i].bootmap_pages;
211 }
212
213 high_memory = __va(memend_pfn << PAGE_SHIFT);
214
215 /*
216 * This doesn't seem to be used by the Linux memory
217 * manager any more. If we can get rid of it, we
218 * also get rid of some of the stuff above as well.
219 *
220 * Note: max_low_pfn and max_pfn reflect the number
221 * of _pages_ in the system, not the maximum PFN.
222 */
223 max_low_pfn = memend_pfn - O_PFN_DOWN(PHYS_OFFSET);
224 max_pfn = memend_pfn - O_PFN_DOWN(PHYS_OFFSET);
225
226 return bootmem_pages;
227}
228
229static int __init check_initrd(struct meminfo *mi) 145static int __init check_initrd(struct meminfo *mi)
230{ 146{
231 int initrd_node = -2; 147 int initrd_node = -2;
@@ -266,9 +182,8 @@ static int __init check_initrd(struct meminfo *mi)
266/* 182/*
267 * Reserve the various regions of node 0 183 * Reserve the various regions of node 0
268 */ 184 */
269static __init void reserve_node_zero(unsigned int bootmap_pfn, unsigned int bootmap_pages) 185static __init void reserve_node_zero(pg_data_t *pgdat)
270{ 186{
271 pg_data_t *pgdat = NODE_DATA(0);
272 unsigned long res_size = 0; 187 unsigned long res_size = 0;
273 188
274 /* 189 /*
@@ -289,13 +204,6 @@ static __init void reserve_node_zero(unsigned int bootmap_pfn, unsigned int boot
289 PTRS_PER_PGD * sizeof(pgd_t)); 204 PTRS_PER_PGD * sizeof(pgd_t));
290 205
291 /* 206 /*
292 * And don't forget to reserve the allocator bitmap,
293 * which will be freed later.
294 */
295 reserve_bootmem_node(pgdat, bootmap_pfn << PAGE_SHIFT,
296 bootmap_pages << PAGE_SHIFT);
297
298 /*
299 * Hmm... This should go elsewhere, but we really really need to 207 * Hmm... This should go elsewhere, but we really really need to
300 * stop things allocating the low memory; ideally we need a better 208 * stop things allocating the low memory; ideally we need a better
301 * implementation of GFP_DMA which does not assume that DMA-able 209 * implementation of GFP_DMA which does not assume that DMA-able
@@ -324,183 +232,276 @@ static __init void reserve_node_zero(unsigned int bootmap_pfn, unsigned int boot
324 reserve_bootmem_node(pgdat, PHYS_OFFSET, res_size); 232 reserve_bootmem_node(pgdat, PHYS_OFFSET, res_size);
325} 233}
326 234
327/* 235void __init build_mem_type_table(void);
328 * Register all available RAM in this node with the bootmem allocator. 236void __init create_mapping(struct map_desc *md);
329 */ 237
330static inline void free_bootmem_node_bank(int node, struct meminfo *mi) 238static unsigned long __init
239bootmem_init_node(int node, int initrd_node, struct meminfo *mi)
331{ 240{
332 pg_data_t *pgdat = NODE_DATA(node); 241 unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES];
333 int bank; 242 unsigned long start_pfn, end_pfn, boot_pfn;
243 unsigned int boot_pages;
244 pg_data_t *pgdat;
245 int i;
334 246
335 for (bank = 0; bank < mi->nr_banks; bank++) 247 start_pfn = -1UL;
336 if (mi->bank[bank].node == node) 248 end_pfn = 0;
337 free_bootmem_node(pgdat, mi->bank[bank].start,
338 mi->bank[bank].size);
339}
340 249
341/* 250 /*
342 * Initialise the bootmem allocator for all nodes. This is called 251 * Calculate the pfn range, and map the memory banks for this node.
343 * early during the architecture specific initialisation. 252 */
344 */ 253 for_each_nodebank(i, mi, node) {
345static void __init bootmem_init(struct meminfo *mi) 254 unsigned long start, end;
346{ 255 struct map_desc map;
347 struct node_info node_info[MAX_NUMNODES], *np = node_info;
348 unsigned int bootmap_pages, bootmap_pfn, map_pg;
349 int node, initrd_node;
350 256
351 bootmap_pages = find_memend_and_nodes(mi, np); 257 start = mi->bank[i].start >> PAGE_SHIFT;
352 bootmap_pfn = find_bootmap_pfn(0, mi, bootmap_pages); 258 end = (mi->bank[i].start + mi->bank[i].size) >> PAGE_SHIFT;
353 initrd_node = check_initrd(mi);
354 259
355 map_pg = bootmap_pfn; 260 if (start_pfn > start)
261 start_pfn = start;
262 if (end_pfn < end)
263 end_pfn = end;
264
265 map.pfn = __phys_to_pfn(mi->bank[i].start);
266 map.virtual = __phys_to_virt(mi->bank[i].start);
267 map.length = mi->bank[i].size;
268 map.type = MT_MEMORY;
269
270 create_mapping(&map);
271 }
356 272
357 /* 273 /*
358 * Initialise the bootmem nodes. 274 * If there is no memory in this node, ignore it.
359 *
360 * What we really want to do is:
361 *
362 * unmap_all_regions_except_kernel();
363 * for_each_node_in_reverse_order(node) {
364 * map_node(node);
365 * allocate_bootmem_map(node);
366 * init_bootmem_node(node);
367 * free_bootmem_node(node);
368 * }
369 *
370 * but this is a 2.5-type change. For now, we just set
371 * the nodes up in reverse order.
372 *
373 * (we could also do with rolling bootmem_init and paging_init
374 * into one generic "memory_init" type function).
375 */ 275 */
376 np += num_online_nodes() - 1; 276 if (end_pfn == 0)
377 for (node = num_online_nodes() - 1; node >= 0; node--, np--) { 277 return end_pfn;
378 /*
379 * If there are no pages in this node, ignore it.
380 * Note that node 0 must always have some pages.
381 */
382 if (np->end == 0 || !node_online(node)) {
383 if (node == 0)
384 BUG();
385 continue;
386 }
387 278
388 /* 279 /*
389 * Initialise the bootmem allocator. 280 * Allocate the bootmem bitmap page.
390 */ 281 */
391 init_bootmem_node(NODE_DATA(node), map_pg, np->start, np->end); 282 boot_pages = bootmem_bootmap_pages(end_pfn - start_pfn);
392 free_bootmem_node_bank(node, mi); 283 boot_pfn = find_bootmap_pfn(node, mi, boot_pages);
393 map_pg += np->bootmap_pages;
394 284
395 /* 285 /*
396 * If this is node 0, we need to reserve some areas ASAP - 286 * Initialise the bootmem allocator for this node, handing the
397 * we may use bootmem on node 0 to setup the other nodes. 287 * memory banks over to bootmem.
398 */ 288 */
399 if (node == 0) 289 node_set_online(node);
400 reserve_node_zero(bootmap_pfn, bootmap_pages); 290 pgdat = NODE_DATA(node);
401 } 291 init_bootmem_node(pgdat, boot_pfn, start_pfn, end_pfn);
402 292
293 for_each_nodebank(i, mi, node)
294 free_bootmem_node(pgdat, mi->bank[i].start, mi->bank[i].size);
295
296 /*
297 * Reserve the bootmem bitmap for this node.
298 */
299 reserve_bootmem_node(pgdat, boot_pfn << PAGE_SHIFT,
300 boot_pages << PAGE_SHIFT);
403 301
404#ifdef CONFIG_BLK_DEV_INITRD 302#ifdef CONFIG_BLK_DEV_INITRD
405 if (phys_initrd_size && initrd_node >= 0) { 303 /*
406 reserve_bootmem_node(NODE_DATA(initrd_node), phys_initrd_start, 304 * If the initrd is in this node, reserve its memory.
305 */
306 if (node == initrd_node) {
307 reserve_bootmem_node(pgdat, phys_initrd_start,
407 phys_initrd_size); 308 phys_initrd_size);
408 initrd_start = __phys_to_virt(phys_initrd_start); 309 initrd_start = __phys_to_virt(phys_initrd_start);
409 initrd_end = initrd_start + phys_initrd_size; 310 initrd_end = initrd_start + phys_initrd_size;
410 } 311 }
411#endif 312#endif
412 313
413 BUG_ON(map_pg != bootmap_pfn + bootmap_pages); 314 /*
315 * Finally, reserve any node zero regions.
316 */
317 if (node == 0)
318 reserve_node_zero(pgdat);
319
320 /*
321 * initialise the zones within this node.
322 */
323 memset(zone_size, 0, sizeof(zone_size));
324 memset(zhole_size, 0, sizeof(zhole_size));
325
326 /*
327 * The size of this node has already been determined. If we need
328 * to do anything fancy with the allocation of this memory to the
329 * zones, now is the time to do it.
330 */
331 zone_size[0] = end_pfn - start_pfn;
332
333 /*
334 * For each bank in this node, calculate the size of the holes.
335 * holes = node_size - sum(bank_sizes_in_node)
336 */
337 zhole_size[0] = zone_size[0];
338 for_each_nodebank(i, mi, node)
339 zhole_size[0] -= mi->bank[i].size >> PAGE_SHIFT;
340
341 /*
342 * Adjust the sizes according to any special requirements for
343 * this machine type.
344 */
345 arch_adjust_zones(node, zone_size, zhole_size);
346
347 free_area_init_node(node, pgdat, zone_size, start_pfn, zhole_size);
348
349 return end_pfn;
414} 350}
415 351
416/* 352static void __init bootmem_init(struct meminfo *mi)
417 * paging_init() sets up the page tables, initialises the zone memory
418 * maps, and sets up the zero page, bad page and bad page tables.
419 */
420void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
421{ 353{
422 void *zero_page; 354 unsigned long addr, memend_pfn = 0;
423 int node; 355 int node, initrd_node, i;
424 356
425 bootmem_init(mi); 357 /*
358 * Invalidate the node number for empty or invalid memory banks
359 */
360 for (i = 0; i < mi->nr_banks; i++)
361 if (mi->bank[i].size == 0 || mi->bank[i].node >= MAX_NUMNODES)
362 mi->bank[i].node = -1;
426 363
427 memcpy(&meminfo, mi, sizeof(meminfo)); 364 memcpy(&meminfo, mi, sizeof(meminfo));
428 365
366#ifdef CONFIG_XIP_KERNEL
367#error needs fixing
368 p->pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & PMD_MASK);
369 p->virtual = (unsigned long)&_stext & PMD_MASK;
370 p->length = ((unsigned long)&_etext - p->virtual + ~PMD_MASK) & PMD_MASK;
371 p->type = MT_ROM;
372 p ++;
373#endif
374
429 /* 375 /*
430 * allocate the zero page. Note that we count on this going ok. 376 * Clear out all the mappings below the kernel image.
377 * FIXME: what about XIP?
431 */ 378 */
432 zero_page = alloc_bootmem_low_pages(PAGE_SIZE); 379 for (addr = 0; addr < PAGE_OFFSET; addr += PGDIR_SIZE)
380 pmd_clear(pmd_off_k(addr));
433 381
434 /* 382 /*
435 * initialise the page tables. 383 * Clear out all the kernel space mappings, except for the first
384 * memory bank, up to the end of the vmalloc region.
436 */ 385 */
437 memtable_init(mi); 386 for (addr = __phys_to_virt(mi->bank[0].start + mi->bank[0].size);
438 if (mdesc->map_io) 387 addr < VMALLOC_END; addr += PGDIR_SIZE)
439 mdesc->map_io(); 388 pmd_clear(pmd_off_k(addr));
440 local_flush_tlb_all();
441 389
442 /* 390 /*
443 * initialise the zones within each node 391 * Locate which node contains the ramdisk image, if any.
444 */ 392 */
445 for_each_online_node(node) { 393 initrd_node = check_initrd(mi);
446 unsigned long zone_size[MAX_NR_ZONES];
447 unsigned long zhole_size[MAX_NR_ZONES];
448 struct bootmem_data *bdata;
449 pg_data_t *pgdat;
450 int i;
451 394
452 /* 395 /*
453 * Initialise the zone size information. 396 * Run through each node initialising the bootmem allocator.
454 */ 397 */
455 for (i = 0; i < MAX_NR_ZONES; i++) { 398 for_each_node(node) {
456 zone_size[i] = 0; 399 unsigned long end_pfn;
457 zhole_size[i] = 0;
458 }
459 400
460 pgdat = NODE_DATA(node); 401 end_pfn = bootmem_init_node(node, initrd_node, mi);
461 bdata = pgdat->bdata;
462 402
463 /* 403 /*
464 * The size of this node has already been determined. 404 * Remember the highest memory PFN.
465 * If we need to do anything fancy with the allocation
466 * of this memory to the zones, now is the time to do
467 * it.
468 */ 405 */
469 zone_size[0] = bdata->node_low_pfn - 406 if (end_pfn > memend_pfn)
470 (bdata->node_boot_start >> PAGE_SHIFT); 407 memend_pfn = end_pfn;
408 }
471 409
472 /* 410 high_memory = __va(memend_pfn << PAGE_SHIFT);
473 * If this zone has zero size, skip it.
474 */
475 if (!zone_size[0])
476 continue;
477 411
478 /* 412 /*
479 * For each bank in this node, calculate the size of the 413 * This doesn't seem to be used by the Linux memory manager any
480 * holes. holes = node_size - sum(bank_sizes_in_node) 414 * more, but is used by ll_rw_block. If we can get rid of it, we
481 */ 415 * also get rid of some of the stuff above as well.
482 zhole_size[0] = zone_size[0]; 416 *
483 for (i = 0; i < mi->nr_banks; i++) { 417 * Note: max_low_pfn and max_pfn reflect the number of _pages_ in
484 if (mi->bank[i].node != node) 418 * the system, not the maximum PFN.
485 continue; 419 */
420 max_pfn = max_low_pfn = memend_pfn - PHYS_PFN_OFFSET;
421}
486 422
487 zhole_size[0] -= mi->bank[i].size >> PAGE_SHIFT; 423/*
488 } 424 * Set up device the mappings. Since we clear out the page tables for all
425 * mappings above VMALLOC_END, we will remove any debug device mappings.
426 * This means you have to be careful how you debug this function, or any
427 * called function. (Do it by code inspection!)
428 */
429static void __init devicemaps_init(struct machine_desc *mdesc)
430{
431 struct map_desc map;
432 unsigned long addr;
433 void *vectors;
489 434
490 /* 435 for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE)
491 * Adjust the sizes according to any special 436 pmd_clear(pmd_off_k(addr));
492 * requirements for this machine type.
493 */
494 arch_adjust_zones(node, zone_size, zhole_size);
495 437
496 free_area_init_node(node, pgdat, zone_size, 438 /*
497 bdata->node_boot_start >> PAGE_SHIFT, zhole_size); 439 * Map the cache flushing regions.
440 */
441#ifdef FLUSH_BASE
442 map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS);
443 map.virtual = FLUSH_BASE;
444 map.length = PGDIR_SIZE;
445 map.type = MT_CACHECLEAN;
446 create_mapping(&map);
447#endif
448#ifdef FLUSH_BASE_MINICACHE
449 map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS + PGDIR_SIZE);
450 map.virtual = FLUSH_BASE_MINICACHE;
451 map.length = PGDIR_SIZE;
452 map.type = MT_MINICLEAN;
453 create_mapping(&map);
454#endif
455
456 flush_cache_all();
457 local_flush_tlb_all();
458
459 vectors = alloc_bootmem_low_pages(PAGE_SIZE);
460 BUG_ON(!vectors);
461
462 /*
463 * Create a mapping for the machine vectors at the high-vectors
464 * location (0xffff0000). If we aren't using high-vectors, also
465 * create a mapping at the low-vectors virtual address.
466 */
467 map.pfn = __phys_to_pfn(virt_to_phys(vectors));
468 map.virtual = 0xffff0000;
469 map.length = PAGE_SIZE;
470 map.type = MT_HIGH_VECTORS;
471 create_mapping(&map);
472
473 if (!vectors_high()) {
474 map.virtual = 0;
475 map.type = MT_LOW_VECTORS;
476 create_mapping(&map);
498 } 477 }
499 478
500 /* 479 /*
501 * finish off the bad pages once 480 * Ask the machine support to map in the statically mapped devices.
502 * the mem_map is initialised 481 * After this point, we can start to touch devices again.
482 */
483 if (mdesc->map_io)
484 mdesc->map_io();
485}
486
487/*
488 * paging_init() sets up the page tables, initialises the zone memory
489 * maps, and sets up the zero page, bad page and bad page tables.
490 */
491void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
492{
493 void *zero_page;
494
495 build_mem_type_table();
496 bootmem_init(mi);
497 devicemaps_init(mdesc);
498
499 top_pmd = pmd_off_k(0xffff0000);
500
501 /*
502 * allocate the zero page. Note that we count on this going ok.
503 */ 503 */
504 zero_page = alloc_bootmem_low_pages(PAGE_SIZE);
504 memzero(zero_page, PAGE_SIZE); 505 memzero(zero_page, PAGE_SIZE);
505 empty_zero_page = virt_to_page(zero_page); 506 empty_zero_page = virt_to_page(zero_page);
506 flush_dcache_page(empty_zero_page); 507 flush_dcache_page(empty_zero_page);
@@ -562,10 +563,7 @@ static void __init free_unused_memmap_node(int node, struct meminfo *mi)
562 * may not be the case, especially if the user has provided the 563 * may not be the case, especially if the user has provided the
563 * information on the command line. 564 * information on the command line.
564 */ 565 */
565 for (i = 0; i < mi->nr_banks; i++) { 566 for_each_nodebank(i, mi, node) {
566 if (mi->bank[i].size == 0 || mi->bank[i].node != node)
567 continue;
568
569 bank_start = mi->bank[i].start >> PAGE_SHIFT; 567 bank_start = mi->bank[i].start >> PAGE_SHIFT;
570 if (bank_start < prev_bank_end) { 568 if (bank_start < prev_bank_end) {
571 printk(KERN_ERR "MEM: unordered memory banks. " 569 printk(KERN_ERR "MEM: unordered memory banks. "
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 7110e54182b1..6fb1258df1b5 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -26,6 +26,7 @@
26#include <linux/vmalloc.h> 26#include <linux/vmalloc.h>
27 27
28#include <asm/cacheflush.h> 28#include <asm/cacheflush.h>
29#include <asm/hardware.h>
29#include <asm/io.h> 30#include <asm/io.h>
30#include <asm/tlbflush.h> 31#include <asm/tlbflush.h>
31 32
diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c
index d125a3dc061c..61bc2fa0511e 100644
--- a/arch/arm/mm/mm-armv.c
+++ b/arch/arm/mm/mm-armv.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/arch/arm/mm/mm-armv.c 2 * linux/arch/arm/mm/mm-armv.c
3 * 3 *
4 * Copyright (C) 1998-2002 Russell King 4 * Copyright (C) 1998-2005 Russell King
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
@@ -305,16 +305,6 @@ alloc_init_page(unsigned long virt, unsigned long phys, unsigned int prot_l1, pg
305 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot)); 305 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
306} 306}
307 307
308/*
309 * Clear any PGD mapping. On a two-level page table system,
310 * the clearance is done by the middle-level functions (pmd)
311 * rather than the top-level (pgd) functions.
312 */
313static inline void clear_mapping(unsigned long virt)
314{
315 pmd_clear(pmd_off_k(virt));
316}
317
318struct mem_types { 308struct mem_types {
319 unsigned int prot_pte; 309 unsigned int prot_pte;
320 unsigned int prot_l1; 310 unsigned int prot_l1;
@@ -373,7 +363,7 @@ static struct mem_types mem_types[] __initdata = {
373/* 363/*
374 * Adjust the PMD section entries according to the CPU in use. 364 * Adjust the PMD section entries according to the CPU in use.
375 */ 365 */
376static void __init build_mem_type_table(void) 366void __init build_mem_type_table(void)
377{ 367{
378 struct cachepolicy *cp; 368 struct cachepolicy *cp;
379 unsigned int cr = get_cr(); 369 unsigned int cr = get_cr();
@@ -483,25 +473,25 @@ static void __init build_mem_type_table(void)
483 * offsets, and we take full advantage of sections and 473 * offsets, and we take full advantage of sections and
484 * supersections. 474 * supersections.
485 */ 475 */
486static void __init create_mapping(struct map_desc *md) 476void __init create_mapping(struct map_desc *md)
487{ 477{
488 unsigned long virt, length; 478 unsigned long virt, length;
489 int prot_sect, prot_l1, domain; 479 int prot_sect, prot_l1, domain;
490 pgprot_t prot_pte; 480 pgprot_t prot_pte;
491 long off; 481 unsigned long off = (u32)__pfn_to_phys(md->pfn);
492 482
493 if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) { 483 if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) {
494 printk(KERN_WARNING "BUG: not creating mapping for " 484 printk(KERN_WARNING "BUG: not creating mapping for "
495 "0x%08lx at 0x%08lx in user region\n", 485 "0x%016llx at 0x%08lx in user region\n",
496 md->physical, md->virtual); 486 __pfn_to_phys((u64)md->pfn), md->virtual);
497 return; 487 return;
498 } 488 }
499 489
500 if ((md->type == MT_DEVICE || md->type == MT_ROM) && 490 if ((md->type == MT_DEVICE || md->type == MT_ROM) &&
501 md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) { 491 md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) {
502 printk(KERN_WARNING "BUG: mapping for 0x%08lx at 0x%08lx " 492 printk(KERN_WARNING "BUG: mapping for 0x%016llx at 0x%08lx "
503 "overlaps vmalloc space\n", 493 "overlaps vmalloc space\n",
504 md->physical, md->virtual); 494 __pfn_to_phys((u64)md->pfn), md->virtual);
505 } 495 }
506 496
507 domain = mem_types[md->type].domain; 497 domain = mem_types[md->type].domain;
@@ -509,15 +499,40 @@ static void __init create_mapping(struct map_desc *md)
509 prot_l1 = mem_types[md->type].prot_l1 | PMD_DOMAIN(domain); 499 prot_l1 = mem_types[md->type].prot_l1 | PMD_DOMAIN(domain);
510 prot_sect = mem_types[md->type].prot_sect | PMD_DOMAIN(domain); 500 prot_sect = mem_types[md->type].prot_sect | PMD_DOMAIN(domain);
511 501
502 /*
503 * Catch 36-bit addresses
504 */
505 if(md->pfn >= 0x100000) {
506 if(domain) {
507 printk(KERN_ERR "MM: invalid domain in supersection "
508 "mapping for 0x%016llx at 0x%08lx\n",
509 __pfn_to_phys((u64)md->pfn), md->virtual);
510 return;
511 }
512 if((md->virtual | md->length | __pfn_to_phys(md->pfn))
513 & ~SUPERSECTION_MASK) {
514 printk(KERN_ERR "MM: cannot create mapping for "
515 "0x%016llx at 0x%08lx invalid alignment\n",
516 __pfn_to_phys((u64)md->pfn), md->virtual);
517 return;
518 }
519
520 /*
521 * Shift bits [35:32] of address into bits [23:20] of PMD
522 * (See ARMv6 spec).
523 */
524 off |= (((md->pfn >> (32 - PAGE_SHIFT)) & 0xF) << 20);
525 }
526
512 virt = md->virtual; 527 virt = md->virtual;
513 off = md->physical - virt; 528 off -= virt;
514 length = md->length; 529 length = md->length;
515 530
516 if (mem_types[md->type].prot_l1 == 0 && 531 if (mem_types[md->type].prot_l1 == 0 &&
517 (virt & 0xfffff || (virt + off) & 0xfffff || (virt + length) & 0xfffff)) { 532 (virt & 0xfffff || (virt + off) & 0xfffff || (virt + length) & 0xfffff)) {
518 printk(KERN_WARNING "BUG: map for 0x%08lx at 0x%08lx can not " 533 printk(KERN_WARNING "BUG: map for 0x%08lx at 0x%08lx can not "
519 "be mapped using pages, ignoring.\n", 534 "be mapped using pages, ignoring.\n",
520 md->physical, md->virtual); 535 __pfn_to_phys(md->pfn), md->virtual);
521 return; 536 return;
522 } 537 }
523 538
@@ -535,13 +550,22 @@ static void __init create_mapping(struct map_desc *md)
535 * of the actual domain assignments in use. 550 * of the actual domain assignments in use.
536 */ 551 */
537 if (cpu_architecture() >= CPU_ARCH_ARMv6 && domain == 0) { 552 if (cpu_architecture() >= CPU_ARCH_ARMv6 && domain == 0) {
538 /* Align to supersection boundary */ 553 /*
539 while ((virt & ~SUPERSECTION_MASK || (virt + off) & 554 * Align to supersection boundary if !high pages.
540 ~SUPERSECTION_MASK) && length >= (PGDIR_SIZE / 2)) { 555 * High pages have already been checked for proper
541 alloc_init_section(virt, virt + off, prot_sect); 556 * alignment above and they will fail the SUPSERSECTION_MASK
542 557 * check because of the way the address is encoded into
543 virt += (PGDIR_SIZE / 2); 558 * offset.
544 length -= (PGDIR_SIZE / 2); 559 */
560 if (md->pfn <= 0x100000) {
561 while ((virt & ~SUPERSECTION_MASK ||
562 (virt + off) & ~SUPERSECTION_MASK) &&
563 length >= (PGDIR_SIZE / 2)) {
564 alloc_init_section(virt, virt + off, prot_sect);
565
566 virt += (PGDIR_SIZE / 2);
567 length -= (PGDIR_SIZE / 2);
568 }
545 } 569 }
546 570
547 while (length >= SUPERSECTION_SIZE) { 571 while (length >= SUPERSECTION_SIZE) {
@@ -601,100 +625,6 @@ void setup_mm_for_reboot(char mode)
601 } 625 }
602} 626}
603 627
604extern void _stext, _etext;
605
606/*
607 * Setup initial mappings. We use the page we allocated for zero page to hold
608 * the mappings, which will get overwritten by the vectors in traps_init().
609 * The mappings must be in virtual address order.
610 */
611void __init memtable_init(struct meminfo *mi)
612{
613 struct map_desc *init_maps, *p, *q;
614 unsigned long address = 0;
615 int i;
616
617 build_mem_type_table();
618
619 init_maps = p = alloc_bootmem_low_pages(PAGE_SIZE);
620
621#ifdef CONFIG_XIP_KERNEL
622 p->physical = CONFIG_XIP_PHYS_ADDR & PMD_MASK;
623 p->virtual = (unsigned long)&_stext & PMD_MASK;
624 p->length = ((unsigned long)&_etext - p->virtual + ~PMD_MASK) & PMD_MASK;
625 p->type = MT_ROM;
626 p ++;
627#endif
628
629 for (i = 0; i < mi->nr_banks; i++) {
630 if (mi->bank[i].size == 0)
631 continue;
632
633 p->physical = mi->bank[i].start;
634 p->virtual = __phys_to_virt(p->physical);
635 p->length = mi->bank[i].size;
636 p->type = MT_MEMORY;
637 p ++;
638 }
639
640#ifdef FLUSH_BASE
641 p->physical = FLUSH_BASE_PHYS;
642 p->virtual = FLUSH_BASE;
643 p->length = PGDIR_SIZE;
644 p->type = MT_CACHECLEAN;
645 p ++;
646#endif
647
648#ifdef FLUSH_BASE_MINICACHE
649 p->physical = FLUSH_BASE_PHYS + PGDIR_SIZE;
650 p->virtual = FLUSH_BASE_MINICACHE;
651 p->length = PGDIR_SIZE;
652 p->type = MT_MINICLEAN;
653 p ++;
654#endif
655
656 /*
657 * Go through the initial mappings, but clear out any
658 * pgdir entries that are not in the description.
659 */
660 q = init_maps;
661 do {
662 if (address < q->virtual || q == p) {
663 clear_mapping(address);
664 address += PGDIR_SIZE;
665 } else {
666 create_mapping(q);
667
668 address = q->virtual + q->length;
669 address = (address + PGDIR_SIZE - 1) & PGDIR_MASK;
670
671 q ++;
672 }
673 } while (address != 0);
674
675 /*
676 * Create a mapping for the machine vectors at the high-vectors
677 * location (0xffff0000). If we aren't using high-vectors, also
678 * create a mapping at the low-vectors virtual address.
679 */
680 init_maps->physical = virt_to_phys(init_maps);
681 init_maps->virtual = 0xffff0000;
682 init_maps->length = PAGE_SIZE;
683 init_maps->type = MT_HIGH_VECTORS;
684 create_mapping(init_maps);
685
686 if (!vectors_high()) {
687 init_maps->virtual = 0;
688 init_maps->type = MT_LOW_VECTORS;
689 create_mapping(init_maps);
690 }
691
692 flush_cache_all();
693 local_flush_tlb_all();
694
695 top_pmd = pmd_off_k(0xffff0000);
696}
697
698/* 628/*
699 * Create the architecture specific mappings 629 * Create the architecture specific mappings
700 */ 630 */
diff --git a/arch/arm/oprofile/Makefile b/arch/arm/oprofile/Makefile
index 8ffb523e6c77..6a94e54848fd 100644
--- a/arch/arm/oprofile/Makefile
+++ b/arch/arm/oprofile/Makefile
@@ -6,6 +6,6 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
6 oprofilefs.o oprofile_stats.o \ 6 oprofilefs.o oprofile_stats.o \
7 timer_int.o ) 7 timer_int.o )
8 8
9oprofile-y := $(DRIVER_OBJS) init.o backtrace.o 9oprofile-y := $(DRIVER_OBJS) common.o backtrace.o
10oprofile-$(CONFIG_CPU_XSCALE) += common.o op_model_xscale.o 10oprofile-$(CONFIG_CPU_XSCALE) += op_model_xscale.o
11 11
diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c
index e57dde882898..1415930ceee1 100644
--- a/arch/arm/oprofile/common.c
+++ b/arch/arm/oprofile/common.c
@@ -10,74 +10,23 @@
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/oprofile.h> 11#include <linux/oprofile.h>
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <asm/semaphore.h>
14#include <linux/sysdev.h> 13#include <linux/sysdev.h>
14#include <asm/semaphore.h>
15 15
16#include "op_counter.h" 16#include "op_counter.h"
17#include "op_arm_model.h" 17#include "op_arm_model.h"
18 18
19static struct op_arm_model_spec *pmu_model; 19static struct op_arm_model_spec *op_arm_model;
20static int pmu_enabled; 20static int op_arm_enabled;
21static struct semaphore pmu_sem; 21static struct semaphore op_arm_sem;
22
23static int pmu_start(void);
24static int pmu_setup(void);
25static void pmu_stop(void);
26static int pmu_create_files(struct super_block *, struct dentry *);
27
28#ifdef CONFIG_PM
29static int pmu_suspend(struct sys_device *dev, pm_message_t state)
30{
31 if (pmu_enabled)
32 pmu_stop();
33 return 0;
34}
35
36static int pmu_resume(struct sys_device *dev)
37{
38 if (pmu_enabled)
39 pmu_start();
40 return 0;
41}
42
43static struct sysdev_class oprofile_sysclass = {
44 set_kset_name("oprofile"),
45 .resume = pmu_resume,
46 .suspend = pmu_suspend,
47};
48
49static struct sys_device device_oprofile = {
50 .id = 0,
51 .cls = &oprofile_sysclass,
52};
53
54static int __init init_driverfs(void)
55{
56 int ret;
57
58 if (!(ret = sysdev_class_register(&oprofile_sysclass)))
59 ret = sysdev_register(&device_oprofile);
60
61 return ret;
62}
63
64static void exit_driverfs(void)
65{
66 sysdev_unregister(&device_oprofile);
67 sysdev_class_unregister(&oprofile_sysclass);
68}
69#else
70#define init_driverfs() do { } while (0)
71#define exit_driverfs() do { } while (0)
72#endif /* CONFIG_PM */
73 22
74struct op_counter_config counter_config[OP_MAX_COUNTER]; 23struct op_counter_config counter_config[OP_MAX_COUNTER];
75 24
76static int pmu_create_files(struct super_block *sb, struct dentry *root) 25static int op_arm_create_files(struct super_block *sb, struct dentry *root)
77{ 26{
78 unsigned int i; 27 unsigned int i;
79 28
80 for (i = 0; i < pmu_model->num_counters; i++) { 29 for (i = 0; i < op_arm_model->num_counters; i++) {
81 struct dentry *dir; 30 struct dentry *dir;
82 char buf[2]; 31 char buf[2];
83 32
@@ -94,63 +43,123 @@ static int pmu_create_files(struct super_block *sb, struct dentry *root)
94 return 0; 43 return 0;
95} 44}
96 45
97static int pmu_setup(void) 46static int op_arm_setup(void)
98{ 47{
99 int ret; 48 int ret;
100 49
101 spin_lock(&oprofilefs_lock); 50 spin_lock(&oprofilefs_lock);
102 ret = pmu_model->setup_ctrs(); 51 ret = op_arm_model->setup_ctrs();
103 spin_unlock(&oprofilefs_lock); 52 spin_unlock(&oprofilefs_lock);
104 return ret; 53 return ret;
105} 54}
106 55
107static int pmu_start(void) 56static int op_arm_start(void)
108{ 57{
109 int ret = -EBUSY; 58 int ret = -EBUSY;
110 59
111 down(&pmu_sem); 60 down(&op_arm_sem);
112 if (!pmu_enabled) { 61 if (!op_arm_enabled) {
113 ret = pmu_model->start(); 62 ret = op_arm_model->start();
114 pmu_enabled = !ret; 63 op_arm_enabled = !ret;
115 } 64 }
116 up(&pmu_sem); 65 up(&op_arm_sem);
117 return ret; 66 return ret;
118} 67}
119 68
120static void pmu_stop(void) 69static void op_arm_stop(void)
70{
71 down(&op_arm_sem);
72 if (op_arm_enabled)
73 op_arm_model->stop();
74 op_arm_enabled = 0;
75 up(&op_arm_sem);
76}
77
78#ifdef CONFIG_PM
79static int op_arm_suspend(struct sys_device *dev, pm_message_t state)
121{ 80{
122 down(&pmu_sem); 81 down(&op_arm_sem);
123 if (pmu_enabled) 82 if (op_arm_enabled)
124 pmu_model->stop(); 83 op_arm_model->stop();
125 pmu_enabled = 0; 84 up(&op_arm_sem);
126 up(&pmu_sem); 85 return 0;
127} 86}
128 87
129int __init pmu_init(struct oprofile_operations *ops, struct op_arm_model_spec *spec) 88static int op_arm_resume(struct sys_device *dev)
130{ 89{
131 init_MUTEX(&pmu_sem); 90 down(&op_arm_sem);
91 if (op_arm_enabled && op_arm_model->start())
92 op_arm_enabled = 0;
93 up(&op_arm_sem);
94 return 0;
95}
96
97static struct sysdev_class oprofile_sysclass = {
98 set_kset_name("oprofile"),
99 .resume = op_arm_resume,
100 .suspend = op_arm_suspend,
101};
132 102
133 if (spec->init() < 0) 103static struct sys_device device_oprofile = {
134 return -ENODEV; 104 .id = 0,
105 .cls = &oprofile_sysclass,
106};
135 107
136 pmu_model = spec; 108static int __init init_driverfs(void)
137 init_driverfs(); 109{
138 ops->create_files = pmu_create_files; 110 int ret;
139 ops->setup = pmu_setup;
140 ops->shutdown = pmu_stop;
141 ops->start = pmu_start;
142 ops->stop = pmu_stop;
143 ops->cpu_type = pmu_model->name;
144 printk(KERN_INFO "oprofile: using %s PMU\n", spec->name);
145 111
146 return 0; 112 if (!(ret = sysdev_class_register(&oprofile_sysclass)))
113 ret = sysdev_register(&device_oprofile);
114
115 return ret;
116}
117
118static void exit_driverfs(void)
119{
120 sysdev_unregister(&device_oprofile);
121 sysdev_class_unregister(&oprofile_sysclass);
122}
123#else
124#define init_driverfs() do { } while (0)
125#define exit_driverfs() do { } while (0)
126#endif /* CONFIG_PM */
127
128int __init oprofile_arch_init(struct oprofile_operations *ops)
129{
130 struct op_arm_model_spec *spec = NULL;
131 int ret = -ENODEV;
132
133#ifdef CONFIG_CPU_XSCALE
134 spec = &op_xscale_spec;
135#endif
136
137 if (spec) {
138 init_MUTEX(&op_arm_sem);
139
140 if (spec->init() < 0)
141 return -ENODEV;
142
143 op_arm_model = spec;
144 init_driverfs();
145 ops->create_files = op_arm_create_files;
146 ops->setup = op_arm_setup;
147 ops->shutdown = op_arm_stop;
148 ops->start = op_arm_start;
149 ops->stop = op_arm_stop;
150 ops->cpu_type = op_arm_model->name;
151 ops->backtrace = arm_backtrace;
152 printk(KERN_INFO "oprofile: using %s\n", spec->name);
153 }
154
155 return ret;
147} 156}
148 157
149void pmu_exit(void) 158void oprofile_arch_exit(void)
150{ 159{
151 if (pmu_model) { 160 if (op_arm_model) {
152 exit_driverfs(); 161 exit_driverfs();
153 pmu_model = NULL; 162 op_arm_model = NULL;
154 } 163 }
155} 164}
156 165
diff --git a/arch/arm/oprofile/init.c b/arch/arm/oprofile/init.c
deleted file mode 100644
index d315a3a86c86..000000000000
--- a/arch/arm/oprofile/init.c
+++ /dev/null
@@ -1,33 +0,0 @@
1/**
2 * @file init.c
3 *
4 * @remark Copyright 2004 Oprofile Authors
5 * @remark Read the file COPYING
6 *
7 * @author Zwane Mwaikambo
8 */
9
10#include <linux/oprofile.h>
11#include <linux/init.h>
12#include <linux/errno.h>
13#include "op_arm_model.h"
14
15int __init oprofile_arch_init(struct oprofile_operations *ops)
16{
17 int ret = -ENODEV;
18
19#ifdef CONFIG_CPU_XSCALE
20 ret = pmu_init(ops, &op_xscale_spec);
21#endif
22
23 ops->backtrace = arm_backtrace;
24
25 return ret;
26}
27
28void oprofile_arch_exit(void)
29{
30#ifdef CONFIG_CPU_XSCALE
31 pmu_exit();
32#endif
33}
diff --git a/arch/arm/oprofile/op_arm_model.h b/arch/arm/oprofile/op_arm_model.h
index 2148d07484b7..38c6ad158547 100644
--- a/arch/arm/oprofile/op_arm_model.h
+++ b/arch/arm/oprofile/op_arm_model.h
@@ -26,6 +26,6 @@ extern struct op_arm_model_spec op_xscale_spec;
26 26
27extern void arm_backtrace(struct pt_regs * const regs, unsigned int depth); 27extern void arm_backtrace(struct pt_regs * const regs, unsigned int depth);
28 28
29extern int __init pmu_init(struct oprofile_operations *ops, struct op_arm_model_spec *spec); 29extern int __init op_arm_init(struct oprofile_operations *ops, struct op_arm_model_spec *spec);
30extern void pmu_exit(void); 30extern void op_arm_exit(void);
31#endif /* OP_ARM_MODEL_H */ 31#endif /* OP_ARM_MODEL_H */
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 7719a4062e3a..7ad69f14a3e7 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -59,7 +59,11 @@ void __init omap_detect_sram(void)
59} 59}
60 60
61static struct map_desc omap_sram_io_desc[] __initdata = { 61static struct map_desc omap_sram_io_desc[] __initdata = {
62 { OMAP1_SRAM_BASE, OMAP1_SRAM_START, 0, MT_DEVICE } 62 { /* .length gets filled in at runtime */
63 .virtual = OMAP1_SRAM_BASE,
64 .pfn = __phys_to_pfn(OMAP1_SRAM_START),
65 .type = MT_DEVICE
66 }
63}; 67};
64 68
65/* 69/*
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-13 11:08:04 -0500