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authorUwe Kleine-König <Uwe.Kleine-Koenig@digi.com>2007-12-13 03:31:34 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-12-17 12:16:13 -0500
commit41a9e680717e82c745b1ead979ea008e9134ea68 (patch)
tree9ed367fe7d383074cea87f038f1052ba186f11d4 /arch/arm
parent1265edb8fd2869d17128f1d60683dd6f4191d550 (diff)
[ARM] 4710/1: Fix coprocessor 14 usage for debug messages via ICEDCC
According to ARM7TDMI Technical Reference Manual (ARM DDI 0210C) writing to the DCC data write register coproc dest registers are 1 and 0, not 0 and 1. ARM920T TRM (ARM DDI 0151C) agrees on that. Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/compressed/head.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index b9b03eda70e5..5cac46a19bb7 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -31,7 +31,7 @@
31 .macro loadsp, rb 31 .macro loadsp, rb
32 .endm 32 .endm
33 .macro writeb, ch, rb 33 .macro writeb, ch, rb
34 mcr p14, 0, \ch, c0, c1, 0 34 mcr p14, 0, \ch, c1, c0, 0
35 .endm 35 .endm
36#endif 36#endif
37 37