Merge with master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6.git

18 files changed, 523 insertions, 353 deletions

diff --git a/arch/arm/boot/compressed/head-shark.S b/arch/arm/boot/compressed/head-shark.S
index 848f60e5429b..089c560e07f1 100644
--- a/arch/arm/boot/compressed/head-shark.S
+++ b/arch/arm/boot/compressed/head-shark.S
@@ -63,8 +63,8 @@ __beginning:	mov	r4, r0				@ save the entry to the firmware
 
                 mov     pc, r2
 
-__copy_target:  .long   0x08508000
-__copy_end:     .long   0x08608000
+__copy_target:  .long   0x08507FFC
+__copy_end:     .long   0x08607FFC
                 
                 .word   _start
                 .word   __bss_start
@@ -73,9 +73,10 @@ __copy_end:	.long	0x08608000
 __temp_stack:   .space 128
 
 __mmu_off:
-                adr     r0, __ofw_data
+                adr     r0, __ofw_data                  @ read the 1. entry of the memory map
                 ldr     r0, [r0, #4]
                 orr     r0, r0, #0x00600000
+                sub     r0, r0, #4
         
                 ldr     r1, __copy_end
                 ldr     r3, __copy_target
@@ -89,20 +90,43 @@ __mmu_off:
  * from 0x08500000 to 0x08508000 if we have only 8MB
  */
 
+/* As we get more 2.6-kernels it gets more and more
+ * uncomfortable to be bound to kernel images of 1MB only.
+ * So we add a loop here, to be able to copy some more.
+ * Alexander Schulz 2005-07-17
+ */
+
+                mov     r4, #3                          @ How many megabytes to copy
+
+
+__MoveCode:     sub     r4, r4, #1
         
 __Copy:         ldr     r2, [r0], #-4
                 str     r2, [r1], #-4
                 teq     r1, r3
                 bne     __Copy
+
+                /* The firmware maps us in blocks of 1 MB, the next block is
+                   _below_ the last one. So our decrementing source pointer
+                   ist right here, but the destination pointer must be increased
+                   by 2 MB */
+                add     r1, r1, #0x00200000
+                add     r3, r3, #0x00100000
+
+                teq     r4, #0
+                bne     __MoveCode
+
+
                 /* and jump to it */
-                adr     r2, __go_on
-                adr     r0, __ofw_data
+                adr     r2, __go_on                     @ where we want to jump
+                adr     r0, __ofw_data                  @ read the 1. entry of the memory map
                 ldr     r0, [r0, #4]
-                sub     r2, r2, r0
-                sub     r2, r2, #0x00500000
-                ldr     r0, __copy_target
+                sub     r2, r2, r0                      @ we are mapped add 0e50 now, sub that (-0e00)
+                sub     r2, r2, #0x00500000             @ -0050
+                ldr     r0, __copy_target               @ and add 0850 8000 instead
+                add     r0, r0, #4
                 add     r2, r2, r0
-                mov     pc, r2
+                mov     pc, r2                          @ and jump there
 
 __go_on:
                 adr     sp, __temp_stack
diff --git a/arch/arm/configs/bast_defconfig b/arch/arm/configs/bast_defconfig
index 2d985e9611cd..35e3a99bcbb6 100644
--- a/arch/arm/configs/bast_defconfig
+++ b/arch/arm/configs/bast_defconfig
@@ -561,7 +561,6 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
 #
 CONFIG_SERIAL_S3C2410=y
 CONFIG_SERIAL_S3C2410_CONSOLE=y
-CONFIG_SERIAL_BAST_SIO=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_UNIX98_PTYS=y
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig
index 98b72ff38832..96a794d8de84 100644
--- a/arch/arm/configs/s3c2410_defconfig
+++ b/arch/arm/configs/s3c2410_defconfig
@@ -570,7 +570,6 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
 #
 CONFIG_SERIAL_S3C2410=y
 CONFIG_SERIAL_S3C2410_CONSOLE=y
-CONFIG_SERIAL_BAST_SIO=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_UNIX98_PTYS=y
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index bbea636ff687..409db6d5ec99 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -131,7 +131,6 @@ void machine_halt(void)
 {
 }
 
-EXPORT_SYMBOL(machine_halt);
 
 void machine_power_off(void)
 {
@@ -139,7 +138,6 @@ void machine_power_off(void)
                 pm_power_off();
 }
 
-EXPORT_SYMBOL(machine_power_off);
 
 void machine_restart(char * __unused)
 {
@@ -169,8 +167,6 @@ void machine_restart(char * __unused)
         while (1);
 }
 
-EXPORT_SYMBOL(machine_restart);
-
 void __show_regs(struct pt_regs *regs)
 {
         unsigned long flags = condition_codes(regs);
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 7ae45c3fc834..295e0a8379cf 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -78,7 +78,7 @@ struct smp_call_struct {
 static struct smp_call_struct * volatile smp_call_function_data;
 static DEFINE_SPINLOCK(smp_call_function_lock);
 
-int __init __cpu_up(unsigned int cpu)
+int __cpuinit __cpu_up(unsigned int cpu)
 {
         struct task_struct *idle;
         pgd_t *pgd;
@@ -159,7 +159,7 @@ int __init __cpu_up(unsigned int cpu)
  * This is the secondary CPU boot entry.  We're using this CPUs
  * idle thread stack, but a set of temporary page tables.
  */
-asmlinkage void __init secondary_start_kernel(void)
+asmlinkage void __cpuinit secondary_start_kernel(void)
 {
         struct mm_struct *mm = &init_mm;
         unsigned int cpu = smp_processor_id();
@@ -209,7 +209,7 @@ asmlinkage void __init secondary_start_kernel(void)
  * Called by both boot and secondaries to move global data into
  * per-processor storage.
  */
-void __init smp_store_cpu_info(unsigned int cpuid)
+void __cpuinit smp_store_cpu_info(unsigned int cpuid)
 {
         struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
 
diff --git a/arch/arm/mach-integrator/platsmp.c b/arch/arm/mach-integrator/platsmp.c
index 2ba025777098..aecf47ba033a 100644
--- a/arch/arm/mach-integrator/platsmp.c
+++ b/arch/arm/mach-integrator/platsmp.c
@@ -27,12 +27,12 @@ extern void integrator_secondary_startup(void);
  * control for which core is the next to come out of the secondary
  * boot "holding pen"
  */
-volatile int __initdata pen_release = -1;
-unsigned long __initdata phys_pen_release = 0;
+volatile int __cpuinitdata pen_release = -1;
+unsigned long __cpuinitdata phys_pen_release = 0;
 
 static DEFINE_SPINLOCK(boot_lock);
 
-void __init platform_secondary_init(unsigned int cpu)
+void __cpuinit platform_secondary_init(unsigned int cpu)
 {
         /*
          * the primary core may have used a "cross call" soft interrupt
@@ -61,7 +61,7 @@ void __init platform_secondary_init(unsigned int cpu)
         spin_unlock(&boot_lock);
 }
 
-int __init boot_secondary(unsigned int cpu, struct task_struct *idle)
+int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
 
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile
index f99b689e4392..55ed7c7e57da 100644
--- a/arch/arm/mach-s3c2410/Makefile
+++ b/arch/arm/mach-s3c2410/Makefile
@@ -23,6 +23,8 @@ obj-$(CONFIG_PM_SIMTEC)	   += pm-simtec.o
 # S3C2440 support
 
 obj-$(CONFIG_CPU_S3C2440)  += s3c2440.o s3c2440-dsc.o
+obj-$(CONFIG_CPU_S3C2440)  += s3c2440-irq.o
+obj-$(CONFIG_CPU_S3C2440)  += s3c2440-clock.o
 
 # machine specific support
 
diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c
index 8d986b8401c2..9a66050e887d 100644
--- a/arch/arm/mach-s3c2410/clock.c
+++ b/arch/arm/mach-s3c2410/clock.c
@@ -448,60 +448,3 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
 
         return 0;
 }
-
-/* S3C2440 extended clock support */
-
-#ifdef CONFIG_CPU_S3C2440
-
-static struct clk s3c2440_clk_upll = {
-        .name           = "upll",
-        .id             = -1,
-};
-
-static struct clk s3c2440_clk_cam = {
-        .name           = "camif",
-        .parent         = &clk_h,
-        .id             = -1,
-        .enable         = s3c24xx_clkcon_enable,
-        .ctrlbit        = S3C2440_CLKCON_CAMERA,
-};
-
-static struct clk s3c2440_clk_ac97 = {
-        .name           = "ac97",
-        .parent         = &clk_p,
-        .id             = -1,
-        .enable         = s3c24xx_clkcon_enable,
-        .ctrlbit        = S3C2440_CLKCON_CAMERA,
-};
-
-static int s3c2440_clk_add(struct sys_device *sysdev)
-{
-        unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);
-
-        s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal.rate);
-
-        printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n",
-               print_mhz(s3c2440_clk_upll.rate));
-
-        s3c24xx_register_clock(&s3c2440_clk_ac97);
-        s3c24xx_register_clock(&s3c2440_clk_cam);
-        s3c24xx_register_clock(&s3c2440_clk_upll);
-
-        clk_disable(&s3c2440_clk_ac97);
-        clk_disable(&s3c2440_clk_cam);
-
-        return 0;
-}
-
-static struct sysdev_driver s3c2440_clk_driver = {
-        .add    = s3c2440_clk_add,
-};
-
-static int s3c24xx_clk_driver(void)
-{
-        return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver);
-}
-
-arch_initcall(s3c24xx_clk_driver);
-
-#endif /* CONFIG_CPU_S3C2440 */
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index c7c28890d406..65feaf20d23e 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -436,7 +436,7 @@ int s3c2410_dma_enqueue(unsigned int channel, void *id,
 
         buf = kmem_cache_alloc(dma_kmem, GFP_ATOMIC);
         if (buf == NULL) {
-                pr_debug("%s: out of memory (%d alloc)\n",
+                pr_debug("%s: out of memory (%ld alloc)\n",
                          __FUNCTION__, sizeof(*buf));
                 return -ENOMEM;
         }
diff --git a/arch/arm/mach-s3c2410/irq.c b/arch/arm/mach-s3c2410/irq.c
index cf9f46d88061..973a5fe6769c 100644
--- a/arch/arm/mach-s3c2410/irq.c
+++ b/arch/arm/mach-s3c2410/irq.c
@@ -45,6 +45,9 @@
  *
  *   28-Jun-2005  Ben Dooks
  *                Mark IRQ_LCD valid
+ *
+ *   25-Jul-2005  Ben Dooks
+ *                Split the S3C2440 IRQ code to seperate file
 */
 
 #include <linux/init.h>
@@ -65,11 +68,7 @@
 
 #include "cpu.h"
 #include "pm.h"
-
-#define irqdbf(x...)
-#define irqdbf2(x...)
-
-#define EXTINT_OFF (IRQ_EINT4 - 4)
+#include "irq.h"
 
 /* wakeup irq control */
 
@@ -181,7 +180,7 @@ s3c_irq_unmask(unsigned int irqno)
         __raw_writel(mask, S3C2410_INTMSK);
 }
 
-static struct irqchip s3c_irq_level_chip = {
+struct irqchip s3c_irq_level_chip = {
         .ack       = s3c_irq_maskack,
         .mask      = s3c_irq_mask,
         .unmask    = s3c_irq_unmask,
@@ -370,84 +369,6 @@ static struct irqchip s3c_irq_eint0t4 = {
 #define INTMSK_UART2     (1UL << (IRQ_UART2 - IRQ_EINT0))
 #define INTMSK_ADCPARENT (1UL << (IRQ_ADCPARENT - IRQ_EINT0))
 
-static inline void
-s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,
-                int subcheck)
-{
-        unsigned long mask;
-        unsigned long submask;
-
-        submask = __raw_readl(S3C2410_INTSUBMSK);
-        mask = __raw_readl(S3C2410_INTMSK);
-
-        submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
-
-        /* check to see if we need to mask the parent IRQ */
-
-        if ((submask  & subcheck) == subcheck) {
-                __raw_writel(mask | parentbit, S3C2410_INTMSK);
-        }
-
-        /* write back masks */
-        __raw_writel(submask, S3C2410_INTSUBMSK);
-
-}
-
-static inline void
-s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit)
-{
-        unsigned long mask;
-        unsigned long submask;
-
-        submask = __raw_readl(S3C2410_INTSUBMSK);
-        mask = __raw_readl(S3C2410_INTMSK);
-
-        submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
-        mask &= ~parentbit;
-
-        /* write back masks */
-        __raw_writel(submask, S3C2410_INTSUBMSK);
-        __raw_writel(mask, S3C2410_INTMSK);
-}
-
-
-static inline void
-s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int group)
-{
-        unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
-
-        s3c_irqsub_mask(irqno, parentmask, group);
-
-        __raw_writel(bit, S3C2410_SUBSRCPND);
-
-        /* only ack parent if we've got all the irqs (seems we must
-         * ack, all and hope that the irq system retriggers ok when
-         * the interrupt goes off again)
-         */
-
-        if (1) {
-                __raw_writel(parentmask, S3C2410_SRCPND);
-                __raw_writel(parentmask, S3C2410_INTPND);
-        }
-}
-
-static inline void
-s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
-{
-        unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
-
-        __raw_writel(bit, S3C2410_SUBSRCPND);
-
-        /* only ack parent if we've got all the irqs (seems we must
-         * ack, all and hope that the irq system retriggers ok when
-         * the interrupt goes off again)
-         */
-
-        if (1) {
-                __raw_writel(parentmask, S3C2410_SRCPND);
-                __raw_writel(parentmask, S3C2410_INTPND);
-        }
-}
 
 /* UART0 */
 
@@ -794,174 +715,3 @@ void __init s3c24xx_init_irq(void)
 
         irqdbf("s3c2410: registered interrupt handlers\n");
 }
-
-/* s3c2440 irq code
-*/
-
-#ifdef CONFIG_CPU_S3C2440
-
-/* WDT/AC97 */
-
-static void s3c_irq_demux_wdtac97(unsigned int irq,
-                                  struct irqdesc *desc,
-                                  struct pt_regs *regs)
-{
-        unsigned int subsrc, submsk;
-        struct irqdesc *mydesc;
-
-        /* read the current pending interrupts, and the mask
-         * for what it is available */
-
-        subsrc = __raw_readl(S3C2410_SUBSRCPND);
-        submsk = __raw_readl(S3C2410_INTSUBMSK);
-
-        subsrc &= ~submsk;
-        subsrc >>= 13;
-        subsrc &= 3;
-
-        if (subsrc != 0) {
-                if (subsrc & 1) {
-                        mydesc = irq_desc + IRQ_S3C2440_WDT;
-                        mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs);
-                }
-                if (subsrc & 2) {
-                        mydesc = irq_desc + IRQ_S3C2440_AC97;
-                        mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs);
-                }
-        }
-}
-
-
-#define INTMSK_WDT       (1UL << (IRQ_WDT - IRQ_EINT0))
-
-static void
-s3c_irq_wdtac97_mask(unsigned int irqno)
-{
-        s3c_irqsub_mask(irqno, INTMSK_WDT, 3<<13);
-}
-
-static void
-s3c_irq_wdtac97_unmask(unsigned int irqno)
-{
-        s3c_irqsub_unmask(irqno, INTMSK_WDT);
-}
-
-static void
-s3c_irq_wdtac97_ack(unsigned int irqno)
-{
-        s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<13);
-}
-
-static struct irqchip s3c_irq_wdtac97 = {
-        .mask       = s3c_irq_wdtac97_mask,
-        .unmask     = s3c_irq_wdtac97_unmask,
-        .ack        = s3c_irq_wdtac97_ack,
-};
-
-/* camera irq */
-
-static void s3c_irq_demux_cam(unsigned int irq,
-                              struct irqdesc *desc,
-                              struct pt_regs *regs)
-{
-        unsigned int subsrc, submsk;
-        struct irqdesc *mydesc;
-
-        /* read the current pending interrupts, and the mask
-         * for what it is available */
-
-        subsrc = __raw_readl(S3C2410_SUBSRCPND);
-        submsk = __raw_readl(S3C2410_INTSUBMSK);
-
-        subsrc &= ~submsk;
-        subsrc >>= 11;
-        subsrc &= 3;
-
-        if (subsrc != 0) {
-                if (subsrc & 1) {
-                        mydesc = irq_desc + IRQ_S3C2440_CAM_C;
-                        mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs);
-                }
-                if (subsrc & 2) {
-                        mydesc = irq_desc + IRQ_S3C2440_CAM_P;
-                        mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs);
-                }
-        }
-}
-
-#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
-
-static void
-s3c_irq_cam_mask(unsigned int irqno)
-{
-        s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11);
-}
-
-static void
-s3c_irq_cam_unmask(unsigned int irqno)
-{
-        s3c_irqsub_unmask(irqno, INTMSK_CAM);
-}
-
-static void
-s3c_irq_cam_ack(unsigned int irqno)
-{
-        s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
-}
-
-static struct irqchip s3c_irq_cam = {
-        .mask       = s3c_irq_cam_mask,
-        .unmask     = s3c_irq_cam_unmask,
-        .ack        = s3c_irq_cam_ack,
-};
-
-static int s3c2440_irq_add(struct sys_device *sysdev)
-{
-        unsigned int irqno;
-
-        printk("S3C2440: IRQ Support\n");
-
-        set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip);
-        set_irq_handler(IRQ_NFCON, do_level_IRQ);
-        set_irq_flags(IRQ_NFCON, IRQF_VALID);
-
-        /* add new chained handler for wdt, ac7 */
-
-        set_irq_chip(IRQ_WDT, &s3c_irq_level_chip);
-        set_irq_handler(IRQ_WDT, do_level_IRQ);
-        set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
-
-        for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) {
-                set_irq_chip(irqno, &s3c_irq_wdtac97);
-                set_irq_handler(irqno, do_level_IRQ);
-                set_irq_flags(irqno, IRQF_VALID);
-        }
-
-        /* add chained handler for camera */
-
-        set_irq_chip(IRQ_CAM, &s3c_irq_level_chip);
-        set_irq_handler(IRQ_CAM, do_level_IRQ);
-        set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
-
-        for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
-                set_irq_chip(irqno, &s3c_irq_cam);
-                set_irq_handler(irqno, do_level_IRQ);
-                set_irq_flags(irqno, IRQF_VALID);
-        }
-
-        return 0;
-}
-
-static struct sysdev_driver s3c2440_irq_driver = {
-        .add    = s3c2440_irq_add,
-};
-
-static int s3c24xx_irq_driver(void)
-{
-        return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver);
-}
-
-arch_initcall(s3c24xx_irq_driver);
-
-#endif /* CONFIG_CPU_S3C2440 */
-
diff --git a/arch/arm/mach-s3c2410/irq.h b/arch/arm/mach-s3c2410/irq.h
new file mode 100644
index 000000000000..4abf0ca14e00
--- /dev/null
+++ b/arch/arm/mach-s3c2410/irq.h
@@ -0,0 +1,99 @@
+/* arch/arm/mach-s3c2410/irq.h
+ *
+ * Copyright (c) 2004-2005 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Header file for S3C24XX CPU IRQ support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Modifications:
+*/
+
+#define irqdbf(x...)
+#define irqdbf2(x...)
+
+#define EXTINT_OFF (IRQ_EINT4 - 4)
+
+extern struct irqchip s3c_irq_level_chip;
+
+static inline void
+s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,
+                int subcheck)
+{
+        unsigned long mask;
+        unsigned long submask;
+
+        submask = __raw_readl(S3C2410_INTSUBMSK);
+        mask = __raw_readl(S3C2410_INTMSK);
+
+        submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
+
+        /* check to see if we need to mask the parent IRQ */
+
+        if ((submask  & subcheck) == subcheck) {
+                __raw_writel(mask | parentbit, S3C2410_INTMSK);
+        }
+
+        /* write back masks */
+        __raw_writel(submask, S3C2410_INTSUBMSK);
+
+}
+
+static inline void
+s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit)
+{
+        unsigned long mask;
+        unsigned long submask;
+
+        submask = __raw_readl(S3C2410_INTSUBMSK);
+        mask = __raw_readl(S3C2410_INTMSK);
+
+        submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
+        mask &= ~parentbit;
+
+        /* write back masks */
+        __raw_writel(submask, S3C2410_INTSUBMSK);
+        __raw_writel(mask, S3C2410_INTMSK);
+}
+
+
+static inline void
+s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int group)
+{
+        unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
+
+        s3c_irqsub_mask(irqno, parentmask, group);
+
+        __raw_writel(bit, S3C2410_SUBSRCPND);
+
+        /* only ack parent if we've got all the irqs (seems we must
+         * ack, all and hope that the irq system retriggers ok when
+         * the interrupt goes off again)
+         */
+
+        if (1) {
+                __raw_writel(parentmask, S3C2410_SRCPND);
+                __raw_writel(parentmask, S3C2410_INTPND);
+        }
+}
+
+static inline void
+s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
+{
+        unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
+
+        __raw_writel(bit, S3C2410_SUBSRCPND);
+
+        /* only ack parent if we've got all the irqs (seems we must
+         * ack, all and hope that the irq system retriggers ok when
+         * the interrupt goes off again)
+         */
+
+        if (1) {
+                __raw_writel(parentmask, S3C2410_SRCPND);
+                __raw_writel(parentmask, S3C2410_INTPND);
+        }
+}
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index ccb6bcefa46c..1e7f343822d0 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -25,9 +25,11 @@
  *     14-Jan-2005 BJD  Add support for muitlple NAND devices
  *     03-Mar-2005 BJD  Ensured that bast-cpld.h is included
  *     10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
- *     14-Mar-2006 BJD  Updated for __iomem changes
- *     22-Jun-2006 BJD  Added DM9000 platform information
- *     28-Jun-2006 BJD  Moved pm functionality out to common code
+ *     14-Mar-2005 BJD  Updated for __iomem changes
+ *     22-Jun-2005 BJD  Added DM9000 platform information
+ *     28-Jun-2005 BJD  Moved pm functionality out to common code
+ *     17-Jul-2005 BJD  Changed to platform device for SuperIO 16550s
+ *     25-Jul-2005 BJD  Removed ASIX static mappings
 */
 
 #include <linux/kernel.h>
@@ -64,6 +66,8 @@
 #include <linux/mtd/nand_ecc.h>
 #include <linux/mtd/partitions.h>
 
+#include <linux/serial_8250.h>
+
 #include "clock.h"
 #include "devs.h"
 #include "cpu.h"
@@ -113,7 +117,6 @@ static struct map_desc bast_iodesc[] __initdata = {
   /* slow, byte */
   { VA_C2(BAST_VA_ISAIO),   PA_CS2(BAST_PA_ISAIO),    SZ_16M, MT_DEVICE },
   { VA_C2(BAST_VA_ISAMEM),  PA_CS2(BAST_PA_ISAMEM),   SZ_16M, MT_DEVICE },
-  { VA_C2(BAST_VA_ASIXNET), PA_CS3(BAST_PA_ASIXNET),  SZ_1M,  MT_DEVICE },
   { VA_C2(BAST_VA_SUPERIO), PA_CS2(BAST_PA_SUPERIO),  SZ_1M,  MT_DEVICE },
   { VA_C2(BAST_VA_IDEPRI),  PA_CS3(BAST_PA_IDEPRI),   SZ_1M,  MT_DEVICE },
   { VA_C2(BAST_VA_IDESEC),  PA_CS3(BAST_PA_IDESEC),   SZ_1M,  MT_DEVICE },
@@ -123,7 +126,6 @@ static struct map_desc bast_iodesc[] __initdata = {
   /* slow, word */
   { VA_C3(BAST_VA_ISAIO),   PA_CS3(BAST_PA_ISAIO),    SZ_16M, MT_DEVICE },
   { VA_C3(BAST_VA_ISAMEM),  PA_CS3(BAST_PA_ISAMEM),   SZ_16M, MT_DEVICE },
-  { VA_C3(BAST_VA_ASIXNET), PA_CS3(BAST_PA_ASIXNET),  SZ_1M,  MT_DEVICE },
   { VA_C3(BAST_VA_SUPERIO), PA_CS3(BAST_PA_SUPERIO),  SZ_1M,  MT_DEVICE },
   { VA_C3(BAST_VA_IDEPRI),  PA_CS3(BAST_PA_IDEPRI),   SZ_1M,  MT_DEVICE },
   { VA_C3(BAST_VA_IDESEC),  PA_CS3(BAST_PA_IDESEC),   SZ_1M,  MT_DEVICE },
@@ -133,7 +135,6 @@ static struct map_desc bast_iodesc[] __initdata = {
   /* fast, byte */
   { VA_C4(BAST_VA_ISAIO),   PA_CS4(BAST_PA_ISAIO),    SZ_16M, MT_DEVICE },
   { VA_C4(BAST_VA_ISAMEM),  PA_CS4(BAST_PA_ISAMEM),   SZ_16M, MT_DEVICE },
-  { VA_C4(BAST_VA_ASIXNET), PA_CS5(BAST_PA_ASIXNET),  SZ_1M,  MT_DEVICE },
   { VA_C4(BAST_VA_SUPERIO), PA_CS4(BAST_PA_SUPERIO),  SZ_1M,  MT_DEVICE },
   { VA_C4(BAST_VA_IDEPRI),  PA_CS5(BAST_PA_IDEPRI),   SZ_1M,  MT_DEVICE },
   { VA_C4(BAST_VA_IDESEC),  PA_CS5(BAST_PA_IDESEC),   SZ_1M,  MT_DEVICE },
@@ -143,7 +144,6 @@ static struct map_desc bast_iodesc[] __initdata = {
   /* fast, word */
   { VA_C5(BAST_VA_ISAIO),   PA_CS5(BAST_PA_ISAIO),    SZ_16M, MT_DEVICE },
   { VA_C5(BAST_VA_ISAMEM),  PA_CS5(BAST_PA_ISAMEM),   SZ_16M, MT_DEVICE },
-  { VA_C5(BAST_VA_ASIXNET), PA_CS5(BAST_PA_ASIXNET),  SZ_1M,  MT_DEVICE },
   { VA_C5(BAST_VA_SUPERIO), PA_CS5(BAST_PA_SUPERIO),  SZ_1M,  MT_DEVICE },
   { VA_C5(BAST_VA_IDEPRI),  PA_CS5(BAST_PA_IDEPRI),   SZ_1M,  MT_DEVICE },
   { VA_C5(BAST_VA_IDESEC),  PA_CS5(BAST_PA_IDESEC),   SZ_1M,  MT_DEVICE },
@@ -351,6 +351,39 @@ static struct platform_device bast_device_dm9k = {
         }
 };
 
+/* serial devices */
+
+#define SERIAL_BASE  (S3C2410_CS2 + BAST_PA_SUPERIO)
+#define SERIAL_FLAGS (UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SHARE_IRQ)
+#define SERIAL_CLK   (1843200)
+
+static struct plat_serial8250_port bast_sio_data[] = {
+        [0] = {
+                .mapbase        = SERIAL_BASE + 0x2f8,
+                .irq            = IRQ_PCSERIAL1,
+                .flags          = SERIAL_FLAGS,
+                .iotype         = UPIO_MEM,
+                .regshift       = 0,
+                .uartclk        = SERIAL_CLK,
+        },
+        [1] = {
+                .mapbase        = SERIAL_BASE + 0x3f8,
+                .irq            = IRQ_PCSERIAL2,
+                .flags          = SERIAL_FLAGS,
+                .iotype         = UPIO_MEM,
+                .regshift       = 0,
+                .uartclk        = SERIAL_CLK,
+        },
+        { }
+};
+
+static struct platform_device bast_sio = {
+        .name                   = "serial8250",
+        .id                     = 0,
+        .dev                    = {
+                .platform_data  = &bast_sio_data,
+        },
+};
 
 /* Standard BAST devices */
 
@@ -364,6 +397,7 @@ static struct platform_device *bast_devices[] __initdata = {
         &s3c_device_nand,
         &bast_device_nor,
         &bast_device_dm9k,
+        &bast_sio,
 };
 
 static struct clk *bast_clocks[] = {
diff --git a/arch/arm/mach-s3c2410/s3c2440-clock.c b/arch/arm/mach-s3c2410/s3c2440-clock.c
new file mode 100644
index 000000000000..b018a1f680ce
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c2440-clock.c
@@ -0,0 +1,116 @@
+/* linux/arch/arm/mach-s3c2410/s3c2440-clock.c
+ *
+ * Copyright (c) 2004-2005 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C2440 Clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/device.h>
+#include <linux/sysdev.h>
+
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+
+#include <asm/hardware.h>
+#include <asm/atomic.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+
+#include <asm/hardware/clock.h>
+#include <asm/arch/regs-clock.h>
+
+#include "clock.h"
+#include "cpu.h"
+
+/* S3C2440 extended clock support */
+
+static struct clk s3c2440_clk_upll = {
+        .name           = "upll",
+        .id             = -1,
+};
+
+static struct clk s3c2440_clk_cam = {
+        .name           = "camif",
+        .id             = -1,
+        .enable         = s3c24xx_clkcon_enable,
+        .ctrlbit        = S3C2440_CLKCON_CAMERA,
+};
+
+static struct clk s3c2440_clk_ac97 = {
+        .name           = "ac97",
+        .id             = -1,
+        .enable         = s3c24xx_clkcon_enable,
+        .ctrlbit        = S3C2440_CLKCON_CAMERA,
+};
+
+static int s3c2440_clk_add(struct sys_device *sysdev)
+{
+        unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);
+        struct clk *clk_h;
+        struct clk *clk_p;
+        struct clk *clk_xtal;
+
+        clk_xtal = clk_get(NULL, "xtal");
+        if (IS_ERR(clk_xtal)) {
+                printk(KERN_ERR "S3C2440: Failed to get clk_xtal\n");
+                return -EINVAL;
+        }
+
+        s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal->rate);
+
+        printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n",
+               print_mhz(s3c2440_clk_upll.rate));
+
+        clk_p = clk_get(NULL, "pclk");
+        clk_h = clk_get(NULL, "hclk");
+
+        if (IS_ERR(clk_p) || IS_ERR(clk_h)) {
+                printk(KERN_ERR "S3C2440: Failed to get parent clocks\n");
+                return -EINVAL;
+        }
+
+        s3c2440_clk_cam.parent = clk_h;
+        s3c2440_clk_ac97.parent = clk_p;
+
+        s3c24xx_register_clock(&s3c2440_clk_ac97);
+        s3c24xx_register_clock(&s3c2440_clk_cam);
+        s3c24xx_register_clock(&s3c2440_clk_upll);
+
+        clk_disable(&s3c2440_clk_ac97);
+        clk_disable(&s3c2440_clk_cam);
+
+        return 0;
+}
+
+static struct sysdev_driver s3c2440_clk_driver = {
+        .add    = s3c2440_clk_add,
+};
+
+static __init int s3c24xx_clk_driver(void)
+{
+        return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver);
+}
+
+arch_initcall(s3c24xx_clk_driver);
diff --git a/arch/arm/mach-s3c2410/s3c2440-irq.c b/arch/arm/mach-s3c2410/s3c2440-irq.c
new file mode 100644
index 000000000000..7cb9912242a3
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c2440-irq.c
@@ -0,0 +1,207 @@
+/* linux/arch/arm/mach-s3c2410/s3c2440-irq.c
+ *
+ * Copyright (c) 2003,2004 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * Changelog:
+ *      25-Jul-2005 BJD         Split from irq.c
+ *
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/ptrace.h>
+#include <linux/sysdev.h>
+
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+
+#include <asm/mach/irq.h>
+
+#include <asm/arch/regs-irq.h>
+#include <asm/arch/regs-gpio.h>
+
+#include "cpu.h"
+#include "pm.h"
+#include "irq.h"
+
+/* WDT/AC97 */
+
+static void s3c_irq_demux_wdtac97(unsigned int irq,
+                                  struct irqdesc *desc,
+                                  struct pt_regs *regs)
+{
+        unsigned int subsrc, submsk;
+        struct irqdesc *mydesc;
+
+        /* read the current pending interrupts, and the mask
+         * for what it is available */
+
+        subsrc = __raw_readl(S3C2410_SUBSRCPND);
+        submsk = __raw_readl(S3C2410_INTSUBMSK);
+
+        subsrc &= ~submsk;
+        subsrc >>= 13;
+        subsrc &= 3;
+
+        if (subsrc != 0) {
+                if (subsrc & 1) {
+                        mydesc = irq_desc + IRQ_S3C2440_WDT;
+                        mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs);
+                }
+                if (subsrc & 2) {
+                        mydesc = irq_desc + IRQ_S3C2440_AC97;
+                        mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs);
+                }
+        }
+}
+
+
+#define INTMSK_WDT       (1UL << (IRQ_WDT - IRQ_EINT0))
+
+static void
+s3c_irq_wdtac97_mask(unsigned int irqno)
+{
+        s3c_irqsub_mask(irqno, INTMSK_WDT, 3<<13);
+}
+
+static void
+s3c_irq_wdtac97_unmask(unsigned int irqno)
+{
+        s3c_irqsub_unmask(irqno, INTMSK_WDT);
+}
+
+static void
+s3c_irq_wdtac97_ack(unsigned int irqno)
+{
+        s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<13);
+}
+
+static struct irqchip s3c_irq_wdtac97 = {
+        .mask       = s3c_irq_wdtac97_mask,
+        .unmask     = s3c_irq_wdtac97_unmask,
+        .ack        = s3c_irq_wdtac97_ack,
+};
+
+/* camera irq */
+
+static void s3c_irq_demux_cam(unsigned int irq,
+                              struct irqdesc *desc,
+                              struct pt_regs *regs)
+{
+        unsigned int subsrc, submsk;
+        struct irqdesc *mydesc;
+
+        /* read the current pending interrupts, and the mask
+         * for what it is available */
+
+        subsrc = __raw_readl(S3C2410_SUBSRCPND);
+        submsk = __raw_readl(S3C2410_INTSUBMSK);
+
+        subsrc &= ~submsk;
+        subsrc >>= 11;
+        subsrc &= 3;
+
+        if (subsrc != 0) {
+                if (subsrc & 1) {
+                        mydesc = irq_desc + IRQ_S3C2440_CAM_C;
+                        mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs);
+                }
+                if (subsrc & 2) {
+                        mydesc = irq_desc + IRQ_S3C2440_CAM_P;
+                        mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs);
+                }
+        }
+}
+
+#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
+
+static void
+s3c_irq_cam_mask(unsigned int irqno)
+{
+        s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11);
+}
+
+static void
+s3c_irq_cam_unmask(unsigned int irqno)
+{
+        s3c_irqsub_unmask(irqno, INTMSK_CAM);
+}
+
+static void
+s3c_irq_cam_ack(unsigned int irqno)
+{
+        s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
+}
+
+static struct irqchip s3c_irq_cam = {
+        .mask       = s3c_irq_cam_mask,
+        .unmask     = s3c_irq_cam_unmask,
+        .ack        = s3c_irq_cam_ack,
+};
+
+static int s3c2440_irq_add(struct sys_device *sysdev)
+{
+        unsigned int irqno;
+
+        printk("S3C2440: IRQ Support\n");
+
+        set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip);
+        set_irq_handler(IRQ_NFCON, do_level_IRQ);
+        set_irq_flags(IRQ_NFCON, IRQF_VALID);
+
+        /* add new chained handler for wdt, ac7 */
+
+        set_irq_chip(IRQ_WDT, &s3c_irq_level_chip);
+        set_irq_handler(IRQ_WDT, do_level_IRQ);
+        set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
+
+        for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) {
+                set_irq_chip(irqno, &s3c_irq_wdtac97);
+                set_irq_handler(irqno, do_level_IRQ);
+                set_irq_flags(irqno, IRQF_VALID);
+        }
+
+        /* add chained handler for camera */
+
+        set_irq_chip(IRQ_CAM, &s3c_irq_level_chip);
+        set_irq_handler(IRQ_CAM, do_level_IRQ);
+        set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
+
+        for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
+                set_irq_chip(irqno, &s3c_irq_cam);
+                set_irq_handler(irqno, do_level_IRQ);
+                set_irq_flags(irqno, IRQF_VALID);
+        }
+
+        return 0;
+}
+
+static struct sysdev_driver s3c2440_irq_driver = {
+        .add    = s3c2440_irq_add,
+};
+
+static int s3c24xx_irq_driver(void)
+{
+        return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver);
+}
+
+arch_initcall(s3c24xx_irq_driver);
+
diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c
index b19f00e99a21..e33fe4229d05 100644
--- a/arch/arm/mm/mm-armv.c
+++ b/arch/arm/mm/mm-armv.c
@@ -425,6 +425,9 @@ static void __init build_mem_type_table(void)
                 mem_types[MT_ROM].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
                 mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
                 mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
+
+                mem_types[MT_DEVICE].prot_pte |= L_PTE_BUFFERABLE;
+                mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED;
         }
 
         cp = &cache_policies[cachepolicy];
diff --git a/arch/arm/nwfpe/fpa11.h b/arch/arm/nwfpe/fpa11.h
index 45cc65426a22..e4a61aea534b 100644
--- a/arch/arm/nwfpe/fpa11.h
+++ b/arch/arm/nwfpe/fpa11.h
@@ -29,9 +29,7 @@
  * stack+task struct.  Use the same method as 'current' uses to
  * reach them.
  */
-register unsigned long *user_registers asm("sl");
-
-#define GET_USERREG() (user_registers)
+#define GET_USERREG() ((struct pt_regs *)(THREAD_START_SP + (unsigned long)current_thread_info()) - 1)
 
 #include <linux/config.h>
 #include <linux/thread_info.h>
diff --git a/arch/arm/nwfpe/fpmodule.c b/arch/arm/nwfpe/fpmodule.c
index a8efcf34888e..12885f31d347 100644
--- a/arch/arm/nwfpe/fpmodule.c
+++ b/arch/arm/nwfpe/fpmodule.c
@@ -132,7 +132,7 @@ void float_raise(signed char flags)
         printk(KERN_DEBUG
                "NWFPE: %s[%d] takes exception %08x at %p from %08lx\n",
                current->comm, current->pid, flags,
-               __builtin_return_address(0), GET_USERREG()[15]);
+               __builtin_return_address(0), GET_USERREG()->ARM_pc);
 #endif
 
         /* Keep SoftFloat exception flags up to date.  */
diff --git a/arch/arm/nwfpe/fpmodule.inl b/arch/arm/nwfpe/fpmodule.inl
index e5f59e9a3022..2c39ad408f22 100644
--- a/arch/arm/nwfpe/fpmodule.inl
+++ b/arch/arm/nwfpe/fpmodule.inl
@@ -28,8 +28,8 @@ static inline unsigned long readRegister(const unsigned int nReg)
            for this in this routine.  LDF/STF instructions with Rn = PC
            depend on the PC being correct, as they use PC+8 in their
            address calculations. */
-        unsigned long *userRegisters = GET_USERREG();
-        unsigned int val = userRegisters[nReg];
+        struct pt_regs *regs = GET_USERREG();
+        unsigned int val = regs->uregs[nReg];
         if (REG_PC == nReg)
                 val -= 4;
         return val;
@@ -38,8 +38,8 @@ static inline unsigned long readRegister(const unsigned int nReg)
 static inline void
 writeRegister(const unsigned int nReg, const unsigned long val)
 {
-        unsigned long *userRegisters = GET_USERREG();
-        userRegisters[nReg] = val;
+        struct pt_regs *regs = GET_USERREG();
+        regs->uregs[nReg] = val;
 }
 
 static inline unsigned long readCPSR(void)
@@ -63,12 +63,12 @@ static inline unsigned long readConditionCodes(void)
 
 static inline void writeConditionCodes(const unsigned long val)
 {
-        unsigned long *userRegisters = GET_USERREG();
+        struct pt_regs *regs = GET_USERREG();
         unsigned long rval;
         /*
          * Operate directly on userRegisters since
          * the CPSR may be the PC register itself.
          */
-        rval = userRegisters[REG_CPSR] & ~CC_MASK;
-        userRegisters[REG_CPSR] = rval | (val & CC_MASK);
+        rval = regs->ARM_cpsr & ~CC_MASK;
+        regs->ARM_cpsr = rval | (val & CC_MASK);
 }