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authorBen Dooks <ben-linux@fluff.org>2008-10-31 12:14:30 -0400
committerBen Dooks <ben-linux@fluff.org>2008-12-15 18:33:08 -0500
commitefd3a8eb150e383305c36eedc78c29cab910158e (patch)
tree753acca32e85261e471849b31dc9a2145ac00fe5 /arch/arm
parent39057f237dc9aff2a5ea41995029eeef7b677fae (diff)
[ARM] S3C64XX: Add gpio bank numbering
Define the gpio numbers for the S3C64XX GPIO banks available on the S3C6400 and S3C6410. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-s3c6400/include/mach/gpio.h72
-rw-r--r--arch/arm/plat-s3c/Kconfig11
2 files changed, 82 insertions, 1 deletions
diff --git a/arch/arm/mach-s3c6400/include/mach/gpio.h b/arch/arm/mach-s3c6400/include/mach/gpio.h
index 8b4254a23d9a..8600c818a46f 100644
--- a/arch/arm/mach-s3c6400/include/mach/gpio.h
+++ b/arch/arm/mach-s3c6400/include/mach/gpio.h
@@ -17,6 +17,76 @@
17#define gpio_cansleep __gpio_cansleep 17#define gpio_cansleep __gpio_cansleep
18#define gpio_to_irq __gpio_to_irq 18#define gpio_to_irq __gpio_to_irq
19 19
20#define ARCH_NR_GPIOS 188 20/* GPIO bank sizes */
21#define S3C64XX_GPIO_A_NR (8)
22#define S3C64XX_GPIO_B_NR (7)
23#define S3C64XX_GPIO_C_NR (8)
24#define S3C64XX_GPIO_D_NR (5)
25#define S3C64XX_GPIO_E_NR (5)
26#define S3C64XX_GPIO_F_NR (16)
27#define S3C64XX_GPIO_G_NR (7)
28#define S3C64XX_GPIO_H_NR (10)
29#define S3C64XX_GPIO_I_NR (16)
30#define S3C64XX_GPIO_J_NR (12)
31#define S3C64XX_GPIO_K_NR (16)
32#define S3C64XX_GPIO_L_NR (15)
33#define S3C64XX_GPIO_M_NR (6)
34#define S3C64XX_GPIO_N_NR (16)
35#define S3C64XX_GPIO_O_NR (16)
36#define S3C64XX_GPIO_P_NR (15)
37#define S3C64XX_GPIO_Q_NR (9)
38
39/* GPIO bank numbes */
40
41/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
42 * space for debugging purposes so that any accidental
43 * change from one gpio bank to another can be caught.
44*/
45
46#define S3C64XX_GPIO_NEXT(__gpio) \
47 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
48
49enum s3c_gpio_number {
50 S3C64XX_GPIO_A_START = 0,
51 S3C64XX_GPIO_B_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_A),
52 S3C64XX_GPIO_C_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_B),
53 S3C64XX_GPIO_D_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_C),
54 S3C64XX_GPIO_E_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_D),
55 S3C64XX_GPIO_F_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_E),
56 S3C64XX_GPIO_G_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_F),
57 S3C64XX_GPIO_H_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_G),
58 S3C64XX_GPIO_I_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_H),
59 S3C64XX_GPIO_J_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_I),
60 S3C64XX_GPIO_K_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_J),
61 S3C64XX_GPIO_L_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_K),
62 S3C64XX_GPIO_M_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_L),
63 S3C64XX_GPIO_N_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_M),
64 S3C64XX_GPIO_O_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_N),
65 S3C64XX_GPIO_P_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_O),
66 S3C64XX_GPIO_Q_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_P),
67};
68
69/* S3C64XX GPIO number definitions. */
70
71#define S3C64XX_GPA(_nr) (S3C64XX_GPIO_A_START + (_nr))
72#define S3C64XX_GPB(_nr) (S3C64XX_GPIO_B_START + (_nr))
73#define S3C64XX_GPC(_nr) (S3C64XX_GPIO_C_START + (_nr))
74#define S3C64XX_GPD(_nr) (S3C64XX_GPIO_D_START + (_nr))
75#define S3C64XX_GPE(_nr) (S3C64XX_GPIO_E_START + (_nr))
76#define S3C64XX_GPF(_nr) (S3C64XX_GPIO_F_START + (_nr))
77#define S3C64XX_GPG(_nr) (S3C64XX_GPIO_G_START + (_nr))
78#define S3C64XX_GPH(_nr) (S3C64XX_GPIO_H_START + (_nr))
79#define S3C64XX_GPI(_nr) (S3C64XX_GPIO_I_START + (_nr))
80#define S3C64XX_GPJ(_nr) (S3C64XX_GPIO_J_START + (_nr))
81#define S3C64XX_GPK(_nr) (S3C64XX_GPIO_K_START + (_nr))
82#define S3C64XX_GPL(_nr) (S3C64XX_GPIO_L_START + (_nr))
83#define S3C64XX_GPM(_nr) (S3C64XX_GPIO_M_START + (_nr))
84#define S3C64XX_GPN(_nr) (S3C64XX_GPIO_N_START + (_nr))
85#define S3C64XX_GPO(_nr) (S3C64XX_GPIO_O_START + (_nr))
86#define S3C64XX_GPP(_nr) (S3C64XX_GPIO_P_START + (_nr))
87#define S3C64XX_GPQ(_nr) (S3C64XX_GPIO_Q_START + (_nr))
88
89/* define the number of gpios we need to the one after the GPQ() range */
90#define ARCH_NR_GPIOS (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
21 91
22#include <asm-generic/gpio.h> 92#include <asm-generic/gpio.h>
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig
index 0deb1054975f..d7767e0305d0 100644
--- a/arch/arm/plat-s3c/Kconfig
+++ b/arch/arm/plat-s3c/Kconfig
@@ -103,6 +103,17 @@ config S3C_LOWLEVEL_UART_PORT
103 this configuration should be between zero and two. The port 103 this configuration should be between zero and two. The port
104 must have been initialised by the boot-loader before use. 104 must have been initialised by the boot-loader before use.
105 105
106# options for gpiolib support
107
108config S3C_GPIO_SPACE
109 int "Space between gpio banks"
110 default 0
111 help
112 Add a number of spare GPIO entries between each bank for debugging
113 purposes. This allows any problems where an counter overflows from
114 one bank to another to be caught, at the expense of using a little
115 more memory.
116
106# device definitions to compile in 117# device definitions to compile in
107 118
108config S3C_DEV_HSMMC 119config S3C_DEV_HSMMC