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authorJavier Martin <javier.martin@vista-silicon.com>2010-07-30 04:06:01 -0400
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-09-27 06:52:54 -0400
commit3b161e51b254fa7bd3a9b0bd7ca7a2ac8ceaae8b (patch)
treee7b4fb6e65ec10f7a4a816454a5f326f07268ed1 /arch/arm
parent49553c2ef88749dd502687f4eb9c258bb10a4f44 (diff)
ARM: imx: Add support for Vista Silicon Visstrim_m10 board
Vista Silicon Visstrim_m10 i.MX27 based board is used as multimedia streaming server, access control and other custom applications. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-imx/Kconfig9
-rw-r--r--arch/arm/mach-imx/Makefile1
-rw-r--r--arch/arm/mach-imx/mach-imx27_visstrim_m10.c263
3 files changed, 273 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index c5c0369bb481..19ed16d0017e 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -163,6 +163,15 @@ config MACH_MX27_3DS
163 Include support for MX27PDK platform. This includes specific 163 Include support for MX27PDK platform. This includes specific
164 configurations for the board and its peripherals. 164 configurations for the board and its peripherals.
165 165
166config MACH_IMX27_VISSTRIM_M10
167 bool "Vista Silicon i.MX27 Visstrim_m10"
168 select IMX_HAVE_PLATFORM_IMX_I2C
169 select IMX_HAVE_PLATFORM_IMX_UART
170 help
171 Include support for Visstrim_m10 platform and its different variants.
172 This includes specific configurations for the board and its
173 peripherals.
174
166config MACH_IMX27LITE 175config MACH_IMX27LITE
167 bool "LogicPD MX27 LITEKIT platform" 176 bool "LogicPD MX27 LITEKIT platform"
168 select IMX_HAVE_PLATFORM_IMX_UART 177 select IMX_HAVE_PLATFORM_IMX_UART
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 46a9fdfbbd15..5582692bb176 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_MACH_PCM038) += mach-pcm038.o
27obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o 27obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o
28obj-$(CONFIG_MACH_MX27_3DS) += mach-mx27_3ds.o 28obj-$(CONFIG_MACH_MX27_3DS) += mach-mx27_3ds.o
29obj-$(CONFIG_MACH_IMX27LITE) += mach-imx27lite.o 29obj-$(CONFIG_MACH_IMX27LITE) += mach-imx27lite.o
30obj-$(CONFIG_MACH_IMX27_VISSTRIM_M10) += mach-imx27_visstrim_m10.o
30obj-$(CONFIG_MACH_CPUIMX27) += mach-cpuimx27.o 31obj-$(CONFIG_MACH_CPUIMX27) += mach-cpuimx27.o
31obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o 32obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o
32obj-$(CONFIG_MACH_PCA100) += mach-pca100.o 33obj-$(CONFIG_MACH_PCA100) += mach-pca100.o
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
new file mode 100644
index 000000000000..6dad632b83d6
--- /dev/null
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -0,0 +1,263 @@
1/*
2 * mach-imx27_visstrim_m10.c
3 *
4 * Copyright 2010 Javier Martin <javier.martin@vista-silicon.com>
5 *
6 * Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 * MA 02110-1301, USA.
22 */
23
24#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25
26#include <linux/platform_device.h>
27#include <linux/mtd/physmap.h>
28#include <linux/i2c.h>
29#include <linux/i2c/pca953x.h>
30#include <linux/gpio_keys.h>
31#include <linux/input.h>
32#include <linux/gpio.h>
33#include <asm/mach-types.h>
34#include <asm/mach/arch.h>
35#include <asm/mach/time.h>
36#include <mach/common.h>
37#include <mach/mmc.h>
38#include <mach/iomux.h>
39#include <mach/mxc_ehci.h>
40
41#include "devices-imx27.h"
42#include "devices.h"
43
44#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
45#define SDHC1_IRQ IRQ_GPIOB(25)
46
47static int visstrim_m10_pins[] = {
48 /* UART1 (console) */
49 PE12_PF_UART1_TXD,
50 PE13_PF_UART1_RXD,
51 PE14_PF_UART1_CTS,
52 PE15_PF_UART1_RTS,
53 /* FEC */
54 PD0_AIN_FEC_TXD0,
55 PD1_AIN_FEC_TXD1,
56 PD2_AIN_FEC_TXD2,
57 PD3_AIN_FEC_TXD3,
58 PD4_AOUT_FEC_RX_ER,
59 PD5_AOUT_FEC_RXD1,
60 PD6_AOUT_FEC_RXD2,
61 PD7_AOUT_FEC_RXD3,
62 PD8_AF_FEC_MDIO,
63 PD9_AIN_FEC_MDC,
64 PD10_AOUT_FEC_CRS,
65 PD11_AOUT_FEC_TX_CLK,
66 PD12_AOUT_FEC_RXD0,
67 PD13_AOUT_FEC_RX_DV,
68 PD14_AOUT_FEC_RX_CLK,
69 PD15_AOUT_FEC_COL,
70 PD16_AIN_FEC_TX_ER,
71 PF23_AIN_FEC_TX_EN,
72 /* SDHC1 */
73 PE18_PF_SD1_D0,
74 PE19_PF_SD1_D1,
75 PE20_PF_SD1_D2,
76 PE21_PF_SD1_D3,
77 PE22_PF_SD1_CMD,
78 PE23_PF_SD1_CLK,
79 /* Both I2Cs */
80 PD17_PF_I2C_DATA,
81 PD18_PF_I2C_CLK,
82 PC5_PF_I2C2_SDA,
83 PC6_PF_I2C2_SCL,
84 /* USB OTG */
85 OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
86 PC9_PF_USBOTG_DATA0,
87 PC11_PF_USBOTG_DATA1,
88 PC10_PF_USBOTG_DATA2,
89 PC13_PF_USBOTG_DATA3,
90 PC12_PF_USBOTG_DATA4,
91 PC7_PF_USBOTG_DATA5,
92 PC8_PF_USBOTG_DATA6,
93 PE25_PF_USBOTG_DATA7,
94 PE24_PF_USBOTG_CLK,
95 PE2_PF_USBOTG_DIR,
96 PE0_PF_USBOTG_NXT,
97 PE1_PF_USBOTG_STP,
98 PB23_PF_USB_PWR,
99 PB24_PF_USB_OC,
100};
101
102/* GPIOs used as events for applications */
103static struct gpio_keys_button visstrim_gpio_keys[] = {
104 {
105 .type = EV_KEY,
106 .code = KEY_RESTART,
107 .gpio = (GPIO_PORTC + 15),
108 .desc = "Default config",
109 .active_low = 0,
110 .wakeup = 1,
111 },
112 {
113 .type = EV_KEY,
114 .code = KEY_RECORD,
115 .gpio = (GPIO_PORTF + 14),
116 .desc = "Record",
117 .active_low = 0,
118 .wakeup = 1,
119 },
120 {
121 .type = EV_KEY,
122 .code = KEY_STOP,
123 .gpio = (GPIO_PORTF + 13),
124 .desc = "Stop",
125 .active_low = 0,
126 .wakeup = 1,
127 }
128};
129
130static struct gpio_keys_platform_data visstrim_gpio_keys_platform_data = {
131 .buttons = visstrim_gpio_keys,
132 .nbuttons = ARRAY_SIZE(visstrim_gpio_keys),
133};
134
135static struct platform_device visstrim_gpio_keys_device = {
136 .name = "gpio-keys",
137 .id = -1,
138 .dev = {
139 .platform_data = &visstrim_gpio_keys_platform_data,
140 },
141};
142
143/* Visstrim_SM10 has a microSD slot connected to sdhc1 */
144static int visstrim_m10_sdhc1_init(struct device *dev,
145 irq_handler_t detect_irq, void *data)
146{
147 int ret;
148
149 ret = request_irq(SDHC1_IRQ, detect_irq, IRQF_TRIGGER_FALLING,
150 "mmc-detect", data);
151 return ret;
152}
153
154static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
155{
156 free_irq(SDHC1_IRQ, data);
157}
158
159static struct imxmmc_platform_data visstrim_m10_sdhc_pdata = {
160 .init = visstrim_m10_sdhc1_init,
161 .exit = visstrim_m10_sdhc1_exit,
162};
163
164/* Visstrim_SM10 NOR flash */
165static struct physmap_flash_data visstrim_m10_flash_data = {
166 .width = 2,
167};
168
169static struct resource visstrim_m10_flash_resource = {
170 .start = 0xc0000000,
171 .end = 0xc0000000 + SZ_64M - 1,
172 .flags = IORESOURCE_MEM,
173};
174
175static struct platform_device visstrim_m10_nor_mtd_device = {
176 .name = "physmap-flash",
177 .id = 0,
178 .dev = {
179 .platform_data = &visstrim_m10_flash_data,
180 },
181 .num_resources = 1,
182 .resource = &visstrim_m10_flash_resource,
183};
184
185static struct platform_device *platform_devices[] __initdata = {
186 &visstrim_gpio_keys_device,
187 &visstrim_m10_nor_mtd_device,
188 &mxc_fec_device,
189};
190
191/* Visstrim_M10 uses UART0 as console */
192static const struct imxuart_platform_data uart_pdata __initconst = {
193 .flags = IMXUART_HAVE_RTSCTS,
194};
195
196/* I2C */
197static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
198 .bitrate = 100000,
199};
200
201static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
202 .gpio_base = 240, /* After MX27 internal GPIOs */
203 .invert = 0,
204};
205
206static struct i2c_board_info visstrim_m10_i2c_devices[] = {
207 {
208 I2C_BOARD_INFO("pca9555", 0x20),
209 .platform_data = &visstrim_m10_pca9555_pdata,
210 },
211};
212
213/* USB OTG */
214static int otg_phy_init(struct platform_device *pdev)
215{
216 gpio_set_value(OTG_PHY_CS_GPIO, 0);
217 return 0;
218}
219
220static struct mxc_usbh_platform_data visstrim_m10_usbotg_pdata = {
221 .init = otg_phy_init,
222 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
223 .flags = MXC_EHCI_POWER_PINS_ENABLED,
224};
225
226static void __init visstrim_m10_board_init(void)
227{
228 int ret;
229
230 ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
231 ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
232 if (ret)
233 pr_err("Failed to setup pins (%d)\n", ret);
234
235 imx27_add_imx_uart0(&uart_pdata);
236
237 i2c_register_board_info(0, visstrim_m10_i2c_devices,
238 ARRAY_SIZE(visstrim_m10_i2c_devices));
239 imx27_add_i2c_imx0(&visstrim_m10_i2c_data);
240 imx27_add_i2c_imx1(&visstrim_m10_i2c_data);
241 mxc_register_device(&mxc_sdhc_device0, &visstrim_m10_sdhc_pdata);
242 mxc_register_device(&mxc_otg_host, &visstrim_m10_usbotg_pdata);
243 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
244}
245
246static void __init visstrim_m10_timer_init(void)
247{
248 mx27_clocks_init((unsigned long)25000000);
249}
250
251static struct sys_timer visstrim_m10_timer = {
252 .init = visstrim_m10_timer_init,
253};
254
255MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
256 .phys_io = MX27_AIPI_BASE_ADDR,
257 .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
258 .boot_params = MX27_PHYS_OFFSET + 0x100,
259 .map_io = mx27_map_io,
260 .init_irq = mx27_init_irq,
261 .init_machine = visstrim_m10_board_init,
262 .timer = &visstrim_m10_timer,
263MACHINE_END