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authorJoerg Roedel <joerg.roedel@amd.com>2009-06-09 04:50:57 -0400
committerJoerg Roedel <joerg.roedel@amd.com>2009-06-09 04:50:57 -0400
commitd2dd01de9924ae24afeba5aa5bc2e08287701df6 (patch)
tree3021bf496579a48984666355b59df5e44b42dd32 /arch/arm
parent367d04c4ec02dad34d80452e32e3370db7fb6fee (diff)
parent62a6f465f6572e1f28765c583c12753bb3e23715 (diff)
Merge commit 'tip/core/iommu' into amd-iommu/fixes
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig6
-rw-r--r--arch/arm/common/gic.c4
-rw-r--r--arch/arm/include/asm/assembler.h13
-rw-r--r--arch/arm/include/asm/atomic.h61
-rw-r--r--arch/arm/include/asm/flat.h3
-rw-r--r--arch/arm/include/asm/hardware/gic.h2
-rw-r--r--arch/arm/include/asm/smp.h12
-rw-r--r--arch/arm/include/asm/system.h176
-rw-r--r--arch/arm/kernel/elf.c9
-rw-r--r--arch/arm/kernel/entry-armv.S5
-rw-r--r--arch/arm/kernel/smp.c46
-rw-r--r--arch/arm/lib/bitops.h2
-rw-r--r--arch/arm/mach-davinci/include/mach/asp.h25
-rw-r--r--arch/arm/mach-ep93xx/clock.c69
-rw-r--r--arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h5
-rw-r--r--arch/arm/mach-gemini/include/mach/hardware.h3
-rw-r--r--arch/arm/mach-integrator/core.c2
-rw-r--r--arch/arm/mach-ixp4xx/ixp4xx_npe.c2
-rw-r--r--arch/arm/mach-kirkwood/common.c8
-rw-r--r--arch/arm/mach-kirkwood/ts219-setup.c6
-rw-r--r--arch/arm/mach-l7200/include/mach/sys-clock.h2
-rw-r--r--arch/arm/mach-loki/common.c6
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-pxa168.h5
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-pxa910.h5
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp.h9
-rw-r--r--arch/arm/mach-mmp/time.c2
-rw-r--r--arch/arm/mach-mv78xx0/common.c16
-rw-r--r--arch/arm/mach-omap2/clock24xx.c10
-rw-r--r--arch/arm/mach-omap2/clock34xx.c12
-rw-r--r--arch/arm/mach-omap2/clock34xx.h12
-rw-r--r--arch/arm/mach-omap2/devices.c6
-rw-r--r--arch/arm/mach-omap2/prm-regbits-34xx.h2
-rw-r--r--arch/arm/mach-omap2/usb-tusb6010.c2
-rw-r--r--arch/arm/mach-orion5x/common.c5
-rw-r--r--arch/arm/mach-pxa/ezx.c36
-rw-r--r--arch/arm/mach-pxa/include/mach/reset.h5
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c6
-rw-r--r--arch/arm/mach-pxa/palmld.c2
-rw-r--r--arch/arm/mach-pxa/palmt5.c1
-rw-r--r--arch/arm/mach-pxa/palmtx.c1
-rw-r--r--arch/arm/mach-pxa/reset.c4
-rw-r--r--arch/arm/mach-pxa/spitz.c8
-rw-r--r--arch/arm/mach-pxa/tosa.c2
-rw-r--r--arch/arm/mach-pxa/viper.c1
-rw-r--r--arch/arm/mach-realview/core.c8
-rw-r--r--arch/arm/mach-realview/include/mach/smp.h11
-rw-r--r--arch/arm/mach-realview/localtimer.c6
-rw-r--r--arch/arm/mach-realview/platsmp.c15
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c3
-rw-r--r--arch/arm/mach-versatile/core.c2
-rw-r--r--arch/arm/nwfpe/fpa11.h4
-rw-r--r--arch/arm/nwfpe/fpa11_cprt.c4
-rw-r--r--arch/arm/nwfpe/softfloat.h2
-rw-r--r--arch/arm/plat-omap/fb.c5
-rw-r--r--arch/arm/plat-omap/gpio.c2
-rw-r--r--arch/arm/plat-s3c/clock.c2
-rw-r--r--arch/arm/plat-s3c24xx/dma.c2
-rw-r--r--arch/arm/plat-s3c64xx/gpiolib.c2
-rw-r--r--arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h20
-rw-r--r--arch/arm/tools/mach-types131
60 files changed, 636 insertions, 202 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e60ec54df334..9d02cdb15b23 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -273,6 +273,7 @@ config ARCH_EP93XX
273 select HAVE_CLK 273 select HAVE_CLK
274 select COMMON_CLKDEV 274 select COMMON_CLKDEV
275 select ARCH_REQUIRE_GPIOLIB 275 select ARCH_REQUIRE_GPIOLIB
276 select ARCH_HAS_HOLES_MEMORYMODEL
276 help 277 help
277 This enables support for the Cirrus EP93xx series of CPUs. 278 This enables support for the Cirrus EP93xx series of CPUs.
278 279
@@ -976,10 +977,9 @@ config OABI_COMPAT
976 UNPREDICTABLE (in fact it can be predicted that it won't work 977 UNPREDICTABLE (in fact it can be predicted that it won't work
977 at all). If in doubt say Y. 978 at all). If in doubt say Y.
978 979
979config ARCH_FLATMEM_HAS_HOLES 980config ARCH_HAS_HOLES_MEMORYMODEL
980 bool 981 bool
981 default y 982 default n
982 depends on FLATMEM
983 983
984# Discontigmem is deprecated 984# Discontigmem is deprecated
985config ARCH_DISCONTIGMEM_ENABLE 985config ARCH_DISCONTIGMEM_ENABLE
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index c6884ba1d5ed..3e1714c6523f 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -253,9 +253,9 @@ void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base)
253} 253}
254 254
255#ifdef CONFIG_SMP 255#ifdef CONFIG_SMP
256void gic_raise_softirq(cpumask_t cpumask, unsigned int irq) 256void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
257{ 257{
258 unsigned long map = *cpus_addr(cpumask); 258 unsigned long map = *cpus_addr(*mask);
259 259
260 /* this always happens on GIC0 */ 260 /* this always happens on GIC0 */
261 writel(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT); 261 writel(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT);
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 6116e4893c0a..15f8a092b700 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -114,3 +114,16 @@
114 .align 3; \ 114 .align 3; \
115 .long 9999b,9001f; \ 115 .long 9999b,9001f; \
116 .previous 116 .previous
117
118/*
119 * SMP data memory barrier
120 */
121 .macro smp_dmb
122#ifdef CONFIG_SMP
123#if __LINUX_ARM_ARCH__ >= 7
124 dmb
125#elif __LINUX_ARM_ARCH__ == 6
126 mcr p15, 0, r0, c7, c10, 5 @ dmb
127#endif
128#endif
129 .endm
diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
index ee99723b3a6c..16b52f397983 100644
--- a/arch/arm/include/asm/atomic.h
+++ b/arch/arm/include/asm/atomic.h
@@ -44,11 +44,29 @@ static inline void atomic_set(atomic_t *v, int i)
44 : "cc"); 44 : "cc");
45} 45}
46 46
47static inline void atomic_add(int i, atomic_t *v)
48{
49 unsigned long tmp;
50 int result;
51
52 __asm__ __volatile__("@ atomic_add\n"
53"1: ldrex %0, [%2]\n"
54" add %0, %0, %3\n"
55" strex %1, %0, [%2]\n"
56" teq %1, #0\n"
57" bne 1b"
58 : "=&r" (result), "=&r" (tmp)
59 : "r" (&v->counter), "Ir" (i)
60 : "cc");
61}
62
47static inline int atomic_add_return(int i, atomic_t *v) 63static inline int atomic_add_return(int i, atomic_t *v)
48{ 64{
49 unsigned long tmp; 65 unsigned long tmp;
50 int result; 66 int result;
51 67
68 smp_mb();
69
52 __asm__ __volatile__("@ atomic_add_return\n" 70 __asm__ __volatile__("@ atomic_add_return\n"
53"1: ldrex %0, [%2]\n" 71"1: ldrex %0, [%2]\n"
54" add %0, %0, %3\n" 72" add %0, %0, %3\n"
@@ -59,14 +77,34 @@ static inline int atomic_add_return(int i, atomic_t *v)
59 : "r" (&v->counter), "Ir" (i) 77 : "r" (&v->counter), "Ir" (i)
60 : "cc"); 78 : "cc");
61 79
80 smp_mb();
81
62 return result; 82 return result;
63} 83}
64 84
85static inline void atomic_sub(int i, atomic_t *v)
86{
87 unsigned long tmp;
88 int result;
89
90 __asm__ __volatile__("@ atomic_sub\n"
91"1: ldrex %0, [%2]\n"
92" sub %0, %0, %3\n"
93" strex %1, %0, [%2]\n"
94" teq %1, #0\n"
95" bne 1b"
96 : "=&r" (result), "=&r" (tmp)
97 : "r" (&v->counter), "Ir" (i)
98 : "cc");
99}
100
65static inline int atomic_sub_return(int i, atomic_t *v) 101static inline int atomic_sub_return(int i, atomic_t *v)
66{ 102{
67 unsigned long tmp; 103 unsigned long tmp;
68 int result; 104 int result;
69 105
106 smp_mb();
107
70 __asm__ __volatile__("@ atomic_sub_return\n" 108 __asm__ __volatile__("@ atomic_sub_return\n"
71"1: ldrex %0, [%2]\n" 109"1: ldrex %0, [%2]\n"
72" sub %0, %0, %3\n" 110" sub %0, %0, %3\n"
@@ -77,6 +115,8 @@ static inline int atomic_sub_return(int i, atomic_t *v)
77 : "r" (&v->counter), "Ir" (i) 115 : "r" (&v->counter), "Ir" (i)
78 : "cc"); 116 : "cc");
79 117
118 smp_mb();
119
80 return result; 120 return result;
81} 121}
82 122
@@ -84,6 +124,8 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
84{ 124{
85 unsigned long oldval, res; 125 unsigned long oldval, res;
86 126
127 smp_mb();
128
87 do { 129 do {
88 __asm__ __volatile__("@ atomic_cmpxchg\n" 130 __asm__ __volatile__("@ atomic_cmpxchg\n"
89 "ldrex %1, [%2]\n" 131 "ldrex %1, [%2]\n"
@@ -95,6 +137,8 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
95 : "cc"); 137 : "cc");
96 } while (res); 138 } while (res);
97 139
140 smp_mb();
141
98 return oldval; 142 return oldval;
99} 143}
100 144
@@ -135,6 +179,7 @@ static inline int atomic_add_return(int i, atomic_t *v)
135 179
136 return val; 180 return val;
137} 181}
182#define atomic_add(i, v) (void) atomic_add_return(i, v)
138 183
139static inline int atomic_sub_return(int i, atomic_t *v) 184static inline int atomic_sub_return(int i, atomic_t *v)
140{ 185{
@@ -148,6 +193,7 @@ static inline int atomic_sub_return(int i, atomic_t *v)
148 193
149 return val; 194 return val;
150} 195}
196#define atomic_sub(i, v) (void) atomic_sub_return(i, v)
151 197
152static inline int atomic_cmpxchg(atomic_t *v, int old, int new) 198static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
153{ 199{
@@ -187,10 +233,8 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
187} 233}
188#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) 234#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
189 235
190#define atomic_add(i, v) (void) atomic_add_return(i, v) 236#define atomic_inc(v) atomic_add(1, v)
191#define atomic_inc(v) (void) atomic_add_return(1, v) 237#define atomic_dec(v) atomic_sub(1, v)
192#define atomic_sub(i, v) (void) atomic_sub_return(i, v)
193#define atomic_dec(v) (void) atomic_sub_return(1, v)
194 238
195#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0) 239#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
196#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0) 240#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
@@ -200,11 +244,10 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
200 244
201#define atomic_add_negative(i,v) (atomic_add_return(i, v) < 0) 245#define atomic_add_negative(i,v) (atomic_add_return(i, v) < 0)
202 246
203/* Atomic operations are already serializing on ARM */ 247#define smp_mb__before_atomic_dec() smp_mb()
204#define smp_mb__before_atomic_dec() barrier() 248#define smp_mb__after_atomic_dec() smp_mb()
205#define smp_mb__after_atomic_dec() barrier() 249#define smp_mb__before_atomic_inc() smp_mb()
206#define smp_mb__before_atomic_inc() barrier() 250#define smp_mb__after_atomic_inc() smp_mb()
207#define smp_mb__after_atomic_inc() barrier()
208 251
209#include <asm-generic/atomic.h> 252#include <asm-generic/atomic.h>
210#endif 253#endif
diff --git a/arch/arm/include/asm/flat.h b/arch/arm/include/asm/flat.h
index 1d77e51907f6..59426a4595c9 100644
--- a/arch/arm/include/asm/flat.h
+++ b/arch/arm/include/asm/flat.h
@@ -5,9 +5,6 @@
5#ifndef __ARM_FLAT_H__ 5#ifndef __ARM_FLAT_H__
6#define __ARM_FLAT_H__ 6#define __ARM_FLAT_H__
7 7
8/* An odd number of words will be pushed after this alignment, so
9 deliberately misalign the value. */
10#define flat_stack_align(sp) sp = (void *)(((unsigned long)(sp) - 4) | 4)
11#define flat_argvp_envp_on_stack() 1 8#define flat_argvp_envp_on_stack() 1
12#define flat_old_ram_flag(flags) (flags) 9#define flat_old_ram_flag(flags) (flags)
13#define flat_reloc_valid(reloc, size) ((reloc) <= (size)) 10#define flat_reloc_valid(reloc, size) ((reloc) <= (size))
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 4924914af188..7f34333bb545 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -36,7 +36,7 @@
36void gic_dist_init(unsigned int gic_nr, void __iomem *base, unsigned int irq_start); 36void gic_dist_init(unsigned int gic_nr, void __iomem *base, unsigned int irq_start);
37void gic_cpu_init(unsigned int gic_nr, void __iomem *base); 37void gic_cpu_init(unsigned int gic_nr, void __iomem *base);
38void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); 38void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
39void gic_raise_softirq(cpumask_t cpumask, unsigned int irq); 39void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
40#endif 40#endif
41 41
42#endif 42#endif
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index fad70da5911d..5995935338e1 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -53,17 +53,12 @@ extern void smp_store_cpu_info(unsigned int cpuid);
53/* 53/*
54 * Raise an IPI cross call on CPUs in callmap. 54 * Raise an IPI cross call on CPUs in callmap.
55 */ 55 */
56extern void smp_cross_call(cpumask_t callmap); 56extern void smp_cross_call(const struct cpumask *mask);
57
58/*
59 * Broadcast a timer interrupt to the other CPUs.
60 */
61extern void smp_send_timer(void);
62 57
63/* 58/*
64 * Broadcast a clock event to other CPUs. 59 * Broadcast a clock event to other CPUs.
65 */ 60 */
66extern void smp_timer_broadcast(cpumask_t mask); 61extern void smp_timer_broadcast(const struct cpumask *mask);
67 62
68/* 63/*
69 * Boot a secondary CPU, and assign it the specified idle task. 64 * Boot a secondary CPU, and assign it the specified idle task.
@@ -102,7 +97,8 @@ extern int platform_cpu_kill(unsigned int cpu);
102extern void platform_cpu_enable(unsigned int cpu); 97extern void platform_cpu_enable(unsigned int cpu);
103 98
104extern void arch_send_call_function_single_ipi(int cpu); 99extern void arch_send_call_function_single_ipi(int cpu);
105extern void arch_send_call_function_ipi(cpumask_t mask); 100extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
101#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask
106 102
107/* 103/*
108 * Local timer interrupt handling function (can be IPI'ed). 104 * Local timer interrupt handling function (can be IPI'ed).
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index bd4dc8ed53d5..d65b2f5bf41f 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -248,6 +248,8 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
248 unsigned int tmp; 248 unsigned int tmp;
249#endif 249#endif
250 250
251 smp_mb();
252
251 switch (size) { 253 switch (size) {
252#if __LINUX_ARM_ARCH__ >= 6 254#if __LINUX_ARM_ARCH__ >= 6
253 case 1: 255 case 1:
@@ -307,6 +309,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
307 __bad_xchg(ptr, size), ret = 0; 309 __bad_xchg(ptr, size), ret = 0;
308 break; 310 break;
309 } 311 }
312 smp_mb();
310 313
311 return ret; 314 return ret;
312} 315}
@@ -316,6 +319,12 @@ extern void enable_hlt(void);
316 319
317#include <asm-generic/cmpxchg-local.h> 320#include <asm-generic/cmpxchg-local.h>
318 321
322#if __LINUX_ARM_ARCH__ < 6
323
324#ifdef CONFIG_SMP
325#error "SMP is not supported on this platform"
326#endif
327
319/* 328/*
320 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make 329 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
321 * them available. 330 * them available.
@@ -329,6 +338,173 @@ extern void enable_hlt(void);
329#include <asm-generic/cmpxchg.h> 338#include <asm-generic/cmpxchg.h>
330#endif 339#endif
331 340
341#else /* __LINUX_ARM_ARCH__ >= 6 */
342
343extern void __bad_cmpxchg(volatile void *ptr, int size);
344
345/*
346 * cmpxchg only support 32-bits operands on ARMv6.
347 */
348
349static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
350 unsigned long new, int size)
351{
352 unsigned long oldval, res;
353
354 switch (size) {
355#ifdef CONFIG_CPU_32v6K
356 case 1:
357 do {
358 asm volatile("@ __cmpxchg1\n"
359 " ldrexb %1, [%2]\n"
360 " mov %0, #0\n"
361 " teq %1, %3\n"
362 " strexbeq %0, %4, [%2]\n"
363 : "=&r" (res), "=&r" (oldval)
364 : "r" (ptr), "Ir" (old), "r" (new)
365 : "memory", "cc");
366 } while (res);
367 break;
368 case 2:
369 do {
370 asm volatile("@ __cmpxchg1\n"
371 " ldrexh %1, [%2]\n"
372 " mov %0, #0\n"
373 " teq %1, %3\n"
374 " strexheq %0, %4, [%2]\n"
375 : "=&r" (res), "=&r" (oldval)
376 : "r" (ptr), "Ir" (old), "r" (new)
377 : "memory", "cc");
378 } while (res);
379 break;
380#endif /* CONFIG_CPU_32v6K */
381 case 4:
382 do {
383 asm volatile("@ __cmpxchg4\n"
384 " ldrex %1, [%2]\n"
385 " mov %0, #0\n"
386 " teq %1, %3\n"
387 " strexeq %0, %4, [%2]\n"
388 : "=&r" (res), "=&r" (oldval)
389 : "r" (ptr), "Ir" (old), "r" (new)
390 : "memory", "cc");
391 } while (res);
392 break;
393 default:
394 __bad_cmpxchg(ptr, size);
395 oldval = 0;
396 }
397
398 return oldval;
399}
400
401static inline unsigned long __cmpxchg_mb(volatile void *ptr, unsigned long old,
402 unsigned long new, int size)
403{
404 unsigned long ret;
405
406 smp_mb();
407 ret = __cmpxchg(ptr, old, new, size);
408 smp_mb();
409
410 return ret;
411}
412
413#define cmpxchg(ptr,o,n) \
414 ((__typeof__(*(ptr)))__cmpxchg_mb((ptr), \
415 (unsigned long)(o), \
416 (unsigned long)(n), \
417 sizeof(*(ptr))))
418
419static inline unsigned long __cmpxchg_local(volatile void *ptr,
420 unsigned long old,
421 unsigned long new, int size)
422{
423 unsigned long ret;
424
425 switch (size) {
426#ifndef CONFIG_CPU_32v6K
427 case 1:
428 case 2:
429 ret = __cmpxchg_local_generic(ptr, old, new, size);
430 break;
431#endif /* !CONFIG_CPU_32v6K */
432 default:
433 ret = __cmpxchg(ptr, old, new, size);
434 }
435
436 return ret;
437}
438
439#define cmpxchg_local(ptr,o,n) \
440 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), \
441 (unsigned long)(o), \
442 (unsigned long)(n), \
443 sizeof(*(ptr))))
444
445#ifdef CONFIG_CPU_32v6K
446
447/*
448 * Note : ARMv7-M (currently unsupported by Linux) does not support
449 * ldrexd/strexd. If ARMv7-M is ever supported by the Linux kernel, it should
450 * not be allowed to use __cmpxchg64.
451 */
452static inline unsigned long long __cmpxchg64(volatile void *ptr,
453 unsigned long long old,
454 unsigned long long new)
455{
456 register unsigned long long oldval asm("r0");
457 register unsigned long long __old asm("r2") = old;
458 register unsigned long long __new asm("r4") = new;
459 unsigned long res;
460
461 do {
462 asm volatile(
463 " @ __cmpxchg8\n"
464 " ldrexd %1, %H1, [%2]\n"
465 " mov %0, #0\n"
466 " teq %1, %3\n"
467 " teqeq %H1, %H3\n"
468 " strexdeq %0, %4, %H4, [%2]\n"
469 : "=&r" (res), "=&r" (oldval)
470 : "r" (ptr), "Ir" (__old), "r" (__new)
471 : "memory", "cc");
472 } while (res);
473
474 return oldval;
475}
476
477static inline unsigned long long __cmpxchg64_mb(volatile void *ptr,
478 unsigned long long old,
479 unsigned long long new)
480{
481 unsigned long long ret;
482
483 smp_mb();
484 ret = __cmpxchg64(ptr, old, new);
485 smp_mb();
486
487 return ret;
488}
489
490#define cmpxchg64(ptr,o,n) \
491 ((__typeof__(*(ptr)))__cmpxchg64_mb((ptr), \
492 (unsigned long long)(o), \
493 (unsigned long long)(n)))
494
495#define cmpxchg64_local(ptr,o,n) \
496 ((__typeof__(*(ptr)))__cmpxchg64((ptr), \
497 (unsigned long long)(o), \
498 (unsigned long long)(n)))
499
500#else /* !CONFIG_CPU_32v6K */
501
502#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
503
504#endif /* CONFIG_CPU_32v6K */
505
506#endif /* __LINUX_ARM_ARCH__ >= 6 */
507
332#endif /* __ASSEMBLY__ */ 508#endif /* __ASSEMBLY__ */
333 509
334#define arch_align_stack(x) (x) 510#define arch_align_stack(x) (x)
diff --git a/arch/arm/kernel/elf.c b/arch/arm/kernel/elf.c
index d4a0da1e48f4..950391f194c4 100644
--- a/arch/arm/kernel/elf.c
+++ b/arch/arm/kernel/elf.c
@@ -78,6 +78,15 @@ int arm_elf_read_implies_exec(const struct elf32_hdr *x, int executable_stack)
78 return 1; 78 return 1;
79 if (cpu_architecture() < CPU_ARCH_ARMv6) 79 if (cpu_architecture() < CPU_ARCH_ARMv6)
80 return 1; 80 return 1;
81#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
82 /*
83 * If we have support for OABI programs, we can never allow NX
84 * support - our signal syscall restart mechanism relies upon
85 * being able to execute code placed on the user stack.
86 */
87 return 1;
88#else
81 return 0; 89 return 0;
90#endif
82} 91}
83EXPORT_SYMBOL(arm_elf_read_implies_exec); 92EXPORT_SYMBOL(arm_elf_read_implies_exec);
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index d662a2f1fd85..83b1da6b7baa 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -815,10 +815,7 @@ __kuser_helper_start:
815 */ 815 */
816 816
817__kuser_memory_barrier: @ 0xffff0fa0 817__kuser_memory_barrier: @ 0xffff0fa0
818 818 smp_dmb
819#if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_SMP)
820 mcr p15, 0, r0, c7, c10, 5 @ dmb
821#endif
822 usr_ret lr 819 usr_ret lr
823 820
824 .align 5 821 .align 5
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 7801aac3c043..6014dfd22af4 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -326,14 +326,14 @@ void __init smp_prepare_boot_cpu(void)
326 per_cpu(cpu_data, cpu).idle = current; 326 per_cpu(cpu_data, cpu).idle = current;
327} 327}
328 328
329static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg) 329static void send_ipi_message(const struct cpumask *mask, enum ipi_msg_type msg)
330{ 330{
331 unsigned long flags; 331 unsigned long flags;
332 unsigned int cpu; 332 unsigned int cpu;
333 333
334 local_irq_save(flags); 334 local_irq_save(flags);
335 335
336 for_each_cpu_mask(cpu, callmap) { 336 for_each_cpu(cpu, mask) {
337 struct ipi_data *ipi = &per_cpu(ipi_data, cpu); 337 struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
338 338
339 spin_lock(&ipi->lock); 339 spin_lock(&ipi->lock);
@@ -344,19 +344,19 @@ static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg)
344 /* 344 /*
345 * Call the platform specific cross-CPU call function. 345 * Call the platform specific cross-CPU call function.
346 */ 346 */
347 smp_cross_call(callmap); 347 smp_cross_call(mask);
348 348
349 local_irq_restore(flags); 349 local_irq_restore(flags);
350} 350}
351 351
352void arch_send_call_function_ipi(cpumask_t mask) 352void arch_send_call_function_ipi_mask(const struct cpumask *mask)
353{ 353{
354 send_ipi_message(mask, IPI_CALL_FUNC); 354 send_ipi_message(mask, IPI_CALL_FUNC);
355} 355}
356 356
357void arch_send_call_function_single_ipi(int cpu) 357void arch_send_call_function_single_ipi(int cpu)
358{ 358{
359 send_ipi_message(cpumask_of_cpu(cpu), IPI_CALL_FUNC_SINGLE); 359 send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
360} 360}
361 361
362void show_ipi_list(struct seq_file *p) 362void show_ipi_list(struct seq_file *p)
@@ -498,17 +498,10 @@ asmlinkage void __exception do_IPI(struct pt_regs *regs)
498 498
499void smp_send_reschedule(int cpu) 499void smp_send_reschedule(int cpu)
500{ 500{
501 send_ipi_message(cpumask_of_cpu(cpu), IPI_RESCHEDULE); 501 send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
502} 502}
503 503
504void smp_send_timer(void) 504void smp_timer_broadcast(const struct cpumask *mask)
505{
506 cpumask_t mask = cpu_online_map;
507 cpu_clear(smp_processor_id(), mask);
508 send_ipi_message(mask, IPI_TIMER);
509}
510
511void smp_timer_broadcast(cpumask_t mask)
512{ 505{
513 send_ipi_message(mask, IPI_TIMER); 506 send_ipi_message(mask, IPI_TIMER);
514} 507}
@@ -517,7 +510,7 @@ void smp_send_stop(void)
517{ 510{
518 cpumask_t mask = cpu_online_map; 511 cpumask_t mask = cpu_online_map;
519 cpu_clear(smp_processor_id(), mask); 512 cpu_clear(smp_processor_id(), mask);
520 send_ipi_message(mask, IPI_CPU_STOP); 513 send_ipi_message(&mask, IPI_CPU_STOP);
521} 514}
522 515
523/* 516/*
@@ -528,20 +521,17 @@ int setup_profiling_timer(unsigned int multiplier)
528 return -EINVAL; 521 return -EINVAL;
529} 522}
530 523
531static int 524static void
532on_each_cpu_mask(void (*func)(void *), void *info, int wait, cpumask_t mask) 525on_each_cpu_mask(void (*func)(void *), void *info, int wait,
526 const struct cpumask *mask)
533{ 527{
534 int ret = 0;
535
536 preempt_disable(); 528 preempt_disable();
537 529
538 ret = smp_call_function_mask(mask, func, info, wait); 530 smp_call_function_many(mask, func, info, wait);
539 if (cpu_isset(smp_processor_id(), mask)) 531 if (cpumask_test_cpu(smp_processor_id(), mask))
540 func(info); 532 func(info);
541 533
542 preempt_enable(); 534 preempt_enable();
543
544 return ret;
545} 535}
546 536
547/**********************************************************************/ 537/**********************************************************************/
@@ -602,20 +592,17 @@ void flush_tlb_all(void)
602 592
603void flush_tlb_mm(struct mm_struct *mm) 593void flush_tlb_mm(struct mm_struct *mm)
604{ 594{
605 cpumask_t mask = mm->cpu_vm_mask; 595 on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, &mm->cpu_vm_mask);
606
607 on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, mask);
608} 596}
609 597
610void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) 598void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
611{ 599{
612 cpumask_t mask = vma->vm_mm->cpu_vm_mask;
613 struct tlb_args ta; 600 struct tlb_args ta;
614 601
615 ta.ta_vma = vma; 602 ta.ta_vma = vma;
616 ta.ta_start = uaddr; 603 ta.ta_start = uaddr;
617 604
618 on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, mask); 605 on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, &vma->vm_mm->cpu_vm_mask);
619} 606}
620 607
621void flush_tlb_kernel_page(unsigned long kaddr) 608void flush_tlb_kernel_page(unsigned long kaddr)
@@ -630,14 +617,13 @@ void flush_tlb_kernel_page(unsigned long kaddr)
630void flush_tlb_range(struct vm_area_struct *vma, 617void flush_tlb_range(struct vm_area_struct *vma,
631 unsigned long start, unsigned long end) 618 unsigned long start, unsigned long end)
632{ 619{
633 cpumask_t mask = vma->vm_mm->cpu_vm_mask;
634 struct tlb_args ta; 620 struct tlb_args ta;
635 621
636 ta.ta_vma = vma; 622 ta.ta_vma = vma;
637 ta.ta_start = start; 623 ta.ta_start = start;
638 ta.ta_end = end; 624 ta.ta_end = end;
639 625
640 on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, mask); 626 on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, &vma->vm_mm->cpu_vm_mask);
641} 627}
642 628
643void flush_tlb_kernel_range(unsigned long start, unsigned long end) 629void flush_tlb_kernel_range(unsigned long start, unsigned long end)
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h
index 2e787d40d599..c7f2627385e7 100644
--- a/arch/arm/lib/bitops.h
+++ b/arch/arm/lib/bitops.h
@@ -18,12 +18,14 @@
18 mov r2, #1 18 mov r2, #1
19 add r1, r1, r0, lsr #3 @ Get byte offset 19 add r1, r1, r0, lsr #3 @ Get byte offset
20 mov r3, r2, lsl r3 @ create mask 20 mov r3, r2, lsl r3 @ create mask
21 smp_dmb
211: ldrexb r2, [r1] 221: ldrexb r2, [r1]
22 ands r0, r2, r3 @ save old value of bit 23 ands r0, r2, r3 @ save old value of bit
23 \instr r2, r2, r3 @ toggle bit 24 \instr r2, r2, r3 @ toggle bit
24 strexb ip, r2, [r1] 25 strexb ip, r2, [r1]
25 cmp ip, #0 26 cmp ip, #0
26 bne 1b 27 bne 1b
28 smp_dmb
27 cmp r0, #0 29 cmp r0, #0
28 movne r0, #1 30 movne r0, #1
292: mov pc, lr 312: mov pc, lr
diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h
new file mode 100644
index 000000000000..e0abc437d796
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/asp.h
@@ -0,0 +1,25 @@
1/*
2 * <mach/asp.h> - DaVinci Audio Serial Port support
3 */
4#ifndef __ASM_ARCH_DAVINCI_ASP_H
5#define __ASM_ARCH_DAVINCI_ASP_H
6
7#include <mach/irqs.h>
8
9/* Bases of register banks */
10#define DAVINCI_ASP0_BASE 0x01E02000
11#define DAVINCI_ASP1_BASE 0x01E04000
12
13/* EDMA channels */
14#define DAVINCI_DMA_ASP0_TX 2
15#define DAVINCI_DMA_ASP0_RX 3
16#define DAVINCI_DMA_ASP1_TX 8
17#define DAVINCI_DMA_ASP1_RX 9
18
19/* Interrupts */
20#define DAVINCI_ASP0_RX_INT IRQ_MBRINT
21#define DAVINCI_ASP0_TX_INT IRQ_MBXINT
22#define DAVINCI_ASP1_RX_INT IRQ_MBRINT
23#define DAVINCI_ASP1_TX_INT IRQ_MBXINT
24
25#endif /* __ASM_ARCH_DAVINCI_ASP_H */
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index e8ebeaea6c48..b2eede5531c8 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -21,15 +21,50 @@
21#include <asm/div64.h> 21#include <asm/div64.h>
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23 23
24
25/*
26 * The EP93xx has two external crystal oscillators. To generate the
27 * required high-frequency clocks, the processor uses two phase-locked-
28 * loops (PLLs) to multiply the incoming external clock signal to much
29 * higher frequencies that are then divided down by programmable dividers
30 * to produce the needed clocks. The PLLs operate independently of one
31 * another.
32 */
33#define EP93XX_EXT_CLK_RATE 14745600
34#define EP93XX_EXT_RTC_RATE 32768
35
36
24struct clk { 37struct clk {
25 unsigned long rate; 38 unsigned long rate;
26 int users; 39 int users;
40 int sw_locked;
27 u32 enable_reg; 41 u32 enable_reg;
28 u32 enable_mask; 42 u32 enable_mask;
43
44 unsigned long (*get_rate)(struct clk *clk);
29}; 45};
30 46
31static struct clk clk_uart = { 47
32 .rate = 14745600, 48static unsigned long get_uart_rate(struct clk *clk);
49
50
51static struct clk clk_uart1 = {
52 .sw_locked = 1,
53 .enable_reg = EP93XX_SYSCON_DEVICE_CONFIG,
54 .enable_mask = EP93XX_SYSCON_DEVICE_CONFIG_U1EN,
55 .get_rate = get_uart_rate,
56};
57static struct clk clk_uart2 = {
58 .sw_locked = 1,
59 .enable_reg = EP93XX_SYSCON_DEVICE_CONFIG,
60 .enable_mask = EP93XX_SYSCON_DEVICE_CONFIG_U2EN,
61 .get_rate = get_uart_rate,
62};
63static struct clk clk_uart3 = {
64 .sw_locked = 1,
65 .enable_reg = EP93XX_SYSCON_DEVICE_CONFIG,
66 .enable_mask = EP93XX_SYSCON_DEVICE_CONFIG_U3EN,
67 .get_rate = get_uart_rate,
33}; 68};
34static struct clk clk_pll1; 69static struct clk clk_pll1;
35static struct clk clk_f; 70static struct clk clk_f;
@@ -95,9 +130,9 @@ static struct clk clk_m2m1 = {
95 { .dev_id = dev, .con_id = con, .clk = ck } 130 { .dev_id = dev, .con_id = con, .clk = ck }
96 131
97static struct clk_lookup clocks[] = { 132static struct clk_lookup clocks[] = {
98 INIT_CK("apb:uart1", NULL, &clk_uart), 133 INIT_CK("apb:uart1", NULL, &clk_uart1),
99 INIT_CK("apb:uart2", NULL, &clk_uart), 134 INIT_CK("apb:uart2", NULL, &clk_uart2),
100 INIT_CK("apb:uart3", NULL, &clk_uart), 135 INIT_CK("apb:uart3", NULL, &clk_uart3),
101 INIT_CK(NULL, "pll1", &clk_pll1), 136 INIT_CK(NULL, "pll1", &clk_pll1),
102 INIT_CK(NULL, "fclk", &clk_f), 137 INIT_CK(NULL, "fclk", &clk_f),
103 INIT_CK(NULL, "hclk", &clk_h), 138 INIT_CK(NULL, "hclk", &clk_h),
@@ -125,6 +160,8 @@ int clk_enable(struct clk *clk)
125 u32 value; 160 u32 value;
126 161
127 value = __raw_readl(clk->enable_reg); 162 value = __raw_readl(clk->enable_reg);
163 if (clk->sw_locked)
164 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
128 __raw_writel(value | clk->enable_mask, clk->enable_reg); 165 __raw_writel(value | clk->enable_mask, clk->enable_reg);
129 } 166 }
130 167
@@ -138,13 +175,29 @@ void clk_disable(struct clk *clk)
138 u32 value; 175 u32 value;
139 176
140 value = __raw_readl(clk->enable_reg); 177 value = __raw_readl(clk->enable_reg);
178 if (clk->sw_locked)
179 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
141 __raw_writel(value & ~clk->enable_mask, clk->enable_reg); 180 __raw_writel(value & ~clk->enable_mask, clk->enable_reg);
142 } 181 }
143} 182}
144EXPORT_SYMBOL(clk_disable); 183EXPORT_SYMBOL(clk_disable);
145 184
185static unsigned long get_uart_rate(struct clk *clk)
186{
187 u32 value;
188
189 value = __raw_readl(EP93XX_SYSCON_CLOCK_CONTROL);
190 if (value & EP93XX_SYSCON_CLOCK_UARTBAUD)
191 return EP93XX_EXT_CLK_RATE;
192 else
193 return EP93XX_EXT_CLK_RATE / 2;
194}
195
146unsigned long clk_get_rate(struct clk *clk) 196unsigned long clk_get_rate(struct clk *clk)
147{ 197{
198 if (clk->get_rate)
199 return clk->get_rate(clk);
200
148 return clk->rate; 201 return clk->rate;
149} 202}
150EXPORT_SYMBOL(clk_get_rate); 203EXPORT_SYMBOL(clk_get_rate);
@@ -162,7 +215,7 @@ static unsigned long calc_pll_rate(u32 config_word)
162 unsigned long long rate; 215 unsigned long long rate;
163 int i; 216 int i;
164 217
165 rate = 14745600; 218 rate = EP93XX_EXT_CLK_RATE;
166 rate *= ((config_word >> 11) & 0x1f) + 1; /* X1FBD */ 219 rate *= ((config_word >> 11) & 0x1f) + 1; /* X1FBD */
167 rate *= ((config_word >> 5) & 0x3f) + 1; /* X2FBD */ 220 rate *= ((config_word >> 5) & 0x3f) + 1; /* X2FBD */
168 do_div(rate, (config_word & 0x1f) + 1); /* X2IPD */ 221 do_div(rate, (config_word & 0x1f) + 1); /* X2IPD */
@@ -195,7 +248,7 @@ static int __init ep93xx_clock_init(void)
195 248
196 value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1); 249 value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1);
197 if (!(value & 0x00800000)) { /* PLL1 bypassed? */ 250 if (!(value & 0x00800000)) { /* PLL1 bypassed? */
198 clk_pll1.rate = 14745600; 251 clk_pll1.rate = EP93XX_EXT_CLK_RATE;
199 } else { 252 } else {
200 clk_pll1.rate = calc_pll_rate(value); 253 clk_pll1.rate = calc_pll_rate(value);
201 } 254 }
@@ -206,7 +259,7 @@ static int __init ep93xx_clock_init(void)
206 259
207 value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2); 260 value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2);
208 if (!(value & 0x00080000)) { /* PLL2 bypassed? */ 261 if (!(value & 0x00080000)) { /* PLL2 bypassed? */
209 clk_pll2.rate = 14745600; 262 clk_pll2.rate = EP93XX_EXT_CLK_RATE;
210 } else if (value & 0x00040000) { /* PLL2 enabled? */ 263 } else if (value & 0x00040000) { /* PLL2 enabled? */
211 clk_pll2.rate = calc_pll_rate(value); 264 clk_pll2.rate = calc_pll_rate(value);
212 } else { 265 } else {
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
index f66be12b856e..1732de7629a5 100644
--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
@@ -159,7 +159,10 @@
159#define EP93XX_SYSCON_CLOCK_SET1 EP93XX_SYSCON_REG(0x20) 159#define EP93XX_SYSCON_CLOCK_SET1 EP93XX_SYSCON_REG(0x20)
160#define EP93XX_SYSCON_CLOCK_SET2 EP93XX_SYSCON_REG(0x24) 160#define EP93XX_SYSCON_CLOCK_SET2 EP93XX_SYSCON_REG(0x24)
161#define EP93XX_SYSCON_DEVICE_CONFIG EP93XX_SYSCON_REG(0x80) 161#define EP93XX_SYSCON_DEVICE_CONFIG EP93XX_SYSCON_REG(0x80)
162#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE 0x00800000 162#define EP93XX_SYSCON_DEVICE_CONFIG_U3EN (1<<24)
163#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE (1<<23)
164#define EP93XX_SYSCON_DEVICE_CONFIG_U2EN (1<<20)
165#define EP93XX_SYSCON_DEVICE_CONFIG_U1EN (1<<18)
163#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) 166#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
164 167
165#define EP93XX_WATCHDOG_BASE (EP93XX_APB_VIRT_BASE + 0x00140000) 168#define EP93XX_WATCHDOG_BASE (EP93XX_APB_VIRT_BASE + 0x00140000)
diff --git a/arch/arm/mach-gemini/include/mach/hardware.h b/arch/arm/mach-gemini/include/mach/hardware.h
index de6752674c05..213a4fcfeb1c 100644
--- a/arch/arm/mach-gemini/include/mach/hardware.h
+++ b/arch/arm/mach-gemini/include/mach/hardware.h
@@ -15,10 +15,9 @@
15/* 15/*
16 * Memory Map definitions 16 * Memory Map definitions
17 */ 17 */
18/* FIXME: Does it really swap SRAM like this? */
19#ifdef CONFIG_GEMINI_MEM_SWAP 18#ifdef CONFIG_GEMINI_MEM_SWAP
20# define GEMINI_DRAM_BASE 0x00000000 19# define GEMINI_DRAM_BASE 0x00000000
21# define GEMINI_SRAM_BASE 0x20000000 20# define GEMINI_SRAM_BASE 0x70000000
22#else 21#else
23# define GEMINI_SRAM_BASE 0x00000000 22# define GEMINI_SRAM_BASE 0x00000000
24# define GEMINI_DRAM_BASE 0x10000000 23# define GEMINI_DRAM_BASE 0x10000000
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 6f8872913073..a0f60e55da6a 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -121,7 +121,7 @@ static struct clk uartclk = {
121 .rate = 14745600, 121 .rate = 14745600,
122}; 122};
123 123
124static struct clk_lookup lookups[] __initdata = { 124static struct clk_lookup lookups[] = {
125 { /* UART0 */ 125 { /* UART0 */
126 .dev_id = "mb:16", 126 .dev_id = "mb:16",
127 .clk = &uartclk, 127 .clk = &uartclk,
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_npe.c b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
index 252310234903..7bb8e778e4b6 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_npe.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
@@ -714,7 +714,7 @@ static int __init npe_init_module(void)
714 } 714 }
715 715
716 if (!found) 716 if (!found)
717 return -ENOSYS; 717 return -ENODEV;
718 return 0; 718 return 0;
719} 719}
720 720
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index eeb00240d784..be1ca28fed3f 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -144,6 +144,9 @@ static struct platform_device kirkwood_ge00 = {
144 .id = 0, 144 .id = 0,
145 .num_resources = 1, 145 .num_resources = 1,
146 .resource = kirkwood_ge00_resources, 146 .resource = kirkwood_ge00_resources,
147 .dev = {
148 .coherent_dma_mask = 0xffffffff,
149 },
147}; 150};
148 151
149void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data) 152void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
@@ -202,6 +205,9 @@ static struct platform_device kirkwood_ge01 = {
202 .id = 1, 205 .id = 1,
203 .num_resources = 1, 206 .num_resources = 1,
204 .resource = kirkwood_ge01_resources, 207 .resource = kirkwood_ge01_resources,
208 .dev = {
209 .coherent_dma_mask = 0xffffffff,
210 },
205}; 211};
206 212
207void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data) 213void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
@@ -386,12 +392,10 @@ static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
386 392
387static struct resource kirkwood_i2c_resources[] = { 393static struct resource kirkwood_i2c_resources[] = {
388 { 394 {
389 .name = "i2c",
390 .start = I2C_PHYS_BASE, 395 .start = I2C_PHYS_BASE,
391 .end = I2C_PHYS_BASE + 0x1f, 396 .end = I2C_PHYS_BASE + 0x1f,
392 .flags = IORESOURCE_MEM, 397 .flags = IORESOURCE_MEM,
393 }, { 398 }, {
394 .name = "i2c",
395 .start = IRQ_KIRKWOOD_TWSI, 399 .start = IRQ_KIRKWOOD_TWSI,
396 .end = IRQ_KIRKWOOD_TWSI, 400 .end = IRQ_KIRKWOOD_TWSI,
397 .flags = IORESOURCE_IRQ, 401 .flags = IORESOURCE_IRQ,
diff --git a/arch/arm/mach-kirkwood/ts219-setup.c b/arch/arm/mach-kirkwood/ts219-setup.c
index dda5743cf3e0..01aa213c0a6f 100644
--- a/arch/arm/mach-kirkwood/ts219-setup.c
+++ b/arch/arm/mach-kirkwood/ts219-setup.c
@@ -142,6 +142,8 @@ static unsigned int qnap_ts219_mpp_config[] __initdata = {
142 MPP1_SPI_MOSI, 142 MPP1_SPI_MOSI,
143 MPP2_SPI_SCK, 143 MPP2_SPI_SCK,
144 MPP3_SPI_MISO, 144 MPP3_SPI_MISO,
145 MPP4_SATA1_ACTn,
146 MPP5_SATA0_ACTn,
145 MPP8_TW_SDA, 147 MPP8_TW_SDA,
146 MPP9_TW_SCK, 148 MPP9_TW_SCK,
147 MPP10_UART0_TXD, 149 MPP10_UART0_TXD,
@@ -150,10 +152,6 @@ static unsigned int qnap_ts219_mpp_config[] __initdata = {
150 MPP14_UART1_RXD, /* PIC controller */ 152 MPP14_UART1_RXD, /* PIC controller */
151 MPP15_GPIO, /* USB Copy button */ 153 MPP15_GPIO, /* USB Copy button */
152 MPP16_GPIO, /* Reset button */ 154 MPP16_GPIO, /* Reset button */
153 MPP20_SATA1_ACTn,
154 MPP21_SATA0_ACTn,
155 MPP22_SATA1_PRESENTn,
156 MPP23_SATA0_PRESENTn,
157 0 155 0
158}; 156};
159 157
diff --git a/arch/arm/mach-l7200/include/mach/sys-clock.h b/arch/arm/mach-l7200/include/mach/sys-clock.h
index 2d7722be60ea..e9729a35751d 100644
--- a/arch/arm/mach-l7200/include/mach/sys-clock.h
+++ b/arch/arm/mach-l7200/include/mach/sys-clock.h
@@ -18,7 +18,7 @@
18 18
19/* IO_START and IO_BASE are defined in hardware.h */ 19/* IO_START and IO_BASE are defined in hardware.h */
20 20
21#define SYS_CLOCK_START (IO_START + SYS_CLCOK_OFF) /* Physical address */ 21#define SYS_CLOCK_START (IO_START + SYS_CLOCK_OFF) /* Physical address */
22#define SYS_CLOCK_BASE (IO_BASE + SYS_CLOCK_OFF) /* Virtual address */ 22#define SYS_CLOCK_BASE (IO_BASE + SYS_CLOCK_OFF) /* Virtual address */
23 23
24/* Define the interface to the SYS_CLOCK */ 24/* Define the interface to the SYS_CLOCK */
diff --git a/arch/arm/mach-loki/common.c b/arch/arm/mach-loki/common.c
index c0d2d9d12e74..818f19d7ab1f 100644
--- a/arch/arm/mach-loki/common.c
+++ b/arch/arm/mach-loki/common.c
@@ -82,6 +82,9 @@ static struct platform_device loki_ge0 = {
82 .id = 0, 82 .id = 0,
83 .num_resources = 1, 83 .num_resources = 1,
84 .resource = loki_ge0_resources, 84 .resource = loki_ge0_resources,
85 .dev = {
86 .coherent_dma_mask = 0xffffffff,
87 },
85}; 88};
86 89
87void __init loki_ge0_init(struct mv643xx_eth_platform_data *eth_data) 90void __init loki_ge0_init(struct mv643xx_eth_platform_data *eth_data)
@@ -136,6 +139,9 @@ static struct platform_device loki_ge1 = {
136 .id = 1, 139 .id = 1,
137 .num_resources = 1, 140 .num_resources = 1,
138 .resource = loki_ge1_resources, 141 .resource = loki_ge1_resources,
142 .dev = {
143 .coherent_dma_mask = 0xffffffff,
144 },
139}; 145};
140 146
141void __init loki_ge1_init(struct mv643xx_eth_platform_data *eth_data) 147void __init loki_ge1_init(struct mv643xx_eth_platform_data *eth_data)
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
index d0bdb6e3682b..2e914649b9e4 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
@@ -3,6 +3,11 @@
3 3
4#include <mach/mfp.h> 4#include <mach/mfp.h>
5 5
6#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
7#define MFP_DRIVE_SLOW (0x1 << 13)
8#define MFP_DRIVE_MEDIUM (0x2 << 13)
9#define MFP_DRIVE_FAST (0x3 << 13)
10
6/* GPIO */ 11/* GPIO */
7#define GPIO0_GPIO MFP_CFG(GPIO0, AF5) 12#define GPIO0_GPIO MFP_CFG(GPIO0, AF5)
8#define GPIO1_GPIO MFP_CFG(GPIO1, AF5) 13#define GPIO1_GPIO MFP_CFG(GPIO1, AF5)
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
index 48a1cbc7c56b..d97de36c50ad 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
@@ -3,6 +3,11 @@
3 3
4#include <mach/mfp.h> 4#include <mach/mfp.h>
5 5
6#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
7#define MFP_DRIVE_SLOW (0x2 << 13)
8#define MFP_DRIVE_MEDIUM (0x4 << 13)
9#define MFP_DRIVE_FAST (0x8 << 13)
10
6/* UART2 */ 11/* UART2 */
7#define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF6) 12#define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF6)
8#define GPIO48_UART2_TXD MFP_CFG(GPIO48, AF6) 13#define GPIO48_UART2_TXD MFP_CFG(GPIO48, AF6)
diff --git a/arch/arm/mach-mmp/include/mach/mfp.h b/arch/arm/mach-mmp/include/mach/mfp.h
index 277ea4cd0f9f..62e510e80a58 100644
--- a/arch/arm/mach-mmp/include/mach/mfp.h
+++ b/arch/arm/mach-mmp/include/mach/mfp.h
@@ -12,16 +12,13 @@
12 * possible, we make the following compromise: 12 * possible, we make the following compromise:
13 * 13 *
14 * 1. SLEEP_OE_N will always be programmed to '1' (by MFP_LPM_FLOAT) 14 * 1. SLEEP_OE_N will always be programmed to '1' (by MFP_LPM_FLOAT)
15 * 2. DRIVE strength definitions redefined to include the reserved bit10 15 * 2. DRIVE strength definitions redefined to include the reserved bit
16 * - the reserved bit differs between pxa168 and pxa910, and the
17 * MFP_DRIVE_* macros are individually defined in mfp-pxa{168,910}.h
16 * 3. Override MFP_CFG() and MFP_CFG_DRV() 18 * 3. Override MFP_CFG() and MFP_CFG_DRV()
17 * 4. Drop the use of MFP_CFG_LPM() and MFP_CFG_X() 19 * 4. Drop the use of MFP_CFG_LPM() and MFP_CFG_X()
18 */ 20 */
19 21
20#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
21#define MFP_DRIVE_SLOW (0x2 << 13)
22#define MFP_DRIVE_MEDIUM (0x4 << 13)
23#define MFP_DRIVE_FAST (0x8 << 13)
24
25#undef MFP_CFG 22#undef MFP_CFG
26#undef MFP_CFG_DRV 23#undef MFP_CFG_DRV
27#undef MFP_CFG_LPM 24#undef MFP_CFG_LPM
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index b03a6eda7419..a8400bb891e7 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -136,7 +136,7 @@ static struct clock_event_device ckevt = {
136 .set_mode = timer_set_mode, 136 .set_mode = timer_set_mode,
137}; 137};
138 138
139static cycle_t clksrc_read(void) 139static cycle_t clksrc_read(struct clocksource *cs)
140{ 140{
141 return timer_read(); 141 return timer_read();
142} 142}
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 9ba595083dab..1b22e4af8791 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -321,6 +321,9 @@ static struct platform_device mv78xx0_ge00 = {
321 .id = 0, 321 .id = 0,
322 .num_resources = 1, 322 .num_resources = 1,
323 .resource = mv78xx0_ge00_resources, 323 .resource = mv78xx0_ge00_resources,
324 .dev = {
325 .coherent_dma_mask = 0xffffffff,
326 },
324}; 327};
325 328
326void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data) 329void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
@@ -375,6 +378,9 @@ static struct platform_device mv78xx0_ge01 = {
375 .id = 1, 378 .id = 1,
376 .num_resources = 1, 379 .num_resources = 1,
377 .resource = mv78xx0_ge01_resources, 380 .resource = mv78xx0_ge01_resources,
381 .dev = {
382 .coherent_dma_mask = 0xffffffff,
383 },
378}; 384};
379 385
380void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data) 386void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)
@@ -429,6 +435,9 @@ static struct platform_device mv78xx0_ge10 = {
429 .id = 2, 435 .id = 2,
430 .num_resources = 1, 436 .num_resources = 1,
431 .resource = mv78xx0_ge10_resources, 437 .resource = mv78xx0_ge10_resources,
438 .dev = {
439 .coherent_dma_mask = 0xffffffff,
440 },
432}; 441};
433 442
434void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data) 443void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data)
@@ -496,6 +505,9 @@ static struct platform_device mv78xx0_ge11 = {
496 .id = 3, 505 .id = 3,
497 .num_resources = 1, 506 .num_resources = 1,
498 .resource = mv78xx0_ge11_resources, 507 .resource = mv78xx0_ge11_resources,
508 .dev = {
509 .coherent_dma_mask = 0xffffffff,
510 },
499}; 511};
500 512
501void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data) 513void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data)
@@ -532,12 +544,10 @@ static struct mv64xxx_i2c_pdata mv78xx0_i2c_0_pdata = {
532 544
533static struct resource mv78xx0_i2c_0_resources[] = { 545static struct resource mv78xx0_i2c_0_resources[] = {
534 { 546 {
535 .name = "i2c 0 base",
536 .start = I2C_0_PHYS_BASE, 547 .start = I2C_0_PHYS_BASE,
537 .end = I2C_0_PHYS_BASE + 0x1f, 548 .end = I2C_0_PHYS_BASE + 0x1f,
538 .flags = IORESOURCE_MEM, 549 .flags = IORESOURCE_MEM,
539 }, { 550 }, {
540 .name = "i2c 0 irq",
541 .start = IRQ_MV78XX0_I2C_0, 551 .start = IRQ_MV78XX0_I2C_0,
542 .end = IRQ_MV78XX0_I2C_0, 552 .end = IRQ_MV78XX0_I2C_0,
543 .flags = IORESOURCE_IRQ, 553 .flags = IORESOURCE_IRQ,
@@ -567,12 +577,10 @@ static struct mv64xxx_i2c_pdata mv78xx0_i2c_1_pdata = {
567 577
568static struct resource mv78xx0_i2c_1_resources[] = { 578static struct resource mv78xx0_i2c_1_resources[] = {
569 { 579 {
570 .name = "i2c 1 base",
571 .start = I2C_1_PHYS_BASE, 580 .start = I2C_1_PHYS_BASE,
572 .end = I2C_1_PHYS_BASE + 0x1f, 581 .end = I2C_1_PHYS_BASE + 0x1f,
573 .flags = IORESOURCE_MEM, 582 .flags = IORESOURCE_MEM,
574 }, { 583 }, {
575 .name = "i2c 1 irq",
576 .start = IRQ_MV78XX0_I2C_1, 584 .start = IRQ_MV78XX0_I2C_1,
577 .end = IRQ_MV78XX0_I2C_1, 585 .end = IRQ_MV78XX0_I2C_1,
578 .flags = IORESOURCE_IRQ, 586 .flags = IORESOURCE_IRQ,
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index efc59c49341b..e4cef333e291 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -103,10 +103,10 @@ static struct omap_clk omap24xx_clks[] = {
103 CLK(NULL, "mdm_ick", &mdm_ick, CK_243X), 103 CLK(NULL, "mdm_ick", &mdm_ick, CK_243X),
104 CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X), 104 CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X),
105 /* DSS domain clocks */ 105 /* DSS domain clocks */
106 CLK(NULL, "dss_ick", &dss_ick, CK_243X | CK_242X), 106 CLK("omapfb", "ick", &dss_ick, CK_243X | CK_242X),
107 CLK(NULL, "dss1_fck", &dss1_fck, CK_243X | CK_242X), 107 CLK("omapfb", "dss1_fck", &dss1_fck, CK_243X | CK_242X),
108 CLK(NULL, "dss2_fck", &dss2_fck, CK_243X | CK_242X), 108 CLK("omapfb", "dss2_fck", &dss2_fck, CK_243X | CK_242X),
109 CLK(NULL, "dss_54m_fck", &dss_54m_fck, CK_243X | CK_242X), 109 CLK("omapfb", "tv_fck", &dss_54m_fck, CK_243X | CK_242X),
110 /* L3 domain clocks */ 110 /* L3 domain clocks */
111 CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X | CK_242X), 111 CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X | CK_242X),
112 CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X | CK_242X), 112 CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X | CK_242X),
@@ -206,7 +206,7 @@ static struct omap_clk omap24xx_clks[] = {
206 CLK(NULL, "aes_ick", &aes_ick, CK_243X | CK_242X), 206 CLK(NULL, "aes_ick", &aes_ick, CK_243X | CK_242X),
207 CLK(NULL, "pka_ick", &pka_ick, CK_243X | CK_242X), 207 CLK(NULL, "pka_ick", &pka_ick, CK_243X | CK_242X),
208 CLK(NULL, "usb_fck", &usb_fck, CK_243X | CK_242X), 208 CLK(NULL, "usb_fck", &usb_fck, CK_243X | CK_242X),
209 CLK(NULL, "usbhs_ick", &usbhs_ick, CK_243X), 209 CLK("musb_hdrc", "ick", &usbhs_ick, CK_243X),
210 CLK("mmci-omap-hs.0", "ick", &mmchs1_ick, CK_243X), 210 CLK("mmci-omap-hs.0", "ick", &mmchs1_ick, CK_243X),
211 CLK("mmci-omap-hs.0", "fck", &mmchs1_fck, CK_243X), 211 CLK("mmci-omap-hs.0", "fck", &mmchs1_fck, CK_243X),
212 CLK("mmci-omap-hs.1", "ick", &mmchs2_ick, CK_243X), 212 CLK("mmci-omap-hs.1", "ick", &mmchs2_ick, CK_243X),
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 0a14dca31e30..ba05aa42bd8e 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -157,7 +157,7 @@ static struct omap_clk omap34xx_clks[] = {
157 CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck, CK_343X), 157 CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck, CK_343X),
158 CLK(NULL, "ssi_sst_fck", &ssi_sst_fck, CK_343X), 158 CLK(NULL, "ssi_sst_fck", &ssi_sst_fck, CK_343X),
159 CLK(NULL, "core_l3_ick", &core_l3_ick, CK_343X), 159 CLK(NULL, "core_l3_ick", &core_l3_ick, CK_343X),
160 CLK(NULL, "hsotgusb_ick", &hsotgusb_ick, CK_343X), 160 CLK("musb_hdrc", "ick", &hsotgusb_ick, CK_343X),
161 CLK(NULL, "sdrc_ick", &sdrc_ick, CK_343X), 161 CLK(NULL, "sdrc_ick", &sdrc_ick, CK_343X),
162 CLK(NULL, "gpmc_fck", &gpmc_fck, CK_343X), 162 CLK(NULL, "gpmc_fck", &gpmc_fck, CK_343X),
163 CLK(NULL, "security_l3_ick", &security_l3_ick, CK_343X), 163 CLK(NULL, "security_l3_ick", &security_l3_ick, CK_343X),
@@ -197,11 +197,11 @@ static struct omap_clk omap34xx_clks[] = {
197 CLK("omap_rng", "ick", &rng_ick, CK_343X), 197 CLK("omap_rng", "ick", &rng_ick, CK_343X),
198 CLK(NULL, "sha11_ick", &sha11_ick, CK_343X), 198 CLK(NULL, "sha11_ick", &sha11_ick, CK_343X),
199 CLK(NULL, "des1_ick", &des1_ick, CK_343X), 199 CLK(NULL, "des1_ick", &des1_ick, CK_343X),
200 CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck, CK_343X), 200 CLK("omapfb", "dss1_fck", &dss1_alwon_fck, CK_343X),
201 CLK(NULL, "dss_tv_fck", &dss_tv_fck, CK_343X), 201 CLK("omapfb", "tv_fck", &dss_tv_fck, CK_343X),
202 CLK(NULL, "dss_96m_fck", &dss_96m_fck, CK_343X), 202 CLK("omapfb", "video_fck", &dss_96m_fck, CK_343X),
203 CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck, CK_343X), 203 CLK("omapfb", "dss2_fck", &dss2_alwon_fck, CK_343X),
204 CLK(NULL, "dss_ick", &dss_ick, CK_343X), 204 CLK("omapfb", "ick", &dss_ick, CK_343X),
205 CLK(NULL, "cam_mclk", &cam_mclk, CK_343X), 205 CLK(NULL, "cam_mclk", &cam_mclk, CK_343X),
206 CLK(NULL, "cam_ick", &cam_ick, CK_343X), 206 CLK(NULL, "cam_ick", &cam_ick, CK_343X),
207 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_343X), 207 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_343X),
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 6763b8f73028..017a30e9aa1d 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -2182,7 +2182,7 @@ static struct clk wkup_32k_fck = {
2182 2182
2183static struct clk gpio1_dbck = { 2183static struct clk gpio1_dbck = {
2184 .name = "gpio1_dbck", 2184 .name = "gpio1_dbck",
2185 .ops = &clkops_omap2_dflt_wait, 2185 .ops = &clkops_omap2_dflt,
2186 .parent = &wkup_32k_fck, 2186 .parent = &wkup_32k_fck,
2187 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), 2187 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
2188 .enable_bit = OMAP3430_EN_GPIO1_SHIFT, 2188 .enable_bit = OMAP3430_EN_GPIO1_SHIFT,
@@ -2427,7 +2427,7 @@ static struct clk per_32k_alwon_fck = {
2427 2427
2428static struct clk gpio6_dbck = { 2428static struct clk gpio6_dbck = {
2429 .name = "gpio6_dbck", 2429 .name = "gpio6_dbck",
2430 .ops = &clkops_omap2_dflt_wait, 2430 .ops = &clkops_omap2_dflt,
2431 .parent = &per_32k_alwon_fck, 2431 .parent = &per_32k_alwon_fck,
2432 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2432 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2433 .enable_bit = OMAP3430_EN_GPIO6_SHIFT, 2433 .enable_bit = OMAP3430_EN_GPIO6_SHIFT,
@@ -2437,7 +2437,7 @@ static struct clk gpio6_dbck = {
2437 2437
2438static struct clk gpio5_dbck = { 2438static struct clk gpio5_dbck = {
2439 .name = "gpio5_dbck", 2439 .name = "gpio5_dbck",
2440 .ops = &clkops_omap2_dflt_wait, 2440 .ops = &clkops_omap2_dflt,
2441 .parent = &per_32k_alwon_fck, 2441 .parent = &per_32k_alwon_fck,
2442 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2442 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2443 .enable_bit = OMAP3430_EN_GPIO5_SHIFT, 2443 .enable_bit = OMAP3430_EN_GPIO5_SHIFT,
@@ -2447,7 +2447,7 @@ static struct clk gpio5_dbck = {
2447 2447
2448static struct clk gpio4_dbck = { 2448static struct clk gpio4_dbck = {
2449 .name = "gpio4_dbck", 2449 .name = "gpio4_dbck",
2450 .ops = &clkops_omap2_dflt_wait, 2450 .ops = &clkops_omap2_dflt,
2451 .parent = &per_32k_alwon_fck, 2451 .parent = &per_32k_alwon_fck,
2452 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2452 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2453 .enable_bit = OMAP3430_EN_GPIO4_SHIFT, 2453 .enable_bit = OMAP3430_EN_GPIO4_SHIFT,
@@ -2457,7 +2457,7 @@ static struct clk gpio4_dbck = {
2457 2457
2458static struct clk gpio3_dbck = { 2458static struct clk gpio3_dbck = {
2459 .name = "gpio3_dbck", 2459 .name = "gpio3_dbck",
2460 .ops = &clkops_omap2_dflt_wait, 2460 .ops = &clkops_omap2_dflt,
2461 .parent = &per_32k_alwon_fck, 2461 .parent = &per_32k_alwon_fck,
2462 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2462 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2463 .enable_bit = OMAP3430_EN_GPIO3_SHIFT, 2463 .enable_bit = OMAP3430_EN_GPIO3_SHIFT,
@@ -2467,7 +2467,7 @@ static struct clk gpio3_dbck = {
2467 2467
2468static struct clk gpio2_dbck = { 2468static struct clk gpio2_dbck = {
2469 .name = "gpio2_dbck", 2469 .name = "gpio2_dbck",
2470 .ops = &clkops_omap2_dflt_wait, 2470 .ops = &clkops_omap2_dflt,
2471 .parent = &per_32k_alwon_fck, 2471 .parent = &per_32k_alwon_fck,
2472 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2472 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2473 .enable_bit = OMAP3430_EN_GPIO2_SHIFT, 2473 .enable_bit = OMAP3430_EN_GPIO2_SHIFT,
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 496983ade97e..894cc355818a 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -354,10 +354,12 @@ static void omap_init_mcspi(void)
354 platform_device_register(&omap2_mcspi1); 354 platform_device_register(&omap2_mcspi1);
355 platform_device_register(&omap2_mcspi2); 355 platform_device_register(&omap2_mcspi2);
356#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) 356#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
357 platform_device_register(&omap2_mcspi3); 357 if (cpu_is_omap2430() || cpu_is_omap343x())
358 platform_device_register(&omap2_mcspi3);
358#endif 359#endif
359#ifdef CONFIG_ARCH_OMAP3 360#ifdef CONFIG_ARCH_OMAP3
360 platform_device_register(&omap2_mcspi4); 361 if (cpu_is_omap343x())
362 platform_device_register(&omap2_mcspi4);
361#endif 363#endif
362} 364}
363 365
diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
index c6a7940f4287..9fd03a2ec95c 100644
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
@@ -409,7 +409,7 @@
409/* PM_PREPWSTST_CAM specific bits */ 409/* PM_PREPWSTST_CAM specific bits */
410 410
411/* PM_PWSTCTRL_USBHOST specific bits */ 411/* PM_PWSTCTRL_USBHOST specific bits */
412#define OMAP3430ES2_SAVEANDRESTORE_SHIFT (1 << 4) 412#define OMAP3430ES2_SAVEANDRESTORE_SHIFT 4
413 413
414/* RM_RSTST_PER specific bits */ 414/* RM_RSTST_PER specific bits */
415 415
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c
index 8df55f40f4c0..8622c24cd270 100644
--- a/arch/arm/mach-omap2/usb-tusb6010.c
+++ b/arch/arm/mach-omap2/usb-tusb6010.c
@@ -187,7 +187,7 @@ int tusb6010_platform_retime(unsigned is_refclk)
187 unsigned sysclk_ps; 187 unsigned sysclk_ps;
188 int status; 188 int status;
189 189
190 if (!refclk_psec || sysclk_ps == 0) 190 if (!refclk_psec || fclk_ps == 0)
191 return -ENODEV; 191 return -ENODEV;
192 192
193 sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60; 193 sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60;
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 6af99ddabdfb..b1c7778d9f96 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -188,6 +188,9 @@ static struct platform_device orion5x_eth = {
188 .id = 0, 188 .id = 0,
189 .num_resources = 1, 189 .num_resources = 1,
190 .resource = orion5x_eth_resources, 190 .resource = orion5x_eth_resources,
191 .dev = {
192 .coherent_dma_mask = 0xffffffff,
193 },
191}; 194};
192 195
193void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data) 196void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
@@ -248,12 +251,10 @@ static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
248 251
249static struct resource orion5x_i2c_resources[] = { 252static struct resource orion5x_i2c_resources[] = {
250 { 253 {
251 .name = "i2c base",
252 .start = I2C_PHYS_BASE, 254 .start = I2C_PHYS_BASE,
253 .end = I2C_PHYS_BASE + 0x1f, 255 .end = I2C_PHYS_BASE + 0x1f,
254 .flags = IORESOURCE_MEM, 256 .flags = IORESOURCE_MEM,
255 }, { 257 }, {
256 .name = "i2c irq",
257 .start = IRQ_ORION5X_I2C, 258 .start = IRQ_ORION5X_I2C,
258 .end = IRQ_ORION5X_I2C, 259 .end = IRQ_ORION5X_I2C,
259 .flags = IORESOURCE_IRQ, 260 .flags = IORESOURCE_IRQ,
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index 92ba16e1b6fc..7db966dc29ce 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -111,9 +111,9 @@ static unsigned long ezx_pin_config[] __initdata = {
111 GPIO25_SSP1_TXD, 111 GPIO25_SSP1_TXD,
112 GPIO26_SSP1_RXD, 112 GPIO26_SSP1_RXD,
113 GPIO24_GPIO, /* pcap chip select */ 113 GPIO24_GPIO, /* pcap chip select */
114 GPIO1_GPIO, /* pcap interrupt */ 114 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* pcap interrupt */
115 GPIO4_GPIO, /* WDI_AP */ 115 GPIO4_GPIO | MFP_LPM_DRIVE_HIGH, /* WDI_AP */
116 GPIO55_GPIO, /* SYS_RESTART */ 116 GPIO55_GPIO | MFP_LPM_DRIVE_HIGH, /* SYS_RESTART */
117 117
118 /* MMC */ 118 /* MMC */
119 GPIO32_MMC_CLK, 119 GPIO32_MMC_CLK,
@@ -144,20 +144,20 @@ static unsigned long ezx_pin_config[] __initdata = {
144#if defined(CONFIG_MACH_EZX_A780) || defined(CONFIG_MACH_EZX_E680) 144#if defined(CONFIG_MACH_EZX_A780) || defined(CONFIG_MACH_EZX_E680)
145static unsigned long gen1_pin_config[] __initdata = { 145static unsigned long gen1_pin_config[] __initdata = {
146 /* flip / lockswitch */ 146 /* flip / lockswitch */
147 GPIO12_GPIO, 147 GPIO12_GPIO | WAKEUP_ON_EDGE_BOTH,
148 148
149 /* bluetooth (bcm2035) */ 149 /* bluetooth (bcm2035) */
150 GPIO14_GPIO | WAKEUP_ON_LEVEL_HIGH, /* HOSTWAKE */ 150 GPIO14_GPIO | WAKEUP_ON_EDGE_RISE, /* HOSTWAKE */
151 GPIO48_GPIO, /* RESET */ 151 GPIO48_GPIO, /* RESET */
152 GPIO28_GPIO, /* WAKEUP */ 152 GPIO28_GPIO, /* WAKEUP */
153 153
154 /* Neptune handshake */ 154 /* Neptune handshake */
155 GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* BP_RDY */ 155 GPIO0_GPIO | WAKEUP_ON_EDGE_FALL, /* BP_RDY */
156 GPIO57_GPIO, /* AP_RDY */ 156 GPIO57_GPIO | MFP_LPM_DRIVE_HIGH, /* AP_RDY */
157 GPIO13_GPIO | WAKEUP_ON_LEVEL_HIGH, /* WDI */ 157 GPIO13_GPIO | WAKEUP_ON_EDGE_BOTH, /* WDI */
158 GPIO3_GPIO | WAKEUP_ON_LEVEL_HIGH, /* WDI2 */ 158 GPIO3_GPIO | WAKEUP_ON_EDGE_BOTH, /* WDI2 */
159 GPIO82_GPIO, /* RESET */ 159 GPIO82_GPIO | MFP_LPM_DRIVE_HIGH, /* RESET */
160 GPIO99_GPIO, /* TC_MM_EN */ 160 GPIO99_GPIO | MFP_LPM_DRIVE_HIGH, /* TC_MM_EN */
161 161
162 /* sound */ 162 /* sound */
163 GPIO52_SSP3_SCLK, 163 GPIO52_SSP3_SCLK,
@@ -199,21 +199,21 @@ static unsigned long gen1_pin_config[] __initdata = {
199 defined(CONFIG_MACH_EZX_E2) || defined(CONFIG_MACH_EZX_E6) 199 defined(CONFIG_MACH_EZX_E2) || defined(CONFIG_MACH_EZX_E6)
200static unsigned long gen2_pin_config[] __initdata = { 200static unsigned long gen2_pin_config[] __initdata = {
201 /* flip / lockswitch */ 201 /* flip / lockswitch */
202 GPIO15_GPIO, 202 GPIO15_GPIO | WAKEUP_ON_EDGE_BOTH,
203 203
204 /* EOC */ 204 /* EOC */
205 GPIO10_GPIO, 205 GPIO10_GPIO | WAKEUP_ON_EDGE_RISE,
206 206
207 /* bluetooth (bcm2045) */ 207 /* bluetooth (bcm2045) */
208 GPIO13_GPIO | WAKEUP_ON_LEVEL_HIGH, /* HOSTWAKE */ 208 GPIO13_GPIO | WAKEUP_ON_EDGE_RISE, /* HOSTWAKE */
209 GPIO37_GPIO, /* RESET */ 209 GPIO37_GPIO, /* RESET */
210 GPIO57_GPIO, /* WAKEUP */ 210 GPIO57_GPIO, /* WAKEUP */
211 211
212 /* Neptune handshake */ 212 /* Neptune handshake */
213 GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* BP_RDY */ 213 GPIO0_GPIO | WAKEUP_ON_EDGE_FALL, /* BP_RDY */
214 GPIO96_GPIO, /* AP_RDY */ 214 GPIO96_GPIO | MFP_LPM_DRIVE_HIGH, /* AP_RDY */
215 GPIO3_GPIO | WAKEUP_ON_LEVEL_HIGH, /* WDI */ 215 GPIO3_GPIO | WAKEUP_ON_EDGE_FALL, /* WDI */
216 GPIO116_GPIO, /* RESET */ 216 GPIO116_GPIO | MFP_LPM_DRIVE_HIGH, /* RESET */
217 GPIO41_GPIO, /* BP_FLASH */ 217 GPIO41_GPIO, /* BP_FLASH */
218 218
219 /* sound */ 219 /* sound */
diff --git a/arch/arm/mach-pxa/include/mach/reset.h b/arch/arm/mach-pxa/include/mach/reset.h
index 31e6a7b6ad80..b6c10556fbc7 100644
--- a/arch/arm/mach-pxa/include/mach/reset.h
+++ b/arch/arm/mach-pxa/include/mach/reset.h
@@ -13,8 +13,9 @@ extern void clear_reset_status(unsigned int mask);
13/** 13/**
14 * init_gpio_reset() - register GPIO as reset generator 14 * init_gpio_reset() - register GPIO as reset generator
15 * @gpio: gpio nr 15 * @gpio: gpio nr
16 * @output: set gpio as out/low instead of input during normal work 16 * @output: set gpio as output instead of input during normal work
17 * @level: output level
17 */ 18 */
18extern int init_gpio_reset(int gpio, int output); 19extern int init_gpio_reset(int gpio, int output, int level);
19 20
20#endif /* __ASM_ARCH_RESET_H */ 21#endif /* __ASM_ARCH_RESET_H */
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 7ffb91d64c39..cf6b720c055f 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -322,6 +322,7 @@ static inline void pxa27x_mfp_init(void) {}
322#ifdef CONFIG_PM 322#ifdef CONFIG_PM
323static unsigned long saved_gafr[2][4]; 323static unsigned long saved_gafr[2][4];
324static unsigned long saved_gpdr[4]; 324static unsigned long saved_gpdr[4];
325static unsigned long saved_pgsr[4];
325 326
326static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state) 327static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
327{ 328{
@@ -332,6 +333,7 @@ static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
332 saved_gafr[0][i] = GAFR_L(i); 333 saved_gafr[0][i] = GAFR_L(i);
333 saved_gafr[1][i] = GAFR_U(i); 334 saved_gafr[1][i] = GAFR_U(i);
334 saved_gpdr[i] = GPDR(i * 32); 335 saved_gpdr[i] = GPDR(i * 32);
336 saved_pgsr[i] = PGSR(i);
335 337
336 GPDR(i * 32) = gpdr_lpm[i]; 338 GPDR(i * 32) = gpdr_lpm[i];
337 } 339 }
@@ -346,6 +348,7 @@ static int pxa2xx_mfp_resume(struct sys_device *d)
346 GAFR_L(i) = saved_gafr[0][i]; 348 GAFR_L(i) = saved_gafr[0][i];
347 GAFR_U(i) = saved_gafr[1][i]; 349 GAFR_U(i) = saved_gafr[1][i];
348 GPDR(i * 32) = saved_gpdr[i]; 350 GPDR(i * 32) = saved_gpdr[i];
351 PGSR(i) = saved_pgsr[i];
349 } 352 }
350 PSSR = PSSR_RDH | PSSR_PH; 353 PSSR = PSSR_RDH | PSSR_PH;
351 return 0; 354 return 0;
@@ -374,6 +377,9 @@ static int __init pxa2xx_mfp_init(void)
374 if (cpu_is_pxa27x()) 377 if (cpu_is_pxa27x())
375 pxa27x_mfp_init(); 378 pxa27x_mfp_init();
376 379
380 /* clear RDH bit to enable GPIO receivers after reset/sleep exit */
381 PSSR = PSSR_RDH;
382
377 /* initialize gafr_run[], pgsr_lpm[] from existing values */ 383 /* initialize gafr_run[], pgsr_lpm[] from existing values */
378 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) 384 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
379 gpdr_lpm[i] = GPDR(i * 32); 385 gpdr_lpm[i] = GPDR(i * 32);
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index 1cec1806f002..471a853e548b 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -62,6 +62,8 @@ static unsigned long palmld_pin_config[] __initdata = {
62 GPIO29_AC97_SDATA_IN_0, 62 GPIO29_AC97_SDATA_IN_0,
63 GPIO30_AC97_SDATA_OUT, 63 GPIO30_AC97_SDATA_OUT,
64 GPIO31_AC97_SYNC, 64 GPIO31_AC97_SYNC,
65 GPIO89_AC97_SYSCLK,
66 GPIO95_AC97_nRESET,
65 67
66 /* IrDA */ 68 /* IrDA */
67 GPIO108_GPIO, /* ir disable */ 69 GPIO108_GPIO, /* ir disable */
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 30662363907b..05bf979b78a6 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -64,6 +64,7 @@ static unsigned long palmt5_pin_config[] __initdata = {
64 GPIO29_AC97_SDATA_IN_0, 64 GPIO29_AC97_SDATA_IN_0,
65 GPIO30_AC97_SDATA_OUT, 65 GPIO30_AC97_SDATA_OUT,
66 GPIO31_AC97_SYNC, 66 GPIO31_AC97_SYNC,
67 GPIO89_AC97_SYSCLK,
67 GPIO95_AC97_nRESET, 68 GPIO95_AC97_nRESET,
68 69
69 /* IrDA */ 70 /* IrDA */
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index e2d44b1a8a9b..e99a893c58a7 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -65,6 +65,7 @@ static unsigned long palmtx_pin_config[] __initdata = {
65 GPIO29_AC97_SDATA_IN_0, 65 GPIO29_AC97_SDATA_IN_0,
66 GPIO30_AC97_SDATA_OUT, 66 GPIO30_AC97_SDATA_OUT,
67 GPIO31_AC97_SYNC, 67 GPIO31_AC97_SYNC,
68 GPIO89_AC97_SYSCLK,
68 GPIO95_AC97_nRESET, 69 GPIO95_AC97_nRESET,
69 70
70 /* IrDA */ 71 /* IrDA */
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index df29d45fb4e7..01e9d643394a 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -20,7 +20,7 @@ static void do_hw_reset(void);
20 20
21static int reset_gpio = -1; 21static int reset_gpio = -1;
22 22
23int init_gpio_reset(int gpio, int output) 23int init_gpio_reset(int gpio, int output, int level)
24{ 24{
25 int rc; 25 int rc;
26 26
@@ -31,7 +31,7 @@ int init_gpio_reset(int gpio, int output)
31 } 31 }
32 32
33 if (output) 33 if (output)
34 rc = gpio_direction_output(gpio, 0); 34 rc = gpio_direction_output(gpio, level);
35 else 35 else
36 rc = gpio_direction_input(gpio); 36 rc = gpio_direction_input(gpio);
37 if (rc) { 37 if (rc) {
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index c18e34acafcb..5a45fe340a10 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -531,9 +531,15 @@ static int spitz_ohci_init(struct device *dev)
531 return gpio_direction_output(SPITZ_GPIO_USB_HOST, 1); 531 return gpio_direction_output(SPITZ_GPIO_USB_HOST, 1);
532} 532}
533 533
534static void spitz_ohci_exit(struct device *dev)
535{
536 gpio_free(SPITZ_GPIO_USB_HOST);
537}
538
534static struct pxaohci_platform_data spitz_ohci_platform_data = { 539static struct pxaohci_platform_data spitz_ohci_platform_data = {
535 .port_mode = PMM_NPS_MODE, 540 .port_mode = PMM_NPS_MODE,
536 .init = spitz_ohci_init, 541 .init = spitz_ohci_init,
542 .exit = spitz_ohci_exit,
537 .flags = ENABLE_PORT_ALL | NO_OC_PROTECTION, 543 .flags = ENABLE_PORT_ALL | NO_OC_PROTECTION,
538 .power_budget = 150, 544 .power_budget = 150,
539}; 545};
@@ -731,7 +737,7 @@ static void spitz_restart(char mode, const char *cmd)
731 737
732static void __init common_init(void) 738static void __init common_init(void)
733{ 739{
734 init_gpio_reset(SPITZ_GPIO_ON_RESET, 1); 740 init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0);
735 pm_power_off = spitz_poweroff; 741 pm_power_off = spitz_poweroff;
736 arm_pm_restart = spitz_restart; 742 arm_pm_restart = spitz_restart;
737 743
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index afac5b6d3d78..a0bd46ef5d30 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -897,7 +897,7 @@ static void __init tosa_init(void)
897 gpio_set_wake(MFP_PIN_GPIO1, 1); 897 gpio_set_wake(MFP_PIN_GPIO1, 1);
898 /* We can't pass to gpio-keys since it will drop the Reset altfunc */ 898 /* We can't pass to gpio-keys since it will drop the Reset altfunc */
899 899
900 init_gpio_reset(TOSA_GPIO_ON_RESET, 0); 900 init_gpio_reset(TOSA_GPIO_ON_RESET, 0, 0);
901 901
902 pm_power_off = tosa_poweroff; 902 pm_power_off = tosa_poweroff;
903 arm_pm_restart = tosa_restart; 903 arm_pm_restart = tosa_restart;
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 0e65344e9f53..dd031cc41847 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -46,6 +46,7 @@
46#include <mach/audio.h> 46#include <mach/audio.h>
47#include <mach/pxafb.h> 47#include <mach/pxafb.h>
48#include <mach/i2c.h> 48#include <mach/i2c.h>
49#include <mach/regs-uart.h>
49#include <mach/viper.h> 50#include <mach/viper.h>
50 51
51#include <asm/setup.h> 52#include <asm/setup.h>
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 942e1a7eb9b2..076acbc50706 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -750,14 +750,6 @@ void __init realview_timer_init(unsigned int timer_irq)
750{ 750{
751 u32 val; 751 u32 val;
752 752
753#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
754 /*
755 * The dummy clock device has to be registered before the main device
756 * so that the latter will broadcast the clock events
757 */
758 local_timer_setup();
759#endif
760
761 /* 753 /*
762 * set clock frequency: 754 * set clock frequency:
763 * REALVIEW_REFCLK is 32KHz 755 * REALVIEW_REFCLK is 32KHz
diff --git a/arch/arm/mach-realview/include/mach/smp.h b/arch/arm/mach-realview/include/mach/smp.h
index 515819efd046..dd53892d44a7 100644
--- a/arch/arm/mach-realview/include/mach/smp.h
+++ b/arch/arm/mach-realview/include/mach/smp.h
@@ -15,16 +15,9 @@
15/* 15/*
16 * We use IRQ1 as the IPI 16 * We use IRQ1 as the IPI
17 */ 17 */
18static inline void smp_cross_call(cpumask_t callmap) 18static inline void smp_cross_call(const struct cpumask *mask)
19{
20 gic_raise_softirq(callmap, 1);
21}
22
23/*
24 * Do nothing on MPcore.
25 */
26static inline void smp_cross_call_done(cpumask_t callmap)
27{ 19{
20 gic_raise_softirq(mask, 1);
28} 21}
29 22
30#endif 23#endif
diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c
index d0d39adf6407..1c01d13460f0 100644
--- a/arch/arm/mach-realview/localtimer.c
+++ b/arch/arm/mach-realview/localtimer.c
@@ -189,8 +189,10 @@ void __cpuinit local_timer_setup(void)
189 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu); 189 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
190 190
191 clk->name = "dummy_timer"; 191 clk->name = "dummy_timer";
192 clk->features = CLOCK_EVT_FEAT_DUMMY; 192 clk->features = CLOCK_EVT_FEAT_ONESHOT |
193 clk->rating = 200; 193 CLOCK_EVT_FEAT_PERIODIC |
194 CLOCK_EVT_FEAT_DUMMY;
195 clk->rating = 400;
194 clk->mult = 1; 196 clk->mult = 1;
195 clk->set_mode = dummy_timer_set_mode; 197 clk->set_mode = dummy_timer_set_mode;
196 clk->broadcast = smp_timer_broadcast; 198 clk->broadcast = smp_timer_broadcast;
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index ea3c75595fa9..30a9c68591f6 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -78,13 +78,6 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
78 trace_hardirqs_off(); 78 trace_hardirqs_off();
79 79
80 /* 80 /*
81 * the primary core may have used a "cross call" soft interrupt
82 * to get this processor out of WFI in the BootMonitor - make
83 * sure that we are no longer being sent this soft interrupt
84 */
85 smp_cross_call_done(cpumask_of_cpu(cpu));
86
87 /*
88 * if any interrupts are already enabled for the primary 81 * if any interrupts are already enabled for the primary
89 * core (e.g. timer irq), then they will not have been enabled 82 * core (e.g. timer irq), then they will not have been enabled
90 * for us: do so 83 * for us: do so
@@ -136,7 +129,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
136 * Use smp_cross_call() for this, since there's little 129 * Use smp_cross_call() for this, since there's little
137 * point duplicating the code here 130 * point duplicating the code here
138 */ 131 */
139 smp_cross_call(cpumask_of_cpu(cpu)); 132 smp_cross_call(cpumask_of(cpu));
140 133
141 timeout = jiffies + (1 * HZ); 134 timeout = jiffies + (1 * HZ);
142 while (time_before(jiffies, timeout)) { 135 while (time_before(jiffies, timeout)) {
@@ -224,11 +217,9 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
224 if (max_cpus > ncores) 217 if (max_cpus > ncores)
225 max_cpus = ncores; 218 max_cpus = ncores;
226 219
227#ifdef CONFIG_LOCAL_TIMERS 220#if defined(CONFIG_LOCAL_TIMERS) || defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
228 /* 221 /*
229 * Enable the local timer for primary CPU. If the device is 222 * Enable the local timer or broadcast device for the boot CPU.
230 * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
231 * realview_timer_init
232 */ 223 */
233 local_timer_setup(); 224 local_timer_setup();
234#endif 225#endif
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 4389c160f7d0..8637dea5e150 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -588,8 +588,6 @@ static void __init bast_map_io(void)
588 588
589 s3c_device_nand.dev.platform_data = &bast_nand_info; 589 s3c_device_nand.dev.platform_data = &bast_nand_info;
590 590
591 s3c_i2c0_set_platdata(&bast_i2c_info);
592
593 s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); 591 s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));
594 s3c24xx_init_clocks(0); 592 s3c24xx_init_clocks(0);
595 s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs)); 593 s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs));
@@ -602,6 +600,7 @@ static void __init bast_init(void)
602 sysdev_class_register(&bast_pm_sysclass); 600 sysdev_class_register(&bast_pm_sysclass);
603 sysdev_register(&bast_pm_sysdev); 601 sysdev_register(&bast_pm_sysdev);
604 602
603 s3c_i2c0_set_platdata(&bast_i2c_info);
605 s3c24xx_fb_set_platdata(&bast_fb_info); 604 s3c24xx_fb_set_platdata(&bast_fb_info);
606 platform_add_devices(bast_devices, ARRAY_SIZE(bast_devices)); 605 platform_add_devices(bast_devices, ARRAY_SIZE(bast_devices));
607 606
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 1f929c391af7..b3bebcc5623b 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -413,7 +413,7 @@ static struct clk ref24_clk = {
413 .rate = 24000000, 413 .rate = 24000000,
414}; 414};
415 415
416static struct clk_lookup lookups[] __initdata = { 416static struct clk_lookup lookups[] = {
417 { /* UART0 */ 417 { /* UART0 */
418 .dev_id = "dev:f1", 418 .dev_id = "dev:f1",
419 .clk = &ref24_clk, 419 .clk = &ref24_clk,
diff --git a/arch/arm/nwfpe/fpa11.h b/arch/arm/nwfpe/fpa11.h
index 386cbd13eaf4..d3a6f9298e9e 100644
--- a/arch/arm/nwfpe/fpa11.h
+++ b/arch/arm/nwfpe/fpa11.h
@@ -114,4 +114,8 @@ extern unsigned int SingleCPDO(struct roundingData *roundData,
114extern unsigned int DoubleCPDO(struct roundingData *roundData, 114extern unsigned int DoubleCPDO(struct roundingData *roundData,
115 const unsigned int opcode, FPREG * rFd); 115 const unsigned int opcode, FPREG * rFd);
116 116
117/* extneded_cpdo.c */
118extern unsigned int ExtendedCPDO(struct roundingData *roundData,
119 const unsigned int opcode, FPREG * rFd);
120
117#endif 121#endif
diff --git a/arch/arm/nwfpe/fpa11_cprt.c b/arch/arm/nwfpe/fpa11_cprt.c
index 9843dc533047..31c4eeec18b0 100644
--- a/arch/arm/nwfpe/fpa11_cprt.c
+++ b/arch/arm/nwfpe/fpa11_cprt.c
@@ -27,10 +27,6 @@
27#include "fpmodule.inl" 27#include "fpmodule.inl"
28#include "softfloat.h" 28#include "softfloat.h"
29 29
30#ifdef CONFIG_FPE_NWFPE_XP
31extern flag floatx80_is_nan(floatx80);
32#endif
33
34unsigned int PerformFLT(const unsigned int opcode); 30unsigned int PerformFLT(const unsigned int opcode);
35unsigned int PerformFIX(const unsigned int opcode); 31unsigned int PerformFIX(const unsigned int opcode);
36 32
diff --git a/arch/arm/nwfpe/softfloat.h b/arch/arm/nwfpe/softfloat.h
index 260fe29d73f5..13e479c5da57 100644
--- a/arch/arm/nwfpe/softfloat.h
+++ b/arch/arm/nwfpe/softfloat.h
@@ -226,6 +226,8 @@ char floatx80_le_quiet( floatx80, floatx80 );
226char floatx80_lt_quiet( floatx80, floatx80 ); 226char floatx80_lt_quiet( floatx80, floatx80 );
227char floatx80_is_signaling_nan( floatx80 ); 227char floatx80_is_signaling_nan( floatx80 );
228 228
229extern flag floatx80_is_nan(floatx80);
230
229#endif 231#endif
230 232
231static inline flag extractFloat32Sign(float32 a) 233static inline flag extractFloat32Sign(float32 a)
diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c
index ce6b4baeedec..3746222bed10 100644
--- a/arch/arm/plat-omap/fb.c
+++ b/arch/arm/plat-omap/fb.c
@@ -206,9 +206,10 @@ void __init omapfb_reserve_sdram(void)
206 config_invalid = 1; 206 config_invalid = 1;
207 return; 207 return;
208 } 208 }
209 if (rg.paddr) 209 if (rg.paddr) {
210 reserve_bootmem(rg.paddr, rg.size, BOOTMEM_DEFAULT); 210 reserve_bootmem(rg.paddr, rg.size, BOOTMEM_DEFAULT);
211 reserved += rg.size; 211 reserved += rg.size;
212 }
212 omapfb_config.mem_desc.region[i] = rg; 213 omapfb_config.mem_desc.region[i] = rg;
213 configured_regions++; 214 configured_regions++;
214 } 215 }
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 17d7afe42b83..ee0b21f5b094 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -307,7 +307,7 @@ static inline int gpio_valid(int gpio)
307 return 0; 307 return 0;
308 if (cpu_is_omap24xx() && gpio < 128) 308 if (cpu_is_omap24xx() && gpio < 128)
309 return 0; 309 return 0;
310 if (cpu_is_omap34xx() && gpio < 160) 310 if (cpu_is_omap34xx() && gpio < 192)
311 return 0; 311 return 0;
312 return -1; 312 return -1;
313} 313}
diff --git a/arch/arm/plat-s3c/clock.c b/arch/arm/plat-s3c/clock.c
index b6be76e2fe51..4d01ef1a25dd 100644
--- a/arch/arm/plat-s3c/clock.c
+++ b/arch/arm/plat-s3c/clock.c
@@ -306,8 +306,6 @@ struct clk s3c24xx_uclk = {
306 306
307int s3c24xx_register_clock(struct clk *clk) 307int s3c24xx_register_clock(struct clk *clk)
308{ 308{
309 clk->owner = THIS_MODULE;
310
311 if (clk->enable == NULL) 309 if (clk->enable == NULL)
312 clk->enable = clk_null_enable; 310 clk->enable = clk_null_enable;
313 311
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index aee2aeb46c60..07326f632361 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -1235,7 +1235,7 @@ int s3c2410_dma_getposition(unsigned int channel, dma_addr_t *src, dma_addr_t *d
1235 1235
1236EXPORT_SYMBOL(s3c2410_dma_getposition); 1236EXPORT_SYMBOL(s3c2410_dma_getposition);
1237 1237
1238static struct s3c2410_dma_chan *to_dma_chan(struct sys_device *dev) 1238static inline struct s3c2410_dma_chan *to_dma_chan(struct sys_device *dev)
1239{ 1239{
1240 return container_of(dev, struct s3c2410_dma_chan, dev); 1240 return container_of(dev, struct s3c2410_dma_chan, dev);
1241} 1241}
diff --git a/arch/arm/plat-s3c64xx/gpiolib.c b/arch/arm/plat-s3c64xx/gpiolib.c
index ee9188add8fb..78ee52cffc9e 100644
--- a/arch/arm/plat-s3c64xx/gpiolib.c
+++ b/arch/arm/plat-s3c64xx/gpiolib.c
@@ -57,7 +57,7 @@
57#if 1 57#if 1
58#define gpio_dbg(x...) do { } while(0) 58#define gpio_dbg(x...) do { } while(0)
59#else 59#else
60#define gpio_dbg(x...) printk(KERN_DEBUG ## x) 60#define gpio_dbg(x...) printk(KERN_DEBUG x)
61#endif 61#endif
62 62
63/* The s3c64xx_gpiolib_4bit routines are to control the gpio banks where 63/* The s3c64xx_gpiolib_4bit routines are to control the gpio banks where
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
index 81549516572f..2ba1767512d7 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
@@ -61,14 +61,14 @@
61#define S3C64XX_GPH7_ADDR_CF1 (0x06 << 28) 61#define S3C64XX_GPH7_ADDR_CF1 (0x06 << 28)
62#define S3C64XX_GPH7_EINT_G6_7 (0x07 << 28) 62#define S3C64XX_GPH7_EINT_G6_7 (0x07 << 28)
63 63
64#define S3C64XX_GPH8_MMC1_DATA6 (0x02 << 32) 64#define S3C64XX_GPH8_MMC1_DATA6 (0x02 << 0)
65#define S3C64XX_GPH8_MMC2_DATA2 (0x03 << 32) 65#define S3C64XX_GPH8_MMC2_DATA2 (0x03 << 0)
66#define S3C64XX_GPH8_I2S_V40_LRCLK (0x05 << 32) 66#define S3C64XX_GPH8_I2S_V40_LRCLK (0x05 << 0)
67#define S3C64XX_GPH8_ADDR_CF2 (0x06 << 32) 67#define S3C64XX_GPH8_ADDR_CF2 (0x06 << 0)
68#define S3C64XX_GPH8_EINT_G6_8 (0x07 << 32) 68#define S3C64XX_GPH8_EINT_G6_8 (0x07 << 0)
69
70#define S3C64XX_GPH9_MMC1_DATA7 (0x02 << 36)
71#define S3C64XX_GPH9_MMC2_DATA3 (0x03 << 36)
72#define S3C64XX_GPH9_I2S_V40_DI (0x05 << 36)
73#define S3C64XX_GPH9_EINT_G6_9 (0x07 << 36)
74 69
70#define S3C64XX_GPH9_OUTPUT (0x01 << 4)
71#define S3C64XX_GPH9_MMC1_DATA7 (0x02 << 4)
72#define S3C64XX_GPH9_MMC2_DATA3 (0x03 << 4)
73#define S3C64XX_GPH9_I2S_V40_DI (0x05 << 4)
74#define S3C64XX_GPH9_EINT_G6_9 (0x07 << 4)
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 945e0d237a1d..fec64678a63a 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Mon Mar 23 20:09:01 2009 15# Last update: Fri May 29 10:14:20 2009
16# 16#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 18#
@@ -916,7 +916,7 @@ nxdb500 MACH_NXDB500 NXDB500 905
916apf9328 MACH_APF9328 APF9328 906 916apf9328 MACH_APF9328 APF9328 906
917omap_wipoq MACH_OMAP_WIPOQ OMAP_WIPOQ 907 917omap_wipoq MACH_OMAP_WIPOQ OMAP_WIPOQ 907
918omap_twip MACH_OMAP_TWIP OMAP_TWIP 908 918omap_twip MACH_OMAP_TWIP OMAP_TWIP 908
919palmt650 MACH_PALMT650 PALMT650 909 919treo650 MACH_TREO650 TREO650 909
920acumen MACH_ACUMEN ACUMEN 910 920acumen MACH_ACUMEN ACUMEN 910
921xp100 MACH_XP100 XP100 911 921xp100 MACH_XP100 XP100 911
922fs2410 MACH_FS2410 FS2410 912 922fs2410 MACH_FS2410 FS2410 912
@@ -1232,7 +1232,7 @@ ql202b MACH_QL202B QL202B 1226
1232vpac270 MACH_VPAC270 VPAC270 1227 1232vpac270 MACH_VPAC270 VPAC270 1227
1233rd129 MACH_RD129 RD129 1228 1233rd129 MACH_RD129 RD129 1228
1234htcwizard MACH_HTCWIZARD HTCWIZARD 1229 1234htcwizard MACH_HTCWIZARD HTCWIZARD 1229
1235xscale_treo680 MACH_XSCALE_TREO680 XSCALE_TREO680 1230 1235treo680 MACH_TREO680 TREO680 1230
1236tecon_tmezon MACH_TECON_TMEZON TECON_TMEZON 1231 1236tecon_tmezon MACH_TECON_TMEZON TECON_TMEZON 1231
1237zylonite MACH_ZYLONITE ZYLONITE 1233 1237zylonite MACH_ZYLONITE ZYLONITE 1233
1238gene1270 MACH_GENE1270 GENE1270 1234 1238gene1270 MACH_GENE1270 GENE1270 1234
@@ -1418,10 +1418,10 @@ looxc550 MACH_LOOXC550 LOOXC550 1417
1418cnty_titan MACH_CNTY_TITAN CNTY_TITAN 1418 1418cnty_titan MACH_CNTY_TITAN CNTY_TITAN 1418
1419app3xx MACH_APP3XX APP3XX 1419 1419app3xx MACH_APP3XX APP3XX 1419
1420sideoatsgrama MACH_SIDEOATSGRAMA SIDEOATSGRAMA 1420 1420sideoatsgrama MACH_SIDEOATSGRAMA SIDEOATSGRAMA 1420
1421palmtreo700p MACH_PALMTREO700P PALMTREO700P 1421 1421treo700p MACH_TREO700P TREO700P 1421
1422palmtreo700w MACH_PALMTREO700W PALMTREO700W 1422 1422treo700w MACH_TREO700W TREO700W 1422
1423palmtreo750 MACH_PALMTREO750 PALMTREO750 1423 1423treo750 MACH_TREO750 TREO750 1423
1424palmtreo755p MACH_PALMTREO755P PALMTREO755P 1424 1424treo755p MACH_TREO755P TREO755P 1424
1425ezreganut9200 MACH_EZREGANUT9200 EZREGANUT9200 1425 1425ezreganut9200 MACH_EZREGANUT9200 EZREGANUT9200 1425
1426sarge MACH_SARGE SARGE 1426 1426sarge MACH_SARGE SARGE 1426
1427a696 MACH_A696 A696 1427 1427a696 MACH_A696 A696 1427
@@ -1721,7 +1721,7 @@ sapphire MACH_SAPPHIRE SAPPHIRE 1729
1721csb637xo MACH_CSB637XO CSB637XO 1730 1721csb637xo MACH_CSB637XO CSB637XO 1730
1722evisiong MACH_EVISIONG EVISIONG 1731 1722evisiong MACH_EVISIONG EVISIONG 1731
1723stmp37xx MACH_STMP37XX STMP37XX 1732 1723stmp37xx MACH_STMP37XX STMP37XX 1732
1724stmp378x MACH_STMP38XX STMP38XX 1733 1724stmp378x MACH_STMP378X STMP378X 1733
1725tnt MACH_TNT TNT 1734 1725tnt MACH_TNT TNT 1734
1726tbxt MACH_TBXT TBXT 1735 1726tbxt MACH_TBXT TBXT 1735
1727playmate MACH_PLAYMATE PLAYMATE 1736 1727playmate MACH_PLAYMATE PLAYMATE 1736
@@ -1817,7 +1817,7 @@ smdkc100 MACH_SMDKC100 SMDKC100 1826
1817tavorevb MACH_TAVOREVB TAVOREVB 1827 1817tavorevb MACH_TAVOREVB TAVOREVB 1827
1818saar MACH_SAAR SAAR 1828 1818saar MACH_SAAR SAAR 1828
1819deister_eyecam MACH_DEISTER_EYECAM DEISTER_EYECAM 1829 1819deister_eyecam MACH_DEISTER_EYECAM DEISTER_EYECAM 1829
1820at91sam9m10ek MACH_AT91SAM9M10EK AT91SAM9M10EK 1830 1820at91sam9m10g45ek MACH_AT91SAM9M10G45EK AT91SAM9M10G45EK 1830
1821linkstation_produo MACH_LINKSTATION_PRODUO LINKSTATION_PRODUO 1831 1821linkstation_produo MACH_LINKSTATION_PRODUO LINKSTATION_PRODUO 1831
1822hit_b0 MACH_HIT_B0 HIT_B0 1832 1822hit_b0 MACH_HIT_B0 HIT_B0 1832
1823adx_rmu MACH_ADX_RMU ADX_RMU 1833 1823adx_rmu MACH_ADX_RMU ADX_RMU 1833
@@ -2132,3 +2132,116 @@ apollo MACH_APOLLO APOLLO 2141
2132at91cap9stk MACH_AT91CAP9STK AT91CAP9STK 2142 2132at91cap9stk MACH_AT91CAP9STK AT91CAP9STK 2142
2133spc300 MACH_SPC300 SPC300 2143 2133spc300 MACH_SPC300 SPC300 2143
2134eko MACH_EKO EKO 2144 2134eko MACH_EKO EKO 2144
2135ccw9m2443 MACH_CCW9M2443 CCW9M2443 2145
2136ccw9m2443js MACH_CCW9M2443JS CCW9M2443JS 2146
2137m2m_router_device MACH_M2M_ROUTER_DEVICE M2M_ROUTER_DEVICE 2147
2138str9104nas MACH_STAR9104NAS STAR9104NAS 2148
2139pca100 MACH_PCA100 PCA100 2149
2140z3_dm365_mod_01 MACH_Z3_DM365_MOD_01 Z3_DM365_MOD_01 2150
2141hipox MACH_HIPOX HIPOX 2151
2142omap3_piteds MACH_OMAP3_PITEDS OMAP3_PITEDS 2152
2143bm150r MACH_BM150R BM150R 2153
2144tbone MACH_TBONE TBONE 2154
2145merlin MACH_MERLIN MERLIN 2155
2146falcon MACH_FALCON FALCON 2156
2147davinci_da850_evm MACH_DAVINCI_DA850_EVM DAVINCI_DA850_EVM 2157
2148s5p6440 MACH_S5P6440 S5P6440 2158
2149at91sam9g10ek MACH_AT91SAM9G10EK AT91SAM9G10EK 2159
2150omap_4430sdp MACH_OMAP_4430SDP OMAP_4430SDP 2160
2151lpc313x MACH_LPC313X LPC313X 2161
2152magx_zn5 MACH_MAGX_ZN5 MAGX_ZN5 2162
2153magx_em30 MACH_MAGX_EM30 MAGX_EM30 2163
2154magx_ve66 MACH_MAGX_VE66 MAGX_VE66 2164
2155meesc MACH_MEESC MEESC 2165
2156otc570 MACH_OTC570 OTC570 2166
2157bcu2412 MACH_BCU2412 BCU2412 2167
2158beacon MACH_BEACON BEACON 2168
2159actia_tgw MACH_ACTIA_TGW ACTIA_TGW 2169
2160e4430 MACH_E4430 E4430 2170
2161ql300 MACH_QL300 QL300 2171
2162btmavb101 MACH_BTMAVB101 BTMAVB101 2172
2163btmawb101 MACH_BTMAWB101 BTMAWB101 2173
2164sq201 MACH_SQ201 SQ201 2174
2165quatro45xx MACH_QUATRO45XX QUATRO45XX 2175
2166openpad MACH_OPENPAD OPENPAD 2176
2167tx25 MACH_TX25 TX25 2177
2168omap3_torpedo MACH_OMAP3_TORPEDO OMAP3_TORPEDO 2178
2169htcraphael_k MACH_HTCRAPHAEL_K HTCRAPHAEL_K 2179
2170lal43 MACH_LAL43 LAL43 2181
2171htcraphael_cdma500 MACH_HTCRAPHAEL_CDMA500 HTCRAPHAEL_CDMA500 2182
2172anw6410 MACH_ANW6410 ANW6410 2183
2173htcprophet MACH_HTCPROPHET HTCPROPHET 2185
2174cfa_10022 MACH_CFA_10022 CFA_10022 2186
2175imx27_visstrim_m10 MACH_IMX27_VISSTRIM_M10 IMX27_VISSTRIM_M10 2187
2176px2imx27 MACH_PX2IMX27 PX2IMX27 2188
2177stm3210e_eval MACH_STM3210E_EVAL STM3210E_EVAL 2189
2178dvs10 MACH_DVS10 DVS10 2190
2179portuxg20 MACH_PORTUXG20 PORTUXG20 2191
2180arm_spv MACH_ARM_SPV ARM_SPV 2192
2181smdkc110 MACH_SMDKC110 SMDKC110 2193
2182cabespresso MACH_CABESPRESSO CABESPRESSO 2194
2183hmc800 MACH_HMC800 HMC800 2195
2184sholes MACH_SHOLES SHOLES 2196
2185btmxc31 MACH_BTMXC31 BTMXC31 2197
2186dt501 MACH_DT501 DT501 2198
2187ktx MACH_KTX KTX 2199
2188omap3517evm MACH_OMAP3517EVM OMAP3517EVM 2200
2189netspace_v2 MACH_NETSPACE_V2 NETSPACE_V2 2201
2190netspace_max_v2 MACH_NETSPACE_MAX_V2 NETSPACE_MAX_V2 2202
2191d2net_v2 MACH_D2NET_V2 D2NET_V2 2203
2192net2big_v2 MACH_NET2BIG_V2 NET2BIG_V2 2204
2193net4big_v2 MACH_NET4BIG_V2 NET4BIG_V2 2205
2194net5big_v2 MACH_NET5BIG_V2 NET5BIG_V2 2206
2195endb2443 MACH_ENDB2443 ENDB2443 2207
2196inetspace_v2 MACH_INETSPACE_V2 INETSPACE_V2 2208
2197tros MACH_TROS TROS 2209
2198pelco_homer MACH_PELCO_HOMER PELCO_HOMER 2210
2199ofsp8 MACH_OFSP8 OFSP8 2211
2200at91sam9g45ekes MACH_AT91SAM9G45EKES AT91SAM9G45EKES 2212
2201guf_cupid MACH_GUF_CUPID GUF_CUPID 2213
2202eab1r MACH_EAB1R EAB1R 2214
2203desirec MACH_DESIREC DESIREC 2215
2204cordoba MACH_CORDOBA CORDOBA 2216
2205irvine MACH_IRVINE IRVINE 2217
2206sff772 MACH_SFF772 SFF772 2218
2207pelco_milano MACH_PELCO_MILANO PELCO_MILANO 2219
2208pc7302 MACH_PC7302 PC7302 2220
2209bip6000 MACH_BIP6000 BIP6000 2221
2210silvermoon MACH_SILVERMOON SILVERMOON 2222
2211vc0830 MACH_VC0830 VC0830 2223
2212dt430 MACH_DT430 DT430 2224
2213ji42pf MACH_JI42PF JI42PF 2225
2214gnet_ksm MACH_GNET_KSM GNET_KSM 2226
2215gnet_sgm MACH_GNET_SGM GNET_SGM 2227
2216gnet_sgr MACH_GNET_SGR GNET_SGR 2228
2217omap3_icetekevm MACH_OMAP3_ICETEKEVM OMAP3_ICETEKEVM 2229
2218pnp MACH_PNP PNP 2230
2219ctera_2bay_k MACH_CTERA_2BAY_K CTERA_2BAY_K 2231
2220ctera_2bay_u MACH_CTERA_2BAY_U CTERA_2BAY_U 2232
2221sas_c MACH_SAS_C SAS_C 2233
2222vma2315 MACH_VMA2315 VMA2315 2234
2223vcs MACH_VCS VCS 2235
2224spear600 MACH_SPEAR600 SPEAR600 2236
2225spear300 MACH_SPEAR300 SPEAR300 2237
2226spear1300 MACH_SPEAR1300 SPEAR1300 2238
2227lilly1131 MACH_LILLY1131 LILLY1131 2239
2228arvoo_ax301 MACH_ARVOO_AX301 ARVOO_AX301 2240
2229mapphone MACH_MAPPHONE MAPPHONE 2241
2230legend MACH_LEGEND LEGEND 2242
2231salsa MACH_SALSA SALSA 2243
2232lounge MACH_LOUNGE LOUNGE 2244
2233vision MACH_VISION VISION 2245
2234vmb20 MACH_VMB20 VMB20 2246
2235hy2410 MACH_HY2410 HY2410 2247
2236hy9315 MACH_HY9315 HY9315 2248
2237bullwinkle MACH_BULLWINKLE BULLWINKLE 2249
2238arm_ultimator2 MACH_ARM_ULTIMATOR2 ARM_ULTIMATOR2 2250
2239vs_v210 MACH_VS_V210 VS_V210 2252
2240vs_v212 MACH_VS_V212 VS_V212 2253
2241hmt MACH_HMT HMT 2254
2242suen3 MACH_SUEN3 SUEN3 2255
2243vesper MACH_VESPER VESPER 2256
2244str9 MACH_STR9 STR9 2257
2245omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258
2246simcom MACH_SIMCOM SIMCOM 2259
2247mcwebio MACH_MCWEBIO MCWEBIO 2260
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-27 19:54:01 -0500