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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-05-08 10:33:30 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-05-23 13:04:51 -0400
commitbfe45e0be88d8a2e408226d473bff60da4a97d1f (patch)
tree4586e8933a35af1599f314adb73f2bae504b49b5 /arch/arm
parent234b6ceddb4fc2a4bc5b9a7670f070f6e69e0868 (diff)
clocksource: convert ARM 32-bit down counting clocksources
Convert SP804, MXC, Nomadik and Orion 32-bit down-counting clocksources to generic mmio clocksource infrastructure. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Lennert Buytenhek <kernel@wantstofly.org> Acked-by: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/common/timer-sp.c30
-rw-r--r--arch/arm/plat-mxc/epit.c18
-rw-r--r--arch/arm/plat-nomadik/Kconfig1
-rw-r--r--arch/arm/plat-nomadik/timer.c31
-rw-r--r--arch/arm/plat-orion/time.c21
6 files changed, 16 insertions, 87 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9aa551497034..0a05a57449e3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1042,6 +1042,7 @@ config PLAT_IOP
1042 1042
1043config PLAT_ORION 1043config PLAT_ORION
1044 bool 1044 bool
1045 select CLKSRC_MMIO
1045 select HAVE_SCHED_CLOCK 1046 select HAVE_SCHED_CLOCK
1046 1047
1047config PLAT_PXA 1048config PLAT_PXA
@@ -1052,6 +1053,7 @@ config PLAT_VERSATILE
1052 1053
1053config ARM_TIMER_SP804 1054config ARM_TIMER_SP804
1054 bool 1055 bool
1056 select CLKSRC_MMIO
1055 1057
1056source arch/arm/mm/Kconfig 1058source arch/arm/mm/Kconfig
1057 1059
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c
index 6ef3342153b9..445b05ee8511 100644
--- a/arch/arm/common/timer-sp.c
+++ b/arch/arm/common/timer-sp.c
@@ -32,35 +32,17 @@
32#define TIMER_FREQ_KHZ (1000) 32#define TIMER_FREQ_KHZ (1000)
33#define TIMER_RELOAD (TIMER_FREQ_KHZ * 1000 / HZ) 33#define TIMER_RELOAD (TIMER_FREQ_KHZ * 1000 / HZ)
34 34
35static void __iomem *clksrc_base;
36
37static cycle_t sp804_read(struct clocksource *cs)
38{
39 return ~readl(clksrc_base + TIMER_VALUE);
40}
41
42static struct clocksource clocksource_sp804 = {
43 .name = "timer3",
44 .rating = 200,
45 .read = sp804_read,
46 .mask = CLOCKSOURCE_MASK(32),
47 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
48};
49
50void __init sp804_clocksource_init(void __iomem *base) 35void __init sp804_clocksource_init(void __iomem *base)
51{ 36{
52 struct clocksource *cs = &clocksource_sp804;
53
54 clksrc_base = base;
55
56 /* setup timer 0 as free-running clocksource */ 37 /* setup timer 0 as free-running clocksource */
57 writel(0, clksrc_base + TIMER_CTRL); 38 writel(0, base + TIMER_CTRL);
58 writel(0xffffffff, clksrc_base + TIMER_LOAD); 39 writel(0xffffffff, base + TIMER_LOAD);
59 writel(0xffffffff, clksrc_base + TIMER_VALUE); 40 writel(0xffffffff, base + TIMER_VALUE);
60 writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC, 41 writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
61 clksrc_base + TIMER_CTRL); 42 base + TIMER_CTRL);
62 43
63 clocksource_register_khz(cs, TIMER_FREQ_KHZ); 44 clocksource_mmio_init(base + TIMER_VALUE, "timer3",
45 TIMER_FREQ_KHZ * 1000, 200, 32, clocksource_mmio_readl_down);
64} 46}
65 47
66 48
diff --git a/arch/arm/plat-mxc/epit.c b/arch/arm/plat-mxc/epit.c
index d69d343ff61f..d3467f818c33 100644
--- a/arch/arm/plat-mxc/epit.c
+++ b/arch/arm/plat-mxc/epit.c
@@ -83,26 +83,12 @@ static void epit_irq_acknowledge(void)
83 __raw_writel(EPITSR_OCIF, timer_base + EPITSR); 83 __raw_writel(EPITSR_OCIF, timer_base + EPITSR);
84} 84}
85 85
86static cycle_t epit_read(struct clocksource *cs)
87{
88 return 0 - __raw_readl(timer_base + EPITCNR);
89}
90
91static struct clocksource clocksource_epit = {
92 .name = "epit",
93 .rating = 200,
94 .read = epit_read,
95 .mask = CLOCKSOURCE_MASK(32),
96 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
97};
98
99static int __init epit_clocksource_init(struct clk *timer_clk) 86static int __init epit_clocksource_init(struct clk *timer_clk)
100{ 87{
101 unsigned int c = clk_get_rate(timer_clk); 88 unsigned int c = clk_get_rate(timer_clk);
102 89
103 clocksource_register_hz(&clocksource_epit, c); 90 return clocksource_mmio_init(timer_base + EPITCNR, "epit", c, 200, 32,
104 91 clocksource_mmio_readl_down);
105 return 0;
106} 92}
107 93
108/* clock event */ 94/* clock event */
diff --git a/arch/arm/plat-nomadik/Kconfig b/arch/arm/plat-nomadik/Kconfig
index 187f4e84bb22..18296ee68802 100644
--- a/arch/arm/plat-nomadik/Kconfig
+++ b/arch/arm/plat-nomadik/Kconfig
@@ -5,6 +5,7 @@
5config PLAT_NOMADIK 5config PLAT_NOMADIK
6 bool 6 bool
7 depends on ARCH_NOMADIK || ARCH_U8500 7 depends on ARCH_NOMADIK || ARCH_U8500
8 select CLKSRC_MMIO
8 default y 9 default y
9 help 10 help
10 Common platform code for Nomadik and other ST-Ericsson 11 Common platform code for Nomadik and other ST-Ericsson
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
index 41723402006b..ef74e157a9d5 100644
--- a/arch/arm/plat-nomadik/timer.c
+++ b/arch/arm/plat-nomadik/timer.c
@@ -26,29 +26,6 @@
26void __iomem *mtu_base; /* Assigned by machine code */ 26void __iomem *mtu_base; /* Assigned by machine code */
27 27
28/* 28/*
29 * Kernel assumes that sched_clock can be called early
30 * but the MTU may not yet be initialized.
31 */
32static cycle_t nmdk_read_timer_dummy(struct clocksource *cs)
33{
34 return 0;
35}
36
37/* clocksource: MTU decrements, so we negate the value being read. */
38static cycle_t nmdk_read_timer(struct clocksource *cs)
39{
40 return -readl(mtu_base + MTU_VAL(0));
41}
42
43static struct clocksource nmdk_clksrc = {
44 .name = "mtu_0",
45 .rating = 200,
46 .read = nmdk_read_timer_dummy,
47 .mask = CLOCKSOURCE_MASK(32),
48 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
49};
50
51/*
52 * Override the global weak sched_clock symbol with this 29 * Override the global weak sched_clock symbol with this
53 * local implementation which uses the clocksource to get some 30 * local implementation which uses the clocksource to get some
54 * better resolution when scheduling the kernel. 31 * better resolution when scheduling the kernel.
@@ -172,12 +149,10 @@ void __init nmdk_timer_init(void)
172 writel(0, mtu_base + MTU_BGLR(0)); 149 writel(0, mtu_base + MTU_BGLR(0));
173 writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0)); 150 writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0));
174 151
175 /* Now the clock source is ready */ 152 if (clocksource_mmio_init(mtu_base + MTU_VAL(0), "mtu_0",
176 nmdk_clksrc.read = nmdk_read_timer; 153 rate, 200, 32, clocksource_mmio_readl_down))
177
178 if (clocksource_register_hz(&nmdk_clksrc, rate))
179 pr_err("timer: failed to initialize clock source %s\n", 154 pr_err("timer: failed to initialize clock source %s\n",
180 nmdk_clksrc.name); 155 "mtu_0");
181 156
182 init_sched_clock(&cd, nomadik_update_sched_clock, 32, rate); 157 init_sched_clock(&cd, nomadik_update_sched_clock, 32, rate);
183 158
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 742b0323c57b..69a61367e4b8 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -81,24 +81,6 @@ static void __init setup_sched_clock(unsigned long tclk)
81} 81}
82 82
83/* 83/*
84 * Clocksource handling.
85 */
86static cycle_t orion_clksrc_read(struct clocksource *cs)
87{
88 return 0xffffffff - readl(timer_base + TIMER0_VAL_OFF);
89}
90
91static struct clocksource orion_clksrc = {
92 .name = "orion_clocksource",
93 .rating = 300,
94 .read = orion_clksrc_read,
95 .mask = CLOCKSOURCE_MASK(32),
96 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
97};
98
99
100
101/*
102 * Clockevent handling. 84 * Clockevent handling.
103 */ 85 */
104static int 86static int
@@ -247,7 +229,8 @@ orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask,
247 writel(u & ~BRIDGE_INT_TIMER0, bridge_base + BRIDGE_MASK_OFF); 229 writel(u & ~BRIDGE_INT_TIMER0, bridge_base + BRIDGE_MASK_OFF);
248 u = readl(timer_base + TIMER_CTRL_OFF); 230 u = readl(timer_base + TIMER_CTRL_OFF);
249 writel(u | TIMER0_EN | TIMER0_RELOAD_EN, timer_base + TIMER_CTRL_OFF); 231 writel(u | TIMER0_EN | TIMER0_RELOAD_EN, timer_base + TIMER_CTRL_OFF);
250 clocksource_register_hz(&orion_clksrc, tclk); 232 clocksource_mmio_init(timer_base + TIMER0_VAL_OFF, "orion_clocksource",
233 tclk, 300, 32, clocksource_mmio_readl_down);
251 234
252 /* 235 /*
253 * Setup clockevent timer (interrupt-driven). 236 * Setup clockevent timer (interrupt-driven).