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authorRob Herring <rob.herring@calxeda.com>2012-11-26 16:05:48 -0500
committerRob Herring <rob.herring@calxeda.com>2013-01-10 12:45:43 -0500
commitb1cffebf1029c87e1f1984d48463ee21093a6bc7 (patch)
tree43d297e7557685d57e7fa9595726f2846a8815ef /arch/arm
parent428fef8ad855c03b9f61c226c63df61bb43dc3e1 (diff)
ARM: GIC: remove direct use of gic_raise_softirq
In preparation of moving gic code to drivers/irqchip, remove the direct platform dependencies on gic_raise_softirq. Move the setup of smp_cross_call into the gic code and use arch_send_wakeup_ipi_mask function to trigger wake-up IPIs. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: Stephen Warren <swarren@nvidia.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/common/gic.c45
-rw-r--r--arch/arm/include/asm/hardware/gic.h1
-rw-r--r--arch/arm/kernel/smp.c3
-rw-r--r--arch/arm/mach-exynos/platsmp.c4
-rw-r--r--arch/arm/mach-highbank/platsmp.c4
-rw-r--r--arch/arm/mach-imx/platsmp.c2
-rw-r--r--arch/arm/mach-msm/platsmp.c4
-rw-r--r--arch/arm/mach-omap2/omap-smp.c4
-rw-r--r--arch/arm/mach-realview/platsmp.c3
-rw-r--r--arch/arm/mach-shmobile/platsmp.c2
-rw-r--r--arch/arm/mach-shmobile/smp-emev2.c2
-rw-r--r--arch/arm/mach-socfpga/platsmp.c2
-rw-r--r--arch/arm/mach-spear13xx/platsmp.c2
-rw-r--r--arch/arm/mach-tegra/platsmp.c2
-rw-r--r--arch/arm/mach-ux500/platsmp.c4
-rw-r--r--arch/arm/mach-vexpress/ct-ca9x4.c2
-rw-r--r--arch/arm/mach-vexpress/platsmp.c2
-rw-r--r--arch/arm/plat-versatile/platsmp.c2
18 files changed, 33 insertions, 57 deletions
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 36ae03a3f5d1..788658cca960 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -617,6 +617,27 @@ static void __init gic_pm_init(struct gic_chip_data *gic)
617} 617}
618#endif 618#endif
619 619
620#ifdef CONFIG_SMP
621void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
622{
623 int cpu;
624 unsigned long map = 0;
625
626 /* Convert our logical CPU mask into a physical one. */
627 for_each_cpu(cpu, mask)
628 map |= 1 << cpu_logical_map(cpu);
629
630 /*
631 * Ensure that stores to Normal memory are visible to the
632 * other CPUs before issuing the IPI.
633 */
634 dsb();
635
636 /* this always happens on GIC0 */
637 writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);
638}
639#endif
640
620static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq, 641static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
621 irq_hw_number_t hw) 642 irq_hw_number_t hw)
622{ 643{
@@ -743,6 +764,9 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
743 if (WARN_ON(!gic->domain)) 764 if (WARN_ON(!gic->domain))
744 return; 765 return;
745 766
767#ifdef CONFIG_SMP
768 set_smp_cross_call(gic_raise_softirq);
769#endif
746 gic_chip.flags |= gic_arch_extn.flags; 770 gic_chip.flags |= gic_arch_extn.flags;
747 gic_dist_init(gic); 771 gic_dist_init(gic);
748 gic_cpu_init(gic); 772 gic_cpu_init(gic);
@@ -756,27 +780,6 @@ void __cpuinit gic_secondary_init(unsigned int gic_nr)
756 gic_cpu_init(&gic_data[gic_nr]); 780 gic_cpu_init(&gic_data[gic_nr]);
757} 781}
758 782
759#ifdef CONFIG_SMP
760void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
761{
762 int cpu;
763 unsigned long map = 0;
764
765 /* Convert our logical CPU mask into a physical one. */
766 for_each_cpu(cpu, mask)
767 map |= gic_cpu_map[cpu];
768
769 /*
770 * Ensure that stores to Normal memory are visible to the
771 * other CPUs before issuing the IPI.
772 */
773 dsb();
774
775 /* this always happens on GIC0 */
776 writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);
777}
778#endif
779
780#ifdef CONFIG_OF 783#ifdef CONFIG_OF
781static int gic_cnt __initdata = 0; 784static int gic_cnt __initdata = 0;
782 785
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index fc596989241b..cfd3a7eb453e 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -40,7 +40,6 @@ int gic_of_init(struct device_node *node, struct device_node *parent);
40void gic_secondary_init(unsigned int); 40void gic_secondary_init(unsigned int);
41void gic_handle_irq(struct pt_regs *regs); 41void gic_handle_irq(struct pt_regs *regs);
42void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); 42void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
43void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
44 43
45static inline void gic_init(unsigned int nr, int start, 44static inline void gic_init(unsigned int nr, int start,
46 void __iomem *dist , void __iomem *cpu) 45 void __iomem *dist , void __iomem *cpu)
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 84f4cbf652e5..3fc96db2a4b6 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -416,7 +416,8 @@ static void (*smp_cross_call)(const struct cpumask *, unsigned int);
416 416
417void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int)) 417void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
418{ 418{
419 smp_cross_call = fn; 419 if (!smp_cross_call)
420 smp_cross_call = fn;
420} 421}
421 422
422void arch_send_call_function_ipi_mask(const struct cpumask *mask) 423void arch_send_call_function_ipi_mask(const struct cpumask *mask)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index c5c840e947b8..5898f826b070 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -149,7 +149,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct
149 149
150 __raw_writel(virt_to_phys(exynos4_secondary_startup), 150 __raw_writel(virt_to_phys(exynos4_secondary_startup),
151 cpu_boot_reg(phys_cpu)); 151 cpu_boot_reg(phys_cpu));
152 gic_raise_softirq(cpumask_of(cpu), 0); 152 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
153 153
154 if (pen_release == -1) 154 if (pen_release == -1)
155 break; 155 break;
@@ -190,8 +190,6 @@ static void __init exynos_smp_init_cpus(void)
190 190
191 for (i = 0; i < ncores; i++) 191 for (i = 0; i < ncores; i++)
192 set_cpu_possible(i, true); 192 set_cpu_possible(i, true);
193
194 set_smp_cross_call(gic_raise_softirq);
195} 193}
196 194
197static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) 195static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c
index 4ecc864ac8b9..e8d3c5f0171f 100644
--- a/arch/arm/mach-highbank/platsmp.c
+++ b/arch/arm/mach-highbank/platsmp.c
@@ -33,7 +33,7 @@ static void __cpuinit highbank_secondary_init(unsigned int cpu)
33static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle) 33static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
34{ 34{
35 highbank_set_cpu_jump(cpu, secondary_startup); 35 highbank_set_cpu_jump(cpu, secondary_startup);
36 gic_raise_softirq(cpumask_of(cpu), 0); 36 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
37 return 0; 37 return 0;
38} 38}
39 39
@@ -56,8 +56,6 @@ static void __init highbank_smp_init_cpus(void)
56 56
57 for (i = 0; i < ncores; i++) 57 for (i = 0; i < ncores; i++)
58 set_cpu_possible(i, true); 58 set_cpu_possible(i, true);
59
60 set_smp_cross_call(gic_raise_softirq);
61} 59}
62 60
63static void __init highbank_smp_prepare_cpus(unsigned int max_cpus) 61static void __init highbank_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index 3777b805b76b..8e720574fe9f 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -71,8 +71,6 @@ static void __init imx_smp_init_cpus(void)
71 71
72 for (i = 0; i < ncores; i++) 72 for (i = 0; i < ncores; i++)
73 set_cpu_possible(i, true); 73 set_cpu_possible(i, true);
74
75 set_smp_cross_call(gic_raise_softirq);
76} 74}
77 75
78void imx_smp_prepare(void) 76void imx_smp_prepare(void)
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 7ed69b69c87c..e27e57b12274 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -115,7 +115,7 @@ static int __cpuinit msm_boot_secondary(unsigned int cpu, struct task_struct *id
115 * the boot monitor to read the system wide flags register, 115 * the boot monitor to read the system wide flags register,
116 * and branch to the address found there. 116 * and branch to the address found there.
117 */ 117 */
118 gic_raise_softirq(cpumask_of(cpu), 0); 118 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
119 119
120 timeout = jiffies + (1 * HZ); 120 timeout = jiffies + (1 * HZ);
121 while (time_before(jiffies, timeout)) { 121 while (time_before(jiffies, timeout)) {
@@ -153,8 +153,6 @@ static void __init msm_smp_init_cpus(void)
153 153
154 for (i = 0; i < ncores; i++) 154 for (i = 0; i < ncores; i++)
155 set_cpu_possible(i, true); 155 set_cpu_possible(i, true);
156
157 set_smp_cross_call(gic_raise_softirq);
158} 156}
159 157
160static void __init msm_smp_prepare_cpus(unsigned int max_cpus) 158static void __init msm_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index cd42d921940d..668172a5f9ea 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -157,7 +157,7 @@ static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct *
157 booted = true; 157 booted = true;
158 } 158 }
159 159
160 gic_raise_softirq(cpumask_of(cpu), 0); 160 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
161 161
162 /* 162 /*
163 * Now the secondary core is starting up let it run its 163 * Now the secondary core is starting up let it run its
@@ -231,8 +231,6 @@ static void __init omap4_smp_init_cpus(void)
231 231
232 for (i = 0; i < ncores; i++) 232 for (i = 0; i < ncores; i++)
233 set_cpu_possible(i, true); 233 set_cpu_possible(i, true);
234
235 set_smp_cross_call(gic_raise_softirq);
236} 234}
237 235
238static void __init omap4_smp_prepare_cpus(unsigned int max_cpus) 236static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 300f7064465d..98e3052b7933 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -14,7 +14,6 @@
14#include <linux/io.h> 14#include <linux/io.h>
15 15
16#include <mach/hardware.h> 16#include <mach/hardware.h>
17#include <asm/hardware/gic.h>
18#include <asm/mach-types.h> 17#include <asm/mach-types.h>
19#include <asm/smp_scu.h> 18#include <asm/smp_scu.h>
20 19
@@ -59,8 +58,6 @@ static void __init realview_smp_init_cpus(void)
59 58
60 for (i = 0; i < ncores; i++) 59 for (i = 0; i < ncores; i++)
61 set_cpu_possible(i, true); 60 set_cpu_possible(i, true);
62
63 set_smp_cross_call(gic_raise_softirq);
64} 61}
65 62
66static void __init realview_smp_prepare_cpus(unsigned int max_cpus) 63static void __init realview_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c
index ed8d2351915e..d393c527ae8f 100644
--- a/arch/arm/mach-shmobile/platsmp.c
+++ b/arch/arm/mach-shmobile/platsmp.c
@@ -26,6 +26,4 @@ void __init shmobile_smp_init_cpus(unsigned int ncores)
26 26
27 for (i = 0; i < ncores; i++) 27 for (i = 0; i < ncores; i++)
28 set_cpu_possible(i, true); 28 set_cpu_possible(i, true);
29
30 set_smp_cross_call(gic_raise_softirq);
31} 29}
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
index f67456286280..6262d6776f5d 100644
--- a/arch/arm/mach-shmobile/smp-emev2.c
+++ b/arch/arm/mach-shmobile/smp-emev2.c
@@ -100,7 +100,7 @@ static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *
100 /* Tell ROM loader about our vector (in headsmp.S) */ 100 /* Tell ROM loader about our vector (in headsmp.S) */
101 emev2_set_boot_vector(__pa(shmobile_secondary_vector)); 101 emev2_set_boot_vector(__pa(shmobile_secondary_vector));
102 102
103 gic_raise_softirq(cpumask_of(cpu), 0); 103 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
104 return 0; 104 return 0;
105} 105}
106 106
diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c
index 68dd1b69512a..98a22200104f 100644
--- a/arch/arm/mach-socfpga/platsmp.c
+++ b/arch/arm/mach-socfpga/platsmp.c
@@ -83,8 +83,6 @@ static void __init socfpga_smp_init_cpus(void)
83 83
84 for (i = 0; i < ncores; i++) 84 for (i = 0; i < ncores; i++)
85 set_cpu_possible(i, true); 85 set_cpu_possible(i, true);
86
87 set_smp_cross_call(gic_raise_softirq);
88} 86}
89 87
90static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus) 88static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-spear13xx/platsmp.c b/arch/arm/mach-spear13xx/platsmp.c
index 2eaa3fa7b432..27e3f69c6274 100644
--- a/arch/arm/mach-spear13xx/platsmp.c
+++ b/arch/arm/mach-spear13xx/platsmp.c
@@ -104,8 +104,6 @@ static void __init spear13xx_smp_init_cpus(void)
104 104
105 for (i = 0; i < ncores; i++) 105 for (i = 0; i < ncores; i++)
106 set_cpu_possible(i, true); 106 set_cpu_possible(i, true);
107
108 set_smp_cross_call(gic_raise_softirq);
109} 107}
110 108
111static void __init spear13xx_smp_prepare_cpus(unsigned int max_cpus) 109static void __init spear13xx_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 1b926df99c4b..d8e6754e77a9 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -159,8 +159,6 @@ static void __init tegra_smp_init_cpus(void)
159 159
160 for (i = 0; i < ncores; i++) 160 for (i = 0; i < ncores; i++)
161 set_cpu_possible(i, true); 161 set_cpu_possible(i, true);
162
163 set_smp_cross_call(gic_raise_softirq);
164} 162}
165 163
166static void __init tegra_smp_prepare_cpus(unsigned int max_cpus) 164static void __init tegra_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index 79531f1dffbc..fa07d4de6d85 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -91,7 +91,7 @@ static int __cpuinit ux500_boot_secondary(unsigned int cpu, struct task_struct *
91 */ 91 */
92 write_pen_release(cpu_logical_map(cpu)); 92 write_pen_release(cpu_logical_map(cpu));
93 93
94 gic_raise_softirq(cpumask_of(cpu), 0); 94 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
95 95
96 timeout = jiffies + (1 * HZ); 96 timeout = jiffies + (1 * HZ);
97 while (time_before(jiffies, timeout)) { 97 while (time_before(jiffies, timeout)) {
@@ -155,8 +155,6 @@ static void __init ux500_smp_init_cpus(void)
155 155
156 for (i = 0; i < ncores; i++) 156 for (i = 0; i < ncores; i++)
157 set_cpu_possible(i, true); 157 set_cpu_possible(i, true);
158
159 set_smp_cross_call(gic_raise_softirq);
160} 158}
161 159
162static void __init ux500_smp_prepare_cpus(unsigned int max_cpus) 160static void __init ux500_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index 60838ddb8564..0ad050f5c652 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -182,8 +182,6 @@ static void __init ct_ca9x4_init_cpu_map(void)
182 182
183 for (i = 0; i < ncores; ++i) 183 for (i = 0; i < ncores; ++i)
184 set_cpu_possible(i, true); 184 set_cpu_possible(i, true);
185
186 set_smp_cross_call(gic_raise_softirq);
187} 185}
188 186
189static void __init ct_ca9x4_smp_enable(unsigned int max_cpus) 187static void __init ct_ca9x4_smp_enable(unsigned int max_cpus)
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index c5d70de9bb4e..3bc0e38d70f7 100644
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -128,8 +128,6 @@ static void __init vexpress_dt_smp_init_cpus(void)
128 128
129 for (i = 0; i < ncores; ++i) 129 for (i = 0; i < ncores; ++i)
130 set_cpu_possible(i, true); 130 set_cpu_possible(i, true);
131
132 set_smp_cross_call(gic_raise_softirq);
133} 131}
134 132
135static void __init vexpress_dt_smp_prepare_cpus(unsigned int max_cpus) 133static void __init vexpress_dt_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c
index 04ca4937d8ca..2336024d1b76 100644
--- a/arch/arm/plat-versatile/platsmp.c
+++ b/arch/arm/plat-versatile/platsmp.c
@@ -79,7 +79,7 @@ int __cpuinit versatile_boot_secondary(unsigned int cpu, struct task_struct *idl
79 * the boot monitor to read the system wide flags register, 79 * the boot monitor to read the system wide flags register,
80 * and branch to the address found there. 80 * and branch to the address found there.
81 */ 81 */
82 gic_raise_softirq(cpumask_of(cpu), 0); 82 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
83 83
84 timeout = jiffies + (1 * HZ); 84 timeout = jiffies + (1 * HZ);
85 while (time_before(jiffies, timeout)) { 85 while (time_before(jiffies, timeout)) {