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authorRussell King <rmk+kernel@arm.linux.org.uk>2012-01-19 06:48:23 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-01-19 06:58:31 -0500
commit8bd92669199be1739b0430e9e96eb98de88aee42 (patch)
treed729ef1d0d74c7dc1b97e8d612da2df9014a916c /arch/arm
parent90a4c0f51e8e44111a926be6f4c87af3938a79c3 (diff)
Revert "ARM: sa1100: clean up of the clock support"
This reverts commit edf3ff5bac2582b57de4e7c6569fee5d7c1c0a42. This revert is necessary to revert the broken "RTC: sa1100: support sa1100, pxa and mmp soc families" change.
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/mach-sa1100/clock.c91
2 files changed, 26 insertions, 67 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 24626b0419ee..bb68e65ab180 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -754,7 +754,7 @@ config ARCH_SA1100
754 select ARCH_HAS_CPUFREQ 754 select ARCH_HAS_CPUFREQ
755 select CPU_FREQ 755 select CPU_FREQ
756 select GENERIC_CLOCKEVENTS 756 select GENERIC_CLOCKEVENTS
757 select CLKDEV_LOOKUP 757 select HAVE_CLK
758 select HAVE_SCHED_CLOCK 758 select HAVE_SCHED_CLOCK
759 select TICK_ONESHOT 759 select TICK_ONESHOT
760 select ARCH_REQUIRE_GPIOLIB 760 select ARCH_REQUIRE_GPIOLIB
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c
index d6df9f6c9f7e..dab3c6347a8f 100644
--- a/arch/arm/mach-sa1100/clock.c
+++ b/arch/arm/mach-sa1100/clock.c
@@ -11,39 +11,17 @@
11#include <linux/clk.h> 11#include <linux/clk.h>
12#include <linux/spinlock.h> 12#include <linux/spinlock.h>
13#include <linux/mutex.h> 13#include <linux/mutex.h>
14#include <linux/io.h>
15#include <linux/clkdev.h>
16 14
17#include <mach/hardware.h> 15#include <mach/hardware.h>
18 16
19struct clkops { 17/*
20 void (*enable)(struct clk *); 18 * Very simple clock implementation - we only have one clock to deal with.
21 void (*disable)(struct clk *); 19 */
22 unsigned long (*getrate)(struct clk *);
23};
24
25struct clk { 20struct clk {
26 const struct clkops *ops;
27 unsigned long rate;
28 unsigned int enabled; 21 unsigned int enabled;
29}; 22};
30 23
31#define INIT_CLKREG(_clk, _devname, _conname) \ 24static void clk_gpio27_enable(void)
32 { \
33 .clk = _clk, \
34 .dev_id = _devname, \
35 .con_id = _conname, \
36 }
37
38#define DEFINE_CLK(_name, _ops, _rate) \
39struct clk clk_##_name = { \
40 .ops = _ops, \
41 .rate = _rate, \
42 }
43
44static DEFINE_SPINLOCK(clocks_lock);
45
46static void clk_gpio27_enable(struct clk *clk)
47{ 25{
48 /* 26 /*
49 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111: 27 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
@@ -54,22 +32,38 @@ static void clk_gpio27_enable(struct clk *clk)
54 TUCR = TUCR_3_6864MHz; 32 TUCR = TUCR_3_6864MHz;
55} 33}
56 34
57static void clk_gpio27_disable(struct clk *clk) 35static void clk_gpio27_disable(void)
58{ 36{
59 TUCR = 0; 37 TUCR = 0;
60 GPDR &= ~GPIO_32_768kHz; 38 GPDR &= ~GPIO_32_768kHz;
61 GAFR &= ~GPIO_32_768kHz; 39 GAFR &= ~GPIO_32_768kHz;
62} 40}
63 41
42static struct clk clk_gpio27;
43
44static DEFINE_SPINLOCK(clocks_lock);
45
46struct clk *clk_get(struct device *dev, const char *id)
47{
48 const char *devname = dev_name(dev);
49
50 return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27;
51}
52EXPORT_SYMBOL(clk_get);
53
54void clk_put(struct clk *clk)
55{
56}
57EXPORT_SYMBOL(clk_put);
58
64int clk_enable(struct clk *clk) 59int clk_enable(struct clk *clk)
65{ 60{
66 unsigned long flags; 61 unsigned long flags;
67 62
68 spin_lock_irqsave(&clocks_lock, flags); 63 spin_lock_irqsave(&clocks_lock, flags);
69 if (clk->enabled++ == 0) 64 if (clk->enabled++ == 0)
70 clk->ops->enable(clk); 65 clk_gpio27_enable();
71 spin_unlock_irqrestore(&clocks_lock, flags); 66 spin_unlock_irqrestore(&clocks_lock, flags);
72
73 return 0; 67 return 0;
74} 68}
75EXPORT_SYMBOL(clk_enable); 69EXPORT_SYMBOL(clk_enable);
@@ -82,48 +76,13 @@ void clk_disable(struct clk *clk)
82 76
83 spin_lock_irqsave(&clocks_lock, flags); 77 spin_lock_irqsave(&clocks_lock, flags);
84 if (--clk->enabled == 0) 78 if (--clk->enabled == 0)
85 clk->ops->disable(clk); 79 clk_gpio27_disable();
86 spin_unlock_irqrestore(&clocks_lock, flags); 80 spin_unlock_irqrestore(&clocks_lock, flags);
87} 81}
88EXPORT_SYMBOL(clk_disable); 82EXPORT_SYMBOL(clk_disable);
89 83
90unsigned long clk_get_rate(struct clk *clk) 84unsigned long clk_get_rate(struct clk *clk)
91{ 85{
92 unsigned long rate; 86 return 3686400;
93
94 rate = clk->rate;
95 if (clk->ops->getrate)
96 rate = clk->ops->getrate(clk);
97
98 return rate;
99} 87}
100EXPORT_SYMBOL(clk_get_rate); 88EXPORT_SYMBOL(clk_get_rate);
101
102const struct clkops clk_gpio27_ops = {
103 .enable = clk_gpio27_enable,
104 .disable = clk_gpio27_disable,
105};
106
107static void clk_dummy_enable(struct clk *clk) { }
108static void clk_dummy_disable(struct clk *clk) { }
109
110const struct clkops clk_dummy_ops = {
111 .enable = clk_dummy_enable,
112 .disable = clk_dummy_disable,
113};
114
115static DEFINE_CLK(gpio27, &clk_gpio27_ops, 3686400);
116static DEFINE_CLK(dummy, &clk_dummy_ops, 0);
117
118static struct clk_lookup sa11xx_clkregs[] = {
119 INIT_CLKREG(&clk_gpio27, "sa1111.0", NULL),
120 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
121};
122
123static int __init sa11xx_clk_init(void)
124{
125 clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
126 return 0;
127}
128
129postcore_initcall(sa11xx_clk_init);