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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-11-21 16:56:56 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-11-21 16:56:56 -0500
commit2d13ccaa8797d7e599f3792aed4b1e44b47f94a5 (patch)
tree7079c1610373fc6709c3a285a53099beaf21295a /arch/arm
parent59136ef3c596606d3eef920dc3e0fdfa2ce52c6f (diff)
parent11f1c5de7be06bbb51363002ebc4d00edc2677df (diff)
Merge branch 'irqchip-consolidation' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into devel-stable
Conflicts: arch/arm/mach-omap2/board-4430sdp.c arch/arm/mach-omap2/board-omap4panda.c arch/arm/mach-omap2/include/mach/omap4-common.h arch/arm/plat-omap/include/plat/irqs.h The changes to omap4-common.h were moved to arch/arm/mach-omap2/common.h and the other trivial conflicts resolved. The now empty ifdef in irqs.h was also eliminated.
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/tegra-ventana.dts3
-rw-r--r--arch/arm/common/Kconfig6
-rw-r--r--arch/arm/common/gic.c164
-rw-r--r--arch/arm/common/vic.c143
-rw-r--r--arch/arm/include/asm/entry-macro-vic2.S57
-rw-r--r--arch/arm/include/asm/hardware/entry-macro-gic.S60
-rw-r--r--arch/arm/include/asm/hardware/gic.h26
-rw-r--r--arch/arm/include/asm/hardware/vic.h10
-rw-r--r--arch/arm/kernel/entry-armv.S7
-rw-r--r--arch/arm/mach-at91/at91cap9_devices.c7
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c5
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c5
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c5
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c5
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c7
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c7
-rw-r--r--arch/arm/mach-at91/board-yl-9200.c2
-rw-r--r--arch/arm/mach-at91/include/mach/vmalloc.h2
-rw-r--r--arch/arm/mach-cns3xxx/cns3420vb.c2
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-ep93xx/adssphere.c2
-rw-r--r--arch/arm/mach-ep93xx/edb93xx.c9
-rw-r--r--arch/arm/mach-ep93xx/gesbc9312.c2
-rw-r--r--arch/arm/mach-ep93xx/include/mach/entry-macro.S42
-rw-r--r--arch/arm/mach-ep93xx/micro9.c5
-rw-r--r--arch/arm/mach-ep93xx/simone.c2
-rw-r--r--arch/arm/mach-ep93xx/snappercl15.c2
-rw-r--r--arch/arm/mach-ep93xx/ts72xx.c2
-rw-r--r--arch/arm/mach-exynos/cpu.c20
-rw-r--r--arch/arm/mach-exynos/include/mach/entry-macro.S75
-rw-r--r--arch/arm/mach-exynos/mach-armlex4210.c2
-rw-r--r--arch/arm/mach-exynos/mach-nuri.c2
-rw-r--r--arch/arm/mach-exynos/mach-origen.c2
-rw-r--r--arch/arm/mach-exynos/mach-smdk4x12.c3
-rw-r--r--arch/arm/mach-exynos/mach-smdkv310.c3
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c4
-rw-r--r--arch/arm/mach-exynos/platsmp.c28
-rw-r--r--arch/arm/mach-highbank/highbank.c1
-rw-r--r--arch/arm/mach-highbank/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-imx/Makefile.boot34
-rw-r--r--arch/arm/mach-imx/clock-imx6q.c17
-rw-r--r--arch/arm/mach-msm/Makefile2
-rw-r--r--arch/arm/mach-msm/board-msm7x30.c4
-rw-r--r--arch/arm/mach-msm/board-msm8960.c6
-rw-r--r--arch/arm/mach-msm/board-msm8x60.c8
-rw-r--r--arch/arm/mach-msm/include/mach/entry-macro-qgic.S17
-rw-r--r--arch/arm/mach-msm/include/mach/entry-macro-vic.S37
-rw-r--r--arch/arm/mach-msm/include/mach/entry-macro.S27
-rw-r--r--arch/arm/mach-msm/scm.c3
-rw-r--r--arch/arm/mach-mx5/clock-mx51-mx53.c6
-rw-r--r--arch/arm/mach-mxs/mach-mx28evk.c4
-rw-r--r--arch/arm/mach-netx/include/mach/entry-macro.S13
-rw-r--r--arch/arm/mach-netx/nxdb500.c2
-rw-r--r--arch/arm/mach-netx/nxdkn.c2
-rw-r--r--arch/arm/mach-netx/nxeb500hmi.c2
-rw-r--r--arch/arm/mach-nomadik/board-nhk8815.c2
-rw-r--r--arch/arm/mach-nomadik/include/mach/entry-macro.S30
-rw-r--r--arch/arm/mach-omap2/Kconfig2
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c1
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c1
-rw-r--r--arch/arm/mach-omap2/board-3630sdp.c1
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c2
-rw-r--r--arch/arm/mach-omap2/board-am3517crane.c1
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c1
-rw-r--r--arch/arm/mach-omap2/board-apollon.c1
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c2
-rw-r--r--arch/arm/mach-omap2/board-cm-t3517.c1
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c1
-rw-r--r--arch/arm/mach-omap2/board-generic.c1
-rw-r--r--arch/arm/mach-omap2/board-h4.c1
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c2
-rw-r--r--arch/arm/mach-omap2/board-ldp.c1
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c3
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c1
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c1
-rw-r--r--arch/arm/mach-omap2/board-omap3logic.c2
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c1
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c1
-rw-r--r--arch/arm/mach-omap2/board-omap3touchbook.c1
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c2
-rw-r--r--arch/arm/mach-omap2/board-overo.c1
-rw-r--r--arch/arm/mach-omap2/board-rm680.c1
-rw-r--r--arch/arm/mach-omap2/board-rx51.c1
-rw-r--r--arch/arm/mach-omap2/board-zoom.c2
-rw-r--r--arch/arm/mach-omap2/common.h2
-rw-r--r--arch/arm/mach-omap2/include/mach/entry-macro.S137
-rw-r--r--arch/arm/mach-omap2/io.c3
-rw-r--r--arch/arm/mach-omap2/irq.c51
-rw-r--r--arch/arm/mach-omap2/omap4-common.c6
-rw-r--r--arch/arm/mach-picoxcell/common.c9
-rw-r--r--arch/arm/mach-picoxcell/include/mach/debug-macro.S2
-rw-r--r--arch/arm/mach-picoxcell/include/mach/entry-macro.S11
-rw-r--r--arch/arm/mach-pxa/include/mach/entry-macro.S36
-rw-r--r--arch/arm/mach-realview/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-realview/realview_eb.c1
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c1
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c1
-rw-r--r--arch/arm/mach-realview/realview_pba8.c1
-rw-r--r--arch/arm/mach-realview/realview_pbx.c1
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/entry-macro.S7
-rw-r--r--arch/arm/mach-s3c64xx/mach-anw6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-hmt.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-mini6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-ncp.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-real6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smartq5.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smartq7.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6400.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6410.c2
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/entry-macro.S7
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6440.c2
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6450.c2
-rw-r--r--arch/arm/mach-s5pc100/include/mach/entry-macro.S25
-rw-r--r--arch/arm/mach-s5pc100/mach-smdkc100.c2
-rw-r--r--arch/arm/mach-s5pv210/include/mach/entry-macro.S37
-rw-r--r--arch/arm/mach-s5pv210/mach-aquila.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-goni.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkc110.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-torbreck.c2
-rw-r--r--arch/arm/mach-shmobile/Makefile3
-rw-r--r--arch/arm/mach-shmobile/board-ag5evm.c18
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c2
-rw-r--r--arch/arm/mach-shmobile/board-kota2.c9
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c8
-rw-r--r--arch/arm/mach-shmobile/cpuidle.c52
-rw-r--r--arch/arm/mach-shmobile/entry-gic.S18
-rw-r--r--arch/arm/mach-shmobile/include/mach/common.h5
-rw-r--r--arch/arm/mach-shmobile/include/mach/entry-macro.S9
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh73a0.h8
-rw-r--r--arch/arm/mach-shmobile/pfc-sh7367.c122
-rw-r--r--arch/arm/mach-shmobile/pfc-sh7372.c262
-rw-r--r--arch/arm/mach-shmobile/pfc-sh7377.c159
-rw-r--r--arch/arm/mach-shmobile/pfc-sh73a0.c193
-rw-r--r--arch/arm/mach-shmobile/pm-sh7372.c14
-rw-r--r--arch/arm/mach-shmobile/pm_runtime.c67
-rw-r--r--arch/arm/mach-spear3xx/include/mach/entry-macro.S27
-rw-r--r--arch/arm/mach-spear3xx/spear300_evb.c2
-rw-r--r--arch/arm/mach-spear3xx/spear310_evb.c2
-rw-r--r--arch/arm/mach-spear3xx/spear320_evb.c2
-rw-r--r--arch/arm/mach-spear6xx/include/mach/entry-macro.S36
-rw-r--r--arch/arm/mach-spear6xx/spear600_evb.c2
-rw-r--r--arch/arm/mach-tegra/board-dt.c15
-rw-r--r--arch/arm/mach-tegra/board-harmony-pinmux.c6
-rw-r--r--arch/arm/mach-tegra/board-harmony.c2
-rw-r--r--arch/arm/mach-tegra/board-paz00-pinmux.c6
-rw-r--r--arch/arm/mach-tegra/board-paz00.c2
-rw-r--r--arch/arm/mach-tegra/board-seaboard-pinmux.c6
-rw-r--r--arch/arm/mach-tegra/board-seaboard.c4
-rw-r--r--arch/arm/mach-tegra/board-trimslice-pinmux.c5
-rw-r--r--arch/arm/mach-tegra/board-trimslice.c2
-rw-r--r--arch/arm/mach-tegra/include/mach/entry-macro.S22
-rw-r--r--arch/arm/mach-u300/include/mach/entry-macro.S24
-rw-r--r--arch/arm/mach-u300/u300.c2
-rw-r--r--arch/arm/mach-ux500/board-mop500.c4
-rw-r--r--arch/arm/mach-ux500/board-u5500.c2
-rw-r--r--arch/arm/mach-ux500/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-versatile/include/mach/entry-macro.S30
-rw-r--r--arch/arm/mach-versatile/versatile_ab.c2
-rw-r--r--arch/arm/mach-versatile/versatile_dt.c2
-rw-r--r--arch/arm/mach-versatile/versatile_pb.c2
-rw-r--r--arch/arm/mach-vexpress/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-vexpress/v2m.c2
-rw-r--r--arch/arm/mach-zynq/common.c1
-rw-r--r--arch/arm/mach-zynq/include/mach/entry-macro.S3
-rw-r--r--arch/arm/plat-mxc/Kconfig4
-rw-r--r--arch/arm/plat-mxc/Makefile1
-rw-r--r--arch/arm/plat-mxc/avic.c1
-rw-r--r--arch/arm/plat-mxc/gic.c48
-rw-r--r--arch/arm/plat-mxc/include/mach/common.h1
-rw-r--r--arch/arm/plat-mxc/include/mach/entry-macro.S14
-rw-r--r--arch/arm/plat-mxc/tzic.c1
-rw-r--r--arch/arm/plat-omap/include/plat/irqs.h4
-rw-r--r--arch/arm/plat-s5p/Kconfig1
175 files changed, 984 insertions, 1620 deletions
diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts
index 9b29a623aaf1..3f9abd6b6964 100644
--- a/arch/arm/boot/dts/tegra-ventana.dts
+++ b/arch/arm/boot/dts/tegra-ventana.dts
@@ -22,11 +22,10 @@
22 sdhci@c8000400 { 22 sdhci@c8000400 {
23 cd-gpios = <&gpio 69 0>; /* gpio PI5 */ 23 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
24 wp-gpios = <&gpio 57 0>; /* gpio PH1 */ 24 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
25 power-gpios = <&gpio 155 0>; /* gpio PT3 */ 25 power-gpios = <&gpio 70 0>; /* gpio PI6 */
26 }; 26 };
27 27
28 sdhci@c8000600 { 28 sdhci@c8000600 {
29 power-gpios = <&gpio 70 0>; /* gpio PI6 */
30 support-8bit; 29 support-8bit;
31 }; 30 };
32}; 31};
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 74df9ca2be31..81a933eb0903 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -1,8 +1,14 @@
1config ARM_GIC 1config ARM_GIC
2 select IRQ_DOMAIN 2 select IRQ_DOMAIN
3 select MULTI_IRQ_HANDLER
4 bool
5
6config GIC_NON_BANKED
3 bool 7 bool
4 8
5config ARM_VIC 9config ARM_VIC
10 select IRQ_DOMAIN
11 select MULTI_IRQ_HANDLER
6 bool 12 bool
7 13
8config ARM_VIC_NR 14config ARM_VIC_NR
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 0e6ae470c94f..a1feb6b4f9f5 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -40,13 +40,36 @@
40#include <linux/slab.h> 40#include <linux/slab.h>
41 41
42#include <asm/irq.h> 42#include <asm/irq.h>
43#include <asm/exception.h>
43#include <asm/mach/irq.h> 44#include <asm/mach/irq.h>
44#include <asm/hardware/gic.h> 45#include <asm/hardware/gic.h>
45 46
46static DEFINE_RAW_SPINLOCK(irq_controller_lock); 47union gic_base {
48 void __iomem *common_base;
49 void __percpu __iomem **percpu_base;
50};
47 51
48/* Address of GIC 0 CPU interface */ 52struct gic_chip_data {
49void __iomem *gic_cpu_base_addr __read_mostly; 53 unsigned int irq_offset;
54 union gic_base dist_base;
55 union gic_base cpu_base;
56#ifdef CONFIG_CPU_PM
57 u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)];
58 u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)];
59 u32 saved_spi_target[DIV_ROUND_UP(1020, 4)];
60 u32 __percpu *saved_ppi_enable;
61 u32 __percpu *saved_ppi_conf;
62#endif
63#ifdef CONFIG_IRQ_DOMAIN
64 struct irq_domain domain;
65#endif
66 unsigned int gic_irqs;
67#ifdef CONFIG_GIC_NON_BANKED
68 void __iomem *(*get_base)(union gic_base *);
69#endif
70};
71
72static DEFINE_RAW_SPINLOCK(irq_controller_lock);
50 73
51/* 74/*
52 * Supported arch specific GIC irq extension. 75 * Supported arch specific GIC irq extension.
@@ -67,16 +90,48 @@ struct irq_chip gic_arch_extn = {
67 90
68static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly; 91static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly;
69 92
93#ifdef CONFIG_GIC_NON_BANKED
94static void __iomem *gic_get_percpu_base(union gic_base *base)
95{
96 return *__this_cpu_ptr(base->percpu_base);
97}
98
99static void __iomem *gic_get_common_base(union gic_base *base)
100{
101 return base->common_base;
102}
103
104static inline void __iomem *gic_data_dist_base(struct gic_chip_data *data)
105{
106 return data->get_base(&data->dist_base);
107}
108
109static inline void __iomem *gic_data_cpu_base(struct gic_chip_data *data)
110{
111 return data->get_base(&data->cpu_base);
112}
113
114static inline void gic_set_base_accessor(struct gic_chip_data *data,
115 void __iomem *(*f)(union gic_base *))
116{
117 data->get_base = f;
118}
119#else
120#define gic_data_dist_base(d) ((d)->dist_base.common_base)
121#define gic_data_cpu_base(d) ((d)->cpu_base.common_base)
122#define gic_set_base_accessor(d,f)
123#endif
124
70static inline void __iomem *gic_dist_base(struct irq_data *d) 125static inline void __iomem *gic_dist_base(struct irq_data *d)
71{ 126{
72 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); 127 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
73 return gic_data->dist_base; 128 return gic_data_dist_base(gic_data);
74} 129}
75 130
76static inline void __iomem *gic_cpu_base(struct irq_data *d) 131static inline void __iomem *gic_cpu_base(struct irq_data *d)
77{ 132{
78 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); 133 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
79 return gic_data->cpu_base; 134 return gic_data_cpu_base(gic_data);
80} 135}
81 136
82static inline unsigned int gic_irq(struct irq_data *d) 137static inline unsigned int gic_irq(struct irq_data *d)
@@ -215,6 +270,32 @@ static int gic_set_wake(struct irq_data *d, unsigned int on)
215#define gic_set_wake NULL 270#define gic_set_wake NULL
216#endif 271#endif
217 272
273asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
274{
275 u32 irqstat, irqnr;
276 struct gic_chip_data *gic = &gic_data[0];
277 void __iomem *cpu_base = gic_data_cpu_base(gic);
278
279 do {
280 irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK);
281 irqnr = irqstat & ~0x1c00;
282
283 if (likely(irqnr > 15 && irqnr < 1021)) {
284 irqnr = irq_domain_to_irq(&gic->domain, irqnr);
285 handle_IRQ(irqnr, regs);
286 continue;
287 }
288 if (irqnr < 16) {
289 writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI);
290#ifdef CONFIG_SMP
291 handle_IPI(irqnr, regs);
292#endif
293 continue;
294 }
295 break;
296 } while (1);
297}
298
218static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) 299static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
219{ 300{
220 struct gic_chip_data *chip_data = irq_get_handler_data(irq); 301 struct gic_chip_data *chip_data = irq_get_handler_data(irq);
@@ -225,7 +306,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
225 chained_irq_enter(chip, desc); 306 chained_irq_enter(chip, desc);
226 307
227 raw_spin_lock(&irq_controller_lock); 308 raw_spin_lock(&irq_controller_lock);
228 status = readl_relaxed(chip_data->cpu_base + GIC_CPU_INTACK); 309 status = readl_relaxed(gic_data_cpu_base(chip_data) + GIC_CPU_INTACK);
229 raw_spin_unlock(&irq_controller_lock); 310 raw_spin_unlock(&irq_controller_lock);
230 311
231 gic_irq = (status & 0x3ff); 312 gic_irq = (status & 0x3ff);
@@ -270,7 +351,7 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
270 u32 cpumask; 351 u32 cpumask;
271 unsigned int gic_irqs = gic->gic_irqs; 352 unsigned int gic_irqs = gic->gic_irqs;
272 struct irq_domain *domain = &gic->domain; 353 struct irq_domain *domain = &gic->domain;
273 void __iomem *base = gic->dist_base; 354 void __iomem *base = gic_data_dist_base(gic);
274 u32 cpu = 0; 355 u32 cpu = 0;
275 356
276#ifdef CONFIG_SMP 357#ifdef CONFIG_SMP
@@ -330,8 +411,8 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
330 411
331static void __cpuinit gic_cpu_init(struct gic_chip_data *gic) 412static void __cpuinit gic_cpu_init(struct gic_chip_data *gic)
332{ 413{
333 void __iomem *dist_base = gic->dist_base; 414 void __iomem *dist_base = gic_data_dist_base(gic);
334 void __iomem *base = gic->cpu_base; 415 void __iomem *base = gic_data_cpu_base(gic);
335 int i; 416 int i;
336 417
337 /* 418 /*
@@ -368,7 +449,7 @@ static void gic_dist_save(unsigned int gic_nr)
368 BUG(); 449 BUG();
369 450
370 gic_irqs = gic_data[gic_nr].gic_irqs; 451 gic_irqs = gic_data[gic_nr].gic_irqs;
371 dist_base = gic_data[gic_nr].dist_base; 452 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
372 453
373 if (!dist_base) 454 if (!dist_base)
374 return; 455 return;
@@ -403,7 +484,7 @@ static void gic_dist_restore(unsigned int gic_nr)
403 BUG(); 484 BUG();
404 485
405 gic_irqs = gic_data[gic_nr].gic_irqs; 486 gic_irqs = gic_data[gic_nr].gic_irqs;
406 dist_base = gic_data[gic_nr].dist_base; 487 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
407 488
408 if (!dist_base) 489 if (!dist_base)
409 return; 490 return;
@@ -439,8 +520,8 @@ static void gic_cpu_save(unsigned int gic_nr)
439 if (gic_nr >= MAX_GIC_NR) 520 if (gic_nr >= MAX_GIC_NR)
440 BUG(); 521 BUG();
441 522
442 dist_base = gic_data[gic_nr].dist_base; 523 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
443 cpu_base = gic_data[gic_nr].cpu_base; 524 cpu_base = gic_data_cpu_base(&gic_data[gic_nr]);
444 525
445 if (!dist_base || !cpu_base) 526 if (!dist_base || !cpu_base)
446 return; 527 return;
@@ -465,8 +546,8 @@ static void gic_cpu_restore(unsigned int gic_nr)
465 if (gic_nr >= MAX_GIC_NR) 546 if (gic_nr >= MAX_GIC_NR)
466 BUG(); 547 BUG();
467 548
468 dist_base = gic_data[gic_nr].dist_base; 549 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
469 cpu_base = gic_data[gic_nr].cpu_base; 550 cpu_base = gic_data_cpu_base(&gic_data[gic_nr]);
470 551
471 if (!dist_base || !cpu_base) 552 if (!dist_base || !cpu_base)
472 return; 553 return;
@@ -491,6 +572,11 @@ static int gic_notifier(struct notifier_block *self, unsigned long cmd, void *v)
491 int i; 572 int i;
492 573
493 for (i = 0; i < MAX_GIC_NR; i++) { 574 for (i = 0; i < MAX_GIC_NR; i++) {
575#ifdef CONFIG_GIC_NON_BANKED
576 /* Skip over unused GICs */
577 if (!gic_data[i].get_base)
578 continue;
579#endif
494 switch (cmd) { 580 switch (cmd) {
495 case CPU_PM_ENTER: 581 case CPU_PM_ENTER:
496 gic_cpu_save(i); 582 gic_cpu_save(i);
@@ -563,8 +649,9 @@ const struct irq_domain_ops gic_irq_domain_ops = {
563#endif 649#endif
564}; 650};
565 651
566void __init gic_init(unsigned int gic_nr, int irq_start, 652void __init gic_init_bases(unsigned int gic_nr, int irq_start,
567 void __iomem *dist_base, void __iomem *cpu_base) 653 void __iomem *dist_base, void __iomem *cpu_base,
654 u32 percpu_offset)
568{ 655{
569 struct gic_chip_data *gic; 656 struct gic_chip_data *gic;
570 struct irq_domain *domain; 657 struct irq_domain *domain;
@@ -574,15 +661,42 @@ void __init gic_init(unsigned int gic_nr, int irq_start,
574 661
575 gic = &gic_data[gic_nr]; 662 gic = &gic_data[gic_nr];
576 domain = &gic->domain; 663 domain = &gic->domain;
577 gic->dist_base = dist_base; 664#ifdef CONFIG_GIC_NON_BANKED
578 gic->cpu_base = cpu_base; 665 if (percpu_offset) { /* Frankein-GIC without banked registers... */
666 unsigned int cpu;
667
668 gic->dist_base.percpu_base = alloc_percpu(void __iomem *);
669 gic->cpu_base.percpu_base = alloc_percpu(void __iomem *);
670 if (WARN_ON(!gic->dist_base.percpu_base ||
671 !gic->cpu_base.percpu_base)) {
672 free_percpu(gic->dist_base.percpu_base);
673 free_percpu(gic->cpu_base.percpu_base);
674 return;
675 }
676
677 for_each_possible_cpu(cpu) {
678 unsigned long offset = percpu_offset * cpu_logical_map(cpu);
679 *per_cpu_ptr(gic->dist_base.percpu_base, cpu) = dist_base + offset;
680 *per_cpu_ptr(gic->cpu_base.percpu_base, cpu) = cpu_base + offset;
681 }
682
683 gic_set_base_accessor(gic, gic_get_percpu_base);
684 } else
685#endif
686 { /* Normal, sane GIC... */
687 WARN(percpu_offset,
688 "GIC_NON_BANKED not enabled, ignoring %08x offset!",
689 percpu_offset);
690 gic->dist_base.common_base = dist_base;
691 gic->cpu_base.common_base = cpu_base;
692 gic_set_base_accessor(gic, gic_get_common_base);
693 }
579 694
580 /* 695 /*
581 * For primary GICs, skip over SGIs. 696 * For primary GICs, skip over SGIs.
582 * For secondary GICs, skip over PPIs, too. 697 * For secondary GICs, skip over PPIs, too.
583 */ 698 */
584 if (gic_nr == 0) { 699 if (gic_nr == 0) {
585 gic_cpu_base_addr = cpu_base;
586 domain->hwirq_base = 16; 700 domain->hwirq_base = 16;
587 if (irq_start > 0) 701 if (irq_start > 0)
588 irq_start = (irq_start & ~31) + 16; 702 irq_start = (irq_start & ~31) + 16;
@@ -593,7 +707,7 @@ void __init gic_init(unsigned int gic_nr, int irq_start,
593 * Find out how many interrupts are supported. 707 * Find out how many interrupts are supported.
594 * The GIC only supports up to 1020 interrupt sources. 708 * The GIC only supports up to 1020 interrupt sources.
595 */ 709 */
596 gic_irqs = readl_relaxed(dist_base + GIC_DIST_CTR) & 0x1f; 710 gic_irqs = readl_relaxed(gic_data_dist_base(gic) + GIC_DIST_CTR) & 0x1f;
597 gic_irqs = (gic_irqs + 1) * 32; 711 gic_irqs = (gic_irqs + 1) * 32;
598 if (gic_irqs > 1020) 712 if (gic_irqs > 1020)
599 gic_irqs = 1020; 713 gic_irqs = 1020;
@@ -641,7 +755,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
641 dsb(); 755 dsb();
642 756
643 /* this always happens on GIC0 */ 757 /* this always happens on GIC0 */
644 writel_relaxed(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT); 758 writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);
645} 759}
646#endif 760#endif
647 761
@@ -652,6 +766,7 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
652{ 766{
653 void __iomem *cpu_base; 767 void __iomem *cpu_base;
654 void __iomem *dist_base; 768 void __iomem *dist_base;
769 u32 percpu_offset;
655 int irq; 770 int irq;
656 struct irq_domain *domain = &gic_data[gic_cnt].domain; 771 struct irq_domain *domain = &gic_data[gic_cnt].domain;
657 772
@@ -664,9 +779,12 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
664 cpu_base = of_iomap(node, 1); 779 cpu_base = of_iomap(node, 1);
665 WARN(!cpu_base, "unable to map gic cpu registers\n"); 780 WARN(!cpu_base, "unable to map gic cpu registers\n");
666 781
782 if (of_property_read_u32(node, "cpu-offset", &percpu_offset))
783 percpu_offset = 0;
784
667 domain->of_node = of_node_get(node); 785 domain->of_node = of_node_get(node);
668 786
669 gic_init(gic_cnt, -1, dist_base, cpu_base); 787 gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset);
670 788
671 if (parent) { 789 if (parent) {
672 irq = irq_of_parse_and_map(node, 0); 790 irq = irq_of_parse_and_map(node, 0);
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 01f18a421b17..6ed41ec2bbf5 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -19,17 +19,22 @@
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21 21
22#include <linux/export.h>
22#include <linux/init.h> 23#include <linux/init.h>
23#include <linux/list.h> 24#include <linux/list.h>
24#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/irqdomain.h>
27#include <linux/of.h>
28#include <linux/of_address.h>
29#include <linux/of_irq.h>
25#include <linux/syscore_ops.h> 30#include <linux/syscore_ops.h>
26#include <linux/device.h> 31#include <linux/device.h>
27#include <linux/amba/bus.h> 32#include <linux/amba/bus.h>
28 33
34#include <asm/exception.h>
29#include <asm/mach/irq.h> 35#include <asm/mach/irq.h>
30#include <asm/hardware/vic.h> 36#include <asm/hardware/vic.h>
31 37
32#ifdef CONFIG_PM
33/** 38/**
34 * struct vic_device - VIC PM device 39 * struct vic_device - VIC PM device
35 * @irq: The IRQ number for the base of the VIC. 40 * @irq: The IRQ number for the base of the VIC.
@@ -40,6 +45,7 @@
40 * @int_enable: Save for VIC_INT_ENABLE. 45 * @int_enable: Save for VIC_INT_ENABLE.
41 * @soft_int: Save for VIC_INT_SOFT. 46 * @soft_int: Save for VIC_INT_SOFT.
42 * @protect: Save for VIC_PROTECT. 47 * @protect: Save for VIC_PROTECT.
48 * @domain: The IRQ domain for the VIC.
43 */ 49 */
44struct vic_device { 50struct vic_device {
45 void __iomem *base; 51 void __iomem *base;
@@ -50,13 +56,13 @@ struct vic_device {
50 u32 int_enable; 56 u32 int_enable;
51 u32 soft_int; 57 u32 soft_int;
52 u32 protect; 58 u32 protect;
59 struct irq_domain domain;
53}; 60};
54 61
55/* we cannot allocate memory when VICs are initially registered */ 62/* we cannot allocate memory when VICs are initially registered */
56static struct vic_device vic_devices[CONFIG_ARM_VIC_NR]; 63static struct vic_device vic_devices[CONFIG_ARM_VIC_NR];
57 64
58static int vic_id; 65static int vic_id;
59#endif /* CONFIG_PM */
60 66
61/** 67/**
62 * vic_init2 - common initialisation code 68 * vic_init2 - common initialisation code
@@ -156,39 +162,50 @@ static int __init vic_pm_init(void)
156 return 0; 162 return 0;
157} 163}
158late_initcall(vic_pm_init); 164late_initcall(vic_pm_init);
165#endif /* CONFIG_PM */
159 166
160/** 167/**
161 * vic_pm_register - Register a VIC for later power management control 168 * vic_register() - Register a VIC.
162 * @base: The base address of the VIC. 169 * @base: The base address of the VIC.
163 * @irq: The base IRQ for the VIC. 170 * @irq: The base IRQ for the VIC.
164 * @resume_sources: bitmask of interrupts allowed for resume sources. 171 * @resume_sources: bitmask of interrupts allowed for resume sources.
172 * @node: The device tree node associated with the VIC.
165 * 173 *
166 * Register the VIC with the system device tree so that it can be notified 174 * Register the VIC with the system device tree so that it can be notified
167 * of suspend and resume requests and ensure that the correct actions are 175 * of suspend and resume requests and ensure that the correct actions are
168 * taken to re-instate the settings on resume. 176 * taken to re-instate the settings on resume.
177 *
178 * This also configures the IRQ domain for the VIC.
169 */ 179 */
170static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 resume_sources) 180static void __init vic_register(void __iomem *base, unsigned int irq,
181 u32 resume_sources, struct device_node *node)
171{ 182{
172 struct vic_device *v; 183 struct vic_device *v;
173 184
174 if (vic_id >= ARRAY_SIZE(vic_devices)) 185 if (vic_id >= ARRAY_SIZE(vic_devices)) {
175 printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__); 186 printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__);
176 else { 187 return;
177 v = &vic_devices[vic_id];
178 v->base = base;
179 v->resume_sources = resume_sources;
180 v->irq = irq;
181 vic_id++;
182 } 188 }
189
190 v = &vic_devices[vic_id];
191 v->base = base;
192 v->resume_sources = resume_sources;
193 v->irq = irq;
194 vic_id++;
195
196 v->domain.irq_base = irq;
197 v->domain.nr_irq = 32;
198#ifdef CONFIG_OF_IRQ
199 v->domain.of_node = of_node_get(node);
200 v->domain.ops = &irq_domain_simple_ops;
201#endif /* CONFIG_OF */
202 irq_domain_add(&v->domain);
183} 203}
184#else
185static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { }
186#endif /* CONFIG_PM */
187 204
188static void vic_ack_irq(struct irq_data *d) 205static void vic_ack_irq(struct irq_data *d)
189{ 206{
190 void __iomem *base = irq_data_get_irq_chip_data(d); 207 void __iomem *base = irq_data_get_irq_chip_data(d);
191 unsigned int irq = d->irq & 31; 208 unsigned int irq = d->hwirq;
192 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); 209 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
193 /* moreover, clear the soft-triggered, in case it was the reason */ 210 /* moreover, clear the soft-triggered, in case it was the reason */
194 writel(1 << irq, base + VIC_INT_SOFT_CLEAR); 211 writel(1 << irq, base + VIC_INT_SOFT_CLEAR);
@@ -197,14 +214,14 @@ static void vic_ack_irq(struct irq_data *d)
197static void vic_mask_irq(struct irq_data *d) 214static void vic_mask_irq(struct irq_data *d)
198{ 215{
199 void __iomem *base = irq_data_get_irq_chip_data(d); 216 void __iomem *base = irq_data_get_irq_chip_data(d);
200 unsigned int irq = d->irq & 31; 217 unsigned int irq = d->hwirq;
201 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); 218 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
202} 219}
203 220
204static void vic_unmask_irq(struct irq_data *d) 221static void vic_unmask_irq(struct irq_data *d)
205{ 222{
206 void __iomem *base = irq_data_get_irq_chip_data(d); 223 void __iomem *base = irq_data_get_irq_chip_data(d);
207 unsigned int irq = d->irq & 31; 224 unsigned int irq = d->hwirq;
208 writel(1 << irq, base + VIC_INT_ENABLE); 225 writel(1 << irq, base + VIC_INT_ENABLE);
209} 226}
210 227
@@ -226,7 +243,7 @@ static struct vic_device *vic_from_irq(unsigned int irq)
226static int vic_set_wake(struct irq_data *d, unsigned int on) 243static int vic_set_wake(struct irq_data *d, unsigned int on)
227{ 244{
228 struct vic_device *v = vic_from_irq(d->irq); 245 struct vic_device *v = vic_from_irq(d->irq);
229 unsigned int off = d->irq & 31; 246 unsigned int off = d->hwirq;
230 u32 bit = 1 << off; 247 u32 bit = 1 << off;
231 248
232 if (!v) 249 if (!v)
@@ -330,15 +347,9 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
330 vic_set_irq_sources(base, irq_start, vic_sources); 347 vic_set_irq_sources(base, irq_start, vic_sources);
331} 348}
332 349
333/** 350static void __init __vic_init(void __iomem *base, unsigned int irq_start,
334 * vic_init - initialise a vectored interrupt controller 351 u32 vic_sources, u32 resume_sources,
335 * @base: iomem base address 352 struct device_node *node)
336 * @irq_start: starting interrupt number, must be muliple of 32
337 * @vic_sources: bitmask of interrupt sources to allow
338 * @resume_sources: bitmask of interrupt sources to allow for resume
339 */
340void __init vic_init(void __iomem *base, unsigned int irq_start,
341 u32 vic_sources, u32 resume_sources)
342{ 353{
343 unsigned int i; 354 unsigned int i;
344 u32 cellid = 0; 355 u32 cellid = 0;
@@ -375,5 +386,81 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
375 386
376 vic_set_irq_sources(base, irq_start, vic_sources); 387 vic_set_irq_sources(base, irq_start, vic_sources);
377 388
378 vic_pm_register(base, irq_start, resume_sources); 389 vic_register(base, irq_start, resume_sources, node);
390}
391
392/**
393 * vic_init() - initialise a vectored interrupt controller
394 * @base: iomem base address
395 * @irq_start: starting interrupt number, must be muliple of 32
396 * @vic_sources: bitmask of interrupt sources to allow
397 * @resume_sources: bitmask of interrupt sources to allow for resume
398 */
399void __init vic_init(void __iomem *base, unsigned int irq_start,
400 u32 vic_sources, u32 resume_sources)
401{
402 __vic_init(base, irq_start, vic_sources, resume_sources, NULL);
403}
404
405#ifdef CONFIG_OF
406int __init vic_of_init(struct device_node *node, struct device_node *parent)
407{
408 void __iomem *regs;
409 int irq_base;
410
411 if (WARN(parent, "non-root VICs are not supported"))
412 return -EINVAL;
413
414 regs = of_iomap(node, 0);
415 if (WARN_ON(!regs))
416 return -EIO;
417
418 irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
419 if (WARN_ON(irq_base < 0))
420 goto out_unmap;
421
422 __vic_init(regs, irq_base, ~0, ~0, node);
423
424 return 0;
425
426 out_unmap:
427 iounmap(regs);
428
429 return -EIO;
430}
431#endif /* CONFIG OF */
432
433/*
434 * Handle each interrupt in a single VIC. Returns non-zero if we've
435 * handled at least one interrupt. This does a single read of the
436 * status register and handles all interrupts in order from LSB first.
437 */
438static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
439{
440 u32 stat, irq;
441 int handled = 0;
442
443 stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
444 while (stat) {
445 irq = ffs(stat) - 1;
446 handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
447 stat &= ~(1 << irq);
448 handled = 1;
449 }
450
451 return handled;
452}
453
454/*
455 * Keep iterating over all registered VIC's until there are no pending
456 * interrupts.
457 */
458asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
459{
460 int i, handled;
461
462 do {
463 for (i = 0, handled = 0; i < vic_id; ++i)
464 handled |= handle_one_vic(&vic_devices[i], regs);
465 } while (handled);
379} 466}
diff --git a/arch/arm/include/asm/entry-macro-vic2.S b/arch/arm/include/asm/entry-macro-vic2.S
deleted file mode 100644
index 3ceb85e43850..000000000000
--- a/arch/arm/include/asm/entry-macro-vic2.S
+++ /dev/null
@@ -1,57 +0,0 @@
1/* arch/arm/include/asm/entry-macro-vic2.S
2 *
3 * Originally arch/arm/mach-s3c6400/include/mach/entry-macro.S
4 *
5 * Copyright 2008 Openmoko, Inc.
6 * Copyright 2008 Simtec Electronics
7 * http://armlinux.simtec.co.uk/
8 * Ben Dooks <ben@simtec.co.uk>
9 *
10 * Low-level IRQ helper macros for a device with two VICs
11 *
12 * This file is licensed under the terms of the GNU General Public
13 * License version 2. This program is licensed "as is" without any
14 * warranty of any kind, whether express or implied.
15*/
16
17/* This should be included from <mach/entry-macro.S> with the necessary
18 * defines for virtual addresses and IRQ bases for the two vics.
19 *
20 * The code needs the following defined:
21 * IRQ_VIC0_BASE IRQ number of VIC0's first IRQ
22 * IRQ_VIC1_BASE IRQ number of VIC1's first IRQ
23 * VA_VIC0 Virtual address of VIC0
24 * VA_VIC1 Virtual address of VIC1
25 *
26 * Note, code assumes VIC0's virtual address is an ARM immediate constant
27 * away from VIC1.
28*/
29
30#include <asm/hardware/vic.h>
31
32 .macro disable_fiq
33 .endm
34
35 .macro get_irqnr_preamble, base, tmp
36 ldr \base, =VA_VIC0
37 .endm
38
39 .macro arch_ret_to_user, tmp1, tmp2
40 .endm
41
42 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
43
44 @ check the vic0
45 mov \irqnr, #IRQ_VIC0_BASE + 31
46 ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
47 teq \irqstat, #0
48
49 @ otherwise try vic1
50 addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
51 addeq \irqnr, \irqnr, #(IRQ_VIC1_BASE - IRQ_VIC0_BASE)
52 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
53 teqeq \irqstat, #0
54
55 clzne \irqstat, \irqstat
56 subne \irqnr, \irqnr, \irqstat
57 .endm
diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S
deleted file mode 100644
index 74ebc803904d..000000000000
--- a/arch/arm/include/asm/hardware/entry-macro-gic.S
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * arch/arm/include/asm/hardware/entry-macro-gic.S
3 *
4 * Low-level IRQ helper macros for GIC
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <asm/hardware/gic.h>
12
13#ifndef HAVE_GET_IRQNR_PREAMBLE
14 .macro get_irqnr_preamble, base, tmp
15 ldr \base, =gic_cpu_base_addr
16 ldr \base, [\base]
17 .endm
18#endif
19
20/*
21 * The interrupt numbering scheme is defined in the
22 * interrupt controller spec. To wit:
23 *
24 * Interrupts 0-15 are IPI
25 * 16-31 are local. We allow 30 to be used for the watchdog.
26 * 32-1020 are global
27 * 1021-1022 are reserved
28 * 1023 is "spurious" (no interrupt)
29 *
30 * A simple read from the controller will tell us the number of the highest
31 * priority enabled interrupt. We then just need to check whether it is in the
32 * valid range for an IRQ (30-1020 inclusive).
33 */
34
35 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
36
37 ldr \irqstat, [\base, #GIC_CPU_INTACK]
38 /* bits 12-10 = src CPU, 9-0 = int # */
39
40 ldr \tmp, =1021
41 bic \irqnr, \irqstat, #0x1c00
42 cmp \irqnr, #15
43 cmpcc \irqnr, \irqnr
44 cmpne \irqnr, \tmp
45 cmpcs \irqnr, \irqnr
46 .endm
47
48/* We assume that irqstat (the raw value of the IRQ acknowledge
49 * register) is preserved from the macro above.
50 * If there is an IPI, we immediately signal end of interrupt on the
51 * controller, since this requires the original irqstat value which
52 * we won't easily be able to recreate later.
53 */
54
55 .macro test_for_ipi, irqnr, irqstat, base, tmp
56 bic \irqnr, \irqstat, #0x1c00
57 cmp \irqnr, #16
58 strcc \irqstat, [\base, #GIC_CPU_EOI]
59 cmpcs \irqnr, \irqnr
60 .endm
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 3e91f22046f5..4bdfe0018696 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -36,30 +36,22 @@
36#include <linux/irqdomain.h> 36#include <linux/irqdomain.h>
37struct device_node; 37struct device_node;
38 38
39extern void __iomem *gic_cpu_base_addr;
40extern struct irq_chip gic_arch_extn; 39extern struct irq_chip gic_arch_extn;
41 40
42void gic_init(unsigned int, int, void __iomem *, void __iomem *); 41void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
42 u32 offset);
43int gic_of_init(struct device_node *node, struct device_node *parent); 43int gic_of_init(struct device_node *node, struct device_node *parent);
44void gic_secondary_init(unsigned int); 44void gic_secondary_init(unsigned int);
45void gic_handle_irq(struct pt_regs *regs);
45void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); 46void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
46void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); 47void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
47 48
48struct gic_chip_data { 49static inline void gic_init(unsigned int nr, int start,
49 void __iomem *dist_base; 50 void __iomem *dist , void __iomem *cpu)
50 void __iomem *cpu_base; 51{
51#ifdef CONFIG_CPU_PM 52 gic_init_bases(nr, start, dist, cpu, 0);
52 u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)]; 53}
53 u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)]; 54
54 u32 saved_spi_target[DIV_ROUND_UP(1020, 4)];
55 u32 __percpu *saved_ppi_enable;
56 u32 __percpu *saved_ppi_conf;
57#endif
58#ifdef CONFIG_IRQ_DOMAIN
59 struct irq_domain domain;
60#endif
61 unsigned int gic_irqs;
62};
63#endif 55#endif
64 56
65#endif 57#endif
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
index 5d72550a8097..f42ebd619590 100644
--- a/arch/arm/include/asm/hardware/vic.h
+++ b/arch/arm/include/asm/hardware/vic.h
@@ -41,7 +41,15 @@
41#define VIC_PL192_VECT_ADDR 0xF00 41#define VIC_PL192_VECT_ADDR 0xF00
42 42
43#ifndef __ASSEMBLY__ 43#ifndef __ASSEMBLY__
44#include <linux/compiler.h>
45#include <linux/types.h>
46
47struct device_node;
48struct pt_regs;
49
44void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); 50void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
45#endif 51int vic_of_init(struct device_node *node, struct device_node *parent);
52void vic_handle_irq(struct pt_regs *regs);
46 53
54#endif /* __ASSEMBLY__ */
47#endif 55#endif
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 9ad50c4208ae..bd49a6a2a17d 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -36,12 +36,11 @@
36#ifdef CONFIG_MULTI_IRQ_HANDLER 36#ifdef CONFIG_MULTI_IRQ_HANDLER
37 ldr r1, =handle_arch_irq 37 ldr r1, =handle_arch_irq
38 mov r0, sp 38 mov r0, sp
39 ldr r1, [r1]
40 adr lr, BSYM(9997f) 39 adr lr, BSYM(9997f)
41 teq r1, #0 40 ldr pc, [r1]
42 movne pc, r1 41#else
43#endif
44 arch_irq_handler_default 42 arch_irq_handler_default
43#endif
459997: 449997:
46 .endm 45 .endm
47 46
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index a4401d6b5b07..adad70db70eb 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -98,7 +98,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
98 * USB HS Device (Gadget) 98 * USB HS Device (Gadget)
99 * -------------------------------------------------------------------- */ 99 * -------------------------------------------------------------------- */
100 100
101#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE) 101#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
102 102
103static struct resource usba_udc_resources[] = { 103static struct resource usba_udc_resources[] = {
104 [0] = { 104 [0] = {
@@ -1021,8 +1021,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1021#if defined(CONFIG_SERIAL_ATMEL) 1021#if defined(CONFIG_SERIAL_ATMEL)
1022static struct resource dbgu_resources[] = { 1022static struct resource dbgu_resources[] = {
1023 [0] = { 1023 [0] = {
1024 .start = AT91_VA_BASE_SYS + AT91_DBGU, 1024 .start = AT91_BASE_SYS + AT91_DBGU,
1025 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1025 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1026 .flags = IORESOURCE_MEM, 1026 .flags = IORESOURCE_MEM,
1027 }, 1027 },
1028 [1] = { 1028 [1] = {
@@ -1035,7 +1035,6 @@ static struct resource dbgu_resources[] = {
1035static struct atmel_uart_data dbgu_data = { 1035static struct atmel_uart_data dbgu_data = {
1036 .use_dma_tx = 0, 1036 .use_dma_tx = 0,
1037 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 1037 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
1038 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
1039}; 1038};
1040 1039
1041static u64 dbgu_dmamask = DMA_BIT_MASK(32); 1040static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 01d8bbd1468b..66591fa53e05 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -877,8 +877,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
877#if defined(CONFIG_SERIAL_ATMEL) 877#if defined(CONFIG_SERIAL_ATMEL)
878static struct resource dbgu_resources[] = { 878static struct resource dbgu_resources[] = {
879 [0] = { 879 [0] = {
880 .start = AT91_VA_BASE_SYS + AT91_DBGU, 880 .start = AT91_BASE_SYS + AT91_DBGU,
881 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 881 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
882 .flags = IORESOURCE_MEM, 882 .flags = IORESOURCE_MEM,
883 }, 883 },
884 [1] = { 884 [1] = {
@@ -891,7 +891,6 @@ static struct resource dbgu_resources[] = {
891static struct atmel_uart_data dbgu_data = { 891static struct atmel_uart_data dbgu_data = {
892 .use_dma_tx = 0, 892 .use_dma_tx = 0,
893 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 893 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
894 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
895}; 894};
896 895
897static u64 dbgu_dmamask = DMA_BIT_MASK(32); 896static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 24b6f8c0440d..25e3464fb07f 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -837,8 +837,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
837#if defined(CONFIG_SERIAL_ATMEL) 837#if defined(CONFIG_SERIAL_ATMEL)
838static struct resource dbgu_resources[] = { 838static struct resource dbgu_resources[] = {
839 [0] = { 839 [0] = {
840 .start = AT91_VA_BASE_SYS + AT91_DBGU, 840 .start = AT91_BASE_SYS + AT91_DBGU,
841 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 841 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
842 .flags = IORESOURCE_MEM, 842 .flags = IORESOURCE_MEM,
843 }, 843 },
844 [1] = { 844 [1] = {
@@ -851,7 +851,6 @@ static struct resource dbgu_resources[] = {
851static struct atmel_uart_data dbgu_data = { 851static struct atmel_uart_data dbgu_data = {
852 .use_dma_tx = 0, 852 .use_dma_tx = 0,
853 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 853 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
854 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
855}; 854};
856 855
857static u64 dbgu_dmamask = DMA_BIT_MASK(32); 856static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 3b70b3897d95..ae78f4d03b73 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -816,8 +816,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
816#if defined(CONFIG_SERIAL_ATMEL) 816#if defined(CONFIG_SERIAL_ATMEL)
817static struct resource dbgu_resources[] = { 817static struct resource dbgu_resources[] = {
818 [0] = { 818 [0] = {
819 .start = AT91_VA_BASE_SYS + AT91_DBGU, 819 .start = AT91_BASE_SYS + AT91_DBGU,
820 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 820 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
821 .flags = IORESOURCE_MEM, 821 .flags = IORESOURCE_MEM,
822 }, 822 },
823 [1] = { 823 [1] = {
@@ -830,7 +830,6 @@ static struct resource dbgu_resources[] = {
830static struct atmel_uart_data dbgu_data = { 830static struct atmel_uart_data dbgu_data = {
831 .use_dma_tx = 0, 831 .use_dma_tx = 0,
832 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 832 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
833 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
834}; 833};
835 834
836static u64 dbgu_dmamask = DMA_BIT_MASK(32); 835static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 3faa1fde9ad9..ad017eb1f8df 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -1196,8 +1196,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1196 1196
1197static struct resource dbgu_resources[] = { 1197static struct resource dbgu_resources[] = {
1198 [0] = { 1198 [0] = {
1199 .start = AT91_VA_BASE_SYS + AT91_DBGU, 1199 .start = AT91_BASE_SYS + AT91_DBGU,
1200 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1200 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1201 .flags = IORESOURCE_MEM, 1201 .flags = IORESOURCE_MEM,
1202 }, 1202 },
1203 [1] = { 1203 [1] = {
@@ -1210,7 +1210,6 @@ static struct resource dbgu_resources[] = {
1210static struct atmel_uart_data dbgu_data = { 1210static struct atmel_uart_data dbgu_data = {
1211 .use_dma_tx = 0, 1211 .use_dma_tx = 0,
1212 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 1212 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
1213 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
1214}; 1213};
1215 1214
1216static u64 dbgu_dmamask = DMA_BIT_MASK(32); 1215static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 000b5e1da965..09a16d6bd5cd 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -197,7 +197,7 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) {}
197 * USB HS Device (Gadget) 197 * USB HS Device (Gadget)
198 * -------------------------------------------------------------------- */ 198 * -------------------------------------------------------------------- */
199 199
200#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE) 200#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
201static struct resource usba_udc_resources[] = { 201static struct resource usba_udc_resources[] = {
202 [0] = { 202 [0] = {
203 .start = AT91SAM9G45_UDPHS_FIFO, 203 .start = AT91SAM9G45_UDPHS_FIFO,
@@ -1332,8 +1332,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1332#if defined(CONFIG_SERIAL_ATMEL) 1332#if defined(CONFIG_SERIAL_ATMEL)
1333static struct resource dbgu_resources[] = { 1333static struct resource dbgu_resources[] = {
1334 [0] = { 1334 [0] = {
1335 .start = AT91_VA_BASE_SYS + AT91_DBGU, 1335 .start = AT91_BASE_SYS + AT91_DBGU,
1336 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1336 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1337 .flags = IORESOURCE_MEM, 1337 .flags = IORESOURCE_MEM,
1338 }, 1338 },
1339 [1] = { 1339 [1] = {
@@ -1346,7 +1346,6 @@ static struct resource dbgu_resources[] = {
1346static struct atmel_uart_data dbgu_data = { 1346static struct atmel_uart_data dbgu_data = {
1347 .use_dma_tx = 0, 1347 .use_dma_tx = 0,
1348 .use_dma_rx = 0, 1348 .use_dma_rx = 0,
1349 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
1350}; 1349};
1351 1350
1352static u64 dbgu_dmamask = DMA_BIT_MASK(32); 1351static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 305a851b5bff..628eb566d60c 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -75,7 +75,7 @@ void __init at91_add_device_hdmac(void) {}
75 * USB HS Device (Gadget) 75 * USB HS Device (Gadget)
76 * -------------------------------------------------------------------- */ 76 * -------------------------------------------------------------------- */
77 77
78#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE) 78#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
79 79
80static struct resource usba_udc_resources[] = { 80static struct resource usba_udc_resources[] = {
81 [0] = { 81 [0] = {
@@ -908,8 +908,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
908#if defined(CONFIG_SERIAL_ATMEL) 908#if defined(CONFIG_SERIAL_ATMEL)
909static struct resource dbgu_resources[] = { 909static struct resource dbgu_resources[] = {
910 [0] = { 910 [0] = {
911 .start = AT91_VA_BASE_SYS + AT91_DBGU, 911 .start = AT91_BASE_SYS + AT91_DBGU,
912 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 912 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
913 .flags = IORESOURCE_MEM, 913 .flags = IORESOURCE_MEM,
914 }, 914 },
915 [1] = { 915 [1] = {
@@ -922,7 +922,6 @@ static struct resource dbgu_resources[] = {
922static struct atmel_uart_data dbgu_data = { 922static struct atmel_uart_data dbgu_data = {
923 .use_dma_tx = 0, 923 .use_dma_tx = 0,
924 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 924 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
925 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
926}; 925};
927 926
928static u64 dbgu_dmamask = DMA_BIT_MASK(32); 927static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index 649b052231f5..12a3f955162b 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -384,7 +384,7 @@ static struct spi_board_info yl9200_spi_devices[] = {
384#include <video/s1d13xxxfb.h> 384#include <video/s1d13xxxfb.h>
385 385
386 386
387static void __init yl9200_init_video(void) 387static void yl9200_init_video(void)
388{ 388{
389 /* NWAIT Signal */ 389 /* NWAIT Signal */
390 at91_set_A_periph(AT91_PIN_PC6, 0); 390 at91_set_A_periph(AT91_PIN_PC6, 0);
diff --git a/arch/arm/mach-at91/include/mach/vmalloc.h b/arch/arm/mach-at91/include/mach/vmalloc.h
index 8eb459f3f5b7..8e4a1bd0ab1d 100644
--- a/arch/arm/mach-at91/include/mach/vmalloc.h
+++ b/arch/arm/mach-at91/include/mach/vmalloc.h
@@ -21,6 +21,8 @@
21#ifndef __ASM_ARCH_VMALLOC_H 21#ifndef __ASM_ARCH_VMALLOC_H
22#define __ASM_ARCH_VMALLOC_H 22#define __ASM_ARCH_VMALLOC_H
23 23
24#include <mach/hardware.h>
25
24#define VMALLOC_END (AT91_VIRT_BASE & PGDIR_MASK) 26#define VMALLOC_END (AT91_VIRT_BASE & PGDIR_MASK)
25 27
26#endif 28#endif
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c
index 55f7b4b08ab9..594852fe24cc 100644
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -26,6 +26,7 @@
26#include <linux/mtd/partitions.h> 26#include <linux/mtd/partitions.h>
27#include <asm/setup.h> 27#include <asm/setup.h>
28#include <asm/mach-types.h> 28#include <asm/mach-types.h>
29#include <asm/hardware/gic.h>
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 31#include <asm/mach/map.h>
31#include <asm/mach/time.h> 32#include <asm/mach/time.h>
@@ -201,5 +202,6 @@ MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
201 .map_io = cns3420_map_io, 202 .map_io = cns3420_map_io,
202 .init_irq = cns3xxx_init_irq, 203 .init_irq = cns3xxx_init_irq,
203 .timer = &cns3xxx_timer, 204 .timer = &cns3xxx_timer,
205 .handle_irq = gic_handle_irq,
204 .init_machine = cns3420_init, 206 .init_machine = cns3420_init,
205MACHINE_END 207MACHINE_END
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
index d87bfc397d39..01c57df5f716 100644
--- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
+++ b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
@@ -8,8 +8,6 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#include <asm/hardware/entry-macro-gic.S>
12
13 .macro disable_fiq 11 .macro disable_fiq
14 .endm 12 .endm
15 13
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index 0713448206a5..d9b0ea2ba4d8 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -16,6 +16,7 @@
16 16
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18 18
19#include <asm/hardware/vic.h>
19#include <asm/mach-types.h> 20#include <asm/mach-types.h>
20#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
21 22
@@ -36,6 +37,7 @@ MACHINE_START(ADSSPHERE, "ADS Sphere board")
36 .atag_offset = 0x100, 37 .atag_offset = 0x100,
37 .map_io = ep93xx_map_io, 38 .map_io = ep93xx_map_io,
38 .init_irq = ep93xx_init_irq, 39 .init_irq = ep93xx_init_irq,
40 .handle_irq = vic_handle_irq,
39 .timer = &ep93xx_timer, 41 .timer = &ep93xx_timer,
40 .init_machine = adssphere_init_machine, 42 .init_machine = adssphere_init_machine,
41MACHINE_END 43MACHINE_END
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
index 70ef8c527d27..9bbae0835f27 100644
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ b/arch/arm/mach-ep93xx/edb93xx.c
@@ -39,6 +39,7 @@
39#include <mach/ep93xx_spi.h> 39#include <mach/ep93xx_spi.h>
40#include <mach/gpio-ep93xx.h> 40#include <mach/gpio-ep93xx.h>
41 41
42#include <asm/hardware/vic.h>
42#include <asm/mach-types.h> 43#include <asm/mach-types.h>
43#include <asm/mach/arch.h> 44#include <asm/mach/arch.h>
44 45
@@ -250,6 +251,7 @@ MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board")
250 .atag_offset = 0x100, 251 .atag_offset = 0x100,
251 .map_io = ep93xx_map_io, 252 .map_io = ep93xx_map_io,
252 .init_irq = ep93xx_init_irq, 253 .init_irq = ep93xx_init_irq,
254 .handle_irq = vic_handle_irq,
253 .timer = &ep93xx_timer, 255 .timer = &ep93xx_timer,
254 .init_machine = edb93xx_init_machine, 256 .init_machine = edb93xx_init_machine,
255MACHINE_END 257MACHINE_END
@@ -261,6 +263,7 @@ MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
261 .atag_offset = 0x100, 263 .atag_offset = 0x100,
262 .map_io = ep93xx_map_io, 264 .map_io = ep93xx_map_io,
263 .init_irq = ep93xx_init_irq, 265 .init_irq = ep93xx_init_irq,
266 .handle_irq = vic_handle_irq,
264 .timer = &ep93xx_timer, 267 .timer = &ep93xx_timer,
265 .init_machine = edb93xx_init_machine, 268 .init_machine = edb93xx_init_machine,
266MACHINE_END 269MACHINE_END
@@ -272,6 +275,7 @@ MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
272 .atag_offset = 0x100, 275 .atag_offset = 0x100,
273 .map_io = ep93xx_map_io, 276 .map_io = ep93xx_map_io,
274 .init_irq = ep93xx_init_irq, 277 .init_irq = ep93xx_init_irq,
278 .handle_irq = vic_handle_irq,
275 .timer = &ep93xx_timer, 279 .timer = &ep93xx_timer,
276 .init_machine = edb93xx_init_machine, 280 .init_machine = edb93xx_init_machine,
277MACHINE_END 281MACHINE_END
@@ -283,6 +287,7 @@ MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
283 .atag_offset = 0x100, 287 .atag_offset = 0x100,
284 .map_io = ep93xx_map_io, 288 .map_io = ep93xx_map_io,
285 .init_irq = ep93xx_init_irq, 289 .init_irq = ep93xx_init_irq,
290 .handle_irq = vic_handle_irq,
286 .timer = &ep93xx_timer, 291 .timer = &ep93xx_timer,
287 .init_machine = edb93xx_init_machine, 292 .init_machine = edb93xx_init_machine,
288MACHINE_END 293MACHINE_END
@@ -294,6 +299,7 @@ MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")
294 .atag_offset = 0x100, 299 .atag_offset = 0x100,
295 .map_io = ep93xx_map_io, 300 .map_io = ep93xx_map_io,
296 .init_irq = ep93xx_init_irq, 301 .init_irq = ep93xx_init_irq,
302 .handle_irq = vic_handle_irq,
297 .timer = &ep93xx_timer, 303 .timer = &ep93xx_timer,
298 .init_machine = edb93xx_init_machine, 304 .init_machine = edb93xx_init_machine,
299MACHINE_END 305MACHINE_END
@@ -305,6 +311,7 @@ MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
305 .atag_offset = 0x100, 311 .atag_offset = 0x100,
306 .map_io = ep93xx_map_io, 312 .map_io = ep93xx_map_io,
307 .init_irq = ep93xx_init_irq, 313 .init_irq = ep93xx_init_irq,
314 .handle_irq = vic_handle_irq,
308 .timer = &ep93xx_timer, 315 .timer = &ep93xx_timer,
309 .init_machine = edb93xx_init_machine, 316 .init_machine = edb93xx_init_machine,
310MACHINE_END 317MACHINE_END
@@ -316,6 +323,7 @@ MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
316 .atag_offset = 0x100, 323 .atag_offset = 0x100,
317 .map_io = ep93xx_map_io, 324 .map_io = ep93xx_map_io,
318 .init_irq = ep93xx_init_irq, 325 .init_irq = ep93xx_init_irq,
326 .handle_irq = vic_handle_irq,
319 .timer = &ep93xx_timer, 327 .timer = &ep93xx_timer,
320 .init_machine = edb93xx_init_machine, 328 .init_machine = edb93xx_init_machine,
321MACHINE_END 329MACHINE_END
@@ -327,6 +335,7 @@ MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
327 .atag_offset = 0x100, 335 .atag_offset = 0x100,
328 .map_io = ep93xx_map_io, 336 .map_io = ep93xx_map_io,
329 .init_irq = ep93xx_init_irq, 337 .init_irq = ep93xx_init_irq,
338 .handle_irq = vic_handle_irq,
330 .timer = &ep93xx_timer, 339 .timer = &ep93xx_timer,
331 .init_machine = edb93xx_init_machine, 340 .init_machine = edb93xx_init_machine,
332MACHINE_END 341MACHINE_END
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index 45ee205856f8..1dd32a7c5f15 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -16,6 +16,7 @@
16 16
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18 18
19#include <asm/hardware/vic.h>
19#include <asm/mach-types.h> 20#include <asm/mach-types.h>
20#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
21 22
@@ -36,6 +37,7 @@ MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
36 .atag_offset = 0x100, 37 .atag_offset = 0x100,
37 .map_io = ep93xx_map_io, 38 .map_io = ep93xx_map_io,
38 .init_irq = ep93xx_init_irq, 39 .init_irq = ep93xx_init_irq,
40 .handle_irq = vic_handle_irq,
39 .timer = &ep93xx_timer, 41 .timer = &ep93xx_timer,
40 .init_machine = gesbc9312_init_machine, 42 .init_machine = gesbc9312_init_machine,
41MACHINE_END 43MACHINE_END
diff --git a/arch/arm/mach-ep93xx/include/mach/entry-macro.S b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
index 96b85e2c2c0b..9be6edcf9045 100644
--- a/arch/arm/mach-ep93xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
@@ -9,51 +9,9 @@
9 * the Free Software Foundation; either version 2 of the License, or (at 9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version. 10 * your option) any later version.
11 */ 11 */
12#include <mach/ep93xx-regs.h>
13 12
14 .macro disable_fiq 13 .macro disable_fiq
15 .endm 14 .endm
16 15
17 .macro get_irqnr_preamble, base, tmp
18 .endm
19
20 .macro arch_ret_to_user, tmp1, tmp2 16 .macro arch_ret_to_user, tmp1, tmp2
21 .endm 17 .endm
22
23 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
24 ldr \base, =(EP93XX_AHB_VIRT_BASE)
25 orr \base, \base, #0x000b0000
26 mov \irqnr, #0
27 ldr \irqstat, [\base] @ lower 32 interrupts
28 cmp \irqstat, #0
29 bne 1001f
30
31 eor \base, \base, #0x00070000
32 ldr \irqstat, [\base] @ upper 32 interrupts
33 cmp \irqstat, #0
34 beq 1002f
35 mov \irqnr, #0x20
36
371001:
38 movs \tmp, \irqstat, lsl #16
39 movne \irqstat, \tmp
40 addeq \irqnr, \irqnr, #16
41
42 movs \tmp, \irqstat, lsl #8
43 movne \irqstat, \tmp
44 addeq \irqnr, \irqnr, #8
45
46 movs \tmp, \irqstat, lsl #4
47 movne \irqstat, \tmp
48 addeq \irqnr, \irqnr, #4
49
50 movs \tmp, \irqstat, lsl #2
51 movne \irqstat, \tmp
52 addeq \irqnr, \irqnr, #2
53
54 movs \tmp, \irqstat, lsl #1
55 addeq \irqnr, \irqnr, #1
56 orrs \base, \base, #1
57
581002:
59 .endm
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index e72f7368876e..a6dae6c2e3c1 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -18,6 +18,7 @@
18 18
19#include <mach/hardware.h> 19#include <mach/hardware.h>
20 20
21#include <asm/hardware/vic.h>
21#include <asm/mach-types.h> 22#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
23 24
@@ -80,6 +81,7 @@ MACHINE_START(MICRO9, "Contec Micro9-High")
80 .atag_offset = 0x100, 81 .atag_offset = 0x100,
81 .map_io = ep93xx_map_io, 82 .map_io = ep93xx_map_io,
82 .init_irq = ep93xx_init_irq, 83 .init_irq = ep93xx_init_irq,
84 .handle_irq = vic_handle_irq,
83 .timer = &ep93xx_timer, 85 .timer = &ep93xx_timer,
84 .init_machine = micro9_init_machine, 86 .init_machine = micro9_init_machine,
85MACHINE_END 87MACHINE_END
@@ -91,6 +93,7 @@ MACHINE_START(MICRO9M, "Contec Micro9-Mid")
91 .atag_offset = 0x100, 93 .atag_offset = 0x100,
92 .map_io = ep93xx_map_io, 94 .map_io = ep93xx_map_io,
93 .init_irq = ep93xx_init_irq, 95 .init_irq = ep93xx_init_irq,
96 .handle_irq = vic_handle_irq,
94 .timer = &ep93xx_timer, 97 .timer = &ep93xx_timer,
95 .init_machine = micro9_init_machine, 98 .init_machine = micro9_init_machine,
96MACHINE_END 99MACHINE_END
@@ -102,6 +105,7 @@ MACHINE_START(MICRO9L, "Contec Micro9-Lite")
102 .atag_offset = 0x100, 105 .atag_offset = 0x100,
103 .map_io = ep93xx_map_io, 106 .map_io = ep93xx_map_io,
104 .init_irq = ep93xx_init_irq, 107 .init_irq = ep93xx_init_irq,
108 .handle_irq = vic_handle_irq,
105 .timer = &ep93xx_timer, 109 .timer = &ep93xx_timer,
106 .init_machine = micro9_init_machine, 110 .init_machine = micro9_init_machine,
107MACHINE_END 111MACHINE_END
@@ -113,6 +117,7 @@ MACHINE_START(MICRO9S, "Contec Micro9-Slim")
113 .atag_offset = 0x100, 117 .atag_offset = 0x100,
114 .map_io = ep93xx_map_io, 118 .map_io = ep93xx_map_io,
115 .init_irq = ep93xx_init_irq, 119 .init_irq = ep93xx_init_irq,
120 .handle_irq = vic_handle_irq,
116 .timer = &ep93xx_timer, 121 .timer = &ep93xx_timer,
117 .init_machine = micro9_init_machine, 122 .init_machine = micro9_init_machine,
118MACHINE_END 123MACHINE_END
diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c
index 52e090dc9d27..40121ba8e711 100644
--- a/arch/arm/mach-ep93xx/simone.c
+++ b/arch/arm/mach-ep93xx/simone.c
@@ -25,6 +25,7 @@
25#include <mach/fb.h> 25#include <mach/fb.h>
26#include <mach/gpio-ep93xx.h> 26#include <mach/gpio-ep93xx.h>
27 27
28#include <asm/hardware/vic.h>
28#include <asm/mach-types.h> 29#include <asm/mach-types.h>
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
30 31
@@ -80,6 +81,7 @@ MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board")
80 .atag_offset = 0x100, 81 .atag_offset = 0x100,
81 .map_io = ep93xx_map_io, 82 .map_io = ep93xx_map_io,
82 .init_irq = ep93xx_init_irq, 83 .init_irq = ep93xx_init_irq,
84 .handle_irq = vic_handle_irq,
83 .timer = &ep93xx_timer, 85 .timer = &ep93xx_timer,
84 .init_machine = simone_init_machine, 86 .init_machine = simone_init_machine,
85MACHINE_END 87MACHINE_END
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
index 8121e3aedc0a..ec7c63ff01e2 100644
--- a/arch/arm/mach-ep93xx/snappercl15.c
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -31,6 +31,7 @@
31#include <mach/fb.h> 31#include <mach/fb.h>
32#include <mach/gpio-ep93xx.h> 32#include <mach/gpio-ep93xx.h>
33 33
34#include <asm/hardware/vic.h>
34#include <asm/mach-types.h> 35#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
36 37
@@ -177,6 +178,7 @@ MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
177 .atag_offset = 0x100, 178 .atag_offset = 0x100,
178 .map_io = ep93xx_map_io, 179 .map_io = ep93xx_map_io,
179 .init_irq = ep93xx_init_irq, 180 .init_irq = ep93xx_init_irq,
181 .handle_irq = vic_handle_irq,
180 .timer = &ep93xx_timer, 182 .timer = &ep93xx_timer,
181 .init_machine = snappercl15_init_machine, 183 .init_machine = snappercl15_init_machine,
182MACHINE_END 184MACHINE_END
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index 8b2f1435bcac..760384e6407d 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -23,6 +23,7 @@
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/ts72xx.h> 24#include <mach/ts72xx.h>
25 25
26#include <asm/hardware/vic.h>
26#include <asm/mach-types.h> 27#include <asm/mach-types.h>
27#include <asm/mach/map.h> 28#include <asm/mach/map.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
@@ -247,6 +248,7 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
247 .atag_offset = 0x100, 248 .atag_offset = 0x100,
248 .map_io = ts72xx_map_io, 249 .map_io = ts72xx_map_io,
249 .init_irq = ep93xx_init_irq, 250 .init_irq = ep93xx_init_irq,
251 .handle_irq = vic_handle_irq,
250 .timer = &ep93xx_timer, 252 .timer = &ep93xx_timer,
251 .init_machine = ts72xx_init_machine, 253 .init_machine = ts72xx_init_machine,
252MACHINE_END 254MACHINE_END
diff --git a/arch/arm/mach-exynos/cpu.c b/arch/arm/mach-exynos/cpu.c
index 90ec247f3b37..6e34485caa36 100644
--- a/arch/arm/mach-exynos/cpu.c
+++ b/arch/arm/mach-exynos/cpu.c
@@ -15,6 +15,7 @@
15#include <asm/mach/irq.h> 15#include <asm/mach/irq.h>
16 16
17#include <asm/proc-fns.h> 17#include <asm/proc-fns.h>
18#include <asm/exception.h>
18#include <asm/hardware/cache-l2x0.h> 19#include <asm/hardware/cache-l2x0.h>
19#include <asm/hardware/gic.h> 20#include <asm/hardware/gic.h>
20 21
@@ -33,8 +34,6 @@
33#include <mach/regs-irq.h> 34#include <mach/regs-irq.h>
34#include <mach/regs-pmu.h> 35#include <mach/regs-pmu.h>
35 36
36unsigned int gic_bank_offset __read_mostly;
37
38extern int combiner_init(unsigned int combiner_nr, void __iomem *base, 37extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
39 unsigned int irq_start); 38 unsigned int irq_start);
40extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); 39extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
@@ -207,27 +206,14 @@ void __init exynos4_init_clocks(int xtal)
207 exynos4_setup_clocks(); 206 exynos4_setup_clocks();
208} 207}
209 208
210static void exynos4_gic_irq_fix_base(struct irq_data *d)
211{
212 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
213
214 gic_data->cpu_base = S5P_VA_GIC_CPU +
215 (gic_bank_offset * smp_processor_id());
216
217 gic_data->dist_base = S5P_VA_GIC_DIST +
218 (gic_bank_offset * smp_processor_id());
219}
220
221void __init exynos4_init_irq(void) 209void __init exynos4_init_irq(void)
222{ 210{
223 int irq; 211 int irq;
212 unsigned int bank_offset;
224 213
225 gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; 214 gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
226 215
227 gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); 216 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset);
228 gic_arch_extn.irq_eoi = exynos4_gic_irq_fix_base;
229 gic_arch_extn.irq_unmask = exynos4_gic_irq_fix_base;
230 gic_arch_extn.irq_mask = exynos4_gic_irq_fix_base;
231 217
232 for (irq = 0; irq < MAX_COMBINER_NR; irq++) { 218 for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
233 219
diff --git a/arch/arm/mach-exynos/include/mach/entry-macro.S b/arch/arm/mach-exynos/include/mach/entry-macro.S
index f5e9fd8e37b4..3ba4f547534b 100644
--- a/arch/arm/mach-exynos/include/mach/entry-macro.S
+++ b/arch/arm/mach-exynos/include/mach/entry-macro.S
@@ -9,83 +9,8 @@
9 * warranty of any kind, whether express or implied. 9 * warranty of any kind, whether express or implied.
10*/ 10*/
11 11
12#include <mach/hardware.h>
13#include <mach/map.h>
14#include <asm/hardware/gic.h>
15
16 .macro disable_fiq 12 .macro disable_fiq
17 .endm 13 .endm
18 14
19 .macro get_irqnr_preamble, base, tmp
20 mov \tmp, #0
21
22 mrc p15, 0, \base, c0, c0, 5
23 and \base, \base, #3
24 cmp \base, #0
25 beq 1f
26
27 ldr \tmp, =gic_bank_offset
28 ldr \tmp, [\tmp]
29 cmp \base, #1
30 beq 1f
31
32 cmp \base, #2
33 addeq \tmp, \tmp, \tmp
34 addne \tmp, \tmp, \tmp, LSL #1
35
361: ldr \base, =gic_cpu_base_addr
37 ldr \base, [\base]
38 add \base, \base, \tmp
39 .endm
40
41 .macro arch_ret_to_user, tmp1, tmp2 15 .macro arch_ret_to_user, tmp1, tmp2
42 .endm 16 .endm
43
44 /*
45 * The interrupt numbering scheme is defined in the
46 * interrupt controller spec. To wit:
47 *
48 * Interrupts 0-15 are IPI
49 * 16-28 are reserved
50 * 29-31 are local. We allow 30 to be used for the watchdog.
51 * 32-1020 are global
52 * 1021-1022 are reserved
53 * 1023 is "spurious" (no interrupt)
54 *
55 * For now, we ignore all local interrupts so only return an interrupt if it's
56 * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs.
57 *
58 * A simple read from the controller will tell us the number of the highest
59 * priority enabled interrupt. We then just need to check whether it is in the
60 * valid range for an IRQ (30-1020 inclusive).
61 */
62
63 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
64
65 ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
66
67 ldr \tmp, =1021
68
69 bic \irqnr, \irqstat, #0x1c00
70
71 cmp \irqnr, #15
72 cmpcc \irqnr, \irqnr
73 cmpne \irqnr, \tmp
74 cmpcs \irqnr, \irqnr
75 addne \irqnr, \irqnr, #32
76
77 .endm
78
79 /* We assume that irqstat (the raw value of the IRQ acknowledge
80 * register) is preserved from the macro above.
81 * If there is an IPI, we immediately signal end of interrupt on the
82 * controller, since this requires the original irqstat value which
83 * we won't easily be able to recreate later.
84 */
85
86 .macro test_for_ipi, irqnr, irqstat, base, tmp
87 bic \irqnr, \irqstat, #0x1c00
88 cmp \irqnr, #16
89 strcc \irqstat, [\base, #GIC_CPU_EOI]
90 cmpcs \irqnr, \irqnr
91 .endm
diff --git a/arch/arm/mach-exynos/mach-armlex4210.c b/arch/arm/mach-exynos/mach-armlex4210.c
index f0ca6c157d29..49da3089249a 100644
--- a/arch/arm/mach-exynos/mach-armlex4210.c
+++ b/arch/arm/mach-exynos/mach-armlex4210.c
@@ -16,6 +16,7 @@
16#include <linux/smsc911x.h> 16#include <linux/smsc911x.h>
17 17
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19#include <asm/hardware/gic.h>
19#include <asm/mach-types.h> 20#include <asm/mach-types.h>
20 21
21#include <plat/cpu.h> 22#include <plat/cpu.h>
@@ -210,6 +211,7 @@ MACHINE_START(ARMLEX4210, "ARMLEX4210")
210 .atag_offset = 0x100, 211 .atag_offset = 0x100,
211 .init_irq = exynos4_init_irq, 212 .init_irq = exynos4_init_irq,
212 .map_io = armlex4210_map_io, 213 .map_io = armlex4210_map_io,
214 .handle_irq = gic_handle_irq,
213 .init_machine = armlex4210_machine_init, 215 .init_machine = armlex4210_machine_init,
214 .timer = &exynos4_timer, 216 .timer = &exynos4_timer,
215MACHINE_END 217MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 236bbe187163..5acec11821a4 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -32,6 +32,7 @@
32#include <media/v4l2-mediabus.h> 32#include <media/v4l2-mediabus.h>
33 33
34#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
35#include <asm/hardware/gic.h>
35#include <asm/mach-types.h> 36#include <asm/mach-types.h>
36 37
37#include <plat/adc.h> 38#include <plat/adc.h>
@@ -1333,6 +1334,7 @@ MACHINE_START(NURI, "NURI")
1333 .atag_offset = 0x100, 1334 .atag_offset = 0x100,
1334 .init_irq = exynos4_init_irq, 1335 .init_irq = exynos4_init_irq,
1335 .map_io = nuri_map_io, 1336 .map_io = nuri_map_io,
1337 .handle_irq = gic_handle_irq,
1336 .init_machine = nuri_machine_init, 1338 .init_machine = nuri_machine_init,
1337 .timer = &exynos4_timer, 1339 .timer = &exynos4_timer,
1338 .reserve = &nuri_reserve, 1340 .reserve = &nuri_reserve,
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index f80b563f2be7..5561b06c38ec 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -22,6 +22,7 @@
22#include <linux/lcd.h> 22#include <linux/lcd.h>
23 23
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/hardware/gic.h>
25#include <asm/mach-types.h> 26#include <asm/mach-types.h>
26 27
27#include <video/platform_lcd.h> 28#include <video/platform_lcd.h>
@@ -694,6 +695,7 @@ MACHINE_START(ORIGEN, "ORIGEN")
694 .atag_offset = 0x100, 695 .atag_offset = 0x100,
695 .init_irq = exynos4_init_irq, 696 .init_irq = exynos4_init_irq,
696 .map_io = origen_map_io, 697 .map_io = origen_map_io,
698 .handle_irq = gic_handle_irq,
697 .init_machine = origen_machine_init, 699 .init_machine = origen_machine_init,
698 .timer = &exynos4_timer, 700 .timer = &exynos4_timer,
699 .reserve = &origen_reserve, 701 .reserve = &origen_reserve,
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index fcf2e0e23d53..722d82d7f217 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -21,6 +21,7 @@
21#include <linux/serial_core.h> 21#include <linux/serial_core.h>
22 22
23#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
24#include <asm/hardware/gic.h>
24#include <asm/mach-types.h> 25#include <asm/mach-types.h>
25 26
26#include <plat/backlight.h> 27#include <plat/backlight.h>
@@ -287,6 +288,7 @@ MACHINE_START(SMDK4212, "SMDK4212")
287 .atag_offset = 0x100, 288 .atag_offset = 0x100,
288 .init_irq = exynos4_init_irq, 289 .init_irq = exynos4_init_irq,
289 .map_io = smdk4x12_map_io, 290 .map_io = smdk4x12_map_io,
291 .handle_irq = gic_handle_irq,
290 .init_machine = smdk4x12_machine_init, 292 .init_machine = smdk4x12_machine_init,
291 .timer = &exynos4_timer, 293 .timer = &exynos4_timer,
292MACHINE_END 294MACHINE_END
@@ -297,6 +299,7 @@ MACHINE_START(SMDK4412, "SMDK4412")
297 .atag_offset = 0x100, 299 .atag_offset = 0x100,
298 .init_irq = exynos4_init_irq, 300 .init_irq = exynos4_init_irq,
299 .map_io = smdk4x12_map_io, 301 .map_io = smdk4x12_map_io,
302 .handle_irq = gic_handle_irq,
300 .init_machine = smdk4x12_machine_init, 303 .init_machine = smdk4x12_machine_init,
301 .timer = &exynos4_timer, 304 .timer = &exynos4_timer,
302MACHINE_END 305MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index cec2afabe7b4..edc60b6108ed 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -21,6 +21,7 @@
21#include <linux/pwm_backlight.h> 21#include <linux/pwm_backlight.h>
22 22
23#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
24#include <asm/hardware/gic.h>
24#include <asm/mach-types.h> 25#include <asm/mach-types.h>
25 26
26#include <video/platform_lcd.h> 27#include <video/platform_lcd.h>
@@ -375,6 +376,7 @@ MACHINE_START(SMDKV310, "SMDKV310")
375 .atag_offset = 0x100, 376 .atag_offset = 0x100,
376 .init_irq = exynos4_init_irq, 377 .init_irq = exynos4_init_irq,
377 .map_io = smdkv310_map_io, 378 .map_io = smdkv310_map_io,
379 .handle_irq = gic_handle_irq,
378 .init_machine = smdkv310_machine_init, 380 .init_machine = smdkv310_machine_init,
379 .timer = &exynos4_timer, 381 .timer = &exynos4_timer,
380 .reserve = &smdkv310_reserve, 382 .reserve = &smdkv310_reserve,
@@ -385,6 +387,7 @@ MACHINE_START(SMDKC210, "SMDKC210")
385 .atag_offset = 0x100, 387 .atag_offset = 0x100,
386 .init_irq = exynos4_init_irq, 388 .init_irq = exynos4_init_irq,
387 .map_io = smdkv310_map_io, 389 .map_io = smdkv310_map_io,
390 .handle_irq = gic_handle_irq,
388 .init_machine = smdkv310_machine_init, 391 .init_machine = smdkv310_machine_init,
389 .timer = &exynos4_timer, 392 .timer = &exynos4_timer,
390MACHINE_END 393MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index a2a177ff4b44..48e85b03cb16 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -21,9 +21,10 @@
21#include <linux/mmc/host.h> 21#include <linux/mmc/host.h>
22#include <linux/i2c-gpio.h> 22#include <linux/i2c-gpio.h>
23#include <linux/i2c/mcs.h> 23#include <linux/i2c/mcs.h>
24#include <linux/i2c/atmel_mxt_ts.h> 24 <linux/i2c/atmel_mxt_ts.h>
25 25
26#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
27#include <asm/hardware/gic.h>
27#include <asm/mach-types.h> 28#include <asm/mach-types.h>
28 29
29#include <plat/regs-serial.h> 30#include <plat/regs-serial.h>
@@ -1058,6 +1059,7 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1058 .atag_offset = 0x100, 1059 .atag_offset = 0x100,
1059 .init_irq = exynos4_init_irq, 1060 .init_irq = exynos4_init_irq,
1060 .map_io = universal_map_io, 1061 .map_io = universal_map_io,
1062 .handle_irq = gic_handle_irq,
1061 .init_machine = universal_machine_init, 1063 .init_machine = universal_machine_init,
1062 .timer = &exynos4_timer, 1064 .timer = &exynos4_timer,
1063 .reserve = &universal_reserve, 1065 .reserve = &universal_reserve,
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 69ffb2fb3875..60bc45e3e709 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -32,7 +32,6 @@
32 32
33#include <plat/cpu.h> 33#include <plat/cpu.h>
34 34
35extern unsigned int gic_bank_offset;
36extern void exynos4_secondary_startup(void); 35extern void exynos4_secondary_startup(void);
37 36
38#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \ 37#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
@@ -65,31 +64,6 @@ static void __iomem *scu_base_addr(void)
65 64
66static DEFINE_SPINLOCK(boot_lock); 65static DEFINE_SPINLOCK(boot_lock);
67 66
68static void __cpuinit exynos4_gic_secondary_init(void)
69{
70 void __iomem *dist_base = S5P_VA_GIC_DIST +
71 (gic_bank_offset * smp_processor_id());
72 void __iomem *cpu_base = S5P_VA_GIC_CPU +
73 (gic_bank_offset * smp_processor_id());
74 int i;
75
76 /*
77 * Deal with the banked PPI and SGI interrupts - disable all
78 * PPI interrupts, ensure all SGI interrupts are enabled.
79 */
80 __raw_writel(0xffff0000, dist_base + GIC_DIST_ENABLE_CLEAR);
81 __raw_writel(0x0000ffff, dist_base + GIC_DIST_ENABLE_SET);
82
83 /*
84 * Set priority on PPI and SGI interrupts
85 */
86 for (i = 0; i < 32; i += 4)
87 __raw_writel(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4 / 4);
88
89 __raw_writel(0xf0, cpu_base + GIC_CPU_PRIMASK);
90 __raw_writel(1, cpu_base + GIC_CPU_CTRL);
91}
92
93void __cpuinit platform_secondary_init(unsigned int cpu) 67void __cpuinit platform_secondary_init(unsigned int cpu)
94{ 68{
95 /* 69 /*
@@ -97,7 +71,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
97 * core (e.g. timer irq), then they will not have been enabled 71 * core (e.g. timer irq), then they will not have been enabled
98 * for us: do so 72 * for us: do so
99 */ 73 */
100 exynos4_gic_secondary_init(); 74 gic_secondary_init(0);
101 75
102 /* 76 /*
103 * let the primary processor know we're out of the 77 * let the primary processor know we're out of the
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index b82dcf08e747..89bdf0039f7b 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -140,6 +140,7 @@ DT_MACHINE_START(HIGHBANK, "Highbank")
140 .map_io = highbank_map_io, 140 .map_io = highbank_map_io,
141 .init_irq = highbank_init_irq, 141 .init_irq = highbank_init_irq,
142 .timer = &highbank_timer, 142 .timer = &highbank_timer,
143 .handle_irq = gic_handle_irq,
143 .init_machine = highbank_init, 144 .init_machine = highbank_init,
144 .dt_compat = highbank_match, 145 .dt_compat = highbank_match,
145MACHINE_END 146MACHINE_END
diff --git a/arch/arm/mach-highbank/include/mach/entry-macro.S b/arch/arm/mach-highbank/include/mach/entry-macro.S
index 73c11297509e..a14f9e62ca92 100644
--- a/arch/arm/mach-highbank/include/mach/entry-macro.S
+++ b/arch/arm/mach-highbank/include/mach/entry-macro.S
@@ -1,5 +1,3 @@
1#include <asm/hardware/entry-macro-gic.S>
2
3 .macro disable_fiq 1 .macro disable_fiq
4 .endm 2 .endm
5 3
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index 22d85889f622..cfede5768aa0 100644
--- a/arch/arm/mach-imx/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -1,22 +1,26 @@
1zreladdr-$(CONFIG_ARCH_MX1) += 0x08008000 1zreladdr-$(CONFIG_SOC_IMX1) += 0x08008000
2params_phys-$(CONFIG_ARCH_MX1) := 0x08000100 2params_phys-$(CONFIG_SOC_IMX1) := 0x08000100
3initrd_phys-$(CONFIG_ARCH_MX1) := 0x08800000 3initrd_phys-$(CONFIG_SOC_IMX1) := 0x08800000
4 4
5zreladdr-$(CONFIG_MACH_MX21) += 0xC0008000 5zreladdr-$(CONFIG_SOC_IMX21) += 0xC0008000
6params_phys-$(CONFIG_MACH_MX21) := 0xC0000100 6params_phys-$(CONFIG_SOC_IMX21) := 0xC0000100
7initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000 7initrd_phys-$(CONFIG_SOC_IMX21) := 0xC0800000
8 8
9zreladdr-$(CONFIG_ARCH_MX25) += 0x80008000 9zreladdr-$(CONFIG_SOC_IMX25) += 0x80008000
10params_phys-$(CONFIG_ARCH_MX25) := 0x80000100 10params_phys-$(CONFIG_SOC_IMX25) := 0x80000100
11initrd_phys-$(CONFIG_ARCH_MX25) := 0x80800000 11initrd_phys-$(CONFIG_SOC_IMX25) := 0x80800000
12 12
13zreladdr-$(CONFIG_MACH_MX27) += 0xA0008000 13zreladdr-$(CONFIG_SOC_IMX27) += 0xA0008000
14params_phys-$(CONFIG_MACH_MX27) := 0xA0000100 14params_phys-$(CONFIG_SOC_IMX27) := 0xA0000100
15initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000 15initrd_phys-$(CONFIG_SOC_IMX27) := 0xA0800000
16 16
17zreladdr-$(CONFIG_ARCH_MX3) += 0x80008000 17zreladdr-$(CONFIG_SOC_IMX31) += 0x80008000
18params_phys-$(CONFIG_ARCH_MX3) := 0x80000100 18params_phys-$(CONFIG_SOC_IMX31) := 0x80000100
19initrd_phys-$(CONFIG_ARCH_MX3) := 0x80800000 19initrd_phys-$(CONFIG_SOC_IMX31) := 0x80800000
20
21zreladdr-$(CONFIG_SOC_IMX35) += 0x80008000
22params_phys-$(CONFIG_SOC_IMX35) := 0x80000100
23initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
20 24
21zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000 25zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000
22params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 26params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c
index e0b926dfeced..613a1b993bff 100644
--- a/arch/arm/mach-imx/clock-imx6q.c
+++ b/arch/arm/mach-imx/clock-imx6q.c
@@ -1139,7 +1139,7 @@ static int _clk_set_rate(struct clk *clk, unsigned long rate)
1139 return -EINVAL; 1139 return -EINVAL;
1140 1140
1141 max_div = ((d->bm_pred >> d->bp_pred) + 1) * 1141 max_div = ((d->bm_pred >> d->bp_pred) + 1) *
1142 ((d->bm_pred >> d->bp_pred) + 1); 1142 ((d->bm_podf >> d->bp_podf) + 1);
1143 1143
1144 div = parent_rate / rate; 1144 div = parent_rate / rate;
1145 if (div == 0) 1145 if (div == 0)
@@ -2002,6 +2002,21 @@ int __init mx6q_clocks_init(void)
2002 clk_set_rate(&asrc_serial_clk, 1500000); 2002 clk_set_rate(&asrc_serial_clk, 1500000);
2003 clk_set_rate(&enfc_clk, 11000000); 2003 clk_set_rate(&enfc_clk, 11000000);
2004 2004
2005 /*
2006 * Before pinctrl API is available, we have to rely on the pad
2007 * configuration set up by bootloader. For usdhc example here,
2008 * u-boot sets up the pads for 49.5 MHz case, and we have to lower
2009 * the usdhc clock from 198 to 49.5 MHz to match the pad configuration.
2010 *
2011 * FIXME: This is should be removed after pinctrl API is available.
2012 * At that time, usdhc driver can call pinctrl API to change pad
2013 * configuration dynamically per different usdhc clock settings.
2014 */
2015 clk_set_rate(&usdhc1_clk, 49500000);
2016 clk_set_rate(&usdhc2_clk, 49500000);
2017 clk_set_rate(&usdhc3_clk, 49500000);
2018 clk_set_rate(&usdhc4_clk, 49500000);
2019
2005 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt"); 2020 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
2006 base = of_iomap(np, 0); 2021 base = of_iomap(np, 0);
2007 WARN_ON(!base); 2022 WARN_ON(!base);
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 4285dfd80b6f..4ad3969b9881 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -15,6 +15,8 @@ obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o
15obj-$(CONFIG_MSM_SMD) += last_radio_log.o 15obj-$(CONFIG_MSM_SMD) += last_radio_log.o
16obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o 16obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o
17 17
18CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1)
19
18obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 20obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
19obj-$(CONFIG_SMP) += headsmp.o platsmp.o 21obj-$(CONFIG_SMP) += headsmp.o platsmp.o
20 22
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c
index 71de5062c71e..db81ed531031 100644
--- a/arch/arm/mach-msm/board-msm7x30.c
+++ b/arch/arm/mach-msm/board-msm7x30.c
@@ -42,8 +42,8 @@
42 42
43extern struct sys_timer msm_timer; 43extern struct sys_timer msm_timer;
44 44
45static void __init msm7x30_fixup(struct machine_desc *desc, struct tag *tag, 45static void __init msm7x30_fixup(struct tag *tag, char **cmdline,
46 char **cmdline, struct meminfo *mi) 46 struct meminfo *mi)
47{ 47{
48 for (; tag->hdr.size; tag = tag_next(tag)) 48 for (; tag->hdr.size; tag = tag_next(tag))
49 if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) { 49 if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) {
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index b04468e7d00e..ed3598128530 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -32,8 +32,8 @@
32 32
33#include "devices.h" 33#include "devices.h"
34 34
35static void __init msm8960_fixup(struct machine_desc *desc, struct tag *tag, 35static void __init msm8960_fixup(struct tag *tag, char **cmdline,
36 char **cmdline, struct meminfo *mi) 36 struct meminfo *mi)
37{ 37{
38 for (; tag->hdr.size; tag = tag_next(tag)) 38 for (; tag->hdr.size; tag = tag_next(tag))
39 if (tag->hdr.tag == ATAG_MEM && 39 if (tag->hdr.tag == ATAG_MEM &&
@@ -99,6 +99,7 @@ MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
99 .map_io = msm8960_map_io, 99 .map_io = msm8960_map_io,
100 .init_irq = msm8960_init_irq, 100 .init_irq = msm8960_init_irq,
101 .timer = &msm_timer, 101 .timer = &msm_timer,
102 .handle_irq = gic_handle_irq,
102 .init_machine = msm8960_sim_init, 103 .init_machine = msm8960_sim_init,
103MACHINE_END 104MACHINE_END
104 105
@@ -108,6 +109,7 @@ MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
108 .map_io = msm8960_map_io, 109 .map_io = msm8960_map_io,
109 .init_irq = msm8960_init_irq, 110 .init_irq = msm8960_init_irq,
110 .timer = &msm_timer, 111 .timer = &msm_timer,
112 .handle_irq = gic_handle_irq,
111 .init_machine = msm8960_rumi3_init, 113 .init_machine = msm8960_rumi3_init,
112MACHINE_END 114MACHINE_END
113 115
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index cf38e2284fa9..0a113424632c 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -28,8 +28,8 @@
28#include <mach/board.h> 28#include <mach/board.h>
29#include <mach/msm_iomap.h> 29#include <mach/msm_iomap.h>
30 30
31static void __init msm8x60_fixup(struct machine_desc *desc, struct tag *tag, 31static void __init msm8x60_fixup(struct tag *tag, char **cmdline,
32 char **cmdline, struct meminfo *mi) 32 struct meminfo *mi)
33{ 33{
34 for (; tag->hdr.size; tag = tag_next(tag)) 34 for (; tag->hdr.size; tag = tag_next(tag))
35 if (tag->hdr.tag == ATAG_MEM && 35 if (tag->hdr.tag == ATAG_MEM &&
@@ -108,6 +108,7 @@ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
108 .reserve = msm8x60_reserve, 108 .reserve = msm8x60_reserve,
109 .map_io = msm8x60_map_io, 109 .map_io = msm8x60_map_io,
110 .init_irq = msm8x60_init_irq, 110 .init_irq = msm8x60_init_irq,
111 .handle_irq = gic_handle_irq,
111 .init_machine = msm8x60_init, 112 .init_machine = msm8x60_init,
112 .timer = &msm_timer, 113 .timer = &msm_timer,
113MACHINE_END 114MACHINE_END
@@ -117,6 +118,7 @@ MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
117 .reserve = msm8x60_reserve, 118 .reserve = msm8x60_reserve,
118 .map_io = msm8x60_map_io, 119 .map_io = msm8x60_map_io,
119 .init_irq = msm8x60_init_irq, 120 .init_irq = msm8x60_init_irq,
121 .handle_irq = gic_handle_irq,
120 .init_machine = msm8x60_init, 122 .init_machine = msm8x60_init,
121 .timer = &msm_timer, 123 .timer = &msm_timer,
122MACHINE_END 124MACHINE_END
@@ -126,6 +128,7 @@ MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
126 .reserve = msm8x60_reserve, 128 .reserve = msm8x60_reserve,
127 .map_io = msm8x60_map_io, 129 .map_io = msm8x60_map_io,
128 .init_irq = msm8x60_init_irq, 130 .init_irq = msm8x60_init_irq,
131 .handle_irq = gic_handle_irq,
129 .init_machine = msm8x60_init, 132 .init_machine = msm8x60_init,
130 .timer = &msm_timer, 133 .timer = &msm_timer,
131MACHINE_END 134MACHINE_END
@@ -135,6 +138,7 @@ MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
135 .reserve = msm8x60_reserve, 138 .reserve = msm8x60_reserve,
136 .map_io = msm8x60_map_io, 139 .map_io = msm8x60_map_io,
137 .init_irq = msm8x60_init_irq, 140 .init_irq = msm8x60_init_irq,
141 .handle_irq = gic_handle_irq,
138 .init_machine = msm8x60_init, 142 .init_machine = msm8x60_init,
139 .timer = &msm_timer, 143 .timer = &msm_timer,
140MACHINE_END 144MACHINE_END
diff --git a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
deleted file mode 100644
index 717076f3ca73..000000000000
--- a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * Low-level IRQ helper macros
3 *
4 * Copyright (c) 2010, Code Aurora Forum. All rights reserved.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <asm/hardware/entry-macro-gic.S>
12
13 .macro disable_fiq
14 .endm
15
16 .macro arch_ret_to_user, tmp1, tmp2
17 .endm
diff --git a/arch/arm/mach-msm/include/mach/entry-macro-vic.S b/arch/arm/mach-msm/include/mach/entry-macro-vic.S
deleted file mode 100644
index 70563ed11b36..000000000000
--- a/arch/arm/mach-msm/include/mach/entry-macro-vic.S
+++ /dev/null
@@ -1,37 +0,0 @@
1/*
2 * Copyright (C) 2007 Google, Inc.
3 * Author: Brian Swetland <swetland@google.com>
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <mach/msm_iomap.h>
17
18 .macro disable_fiq
19 .endm
20
21 .macro get_irqnr_preamble, base, tmp
22 @ enable imprecise aborts
23 cpsie a
24 mov \base, #MSM_VIC_BASE
25 .endm
26
27 .macro arch_ret_to_user, tmp1, tmp2
28 .endm
29
30 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
31 @ 0xD0 has irq# or old irq# if the irq has been handled
32 @ 0xD4 has irq# or -1 if none pending *but* if you just
33 @ read 0xD4 you never get the first irq for some reason
34 ldr \irqnr, [\base, #0xD0]
35 ldr \irqnr, [\base, #0xD4]
36 cmp \irqnr, #0xffffffff
37 .endm
diff --git a/arch/arm/mach-msm/include/mach/entry-macro.S b/arch/arm/mach-msm/include/mach/entry-macro.S
index b16f082eeb6f..41f7003ef34f 100644
--- a/arch/arm/mach-msm/include/mach/entry-macro.S
+++ b/arch/arm/mach-msm/include/mach/entry-macro.S
@@ -16,8 +16,27 @@
16 * 16 *
17 */ 17 */
18 18
19#if defined(CONFIG_ARM_GIC) 19 .macro disable_fiq
20#include <mach/entry-macro-qgic.S> 20 .endm
21#else 21
22#include <mach/entry-macro-vic.S> 22 .macro arch_ret_to_user, tmp1, tmp2
23 .endm
24
25#if !defined(CONFIG_ARM_GIC)
26#include <mach/msm_iomap.h>
27
28 .macro get_irqnr_preamble, base, tmp
29 @ enable imprecise aborts
30 cpsie a
31 mov \base, #MSM_VIC_BASE
32 .endm
33
34 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
35 @ 0xD0 has irq# or old irq# if the irq has been handled
36 @ 0xD4 has irq# or -1 if none pending *but* if you just
37 @ read 0xD4 you never get the first irq for some reason
38 ldr \irqnr, [\base, #0xD0]
39 ldr \irqnr, [\base, #0xD4]
40 cmp \irqnr, #0xffffffff
41 .endm
23#endif 42#endif
diff --git a/arch/arm/mach-msm/scm.c b/arch/arm/mach-msm/scm.c
index 232f97a04504..bafabb502580 100644
--- a/arch/arm/mach-msm/scm.c
+++ b/arch/arm/mach-msm/scm.c
@@ -180,6 +180,9 @@ static u32 smc(u32 cmd_addr)
180 __asmeq("%1", "r0") 180 __asmeq("%1", "r0")
181 __asmeq("%2", "r1") 181 __asmeq("%2", "r1")
182 __asmeq("%3", "r2") 182 __asmeq("%3", "r2")
183#ifdef REQUIRES_SEC
184 ".arch_extension sec\n"
185#endif
183 "smc #0 @ switch to secure world\n" 186 "smc #0 @ switch to secure world\n"
184 : "=r" (r0) 187 : "=r" (r0)
185 : "r" (r0), "r" (r1), "r" (r2) 188 : "r" (r0), "r" (r1), "r" (r2)
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index 2aacf41c48e7..4cb276977190 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -1281,9 +1281,9 @@ DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET,
1281 NULL, NULL, &ipg_clk, &gpt_ipg_clk); 1281 NULL, NULL, &ipg_clk, &gpt_ipg_clk);
1282 1282
1283DEFINE_CLOCK(pwm1_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG6_OFFSET, 1283DEFINE_CLOCK(pwm1_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG6_OFFSET,
1284 NULL, NULL, &ipg_clk, NULL); 1284 NULL, NULL, &ipg_perclk, NULL);
1285DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET, 1285DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET,
1286 NULL, NULL, &ipg_clk, NULL); 1286 NULL, NULL, &ipg_perclk, NULL);
1287 1287
1288/* I2C */ 1288/* I2C */
1289DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET, 1289DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET,
@@ -1634,6 +1634,7 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
1634 return 0; 1634 return 0;
1635} 1635}
1636 1636
1637#ifdef CONFIG_OF
1637static void __init clk_get_freq_dt(unsigned long *ckil, unsigned long *osc, 1638static void __init clk_get_freq_dt(unsigned long *ckil, unsigned long *osc,
1638 unsigned long *ckih1, unsigned long *ckih2) 1639 unsigned long *ckih1, unsigned long *ckih2)
1639{ 1640{
@@ -1671,3 +1672,4 @@ int __init mx53_clocks_init_dt(void)
1671 clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2); 1672 clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2);
1672 return mx53_clocks_init(ckil, osc, ckih1, ckih2); 1673 return mx53_clocks_init(ckil, osc, ckih1, ckih2);
1673} 1674}
1675#endif
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index ac2316d53d3c..064ec5abaa55 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -471,7 +471,8 @@ static void __init mx28evk_init(void)
471 "mmc0-slot-power"); 471 "mmc0-slot-power");
472 if (ret) 472 if (ret)
473 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret); 473 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
474 mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]); 474 else
475 mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
475 476
476 ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW, 477 ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW,
477 "mmc1-slot-power"); 478 "mmc1-slot-power");
@@ -480,7 +481,6 @@ static void __init mx28evk_init(void)
480 else 481 else
481 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); 482 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
482 483
483 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
484 mx28_add_rtc_stmp3xxx(); 484 mx28_add_rtc_stmp3xxx();
485 485
486 gpio_led_register_device(0, &mx28evk_led_data); 486 gpio_led_register_device(0, &mx28evk_led_data);
diff --git a/arch/arm/mach-netx/include/mach/entry-macro.S b/arch/arm/mach-netx/include/mach/entry-macro.S
index 844f1f9acbdf..6e9f1cbe1634 100644
--- a/arch/arm/mach-netx/include/mach/entry-macro.S
+++ b/arch/arm/mach-netx/include/mach/entry-macro.S
@@ -18,22 +18,9 @@
18 * along with this program; if not, write to the Free Software 18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21#include <mach/hardware.h>
22 21
23 .macro disable_fiq 22 .macro disable_fiq
24 .endm 23 .endm
25 24
26 .macro get_irqnr_preamble, base, tmp
27 ldr \base, =io_p2v(0x001ff000)
28 .endm
29
30 .macro arch_ret_to_user, tmp1, tmp2 25 .macro arch_ret_to_user, tmp1, tmp2
31 .endm 26 .endm
32
33 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
34 ldr \irqstat, [\base, #0]
35 clz \irqnr, \irqstat
36 rsb \irqnr, \irqnr, #31
37 cmp \irqstat, #0
38 .endm
39
diff --git a/arch/arm/mach-netx/nxdb500.c b/arch/arm/mach-netx/nxdb500.c
index 90903dd44cbc..ef8cf3574a02 100644
--- a/arch/arm/mach-netx/nxdb500.c
+++ b/arch/arm/mach-netx/nxdb500.c
@@ -28,6 +28,7 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/hardware/vic.h>
31#include <mach/netx-regs.h> 32#include <mach/netx-regs.h>
32#include <mach/eth.h> 33#include <mach/eth.h>
33 34
@@ -203,6 +204,7 @@ MACHINE_START(NXDB500, "Hilscher nxdb500")
203 .atag_offset = 0x100, 204 .atag_offset = 0x100,
204 .map_io = netx_map_io, 205 .map_io = netx_map_io,
205 .init_irq = netx_init_irq, 206 .init_irq = netx_init_irq,
207 .handle_irq = vic_handle_irq,
206 .timer = &netx_timer, 208 .timer = &netx_timer,
207 .init_machine = nxdb500_init, 209 .init_machine = nxdb500_init,
208MACHINE_END 210MACHINE_END
diff --git a/arch/arm/mach-netx/nxdkn.c b/arch/arm/mach-netx/nxdkn.c
index c63384aba500..588558bdd800 100644
--- a/arch/arm/mach-netx/nxdkn.c
+++ b/arch/arm/mach-netx/nxdkn.c
@@ -28,6 +28,7 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/hardware/vic.h>
31#include <mach/netx-regs.h> 32#include <mach/netx-regs.h>
32#include <mach/eth.h> 33#include <mach/eth.h>
33 34
@@ -96,6 +97,7 @@ MACHINE_START(NXDKN, "Hilscher nxdkn")
96 .atag_offset = 0x100, 97 .atag_offset = 0x100,
97 .map_io = netx_map_io, 98 .map_io = netx_map_io,
98 .init_irq = netx_init_irq, 99 .init_irq = netx_init_irq,
100 .handle_irq = vic_handle_irq,
99 .timer = &netx_timer, 101 .timer = &netx_timer,
100 .init_machine = nxdkn_init, 102 .init_machine = nxdkn_init,
101MACHINE_END 103MACHINE_END
diff --git a/arch/arm/mach-netx/nxeb500hmi.c b/arch/arm/mach-netx/nxeb500hmi.c
index 8f548ec83ad2..cfcbb5038648 100644
--- a/arch/arm/mach-netx/nxeb500hmi.c
+++ b/arch/arm/mach-netx/nxeb500hmi.c
@@ -28,6 +28,7 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/hardware/vic.h>
31#include <mach/netx-regs.h> 32#include <mach/netx-regs.h>
32#include <mach/eth.h> 33#include <mach/eth.h>
33 34
@@ -180,6 +181,7 @@ MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi")
180 .atag_offset = 0x100, 181 .atag_offset = 0x100,
181 .map_io = netx_map_io, 182 .map_io = netx_map_io,
182 .init_irq = netx_init_irq, 183 .init_irq = netx_init_irq,
184 .handle_irq = vic_handle_irq,
183 .timer = &netx_timer, 185 .timer = &netx_timer,
184 .init_machine = nxeb500hmi_init, 186 .init_machine = nxeb500hmi_init,
185MACHINE_END 187MACHINE_END
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 0cbb74c96ef7..f98259c050ee 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -21,6 +21,7 @@
21#include <linux/mtd/onenand.h> 21#include <linux/mtd/onenand.h>
22#include <linux/mtd/partitions.h> 22#include <linux/mtd/partitions.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <asm/hardware/vic.h>
24#include <asm/sizes.h> 25#include <asm/sizes.h>
25#include <asm/mach-types.h> 26#include <asm/mach-types.h>
26#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
@@ -280,6 +281,7 @@ MACHINE_START(NOMADIK, "NHK8815")
280 .atag_offset = 0x100, 281 .atag_offset = 0x100,
281 .map_io = cpu8815_map_io, 282 .map_io = cpu8815_map_io,
282 .init_irq = cpu8815_init_irq, 283 .init_irq = cpu8815_init_irq,
284 .handle_irq = vic_handle_irq,
283 .timer = &nomadik_timer, 285 .timer = &nomadik_timer,
284 .init_machine = nhk8815_platform_init, 286 .init_machine = nhk8815_platform_init,
285MACHINE_END 287MACHINE_END
diff --git a/arch/arm/mach-nomadik/include/mach/entry-macro.S b/arch/arm/mach-nomadik/include/mach/entry-macro.S
index 49f1aa3bb420..98ea1c1fbbab 100644
--- a/arch/arm/mach-nomadik/include/mach/entry-macro.S
+++ b/arch/arm/mach-nomadik/include/mach/entry-macro.S
@@ -6,38 +6,8 @@
6 * warranty of any kind, whether express or implied. 6 * warranty of any kind, whether express or implied.
7 */ 7 */
8 8
9#include <mach/hardware.h>
10#include <mach/irqs.h>
11
12 .macro disable_fiq 9 .macro disable_fiq
13 .endm 10 .endm
14 11
15 .macro get_irqnr_preamble, base, tmp
16 ldr \base, =IO_ADDRESS(NOMADIK_IC_BASE)
17 .endm
18
19 .macro arch_ret_to_user, tmp1, tmp2 12 .macro arch_ret_to_user, tmp1, tmp2
20 .endm 13 .endm
21
22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
23
24 /* This stanza gets the irq mask from one of two status registers */
25 mov \irqnr, #0
26 ldr \irqstat, [\base, #VIC_REG_IRQSR0] @ get masked status
27 cmp \irqstat, #0
28 bne 1001f
29 add \irqnr, \irqnr, #32
30 ldr \irqstat, [\base, #VIC_REG_IRQSR1] @ get masked status
31
321001: tst \irqstat, #15
33 bne 1002f
34 add \irqnr, \irqnr, #4
35 movs \irqstat, \irqstat, lsr #4
36 bne 1001b
371002: tst \irqstat, #1
38 bne 1003f
39 add \irqnr, \irqnr, #1
40 movs \irqstat, \irqstat, lsr #1
41 bne 1002b
421003: /* EQ will be set if no irqs pending */
43 .endm
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 503414718905..22f7c97a2728 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -25,6 +25,7 @@ config ARCH_OMAP2
25 depends on ARCH_OMAP2PLUS 25 depends on ARCH_OMAP2PLUS
26 default y 26 default y
27 select CPU_V6 27 select CPU_V6
28 select MULTI_IRQ_HANDLER
28 29
29config ARCH_OMAP3 30config ARCH_OMAP3
30 bool "TI OMAP3" 31 bool "TI OMAP3"
@@ -36,6 +37,7 @@ config ARCH_OMAP3
36 select ARCH_HAS_OPP 37 select ARCH_HAS_OPP
37 select PM_OPP if PM 38 select PM_OPP if PM
38 select ARM_CPU_SUSPEND if PM 39 select ARM_CPU_SUSPEND if PM
40 select MULTI_IRQ_HANDLER
39 41
40config ARCH_OMAP4 42config ARCH_OMAP4
41 bool "TI OMAP4" 43 bool "TI OMAP4"
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index a17a6c49e18d..d88143faca59 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -301,6 +301,7 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
301 .map_io = omap243x_map_io, 301 .map_io = omap243x_map_io,
302 .init_early = omap2430_init_early, 302 .init_early = omap2430_init_early,
303 .init_irq = omap2_init_irq, 303 .init_irq = omap2_init_irq,
304 .handle_irq = omap2_intc_handle_irq,
304 .init_machine = omap_2430sdp_init, 305 .init_machine = omap_2430sdp_init,
305 .timer = &omap2_timer, 306 .timer = &omap2_timer,
306MACHINE_END 307MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 670919c04851..83126368ed99 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -728,6 +728,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
728 .map_io = omap3_map_io, 728 .map_io = omap3_map_io,
729 .init_early = omap3430_init_early, 729 .init_early = omap3430_init_early,
730 .init_irq = omap3_init_irq, 730 .init_irq = omap3_init_irq,
731 .handle_irq = omap3_intc_handle_irq,
731 .init_machine = omap_3430sdp_init, 732 .init_machine = omap_3430sdp_init,
732 .timer = &omap3_timer, 733 .timer = &omap3_timer,
733MACHINE_END 734MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index 63f4b4fefb46..7969dd904bd3 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -215,6 +215,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
215 .map_io = omap3_map_io, 215 .map_io = omap3_map_io,
216 .init_early = omap3630_init_early, 216 .init_early = omap3630_init_early,
217 .init_irq = omap3_init_irq, 217 .init_irq = omap3_init_irq,
218 .handle_irq = omap3_intc_handle_irq,
218 .init_machine = omap_sdp_init, 219 .init_machine = omap_sdp_init,
219 .timer = &omap3_timer, 220 .timer = &omap3_timer,
220MACHINE_END 221MACHINE_END
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index cff2e3249fee..ef2bbc09428a 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -27,6 +27,7 @@
27#include <linux/leds_pwm.h> 27#include <linux/leds_pwm.h>
28 28
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <asm/hardware/gic.h>
30#include <asm/mach-types.h> 31#include <asm/mach-types.h>
31#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
32#include <asm/mach/map.h> 33#include <asm/mach/map.h>
@@ -983,6 +984,7 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
983 .map_io = omap4_map_io, 984 .map_io = omap4_map_io,
984 .init_early = omap4430_init_early, 985 .init_early = omap4430_init_early,
985 .init_irq = gic_init_irq, 986 .init_irq = gic_init_irq,
987 .handle_irq = gic_handle_irq,
986 .init_machine = omap_4430sdp_init, 988 .init_machine = omap_4430sdp_init,
987 .timer = &omap4_timer, 989 .timer = &omap4_timer,
988MACHINE_END 990MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 25704759d241..7e90f93263db 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -98,6 +98,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
98 .map_io = omap3_map_io, 98 .map_io = omap3_map_io,
99 .init_early = am35xx_init_early, 99 .init_early = am35xx_init_early,
100 .init_irq = omap3_init_irq, 100 .init_irq = omap3_init_irq,
101 .handle_irq = omap3_intc_handle_irq,
101 .init_machine = am3517_crane_init, 102 .init_machine = am3517_crane_init,
102 .timer = &omap3_timer, 103 .timer = &omap3_timer,
103MACHINE_END 104MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 56ea01184ec9..551cae8d9b8a 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -491,6 +491,7 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
491 .map_io = omap3_map_io, 491 .map_io = omap3_map_io,
492 .init_early = am35xx_init_early, 492 .init_early = am35xx_init_early,
493 .init_irq = omap3_init_irq, 493 .init_irq = omap3_init_irq,
494 .handle_irq = omap3_intc_handle_irq,
494 .init_machine = am3517_evm_init, 495 .init_machine = am3517_evm_init,
495 .timer = &omap3_timer, 496 .timer = &omap3_timer,
496MACHINE_END 497MACHINE_END
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 9aea158ba514..5a66480feed0 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -354,6 +354,7 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
354 .map_io = omap242x_map_io, 354 .map_io = omap242x_map_io,
355 .init_early = omap2420_init_early, 355 .init_early = omap2420_init_early,
356 .init_irq = omap2_init_irq, 356 .init_irq = omap2_init_irq,
357 .handle_irq = omap2_intc_handle_irq,
357 .init_machine = omap_apollon_init, 358 .init_machine = omap_apollon_init,
358 .timer = &omap2_timer, 359 .timer = &omap2_timer,
359MACHINE_END 360MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index e1de33ebf95a..510b6a2ff0fa 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -634,6 +634,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
634 .map_io = omap3_map_io, 634 .map_io = omap3_map_io,
635 .init_early = omap35xx_init_early, 635 .init_early = omap35xx_init_early,
636 .init_irq = omap3_init_irq, 636 .init_irq = omap3_init_irq,
637 .handle_irq = omap3_intc_handle_irq,
637 .init_machine = cm_t35_init, 638 .init_machine = cm_t35_init,
638 .timer = &omap3_timer, 639 .timer = &omap3_timer,
639MACHINE_END 640MACHINE_END
@@ -644,6 +645,7 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730")
644 .map_io = omap3_map_io, 645 .map_io = omap3_map_io,
645 .init_early = omap3630_init_early, 646 .init_early = omap3630_init_early,
646 .init_irq = omap3_init_irq, 647 .init_irq = omap3_init_irq,
648 .handle_irq = omap3_intc_handle_irq,
647 .init_machine = cm_t3730_init, 649 .init_machine = cm_t3730_init,
648 .timer = &omap3_timer, 650 .timer = &omap3_timer,
649MACHINE_END 651MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 952df9b6c020..efc5cedb1fbb 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -299,6 +299,7 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
299 .map_io = omap3_map_io, 299 .map_io = omap3_map_io,
300 .init_early = am35xx_init_early, 300 .init_early = am35xx_init_early,
301 .init_irq = omap3_init_irq, 301 .init_irq = omap3_init_irq,
302 .handle_irq = omap3_intc_handle_irq,
302 .init_machine = cm_t3517_init, 303 .init_machine = cm_t3517_init,
303 .timer = &omap3_timer, 304 .timer = &omap3_timer,
304MACHINE_END 305MACHINE_END
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 99e6e7a76d2e..d81ea7fa75ef 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -660,6 +660,7 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
660 .map_io = omap3_map_io, 660 .map_io = omap3_map_io,
661 .init_early = omap35xx_init_early, 661 .init_early = omap35xx_init_early,
662 .init_irq = omap3_init_irq, 662 .init_irq = omap3_init_irq,
663 .handle_irq = omap3_intc_handle_irq,
663 .init_machine = devkit8000_init, 664 .init_machine = devkit8000_init,
664 .timer = &omap3_secure_timer, 665 .timer = &omap3_secure_timer,
665MACHINE_END 666MACHINE_END
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index a89d72309de2..63b54163b993 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -121,6 +121,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
121 .map_io = omap243x_map_io, 121 .map_io = omap243x_map_io,
122 .init_early = omap2430_init_early, 122 .init_early = omap2430_init_early,
123 .init_irq = omap2_init_irq, 123 .init_irq = omap2_init_irq,
124 .handle_irq = omap2_intc_handle_irq,
124 .init_machine = omap_generic_init, 125 .init_machine = omap_generic_init,
125 .timer = &omap2_timer, 126 .timer = &omap2_timer,
126 .dt_compat = omap243x_boards_compat, 127 .dt_compat = omap243x_boards_compat,
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 199a174e1ba8..ec4018362e8e 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -396,6 +396,7 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
396 .map_io = omap242x_map_io, 396 .map_io = omap242x_map_io,
397 .init_early = omap2420_init_early, 397 .init_early = omap2420_init_early,
398 .init_irq = omap2_init_irq, 398 .init_irq = omap2_init_irq,
399 .handle_irq = omap2_intc_handle_irq,
399 .init_machine = omap_h4_init, 400 .init_machine = omap_h4_init,
400 .timer = &omap2_timer, 401 .timer = &omap2_timer,
401MACHINE_END 402MACHINE_END
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 6434bdcd7ade..5949f6ae3edf 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -672,6 +672,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
672 .map_io = omap3_map_io, 672 .map_io = omap3_map_io,
673 .init_early = omap35xx_init_early, 673 .init_early = omap35xx_init_early,
674 .init_irq = omap3_init_irq, 674 .init_irq = omap3_init_irq,
675 .handle_irq = omap3_intc_handle_irq,
675 .init_machine = igep_init, 676 .init_machine = igep_init,
676 .timer = &omap3_timer, 677 .timer = &omap3_timer,
677MACHINE_END 678MACHINE_END
@@ -682,6 +683,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
682 .map_io = omap3_map_io, 683 .map_io = omap3_map_io,
683 .init_early = omap35xx_init_early, 684 .init_early = omap35xx_init_early,
684 .init_irq = omap3_init_irq, 685 .init_irq = omap3_init_irq,
686 .handle_irq = omap3_intc_handle_irq,
685 .init_machine = igep_init, 687 .init_machine = igep_init,
686 .timer = &omap3_timer, 688 .timer = &omap3_timer,
687MACHINE_END 689MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index e75102a5eb0a..13bde0e66934 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -434,6 +434,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
434 .map_io = omap3_map_io, 434 .map_io = omap3_map_io,
435 .init_early = omap3430_init_early, 435 .init_early = omap3430_init_early,
436 .init_irq = omap3_init_irq, 436 .init_irq = omap3_init_irq,
437 .handle_irq = omap3_intc_handle_irq,
437 .init_machine = omap_ldp_init, 438 .init_machine = omap_ldp_init,
438 .timer = &omap3_timer, 439 .timer = &omap3_timer,
439MACHINE_END 440MACHINE_END
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 736861463b34..bebd3d84365e 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -689,6 +689,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
689 .map_io = omap242x_map_io, 689 .map_io = omap242x_map_io,
690 .init_early = omap2420_init_early, 690 .init_early = omap2420_init_early,
691 .init_irq = omap2_init_irq, 691 .init_irq = omap2_init_irq,
692 .handle_irq = omap2_intc_handle_irq,
692 .init_machine = n8x0_init_machine, 693 .init_machine = n8x0_init_machine,
693 .timer = &omap2_timer, 694 .timer = &omap2_timer,
694MACHINE_END 695MACHINE_END
@@ -699,6 +700,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
699 .map_io = omap242x_map_io, 700 .map_io = omap242x_map_io,
700 .init_early = omap2420_init_early, 701 .init_early = omap2420_init_early,
701 .init_irq = omap2_init_irq, 702 .init_irq = omap2_init_irq,
703 .handle_irq = omap2_intc_handle_irq,
702 .init_machine = n8x0_init_machine, 704 .init_machine = n8x0_init_machine,
703 .timer = &omap2_timer, 705 .timer = &omap2_timer,
704MACHINE_END 706MACHINE_END
@@ -709,6 +711,7 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
709 .map_io = omap242x_map_io, 711 .map_io = omap242x_map_io,
710 .init_early = omap2420_init_early, 712 .init_early = omap2420_init_early,
711 .init_irq = omap2_init_irq, 713 .init_irq = omap2_init_irq,
714 .handle_irq = omap2_intc_handle_irq,
712 .init_machine = n8x0_init_machine, 715 .init_machine = n8x0_init_machine,
713 .timer = &omap2_timer, 716 .timer = &omap2_timer,
714MACHINE_END 717MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 1843e141f3a7..c34f56588284 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -559,6 +559,7 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
559 .map_io = omap3_map_io, 559 .map_io = omap3_map_io,
560 .init_early = omap3_init_early, 560 .init_early = omap3_init_early,
561 .init_irq = omap3_init_irq, 561 .init_irq = omap3_init_irq,
562 .handle_irq = omap3_intc_handle_irq,
562 .init_machine = omap3_beagle_init, 563 .init_machine = omap3_beagle_init,
563 .timer = &omap3_secure_timer, 564 .timer = &omap3_secure_timer,
564MACHINE_END 565MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 1653d1813308..f11bc444e7be 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -681,6 +681,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
681 .map_io = omap3_map_io, 681 .map_io = omap3_map_io,
682 .init_early = omap35xx_init_early, 682 .init_early = omap35xx_init_early,
683 .init_irq = omap3_init_irq, 683 .init_irq = omap3_init_irq,
684 .handle_irq = omap3_intc_handle_irq,
684 .init_machine = omap3_evm_init, 685 .init_machine = omap3_evm_init,
685 .timer = &omap3_timer, 686 .timer = &omap3_timer,
686MACHINE_END 687MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 1b2a77621626..5fa6bad9574e 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -208,6 +208,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
208 .map_io = omap3_map_io, 208 .map_io = omap3_map_io,
209 .init_early = omap35xx_init_early, 209 .init_early = omap35xx_init_early,
210 .init_irq = omap3_init_irq, 210 .init_irq = omap3_init_irq,
211 .handle_irq = omap3_intc_handle_irq,
211 .init_machine = omap3logic_init, 212 .init_machine = omap3logic_init,
212 .timer = &omap3_timer, 213 .timer = &omap3_timer,
213MACHINE_END 214MACHINE_END
@@ -217,6 +218,7 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
217 .map_io = omap3_map_io, 218 .map_io = omap3_map_io,
218 .init_early = omap35xx_init_early, 219 .init_early = omap35xx_init_early,
219 .init_irq = omap3_init_irq, 220 .init_irq = omap3_init_irq,
221 .handle_irq = omap3_intc_handle_irq,
220 .init_machine = omap3logic_init, 222 .init_machine = omap3logic_init,
221 .timer = &omap3_timer, 223 .timer = &omap3_timer,
222MACHINE_END 224MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 6297e814cddd..ef315c585b75 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -606,6 +606,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
606 .map_io = omap3_map_io, 606 .map_io = omap3_map_io,
607 .init_early = omap35xx_init_early, 607 .init_early = omap35xx_init_early,
608 .init_irq = omap3_init_irq, 608 .init_irq = omap3_init_irq,
609 .handle_irq = omap3_intc_handle_irq,
609 .init_machine = omap3pandora_init, 610 .init_machine = omap3pandora_init,
610 .timer = &omap3_timer, 611 .timer = &omap3_timer,
611MACHINE_END 612MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index ab226473deeb..b21d70a2e4a7 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -454,6 +454,7 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
454 .map_io = omap3_map_io, 454 .map_io = omap3_map_io,
455 .init_early = omap35xx_init_early, 455 .init_early = omap35xx_init_early,
456 .init_irq = omap3_init_irq, 456 .init_irq = omap3_init_irq,
457 .handle_irq = omap3_intc_handle_irq,
457 .init_machine = omap3_stalker_init, 458 .init_machine = omap3_stalker_init,
458 .timer = &omap3_secure_timer, 459 .timer = &omap3_secure_timer,
459MACHINE_END 460MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 2741a34630b1..18cd340f9b7b 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -381,6 +381,7 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
381 .map_io = omap3_map_io, 381 .map_io = omap3_map_io,
382 .init_early = omap3430_init_early, 382 .init_early = omap3430_init_early,
383 .init_irq = omap3_init_irq, 383 .init_irq = omap3_init_irq,
384 .handle_irq = omap3_intc_handle_irq,
384 .init_machine = omap3_touchbook_init, 385 .init_machine = omap3_touchbook_init,
385 .timer = &omap3_secure_timer, 386 .timer = &omap3_secure_timer,
386MACHINE_END 387MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 7722d4d97fb9..b6f114436dbc 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -30,6 +30,7 @@
30#include <linux/wl12xx.h> 30#include <linux/wl12xx.h>
31 31
32#include <mach/hardware.h> 32#include <mach/hardware.h>
33#include <asm/hardware/gic.h>
33#include <asm/mach-types.h> 34#include <asm/mach-types.h>
34#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
35#include <asm/mach/map.h> 36#include <asm/mach/map.h>
@@ -576,6 +577,7 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
576 .map_io = omap4_map_io, 577 .map_io = omap4_map_io,
577 .init_early = omap4430_init_early, 578 .init_early = omap4430_init_early,
578 .init_irq = gic_init_irq, 579 .init_irq = gic_init_irq,
580 .handle_irq = gic_handle_irq,
579 .init_machine = omap4_panda_init, 581 .init_machine = omap4_panda_init,
580 .timer = &omap4_timer, 582 .timer = &omap4_timer,
581MACHINE_END 583MACHINE_END
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 26c5cbb4f2bb..60a61ea759bf 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -562,6 +562,7 @@ MACHINE_START(OVERO, "Gumstix Overo")
562 .map_io = omap3_map_io, 562 .map_io = omap3_map_io,
563 .init_early = omap35xx_init_early, 563 .init_early = omap35xx_init_early,
564 .init_irq = omap3_init_irq, 564 .init_irq = omap3_init_irq,
565 .handle_irq = omap3_intc_handle_irq,
565 .init_machine = overo_init, 566 .init_machine = overo_init,
566 .timer = &omap3_timer, 567 .timer = &omap3_timer,
567MACHINE_END 568MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 6ffb6405285e..a79d49e3fe09 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -149,6 +149,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
149 .map_io = omap3_map_io, 149 .map_io = omap3_map_io,
150 .init_early = omap3630_init_early, 150 .init_early = omap3630_init_early,
151 .init_irq = omap3_init_irq, 151 .init_irq = omap3_init_irq,
152 .handle_irq = omap3_intc_handle_irq,
152 .init_machine = rm680_init, 153 .init_machine = rm680_init,
153 .timer = &omap3_timer, 154 .timer = &omap3_timer,
154MACHINE_END 155MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 847731377af7..4e3c0965edf3 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -127,6 +127,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
127 .map_io = omap3_map_io, 127 .map_io = omap3_map_io,
128 .init_early = omap3430_init_early, 128 .init_early = omap3430_init_early,
129 .init_irq = omap3_init_irq, 129 .init_irq = omap3_init_irq,
130 .handle_irq = omap3_intc_handle_irq,
130 .init_machine = rx51_init, 131 .init_machine = rx51_init,
131 .timer = &omap3_timer, 132 .timer = &omap3_timer,
132MACHINE_END 133MACHINE_END
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index bd58f9205175..70e5b54a2115 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -135,6 +135,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
135 .map_io = omap3_map_io, 135 .map_io = omap3_map_io,
136 .init_early = omap3430_init_early, 136 .init_early = omap3430_init_early,
137 .init_irq = omap3_init_irq, 137 .init_irq = omap3_init_irq,
138 .handle_irq = omap3_intc_handle_irq,
138 .init_machine = omap_zoom_init, 139 .init_machine = omap_zoom_init,
139 .timer = &omap3_timer, 140 .timer = &omap3_timer,
140MACHINE_END 141MACHINE_END
@@ -145,6 +146,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
145 .map_io = omap3_map_io, 146 .map_io = omap3_map_io,
146 .init_early = omap3630_init_early, 147 .init_early = omap3630_init_early,
147 .init_irq = omap3_init_irq, 148 .init_irq = omap3_init_irq,
149 .handle_irq = omap3_intc_handle_irq,
148 .init_machine = omap_zoom_init, 150 .init_machine = omap_zoom_init,
149 .timer = &omap3_timer, 151 .timer = &omap3_timer,
150MACHINE_END 152MACHINE_END
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 950b39d76e94..18c4d5d20faf 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -169,8 +169,6 @@ void omap3_intc_resume_idle(void);
169extern void __iomem *l2cache_base; 169extern void __iomem *l2cache_base;
170#endif 170#endif
171 171
172extern void __iomem *gic_dist_base_addr;
173
174extern void __init gic_init_irq(void); 172extern void __init gic_init_irq(void);
175extern void omap_smc1(u32 fn, u32 arg); 173extern void omap_smc1(u32 fn, u32 arg);
176 174
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index feb90a10945a..56964a0c4c7e 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -10,146 +10,9 @@
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13#include <mach/hardware.h>
14#include <mach/io.h>
15#include <mach/irqs.h>
16#include <asm/hardware/gic.h>
17
18#include <plat/omap24xx.h>
19#include <plat/omap34xx.h>
20#include <plat/omap44xx.h>
21
22#include <plat/multi.h>
23
24#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
25#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
26#define OMAP4_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
27#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */
28#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
29 13
30 .macro disable_fiq 14 .macro disable_fiq
31 .endm 15 .endm
32 16
33 .macro arch_ret_to_user, tmp1, tmp2 17 .macro arch_ret_to_user, tmp1, tmp2
34 .endm 18 .endm
35
36/*
37 * Unoptimized irq functions for multi-omap2, 3 and 4
38 */
39
40#ifdef MULTI_OMAP2
41 /*
42 * Configure the interrupt base on the first interrupt.
43 * See also omap_irq_base_init for setting omap_irq_base.
44 */
45 .macro get_irqnr_preamble, base, tmp
46 ldr \base, =omap_irq_base @ irq base address
47 ldr \base, [\base, #0] @ irq base value
48 .endm
49
50 /* Check the pending interrupts. Note that base already set */
51 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
52 tst \base, #0x100 @ gic address?
53 bne 4401f @ found gic
54
55 /* Handle omap2 and omap3 */
56 ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
57 cmp \irqnr, #0x0
58 bne 9998f
59 ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
60 cmp \irqnr, #0x0
61 bne 9998f
62 ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
63 cmp \irqnr, #0x0
64 bne 9998f
65
66 /*
67 * ti816x has additional IRQ pending register. Checking this
68 * register on omap2 & omap3 has no effect (read as 0).
69 */
70 ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */
71 cmp \irqnr, #0x0
729998:
73 ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
74 and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
75 b 9999f
76
77 /* Handle omap4 */
784401: ldr \irqstat, [\base, #GIC_CPU_INTACK]
79 ldr \tmp, =1021
80 bic \irqnr, \irqstat, #0x1c00
81 cmp \irqnr, #15
82 cmpcc \irqnr, \irqnr
83 cmpne \irqnr, \tmp
84 cmpcs \irqnr, \irqnr
859999:
86 .endm
87
88#ifdef CONFIG_SMP
89 /* We assume that irqstat (the raw value of the IRQ acknowledge
90 * register) is preserved from the macro above.
91 * If there is an IPI, we immediately signal end of interrupt
92 * on the controller, since this requires the original irqstat
93 * value which we won't easily be able to recreate later.
94 */
95
96 .macro test_for_ipi, irqnr, irqstat, base, tmp
97 bic \irqnr, \irqstat, #0x1c00
98 cmp \irqnr, #16
99 it cc
100 strcc \irqstat, [\base, #GIC_CPU_EOI]
101 it cs
102 cmpcs \irqnr, \irqnr
103 .endm
104#endif /* CONFIG_SMP */
105
106#else /* MULTI_OMAP2 */
107
108
109/*
110 * Optimized irq functions for omap2, 3 and 4
111 */
112
113#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
114 .macro get_irqnr_preamble, base, tmp
115#ifdef CONFIG_ARCH_OMAP2
116 ldr \base, =OMAP2_IRQ_BASE
117#else
118 ldr \base, =OMAP3_IRQ_BASE
119#endif
120 .endm
121
122 /* Check the pending interrupts. Note that base already set */
123 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
124 ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
125 cmp \irqnr, #0x0
126 bne 9999f
127 ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
128 cmp \irqnr, #0x0
129 bne 9999f
130 ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
131 cmp \irqnr, #0x0
132#ifdef CONFIG_SOC_OMAPTI816X
133 bne 9999f
134 ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */
135 cmp \irqnr, #0x0
136#endif
1379999:
138 ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
139 and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
140
141 .endm
142#endif
143
144
145#ifdef CONFIG_ARCH_OMAP4
146#define HAVE_GET_IRQNR_PREAMBLE
147#include <asm/hardware/entry-macro-gic.S>
148
149 .macro get_irqnr_preamble, base, tmp
150 ldr \base, =OMAP4_IRQ_BASE
151 .endm
152
153#endif
154
155#endif /* MULTI_OMAP2 */
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 33f090ce0226..8907c4ac1767 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -316,9 +316,6 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
316 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); 316 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
317} 317}
318 318
319/* See irq.c, omap4-common.c and entry-macro.S */
320void __iomem *omap_irq_base;
321
322static void __init omap_common_init_early(void) 319static void __init omap_common_init_early(void)
323{ 320{
324 omap2_check_revision(); 321 omap2_check_revision();
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 65f1be6a182c..42b1d6591912 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -15,6 +15,7 @@
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18#include <asm/exception.h>
18#include <asm/mach/irq.h> 19#include <asm/mach/irq.h>
19 20
20 21
@@ -35,6 +36,11 @@
35/* Number of IRQ state bits in each MIR register */ 36/* Number of IRQ state bits in each MIR register */
36#define IRQ_BITS_PER_REG 32 37#define IRQ_BITS_PER_REG 32
37 38
39#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
40#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
41#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */
42#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
43
38/* 44/*
39 * OMAP2 has a number of different interrupt controllers, each interrupt 45 * OMAP2 has a number of different interrupt controllers, each interrupt
40 * controller is identified as its own "bank". Register definitions are 46 * controller is identified as its own "bank". Register definitions are
@@ -143,6 +149,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
143 149
144static void __init omap_init_irq(u32 base, int nr_irqs) 150static void __init omap_init_irq(u32 base, int nr_irqs)
145{ 151{
152 void __iomem *omap_irq_base;
146 unsigned long nr_of_irqs = 0; 153 unsigned long nr_of_irqs = 0;
147 unsigned int nr_banks = 0; 154 unsigned int nr_banks = 0;
148 int i, j; 155 int i, j;
@@ -191,6 +198,44 @@ void __init ti816x_init_irq(void)
191 omap_init_irq(OMAP34XX_IC_BASE, 128); 198 omap_init_irq(OMAP34XX_IC_BASE, 128);
192} 199}
193 200
201static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs)
202{
203 u32 irqnr;
204
205 do {
206 irqnr = readl_relaxed(base_addr + 0x98);
207 if (irqnr)
208 goto out;
209
210 irqnr = readl_relaxed(base_addr + 0xb8);
211 if (irqnr)
212 goto out;
213
214 irqnr = readl_relaxed(base_addr + 0xd8);
215#ifdef CONFIG_SOC_OMAPTI816X
216 if (irqnr)
217 goto out;
218 irqnr = readl_relaxed(base_addr + 0xf8);
219#endif
220
221out:
222 if (!irqnr)
223 break;
224
225 irqnr = readl_relaxed(base_addr + INTCPS_SIR_IRQ_OFFSET);
226 irqnr &= ACTIVEIRQ_MASK;
227
228 if (irqnr)
229 handle_IRQ(irqnr, regs);
230 } while (irqnr);
231}
232
233asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs)
234{
235 void __iomem *base_addr = OMAP2_IRQ_BASE;
236 omap_intc_handle_irq(base_addr, regs);
237}
238
194#ifdef CONFIG_ARCH_OMAP3 239#ifdef CONFIG_ARCH_OMAP3
195static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)]; 240static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
196 241
@@ -263,4 +308,10 @@ void omap3_intc_resume_idle(void)
263 /* Re-enable autoidle */ 308 /* Re-enable autoidle */
264 intc_bank_write_reg(1, &irq_banks[0], INTC_SYSCONFIG); 309 intc_bank_write_reg(1, &irq_banks[0], INTC_SYSCONFIG);
265} 310}
311
312asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs)
313{
314 void __iomem *base_addr = OMAP3_IRQ_BASE;
315 omap_intc_handle_irq(base_addr, regs);
316}
266#endif /* CONFIG_ARCH_OMAP3 */ 317#endif /* CONFIG_ARCH_OMAP3 */
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index f327d7472ca7..beecfdd56ea3 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -29,11 +29,11 @@
29void __iomem *l2cache_base; 29void __iomem *l2cache_base;
30#endif 30#endif
31 31
32void __iomem *gic_dist_base_addr;
33
34
35void __init gic_init_irq(void) 32void __init gic_init_irq(void)
36{ 33{
34 void __iomem *omap_irq_base;
35 void __iomem *gic_dist_base_addr;
36
37 /* Static mapping, never released */ 37 /* Static mapping, never released */
38 gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); 38 gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
39 BUG_ON(!gic_dist_base_addr); 39 BUG_ON(!gic_dist_base_addr);
diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c
index 34d08347be5f..ad871bd7b1ab 100644
--- a/arch/arm/mach-picoxcell/common.c
+++ b/arch/arm/mach-picoxcell/common.c
@@ -11,6 +11,7 @@
11#include <linux/irqdomain.h> 11#include <linux/irqdomain.h>
12#include <linux/of.h> 12#include <linux/of.h>
13#include <linux/of_address.h> 13#include <linux/of_address.h>
14#include <linux/of_irq.h>
14#include <linux/of_platform.h> 15#include <linux/of_platform.h>
15 16
16#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
@@ -33,22 +34,20 @@ static const char *picoxcell_dt_match[] = {
33}; 34};
34 35
35static const struct of_device_id vic_of_match[] __initconst = { 36static const struct of_device_id vic_of_match[] __initconst = {
36 { .compatible = "arm,pl192-vic" }, 37 { .compatible = "arm,pl192-vic", .data = vic_of_init, },
37 { /* Sentinel */ } 38 { /* Sentinel */ }
38}; 39};
39 40
40static void __init picoxcell_init_irq(void) 41static void __init picoxcell_init_irq(void)
41{ 42{
42 vic_init(IO_ADDRESS(PICOXCELL_VIC0_BASE), 0, ~0, 0); 43 of_irq_init(vic_of_match);
43 vic_init(IO_ADDRESS(PICOXCELL_VIC1_BASE), 32, ~0, 0);
44 irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC0_BASE, 0);
45 irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC1_BASE, 32);
46} 44}
47 45
48DT_MACHINE_START(PICOXCELL, "Picochip picoXcell") 46DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
49 .map_io = picoxcell_map_io, 47 .map_io = picoxcell_map_io,
50 .nr_irqs = ARCH_NR_IRQS, 48 .nr_irqs = ARCH_NR_IRQS,
51 .init_irq = picoxcell_init_irq, 49 .init_irq = picoxcell_init_irq,
50 .handle_irq = vic_handle_irq,
52 .timer = &picoxcell_timer, 51 .timer = &picoxcell_timer,
53 .init_machine = picoxcell_init_machine, 52 .init_machine = picoxcell_init_machine,
54 .dt_compat = picoxcell_dt_match, 53 .dt_compat = picoxcell_dt_match,
diff --git a/arch/arm/mach-picoxcell/include/mach/debug-macro.S b/arch/arm/mach-picoxcell/include/mach/debug-macro.S
index 8f2c234ed9d9..58d4ee3ae949 100644
--- a/arch/arm/mach-picoxcell/include/mach/debug-macro.S
+++ b/arch/arm/mach-picoxcell/include/mach/debug-macro.S
@@ -14,7 +14,7 @@
14 14
15#define UART_SHIFT 2 15#define UART_SHIFT 2
16 16
17 .macro addruart, rp, rv 17 .macro addruart, rp, rv, tmp
18 ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE) 18 ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE)
19 ldr \rp, =PICOXCELL_UART1_BASE 19 ldr \rp, =PICOXCELL_UART1_BASE
20 .endm 20 .endm
diff --git a/arch/arm/mach-picoxcell/include/mach/entry-macro.S b/arch/arm/mach-picoxcell/include/mach/entry-macro.S
index a6b09f75d9df..9b505ac00be9 100644
--- a/arch/arm/mach-picoxcell/include/mach/entry-macro.S
+++ b/arch/arm/mach-picoxcell/include/mach/entry-macro.S
@@ -9,11 +9,8 @@
9 * License version 2. This program is licensed "as is" without any 9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied. 10 * warranty of any kind, whether express or implied.
11 */ 11 */
12#include <mach/hardware.h> 12 .macro disable_fiq
13#include <mach/irqs.h> 13 .endm
14#include <mach/map.h>
15 14
16#define VA_VIC0 IO_ADDRESS(PICOXCELL_VIC0_BASE) 15 .macro arch_ret_to_user, tmp1, tmp2
17#define VA_VIC1 IO_ADDRESS(PICOXCELL_VIC1_BASE) 16 .endm
18
19#include <asm/entry-macro-vic2.S>
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S
index a73bc86a3c26..260c0c17692a 100644
--- a/arch/arm/mach-pxa/include/mach/entry-macro.S
+++ b/arch/arm/mach-pxa/include/mach/entry-macro.S
@@ -7,45 +7,9 @@
7 * License version 2. This program is licensed "as is" without any 7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <mach/hardware.h>
11#include <mach/irqs.h>
12 10
13 .macro disable_fiq 11 .macro disable_fiq
14 .endm 12 .endm
15 13
16 .macro get_irqnr_preamble, base, tmp
17 .endm
18
19 .macro arch_ret_to_user, tmp1, tmp2 14 .macro arch_ret_to_user, tmp1, tmp2
20 .endm 15 .endm
21
22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
23 mrc p15, 0, \tmp, c0, c0, 0 @ CPUID
24 mov \tmp, \tmp, lsr #13
25 and \tmp, \tmp, #0x7 @ Core G
26 cmp \tmp, #1
27 bhi 1002f
28
29 @ Core Generation 1 (PXA25x)
30 mov \base, #io_p2v(0x40000000) @ IIR Ctl = 0x40d00000
31 add \base, \base, #0x00d00000
32 ldr \irqstat, [\base, #0] @ ICIP
33 ldr \irqnr, [\base, #4] @ ICMR
34
35 ands \irqnr, \irqstat, \irqnr
36 beq 1001f
37 rsb \irqstat, \irqnr, #0
38 and \irqstat, \irqstat, \irqnr
39 clz \irqnr, \irqstat
40 rsb \irqnr, \irqnr, #(31 + PXA_IRQ(0))
41 b 1001f
421002:
43 @ Core Generation 2 (PXA27x) or Core Generation 3 (PXA3xx)
44 mrc p6, 0, \irqstat, c5, c0, 0 @ ICHP
45 tst \irqstat, #0x80000000
46 beq 1001f
47 bic \irqstat, \irqstat, #0x80000000
48 mov \irqnr, \irqstat, lsr #16
49 add \irqnr, \irqnr, #(PXA_IRQ(0))
501001:
51 .endm
diff --git a/arch/arm/mach-realview/include/mach/entry-macro.S b/arch/arm/mach-realview/include/mach/entry-macro.S
index 4071164aebaa..e8a5179c2653 100644
--- a/arch/arm/mach-realview/include/mach/entry-macro.S
+++ b/arch/arm/mach-realview/include/mach/entry-macro.S
@@ -7,8 +7,6 @@
7 * License version 2. This program is licensed "as is" without any 7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <mach/hardware.h>
11#include <asm/hardware/entry-macro-gic.S>
12 10
13 .macro disable_fiq 11 .macro disable_fiq
14 .endm 12 .endm
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 026c66ad7ec2..10ef2e74cce5 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -469,6 +469,7 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
469 .init_early = realview_init_early, 469 .init_early = realview_init_early,
470 .init_irq = gic_init_irq, 470 .init_irq = gic_init_irq,
471 .timer = &realview_eb_timer, 471 .timer = &realview_eb_timer,
472 .handle_irq = gic_handle_irq,
472 .init_machine = realview_eb_init, 473 .init_machine = realview_eb_init,
473#ifdef CONFIG_ZONE_DMA 474#ifdef CONFIG_ZONE_DMA
474 .dma_zone_size = SZ_256M, 475 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index c057540ec776..bd8fec8b20d9 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -392,6 +392,7 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
392 .init_early = realview_init_early, 392 .init_early = realview_init_early,
393 .init_irq = gic_init_irq, 393 .init_irq = gic_init_irq,
394 .timer = &realview_pb1176_timer, 394 .timer = &realview_pb1176_timer,
395 .handle_irq = gic_handle_irq,
395 .init_machine = realview_pb1176_init, 396 .init_machine = realview_pb1176_init,
396#ifdef CONFIG_ZONE_DMA 397#ifdef CONFIG_ZONE_DMA
397 .dma_zone_size = SZ_256M, 398 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 671ad6d6ff00..fa73ba81a449 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -366,6 +366,7 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
366 .init_early = realview_init_early, 366 .init_early = realview_init_early,
367 .init_irq = gic_init_irq, 367 .init_irq = gic_init_irq,
368 .timer = &realview_pb11mp_timer, 368 .timer = &realview_pb11mp_timer,
369 .handle_irq = gic_handle_irq,
369 .init_machine = realview_pb11mp_init, 370 .init_machine = realview_pb11mp_init,
370#ifdef CONFIG_ZONE_DMA 371#ifdef CONFIG_ZONE_DMA
371 .dma_zone_size = SZ_256M, 372 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index cbf22df4ad5b..6e5f2b9ddb7e 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -316,6 +316,7 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
316 .init_early = realview_init_early, 316 .init_early = realview_init_early,
317 .init_irq = gic_init_irq, 317 .init_irq = gic_init_irq,
318 .timer = &realview_pba8_timer, 318 .timer = &realview_pba8_timer,
319 .handle_irq = gic_handle_irq,
319 .init_machine = realview_pba8_init, 320 .init_machine = realview_pba8_init,
320#ifdef CONFIG_ZONE_DMA 321#ifdef CONFIG_ZONE_DMA
321 .dma_zone_size = SZ_256M, 322 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index 63c4114afae9..291bf1a8f2f0 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -399,6 +399,7 @@ MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
399 .init_early = realview_init_early, 399 .init_early = realview_init_early,
400 .init_irq = gic_init_irq, 400 .init_irq = gic_init_irq,
401 .timer = &realview_pbx_timer, 401 .timer = &realview_pbx_timer,
402 .handle_irq = gic_handle_irq,
402 .init_machine = realview_pbx_init, 403 .init_machine = realview_pbx_init,
403#ifdef CONFIG_ZONE_DMA 404#ifdef CONFIG_ZONE_DMA
404 .dma_zone_size = SZ_256M, 405 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
index dd362604dcce..dc2bc15142ce 100644
--- a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
@@ -12,7 +12,8 @@
12 * warranty of any kind, whether express or implied. 12 * warranty of any kind, whether express or implied.
13*/ 13*/
14 14
15#include <mach/map.h> 15 .macro disable_fiq
16#include <mach/irqs.h> 16 .endm
17 17
18#include <asm/entry-macro-vic2.S> 18 .macro arch_ret_to_user, tmp1, tmp2
19 .endm
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index 8eba88e7209e..2bbc14d93428 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -30,6 +30,7 @@
30 30
31#include <video/platform_lcd.h> 31#include <video/platform_lcd.h>
32 32
33#include <asm/hardware/vic.h>
33#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 35#include <asm/mach/map.h>
35#include <asm/mach/irq.h> 36#include <asm/mach/irq.h>
@@ -236,6 +237,7 @@ MACHINE_START(ANW6410, "A&W6410")
236 .atag_offset = 0x100, 237 .atag_offset = 0x100,
237 238
238 .init_irq = s3c6410_init_irq, 239 .init_irq = s3c6410_init_irq,
240 .handle_irq = vic_handle_irq,
239 .map_io = anw6410_map_io, 241 .map_io = anw6410_map_io,
240 .init_machine = anw6410_machine_init, 242 .init_machine = anw6410_machine_init,
241 .timer = &s3c24xx_timer, 243 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index d04b65448510..988ac2e48f08 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -37,6 +37,7 @@
37#include <linux/mfd/wm831x/irq.h> 37#include <linux/mfd/wm831x/irq.h>
38#include <linux/mfd/wm831x/gpio.h> 38#include <linux/mfd/wm831x/gpio.h>
39 39
40#include <asm/hardware/vic.h>
40#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
41#include <asm/mach-types.h> 42#include <asm/mach-types.h>
42 43
@@ -711,6 +712,7 @@ MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
711 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */ 712 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
712 .atag_offset = 0x100, 713 .atag_offset = 0x100,
713 .init_irq = s3c6410_init_irq, 714 .init_irq = s3c6410_init_irq,
715 .handle_irq = vic_handle_irq,
714 .map_io = crag6410_map_io, 716 .map_io = crag6410_map_io,
715 .init_machine = crag6410_machine_init, 717 .init_machine = crag6410_machine_init,
716 .timer = &s3c24xx_timer, 718 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index 952f75ff5deb..c5955f301709 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -29,6 +29,7 @@
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <mach/map.h> 30#include <mach/map.h>
31 31
32#include <asm/hardware/vic.h>
32#include <asm/irq.h> 33#include <asm/irq.h>
33#include <asm/mach-types.h> 34#include <asm/mach-types.h>
34 35
@@ -267,6 +268,7 @@ MACHINE_START(HMT, "Airgoo-HMT")
267 /* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */ 268 /* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */
268 .atag_offset = 0x100, 269 .atag_offset = 0x100,
269 .init_irq = s3c6410_init_irq, 270 .init_irq = s3c6410_init_irq,
271 .handle_irq = vic_handle_irq,
270 .map_io = hmt_map_io, 272 .map_io = hmt_map_io,
271 .init_machine = hmt_machine_init, 273 .init_machine = hmt_machine_init,
272 .timer = &s3c24xx_timer, 274 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 1bc85c359498..4415c85e3f6f 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -24,6 +24,7 @@
24#include <linux/serial_core.h> 24#include <linux/serial_core.h>
25#include <linux/types.h> 25#include <linux/types.h>
26 26
27#include <asm/hardware/vic.h>
27#include <asm/mach-types.h> 28#include <asm/mach-types.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
29#include <asm/mach/map.h> 30#include <asm/mach/map.h>
@@ -345,6 +346,7 @@ MACHINE_START(MINI6410, "MINI6410")
345 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */ 346 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
346 .atag_offset = 0x100, 347 .atag_offset = 0x100,
347 .init_irq = s3c6410_init_irq, 348 .init_irq = s3c6410_init_irq,
349 .handle_irq = vic_handle_irq,
348 .map_io = mini6410_map_io, 350 .map_io = mini6410_map_io,
349 .init_machine = mini6410_machine_init, 351 .init_machine = mini6410_machine_init,
350 .timer = &s3c24xx_timer, 352 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index cb13cba98b3d..9b2c610eac2a 100644
--- a/arch/arm/mach-s3c64xx/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -25,6 +25,7 @@
25 25
26#include <video/platform_lcd.h> 26#include <video/platform_lcd.h>
27 27
28#include <asm/hardware/vic.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
29#include <asm/mach/map.h> 30#include <asm/mach/map.h>
30#include <asm/mach/irq.h> 31#include <asm/mach/irq.h>
@@ -99,6 +100,7 @@ MACHINE_START(NCP, "NCP")
99 /* Maintainer: Samsung Electronics */ 100 /* Maintainer: Samsung Electronics */
100 .atag_offset = 0x100, 101 .atag_offset = 0x100,
101 .init_irq = s3c6410_init_irq, 102 .init_irq = s3c6410_init_irq,
103 .handle_irq = vic_handle_irq,
102 .map_io = ncp_map_io, 104 .map_io = ncp_map_io,
103 .init_machine = ncp_machine_init, 105 .init_machine = ncp_machine_init,
104 .timer = &s3c24xx_timer, 106 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 87281e4b8471..dbab49f2713e 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -25,6 +25,7 @@
25#include <linux/serial_core.h> 25#include <linux/serial_core.h>
26#include <linux/types.h> 26#include <linux/types.h>
27 27
28#include <asm/hardware/vic.h>
28#include <asm/mach-types.h> 29#include <asm/mach-types.h>
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 31#include <asm/mach/map.h>
@@ -326,6 +327,7 @@ MACHINE_START(REAL6410, "REAL6410")
326 .atag_offset = 0x100, 327 .atag_offset = 0x100,
327 328
328 .init_irq = s3c6410_init_irq, 329 .init_irq = s3c6410_init_irq,
330 .handle_irq = vic_handle_irq,
329 .map_io = real6410_map_io, 331 .map_io = real6410_map_io,
330 .init_machine = real6410_machine_init, 332 .init_machine = real6410_machine_init,
331 .timer = &s3c24xx_timer, 333 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c
index 94c831d88365..053945282652 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -17,6 +17,7 @@
17#include <linux/leds.h> 17#include <linux/leds.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19 19
20#include <asm/hardware/vic.h>
20#include <asm/mach-types.h> 21#include <asm/mach-types.h>
21#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
22 23
@@ -148,6 +149,7 @@ MACHINE_START(SMARTQ5, "SmartQ 5")
148 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ 149 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
149 .atag_offset = 0x100, 150 .atag_offset = 0x100,
150 .init_irq = s3c6410_init_irq, 151 .init_irq = s3c6410_init_irq,
152 .handle_irq = vic_handle_irq,
151 .map_io = smartq_map_io, 153 .map_io = smartq_map_io,
152 .init_machine = smartq5_machine_init, 154 .init_machine = smartq5_machine_init,
153 .timer = &s3c24xx_timer, 155 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c
index f112547ce80a..a58d1ba5cba2 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq7.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq7.c
@@ -17,6 +17,7 @@
17#include <linux/leds.h> 17#include <linux/leds.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19 19
20#include <asm/hardware/vic.h>
20#include <asm/mach-types.h> 21#include <asm/mach-types.h>
21#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
22 23
@@ -164,6 +165,7 @@ MACHINE_START(SMARTQ7, "SmartQ 7")
164 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ 165 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
165 .atag_offset = 0x100, 166 .atag_offset = 0x100,
166 .init_irq = s3c6410_init_irq, 167 .init_irq = s3c6410_init_irq,
168 .handle_irq = vic_handle_irq,
167 .map_io = smartq_map_io, 169 .map_io = smartq_map_io,
168 .init_machine = smartq7_machine_init, 170 .init_machine = smartq7_machine_init,
169 .timer = &s3c24xx_timer, 171 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index 73450c2b530a..be28a59e3f57 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -22,6 +22,7 @@
22 22
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24 24
25#include <asm/hardware/vic.h>
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
27#include <asm/mach/irq.h> 28#include <asm/mach/irq.h>
@@ -88,6 +89,7 @@ MACHINE_START(SMDK6400, "SMDK6400")
88 .atag_offset = 0x100, 89 .atag_offset = 0x100,
89 90
90 .init_irq = s3c6400_init_irq, 91 .init_irq = s3c6400_init_irq,
92 .handle_irq = vic_handle_irq,
91 .map_io = smdk6400_map_io, 93 .map_io = smdk6400_map_io,
92 .init_machine = smdk6400_machine_init, 94 .init_machine = smdk6400_machine_init,
93 .timer = &s3c24xx_timer, 95 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 8bc8edd85e5a..08309155d087 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -43,6 +43,7 @@
43 43
44#include <video/platform_lcd.h> 44#include <video/platform_lcd.h>
45 45
46#include <asm/hardware/vic.h>
46#include <asm/mach/arch.h> 47#include <asm/mach/arch.h>
47#include <asm/mach/map.h> 48#include <asm/mach/map.h>
48#include <asm/mach/irq.h> 49#include <asm/mach/irq.h>
@@ -700,6 +701,7 @@ MACHINE_START(SMDK6410, "SMDK6410")
700 .atag_offset = 0x100, 701 .atag_offset = 0x100,
701 702
702 .init_irq = s3c6410_init_irq, 703 .init_irq = s3c6410_init_irq,
704 .handle_irq = vic_handle_irq,
703 .map_io = smdk6410_map_io, 705 .map_io = smdk6410_map_io,
704 .init_machine = smdk6410_machine_init, 706 .init_machine = smdk6410_machine_init,
705 .timer = &s3c24xx_timer, 707 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
index 10b62b4f8211..fbb246d0a3df 100644
--- a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
@@ -10,7 +10,8 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11*/ 11*/
12 12
13#include <mach/map.h> 13 .macro disable_fiq
14#include <plat/irqs.h> 14 .endm
15 15
16#include <asm/entry-macro-vic2.S> 16 .macro arch_ret_to_user, tmp1, tmp2
17 .endm
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 4a1250cd1356..c272c3f7d6de 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -27,6 +27,7 @@
27 27
28#include <video/platform_lcd.h> 28#include <video/platform_lcd.h>
29 29
30#include <asm/hardware/vic.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
31#include <asm/mach/map.h> 32#include <asm/mach/map.h>
32#include <asm/irq.h> 33#include <asm/irq.h>
@@ -242,6 +243,7 @@ MACHINE_START(SMDK6440, "SMDK6440")
242 .atag_offset = 0x100, 243 .atag_offset = 0x100,
243 244
244 .init_irq = s5p6440_init_irq, 245 .init_irq = s5p6440_init_irq,
246 .handle_irq = vic_handle_irq,
245 .map_io = smdk6440_map_io, 247 .map_io = smdk6440_map_io,
246 .init_machine = smdk6440_machine_init, 248 .init_machine = smdk6440_machine_init,
247 .timer = &s5p_timer, 249 .timer = &s5p_timer,
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 0ab129ecf009..7a4700959616 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -27,6 +27,7 @@
27 27
28#include <video/platform_lcd.h> 28#include <video/platform_lcd.h>
29 29
30#include <asm/hardware/vic.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
31#include <asm/mach/map.h> 32#include <asm/mach/map.h>
32#include <asm/irq.h> 33#include <asm/irq.h>
@@ -262,6 +263,7 @@ MACHINE_START(SMDK6450, "SMDK6450")
262 .atag_offset = 0x100, 263 .atag_offset = 0x100,
263 264
264 .init_irq = s5p6450_init_irq, 265 .init_irq = s5p6450_init_irq,
266 .handle_irq = vic_handle_irq,
265 .map_io = smdk6450_map_io, 267 .map_io = smdk6450_map_io,
266 .init_machine = smdk6450_machine_init, 268 .init_machine = smdk6450_machine_init,
267 .timer = &s5p_timer, 269 .timer = &s5p_timer,
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
index ba76af052c81..b8c242edfa22 100644
--- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
@@ -12,39 +12,14 @@
12 * warranty of any kind, whether express or implied. 12 * warranty of any kind, whether express or implied.
13*/ 13*/
14 14
15#include <asm/hardware/vic.h>
16#include <mach/map.h>
17#include <plat/irqs.h>
18
19 .macro disable_fiq 15 .macro disable_fiq
20 .endm 16 .endm
21 17
22 .macro get_irqnr_preamble, base, tmp 18 .macro get_irqnr_preamble, base, tmp
23 ldr \base, =VA_VIC0
24 .endm 19 .endm
25 20
26 .macro arch_ret_to_user, tmp1, tmp2 21 .macro arch_ret_to_user, tmp1, tmp2
27 .endm 22 .endm
28 23
29 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
30
31 @ check the vic0
32 mov \irqnr, # S5P_IRQ_OFFSET + 31
33 ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
34 teq \irqstat, #0
35
36 @ otherwise try vic1
37 addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
38 addeq \irqnr, \irqnr, #32
39 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
40 teqeq \irqstat, #0
41
42 @ otherwise try vic2
43 addeq \tmp, \base, #(VA_VIC2 - VA_VIC0)
44 addeq \irqnr, \irqnr, #32
45 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
46 teqeq \irqstat, #0
47
48 clzne \irqstat, \irqstat
49 subne \irqnr, \irqnr, \irqstat
50 .endm 25 .endm
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 26f5c91c9427..93ebe3a92d10 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -25,6 +25,7 @@
25#include <linux/input.h> 25#include <linux/input.h>
26#include <linux/pwm_backlight.h> 26#include <linux/pwm_backlight.h>
27 27
28#include <asm/hardware/vic.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
29#include <asm/mach/map.h> 30#include <asm/mach/map.h>
30 31
@@ -250,6 +251,7 @@ MACHINE_START(SMDKC100, "SMDKC100")
250 /* Maintainer: Byungho Min <bhmin@samsung.com> */ 251 /* Maintainer: Byungho Min <bhmin@samsung.com> */
251 .atag_offset = 0x100, 252 .atag_offset = 0x100,
252 .init_irq = s5pc100_init_irq, 253 .init_irq = s5pc100_init_irq,
254 .handle_irq = vic_handle_irq,
253 .map_io = smdkc100_map_io, 255 .map_io = smdkc100_map_io,
254 .init_machine = smdkc100_machine_init, 256 .init_machine = smdkc100_machine_init,
255 .timer = &s3c24xx_timer, 257 .timer = &s3c24xx_timer,
diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
index 3aa41ac59f07..bebca1b5d0b1 100644
--- a/arch/arm/mach-s5pv210/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
@@ -10,45 +10,8 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11*/ 11*/
12 12
13#include <asm/hardware/vic.h>
14#include <mach/map.h>
15#include <plat/irqs.h>
16
17 .macro disable_fiq 13 .macro disable_fiq
18 .endm 14 .endm
19 15
20 .macro get_irqnr_preamble, base, tmp
21 ldr \base, =VA_VIC0
22 .endm
23
24 .macro arch_ret_to_user, tmp1, tmp2 16 .macro arch_ret_to_user, tmp1, tmp2
25 .endm 17 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28
29 @ check the vic0
30 mov \irqnr, # S5P_IRQ_OFFSET + 31
31 ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
32 teq \irqstat, #0
33
34 @ otherwise try vic1
35 addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
36 addeq \irqnr, \irqnr, #32
37 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
38 teqeq \irqstat, #0
39
40 @ otherwise try vic2
41 addeq \tmp, \base, #(VA_VIC2 - VA_VIC0)
42 addeq \irqnr, \irqnr, #32
43 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
44 teqeq \irqstat, #0
45
46 @ otherwise try vic3
47 addeq \tmp, \base, #(VA_VIC3 - VA_VIC0)
48 addeq \irqnr, \irqnr, #32
49 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
50 teqeq \irqstat, #0
51
52 clzne \irqstat, \irqstat
53 subne \irqnr, \irqnr, \irqstat
54 .endm
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 5811a96125f0..71ca95604d63 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -22,6 +22,7 @@
22#include <linux/input.h> 22#include <linux/input.h>
23#include <linux/gpio.h> 23#include <linux/gpio.h>
24 24
25#include <asm/hardware/vic.h>
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
27#include <asm/setup.h> 28#include <asm/setup.h>
@@ -680,6 +681,7 @@ MACHINE_START(AQUILA, "Aquila")
680 Kyungmin Park <kyungmin.park@samsung.com> */ 681 Kyungmin Park <kyungmin.park@samsung.com> */
681 .atag_offset = 0x100, 682 .atag_offset = 0x100,
682 .init_irq = s5pv210_init_irq, 683 .init_irq = s5pv210_init_irq,
684 .handle_irq = vic_handle_irq,
683 .map_io = aquila_map_io, 685 .map_io = aquila_map_io,
684 .init_machine = aquila_machine_init, 686 .init_machine = aquila_machine_init,
685 .timer = &s5p_timer, 687 .timer = &s5p_timer,
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 15edcae448b9..448fd9ea96f2 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -27,6 +27,7 @@
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <linux/interrupt.h> 28#include <linux/interrupt.h>
29 29
30#include <asm/hardware/vic.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
31#include <asm/mach/map.h> 32#include <asm/mach/map.h>
32#include <asm/setup.h> 33#include <asm/setup.h>
@@ -956,6 +957,7 @@ MACHINE_START(GONI, "GONI")
956 /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */ 957 /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */
957 .atag_offset = 0x100, 958 .atag_offset = 0x100,
958 .init_irq = s5pv210_init_irq, 959 .init_irq = s5pv210_init_irq,
960 .handle_irq = vic_handle_irq,
959 .map_io = goni_map_io, 961 .map_io = goni_map_io,
960 .init_machine = goni_machine_init, 962 .init_machine = goni_machine_init,
961 .timer = &s5p_timer, 963 .timer = &s5p_timer,
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index f7266bb0cac8..c2531ffc720b 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -15,6 +15,7 @@
15#include <linux/i2c.h> 15#include <linux/i2c.h>
16#include <linux/sysdev.h> 16#include <linux/sysdev.h>
17 17
18#include <asm/hardware/vic.h>
18#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
19#include <asm/mach/map.h> 20#include <asm/mach/map.h>
20#include <asm/setup.h> 21#include <asm/setup.h>
@@ -138,6 +139,7 @@ MACHINE_START(SMDKC110, "SMDKC110")
138 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 139 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
139 .atag_offset = 0x100, 140 .atag_offset = 0x100,
140 .init_irq = s5pv210_init_irq, 141 .init_irq = s5pv210_init_irq,
142 .handle_irq = vic_handle_irq,
141 .map_io = smdkc110_map_io, 143 .map_io = smdkc110_map_io,
142 .init_machine = smdkc110_machine_init, 144 .init_machine = smdkc110_machine_init,
143 .timer = &s5p_timer, 145 .timer = &s5p_timer,
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index a9106c392398..4ca77c41d499 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -20,6 +20,7 @@
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/pwm_backlight.h> 21#include <linux/pwm_backlight.h>
22 22
23#include <asm/hardware/vic.h>
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
25#include <asm/setup.h> 26#include <asm/setup.h>
@@ -315,6 +316,7 @@ MACHINE_START(SMDKV210, "SMDKV210")
315 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 316 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
316 .atag_offset = 0x100, 317 .atag_offset = 0x100,
317 .init_irq = s5pv210_init_irq, 318 .init_irq = s5pv210_init_irq,
319 .handle_irq = vic_handle_irq,
318 .map_io = smdkv210_map_io, 320 .map_io = smdkv210_map_io,
319 .init_machine = smdkv210_machine_init, 321 .init_machine = smdkv210_machine_init,
320 .timer = &s5p_timer, 322 .timer = &s5p_timer,
diff --git a/arch/arm/mach-s5pv210/mach-torbreck.c b/arch/arm/mach-s5pv210/mach-torbreck.c
index 97cc066c5369..df70fcb34516 100644
--- a/arch/arm/mach-s5pv210/mach-torbreck.c
+++ b/arch/arm/mach-s5pv210/mach-torbreck.c
@@ -14,6 +14,7 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/serial_core.h> 15#include <linux/serial_core.h>
16 16
17#include <asm/hardware/vic.h>
17#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
18#include <asm/mach/map.h> 19#include <asm/mach/map.h>
19#include <asm/setup.h> 20#include <asm/setup.h>
@@ -127,6 +128,7 @@ MACHINE_START(TORBRECK, "TORBRECK")
127 /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */ 128 /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */
128 .atag_offset = 0x100, 129 .atag_offset = 0x100,
129 .init_irq = s5pv210_init_irq, 130 .init_irq = s5pv210_init_irq,
131 .handle_irq = vic_handle_irq,
130 .map_io = torbreck_map_io, 132 .map_io = torbreck_map_io,
131 .init_machine = torbreck_machine_init, 133 .init_machine = torbreck_machine_init,
132 .timer = &s5p_timer, 134 .timer = &s5p_timer,
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 2aec2f732515..5ca1f9d66995 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Common objects 5# Common objects
6obj-y := timer.o console.o clock.o pm_runtime.o 6obj-y := timer.o console.o clock.o
7 7
8# CPU objects 8# CPU objects
9obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o 9obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o
@@ -28,7 +28,6 @@ pfc-$(CONFIG_ARCH_SH73A0) += pfc-sh73a0.o
28obj-$(CONFIG_ARCH_SH7367) += entry-intc.o 28obj-$(CONFIG_ARCH_SH7367) += entry-intc.o
29obj-$(CONFIG_ARCH_SH7377) += entry-intc.o 29obj-$(CONFIG_ARCH_SH7377) += entry-intc.o
30obj-$(CONFIG_ARCH_SH7372) += entry-intc.o 30obj-$(CONFIG_ARCH_SH7372) += entry-intc.o
31obj-$(CONFIG_ARCH_SH73A0) += entry-gic.o
32 31
33# PM objects 32# PM objects
34obj-$(CONFIG_SUSPEND) += suspend.o 33obj-$(CONFIG_SUSPEND) += suspend.o
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index 83624e26b884..202c3c6ec9d8 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -515,14 +515,14 @@ static void __init ag5evm_init(void)
515 /* enable MMCIF */ 515 /* enable MMCIF */
516 gpio_request(GPIO_FN_MMCCLK0, NULL); 516 gpio_request(GPIO_FN_MMCCLK0, NULL);
517 gpio_request(GPIO_FN_MMCCMD0_PU, NULL); 517 gpio_request(GPIO_FN_MMCCMD0_PU, NULL);
518 gpio_request(GPIO_FN_MMCD0_0, NULL); 518 gpio_request(GPIO_FN_MMCD0_0_PU, NULL);
519 gpio_request(GPIO_FN_MMCD0_1, NULL); 519 gpio_request(GPIO_FN_MMCD0_1_PU, NULL);
520 gpio_request(GPIO_FN_MMCD0_2, NULL); 520 gpio_request(GPIO_FN_MMCD0_2_PU, NULL);
521 gpio_request(GPIO_FN_MMCD0_3, NULL); 521 gpio_request(GPIO_FN_MMCD0_3_PU, NULL);
522 gpio_request(GPIO_FN_MMCD0_4, NULL); 522 gpio_request(GPIO_FN_MMCD0_4_PU, NULL);
523 gpio_request(GPIO_FN_MMCD0_5, NULL); 523 gpio_request(GPIO_FN_MMCD0_5_PU, NULL);
524 gpio_request(GPIO_FN_MMCD0_6, NULL); 524 gpio_request(GPIO_FN_MMCD0_6_PU, NULL);
525 gpio_request(GPIO_FN_MMCD0_7, NULL); 525 gpio_request(GPIO_FN_MMCD0_7_PU, NULL);
526 gpio_request(GPIO_PORT208, NULL); /* Reset */ 526 gpio_request(GPIO_PORT208, NULL); /* Reset */
527 gpio_direction_output(GPIO_PORT208, 1); 527 gpio_direction_output(GPIO_PORT208, 1);
528 528
@@ -608,7 +608,7 @@ struct sys_timer ag5evm_timer = {
608MACHINE_START(AG5EVM, "ag5evm") 608MACHINE_START(AG5EVM, "ag5evm")
609 .map_io = ag5evm_map_io, 609 .map_io = ag5evm_map_io,
610 .init_irq = sh73a0_init_irq, 610 .init_irq = sh73a0_init_irq,
611 .handle_irq = shmobile_handle_irq_gic, 611 .handle_irq = gic_handle_irq,
612 .init_machine = ag5evm_init, 612 .init_machine = ag5evm_init,
613 .timer = &ag5evm_timer, 613 .timer = &ag5evm_timer,
614MACHINE_END 614MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index a3aa0f6df964..4c865ece9ac4 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -201,7 +201,7 @@ static struct physmap_flash_data nor_flash_data = {
201static struct resource nor_flash_resources[] = { 201static struct resource nor_flash_resources[] = {
202 [0] = { 202 [0] = {
203 .start = 0x20000000, /* CS0 shadow instead of regular CS0 */ 203 .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
204 .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */ 204 .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
205 .flags = IORESOURCE_MEM, 205 .flags = IORESOURCE_MEM,
206 } 206 }
207}; 207};
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index adc73122bf20..1b4439d3f9d5 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -48,6 +48,7 @@
48#include <asm/hardware/cache-l2x0.h> 48#include <asm/hardware/cache-l2x0.h>
49#include <asm/traps.h> 49#include <asm/traps.h>
50 50
51/* SMSC 9220 */
51static struct resource smsc9220_resources[] = { 52static struct resource smsc9220_resources[] = {
52 [0] = { 53 [0] = {
53 .start = 0x14000000, /* CS5A */ 54 .start = 0x14000000, /* CS5A */
@@ -77,6 +78,7 @@ static struct platform_device eth_device = {
77 .num_resources = ARRAY_SIZE(smsc9220_resources), 78 .num_resources = ARRAY_SIZE(smsc9220_resources),
78}; 79};
79 80
81/* KEYSC */
80static struct sh_keysc_info keysc_platdata = { 82static struct sh_keysc_info keysc_platdata = {
81 .mode = SH_KEYSC_MODE_6, 83 .mode = SH_KEYSC_MODE_6,
82 .scan_timing = 3, 84 .scan_timing = 3,
@@ -120,6 +122,7 @@ static struct platform_device keysc_device = {
120 }, 122 },
121}; 123};
122 124
125/* GPIO KEY */
123#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 } 126#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
124 127
125static struct gpio_keys_button gpio_buttons[] = { 128static struct gpio_keys_button gpio_buttons[] = {
@@ -150,6 +153,7 @@ static struct platform_device gpio_keys_device = {
150 }, 153 },
151}; 154};
152 155
156/* GPIO LED */
153#define GPIO_LED(n, g) { .name = n, .gpio = g } 157#define GPIO_LED(n, g) { .name = n, .gpio = g }
154 158
155static struct gpio_led gpio_leds[] = { 159static struct gpio_led gpio_leds[] = {
@@ -175,6 +179,7 @@ static struct platform_device gpio_leds_device = {
175 }, 179 },
176}; 180};
177 181
182/* MMCIF */
178static struct resource mmcif_resources[] = { 183static struct resource mmcif_resources[] = {
179 [0] = { 184 [0] = {
180 .name = "MMCIF", 185 .name = "MMCIF",
@@ -207,6 +212,7 @@ static struct platform_device mmcif_device = {
207 .resource = mmcif_resources, 212 .resource = mmcif_resources,
208}; 213};
209 214
215/* SDHI0 */
210static struct sh_mobile_sdhi_info sdhi0_info = { 216static struct sh_mobile_sdhi_info sdhi0_info = {
211 .tmio_caps = MMC_CAP_SD_HIGHSPEED, 217 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
212 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT, 218 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
@@ -243,6 +249,7 @@ static struct platform_device sdhi0_device = {
243 }, 249 },
244}; 250};
245 251
252/* SDHI1 */
246static struct sh_mobile_sdhi_info sdhi1_info = { 253static struct sh_mobile_sdhi_info sdhi1_info = {
247 .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ, 254 .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
248 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT, 255 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
@@ -441,7 +448,7 @@ struct sys_timer kota2_timer = {
441MACHINE_START(KOTA2, "kota2") 448MACHINE_START(KOTA2, "kota2")
442 .map_io = kota2_map_io, 449 .map_io = kota2_map_io,
443 .init_irq = kota2_init_irq, 450 .init_irq = kota2_init_irq,
444 .handle_irq = shmobile_handle_irq_gic, 451 .handle_irq = gic_handle_irq,
445 .init_machine = kota2_init, 452 .init_machine = kota2_init,
446 .timer = &kota2_timer, 453 .timer = &kota2_timer,
447MACHINE_END 454MACHINE_END
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 66975921e646..995a9c3aec8f 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -476,7 +476,7 @@ static struct clk_ops fsidiv_clk_ops = {
476 .disable = fsidiv_disable, 476 .disable = fsidiv_disable,
477}; 477};
478 478
479static struct clk_mapping sh7372_fsidiva_clk_mapping = { 479static struct clk_mapping fsidiva_clk_mapping = {
480 .phys = FSIDIVA, 480 .phys = FSIDIVA,
481 .len = 8, 481 .len = 8,
482}; 482};
@@ -484,10 +484,10 @@ static struct clk_mapping sh7372_fsidiva_clk_mapping = {
484struct clk sh7372_fsidiva_clk = { 484struct clk sh7372_fsidiva_clk = {
485 .ops = &fsidiv_clk_ops, 485 .ops = &fsidiv_clk_ops,
486 .parent = &div6_reparent_clks[DIV6_FSIA], /* late install */ 486 .parent = &div6_reparent_clks[DIV6_FSIA], /* late install */
487 .mapping = &sh7372_fsidiva_clk_mapping, 487 .mapping = &fsidiva_clk_mapping,
488}; 488};
489 489
490static struct clk_mapping sh7372_fsidivb_clk_mapping = { 490static struct clk_mapping fsidivb_clk_mapping = {
491 .phys = FSIDIVB, 491 .phys = FSIDIVB,
492 .len = 8, 492 .len = 8,
493}; 493};
@@ -495,7 +495,7 @@ static struct clk_mapping sh7372_fsidivb_clk_mapping = {
495struct clk sh7372_fsidivb_clk = { 495struct clk sh7372_fsidivb_clk = {
496 .ops = &fsidiv_clk_ops, 496 .ops = &fsidiv_clk_ops,
497 .parent = &div6_reparent_clks[DIV6_FSIB], /* late install */ 497 .parent = &div6_reparent_clks[DIV6_FSIB], /* late install */
498 .mapping = &sh7372_fsidivb_clk_mapping, 498 .mapping = &fsidivb_clk_mapping,
499}; 499};
500 500
501static struct clk *late_main_clks[] = { 501static struct clk *late_main_clks[] = {
diff --git a/arch/arm/mach-shmobile/cpuidle.c b/arch/arm/mach-shmobile/cpuidle.c
index 2e44f11f592e..1b2334277e85 100644
--- a/arch/arm/mach-shmobile/cpuidle.c
+++ b/arch/arm/mach-shmobile/cpuidle.c
@@ -26,65 +26,59 @@ void (*shmobile_cpuidle_modes[CPUIDLE_STATE_MAX])(void) = {
26}; 26};
27 27
28static int shmobile_cpuidle_enter(struct cpuidle_device *dev, 28static int shmobile_cpuidle_enter(struct cpuidle_device *dev,
29 struct cpuidle_state *state) 29 struct cpuidle_driver *drv,
30 int index)
30{ 31{
31 ktime_t before, after; 32 ktime_t before, after;
32 int requested_state = state - &dev->states[0];
33 33
34 dev->last_state = &dev->states[requested_state];
35 before = ktime_get(); 34 before = ktime_get();
36 35
37 local_irq_disable(); 36 local_irq_disable();
38 local_fiq_disable(); 37 local_fiq_disable();
39 38
40 shmobile_cpuidle_modes[requested_state](); 39 shmobile_cpuidle_modes[index]();
41 40
42 local_irq_enable(); 41 local_irq_enable();
43 local_fiq_enable(); 42 local_fiq_enable();
44 43
45 after = ktime_get(); 44 after = ktime_get();
46 return ktime_to_ns(ktime_sub(after, before)) >> 10; 45 dev->last_residency = ktime_to_ns(ktime_sub(after, before)) >> 10;
46
47 return index;
47} 48}
48 49
49static struct cpuidle_device shmobile_cpuidle_dev; 50static struct cpuidle_device shmobile_cpuidle_dev;
50static struct cpuidle_driver shmobile_cpuidle_driver = { 51static struct cpuidle_driver shmobile_cpuidle_driver = {
51 .name = "shmobile_cpuidle", 52 .name = "shmobile_cpuidle",
52 .owner = THIS_MODULE, 53 .owner = THIS_MODULE,
54 .states[0] = {
55 .name = "C1",
56 .desc = "WFI",
57 .exit_latency = 1,
58 .target_residency = 1 * 2,
59 .flags = CPUIDLE_FLAG_TIME_VALID,
60 },
61 .safe_state_index = 0, /* C1 */
62 .state_count = 1,
53}; 63};
54 64
55void (*shmobile_cpuidle_setup)(struct cpuidle_device *dev); 65void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
56 66
57static int shmobile_cpuidle_init(void) 67static int shmobile_cpuidle_init(void)
58{ 68{
59 struct cpuidle_device *dev = &shmobile_cpuidle_dev; 69 struct cpuidle_device *dev = &shmobile_cpuidle_dev;
60 struct cpuidle_state *state; 70 struct cpuidle_driver *drv = &shmobile_cpuidle_driver;
61 int i; 71 int i;
62 72
63 cpuidle_register_driver(&shmobile_cpuidle_driver); 73 for (i = 0; i < CPUIDLE_STATE_MAX; i++)
64 74 drv->states[i].enter = shmobile_cpuidle_enter;
65 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
66 dev->states[i].name[0] = '\0';
67 dev->states[i].desc[0] = '\0';
68 dev->states[i].enter = shmobile_cpuidle_enter;
69 }
70
71 i = CPUIDLE_DRIVER_STATE_START;
72
73 state = &dev->states[i++];
74 snprintf(state->name, CPUIDLE_NAME_LEN, "C1");
75 strncpy(state->desc, "WFI", CPUIDLE_DESC_LEN);
76 state->exit_latency = 1;
77 state->target_residency = 1 * 2;
78 state->power_usage = 3;
79 state->flags = 0;
80 state->flags |= CPUIDLE_FLAG_TIME_VALID;
81
82 dev->safe_state = state;
83 dev->state_count = i;
84 75
85 if (shmobile_cpuidle_setup) 76 if (shmobile_cpuidle_setup)
86 shmobile_cpuidle_setup(dev); 77 shmobile_cpuidle_setup(drv);
78
79 cpuidle_register_driver(drv);
87 80
81 dev->state_count = drv->state_count;
88 cpuidle_register_device(dev); 82 cpuidle_register_device(dev);
89 83
90 return 0; 84 return 0;
diff --git a/arch/arm/mach-shmobile/entry-gic.S b/arch/arm/mach-shmobile/entry-gic.S
deleted file mode 100644
index e20239b08c83..000000000000
--- a/arch/arm/mach-shmobile/entry-gic.S
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * ARM Interrupt demux handler using GIC
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2011 Paul Mundt
6 * Copyright (C) 2010 - 2011 Renesas Solutions Corp.
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <asm/assembler.h>
14#include <asm/entry-macro-multi.S>
15#include <asm/hardware/gic.h>
16#include <asm/hardware/entry-macro-gic.S>
17
18 arch_irq_handler shmobile_handle_irq_gic
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index c0cdbf997c91..4bf82c156771 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -7,11 +7,10 @@ extern void shmobile_secondary_vector(void);
7struct clk; 7struct clk;
8extern int clk_init(void); 8extern int clk_init(void);
9extern void shmobile_handle_irq_intc(struct pt_regs *); 9extern void shmobile_handle_irq_intc(struct pt_regs *);
10extern void shmobile_handle_irq_gic(struct pt_regs *);
11extern struct platform_suspend_ops shmobile_suspend_ops; 10extern struct platform_suspend_ops shmobile_suspend_ops;
12struct cpuidle_device; 11struct cpuidle_driver;
13extern void (*shmobile_cpuidle_modes[])(void); 12extern void (*shmobile_cpuidle_modes[])(void);
14extern void (*shmobile_cpuidle_setup)(struct cpuidle_device *dev); 13extern void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
15 14
16extern void sh7367_init_irq(void); 15extern void sh7367_init_irq(void);
17extern void sh7367_add_early_devices(void); 16extern void sh7367_add_early_devices(void);
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S
index 8d4a416d4285..2a57b2964ee9 100644
--- a/arch/arm/mach-shmobile/include/mach/entry-macro.S
+++ b/arch/arm/mach-shmobile/include/mach/entry-macro.S
@@ -18,14 +18,5 @@
18 .macro disable_fiq 18 .macro disable_fiq
19 .endm 19 .endm
20 20
21 .macro get_irqnr_preamble, base, tmp
22 .endm
23
24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
25 .endm
26
27 .macro test_for_ipi, irqnr, irqstat, base, tmp
28 .endm
29
30 .macro arch_ret_to_user, tmp1, tmp2 21 .macro arch_ret_to_user, tmp1, tmp2
31 .endm 22 .endm
diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h
index 18ae6a990bc2..881d515a9686 100644
--- a/arch/arm/mach-shmobile/include/mach/sh73a0.h
+++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h
@@ -470,6 +470,14 @@ enum {
470 GPIO_FN_SDHICMD2_PU, 470 GPIO_FN_SDHICMD2_PU,
471 GPIO_FN_MMCCMD0_PU, 471 GPIO_FN_MMCCMD0_PU,
472 GPIO_FN_MMCCMD1_PU, 472 GPIO_FN_MMCCMD1_PU,
473 GPIO_FN_MMCD0_0_PU,
474 GPIO_FN_MMCD0_1_PU,
475 GPIO_FN_MMCD0_2_PU,
476 GPIO_FN_MMCD0_3_PU,
477 GPIO_FN_MMCD0_4_PU,
478 GPIO_FN_MMCD0_5_PU,
479 GPIO_FN_MMCD0_6_PU,
480 GPIO_FN_MMCD0_7_PU,
473 GPIO_FN_FSIACK_PU, 481 GPIO_FN_FSIACK_PU,
474 GPIO_FN_FSIAILR_PU, 482 GPIO_FN_FSIAILR_PU,
475 GPIO_FN_FSIAIBT_PU, 483 GPIO_FN_FSIAIBT_PU,
diff --git a/arch/arm/mach-shmobile/pfc-sh7367.c b/arch/arm/mach-shmobile/pfc-sh7367.c
index 128555e76e43..e6e524654e67 100644
--- a/arch/arm/mach-shmobile/pfc-sh7367.c
+++ b/arch/arm/mach-shmobile/pfc-sh7367.c
@@ -21,68 +21,49 @@
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22#include <mach/sh7367.h> 22#include <mach/sh7367.h>
23 23
24#define _1(fn, pfx, sfx) fn(pfx, sfx) 24#define CPU_ALL_PORT(fn, pfx, sfx) \
25 25 PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
26#define _10(fn, pfx, sfx) \ 26 PORT_10(fn, pfx##10, sfx), PORT_90(fn, pfx##1, sfx), \
27 _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \ 27 PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
28 _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \ 28 PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
29 _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \ 29 PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
30 _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \ 30 PORT_10(fn, pfx##26, sfx), PORT_1(fn, pfx##270, sfx), \
31 _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx) 31 PORT_1(fn, pfx##271, sfx), PORT_1(fn, pfx##272, sfx)
32
33#define _90(fn, pfx, sfx) \
34 _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \
35 _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \
36 _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \
37 _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx), \
38 _10(fn, pfx##9, sfx)
39
40#define _273(fn, pfx, sfx) \
41 _10(fn, pfx, sfx), _90(fn, pfx, sfx), \
42 _10(fn, pfx##10, sfx), _90(fn, pfx##1, sfx), \
43 _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx), \
44 _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx), \
45 _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx), \
46 _10(fn, pfx##26, sfx), _1(fn, pfx##270, sfx), \
47 _1(fn, pfx##271, sfx), _1(fn, pfx##272, sfx)
48
49#define _PORT(pfx, sfx) pfx##_##sfx
50#define PORT_273(str) _273(_PORT, PORT, str)
51 32
52enum { 33enum {
53 PINMUX_RESERVED = 0, 34 PINMUX_RESERVED = 0,
54 35
55 PINMUX_DATA_BEGIN, 36 PINMUX_DATA_BEGIN,
56 PORT_273(DATA), /* PORT0_DATA -> PORT272_DATA */ 37 PORT_ALL(DATA), /* PORT0_DATA -> PORT272_DATA */
57 PINMUX_DATA_END, 38 PINMUX_DATA_END,
58 39
59 PINMUX_INPUT_BEGIN, 40 PINMUX_INPUT_BEGIN,
60 PORT_273(IN), /* PORT0_IN -> PORT272_IN */ 41 PORT_ALL(IN), /* PORT0_IN -> PORT272_IN */
61 PINMUX_INPUT_END, 42 PINMUX_INPUT_END,
62 43
63 PINMUX_INPUT_PULLUP_BEGIN, 44 PINMUX_INPUT_PULLUP_BEGIN,
64 PORT_273(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */ 45 PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */
65 PINMUX_INPUT_PULLUP_END, 46 PINMUX_INPUT_PULLUP_END,
66 47
67 PINMUX_INPUT_PULLDOWN_BEGIN, 48 PINMUX_INPUT_PULLDOWN_BEGIN,
68 PORT_273(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */ 49 PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */
69 PINMUX_INPUT_PULLDOWN_END, 50 PINMUX_INPUT_PULLDOWN_END,
70 51
71 PINMUX_OUTPUT_BEGIN, 52 PINMUX_OUTPUT_BEGIN,
72 PORT_273(OUT), /* PORT0_OUT -> PORT272_OUT */ 53 PORT_ALL(OUT), /* PORT0_OUT -> PORT272_OUT */
73 PINMUX_OUTPUT_END, 54 PINMUX_OUTPUT_END,
74 55
75 PINMUX_FUNCTION_BEGIN, 56 PINMUX_FUNCTION_BEGIN,
76 PORT_273(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */ 57 PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */
77 PORT_273(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */ 58 PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */
78 PORT_273(FN0), /* PORT0_FN0 -> PORT272_FN0 */ 59 PORT_ALL(FN0), /* PORT0_FN0 -> PORT272_FN0 */
79 PORT_273(FN1), /* PORT0_FN1 -> PORT272_FN1 */ 60 PORT_ALL(FN1), /* PORT0_FN1 -> PORT272_FN1 */
80 PORT_273(FN2), /* PORT0_FN2 -> PORT272_FN2 */ 61 PORT_ALL(FN2), /* PORT0_FN2 -> PORT272_FN2 */
81 PORT_273(FN3), /* PORT0_FN3 -> PORT272_FN3 */ 62 PORT_ALL(FN3), /* PORT0_FN3 -> PORT272_FN3 */
82 PORT_273(FN4), /* PORT0_FN4 -> PORT272_FN4 */ 63 PORT_ALL(FN4), /* PORT0_FN4 -> PORT272_FN4 */
83 PORT_273(FN5), /* PORT0_FN5 -> PORT272_FN5 */ 64 PORT_ALL(FN5), /* PORT0_FN5 -> PORT272_FN5 */
84 PORT_273(FN6), /* PORT0_FN6 -> PORT272_FN6 */ 65 PORT_ALL(FN6), /* PORT0_FN6 -> PORT272_FN6 */
85 PORT_273(FN7), /* PORT0_FN7 -> PORT272_FN7 */ 66 PORT_ALL(FN7), /* PORT0_FN7 -> PORT272_FN7 */
86 67
87 MSELBCR_MSEL2_1, MSELBCR_MSEL2_0, 68 MSELBCR_MSEL2_1, MSELBCR_MSEL2_0,
88 PINMUX_FUNCTION_END, 69 PINMUX_FUNCTION_END,
@@ -327,41 +308,6 @@ enum {
327 PINMUX_MARK_END, 308 PINMUX_MARK_END,
328}; 309};
329 310
330#define PORT_DATA_I(nr) \
331 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
332
333#define PORT_DATA_I_PD(nr) \
334 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
335 PORT##nr##_IN, PORT##nr##_IN_PD)
336
337#define PORT_DATA_I_PU(nr) \
338 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
339 PORT##nr##_IN, PORT##nr##_IN_PU)
340
341#define PORT_DATA_I_PU_PD(nr) \
342 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
343 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
344
345#define PORT_DATA_O(nr) \
346 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
347
348#define PORT_DATA_IO(nr) \
349 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
350 PORT##nr##_IN)
351
352#define PORT_DATA_IO_PD(nr) \
353 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
354 PORT##nr##_IN, PORT##nr##_IN_PD)
355
356#define PORT_DATA_IO_PU(nr) \
357 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
358 PORT##nr##_IN, PORT##nr##_IN_PU)
359
360#define PORT_DATA_IO_PU_PD(nr) \
361 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
362 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
363
364
365static pinmux_enum_t pinmux_data[] = { 311static pinmux_enum_t pinmux_data[] = {
366 312
367 /* specify valid pin states for each pin in GPIO mode */ 313 /* specify valid pin states for each pin in GPIO mode */
@@ -1098,13 +1044,9 @@ static pinmux_enum_t pinmux_data[] = {
1098 PINMUX_DATA(DIVLOCK_MARK, PORT272_FN1), 1044 PINMUX_DATA(DIVLOCK_MARK, PORT272_FN1),
1099}; 1045};
1100 1046
1101#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
1102#define GPIO_PORT_273() _273(_GPIO_PORT, , unused)
1103#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
1104
1105static struct pinmux_gpio pinmux_gpios[] = { 1047static struct pinmux_gpio pinmux_gpios[] = {
1106 /* 49-1 -> 49-6 (GPIO) */ 1048 /* 49-1 -> 49-6 (GPIO) */
1107 GPIO_PORT_273(), 1049 GPIO_PORT_ALL(),
1108 1050
1109 /* Special Pull-up / Pull-down Functions */ 1051 /* Special Pull-up / Pull-down Functions */
1110 GPIO_FN(PORT48_KEYIN0_PU), GPIO_FN(PORT49_KEYIN1_PU), 1052 GPIO_FN(PORT48_KEYIN0_PU), GPIO_FN(PORT49_KEYIN1_PU),
@@ -1345,22 +1287,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
1345 GPIO_FN(DIVLOCK), 1287 GPIO_FN(DIVLOCK),
1346}; 1288};
1347 1289
1348/* helper for top 4 bits in PORTnCR */
1349#define PCRH(in, in_pd, in_pu, out) \
1350 0, (out), (in), 0, \
1351 0, 0, 0, 0, \
1352 0, 0, (in_pd), 0, \
1353 0, 0, (in_pu), 0
1354
1355#define PORTCR(nr, reg) \
1356 { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
1357 PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
1358 PORT##nr##_IN_PU, PORT##nr##_OUT), \
1359 PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
1360 PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
1361 PORT##nr##_FN6, PORT##nr##_FN7 } \
1362 }
1363
1364static struct pinmux_cfg_reg pinmux_config_regs[] = { 1290static struct pinmux_cfg_reg pinmux_config_regs[] = {
1365 PORTCR(0, 0xe6050000), /* PORT0CR */ 1291 PORTCR(0, 0xe6050000), /* PORT0CR */
1366 PORTCR(1, 0xe6050001), /* PORT1CR */ 1292 PORTCR(1, 0xe6050001), /* PORT1CR */
diff --git a/arch/arm/mach-shmobile/pfc-sh7372.c b/arch/arm/mach-shmobile/pfc-sh7372.c
index 9c265dae138a..1bd6585a6acf 100644
--- a/arch/arm/mach-shmobile/pfc-sh7372.c
+++ b/arch/arm/mach-shmobile/pfc-sh7372.c
@@ -25,27 +25,13 @@
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <mach/sh7372.h> 26#include <mach/sh7372.h>
27 27
28#define _1(fn, pfx, sfx) fn(pfx, sfx) 28#define CPU_ALL_PORT(fn, pfx, sfx) \
29 29 PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
30#define _10(fn, pfx, sfx) \ 30 PORT_10(fn, pfx##10, sfx), PORT_10(fn, pfx##11, sfx), \
31 _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \ 31 PORT_10(fn, pfx##12, sfx), PORT_10(fn, pfx##13, sfx), \
32 _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \ 32 PORT_10(fn, pfx##14, sfx), PORT_10(fn, pfx##15, sfx), \
33 _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \ 33 PORT_10(fn, pfx##16, sfx), PORT_10(fn, pfx##17, sfx), \
34 _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \ 34 PORT_10(fn, pfx##18, sfx), PORT_1(fn, pfx##190, sfx)
35 _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
36
37#define _80(fn, pfx, sfx) \
38 _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \
39 _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \
40 _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \
41 _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx)
42
43#define _190(fn, pfx, sfx) \
44 _10(fn, pfx, sfx), _80(fn, pfx, sfx), _10(fn, pfx##9, sfx), \
45 _10(fn, pfx##10, sfx), _80(fn, pfx##1, sfx), _1(fn, pfx##190, sfx)
46
47#define _PORT(pfx, sfx) pfx##_##sfx
48#define PORT_ALL(str) _190(_PORT, PORT, str)
49 35
50enum { 36enum {
51 PINMUX_RESERVED = 0, 37 PINMUX_RESERVED = 0,
@@ -381,108 +367,124 @@ enum {
381 PINMUX_MARK_END, 367 PINMUX_MARK_END,
382}; 368};
383 369
384/* PORT_DATA_I_PD(nr) */
385#define _I___D(nr) \
386 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
387 PORT##nr##_IN, PORT##nr##_IN_PD)
388
389/* PORT_DATA_I_PU(nr) */
390#define _I__U_(nr) \
391 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
392 PORT##nr##_IN, PORT##nr##_IN_PU)
393
394/* PORT_DATA_I_PU_PD(nr) */
395#define _I__UD(nr) \
396 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
397 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
398
399/* PORT_DATA_O(nr) */
400#define __O___(nr) \
401 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
402
403/* PORT_DATA_IO(nr) */
404#define _IO___(nr) \
405 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
406 PORT##nr##_IN)
407
408/* PORT_DATA_IO_PD(nr) */
409#define _IO__D(nr) \
410 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
411 PORT##nr##_IN, PORT##nr##_IN_PD)
412
413/* PORT_DATA_IO_PU(nr) */
414#define _IO_U_(nr) \
415 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
416 PORT##nr##_IN, PORT##nr##_IN_PU)
417
418/* PORT_DATA_IO_PU_PD(nr) */
419#define _IO_UD(nr) \
420 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
421 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
422
423
424static pinmux_enum_t pinmux_data[] = { 370static pinmux_enum_t pinmux_data[] = {
425 371
426 /* specify valid pin states for each pin in GPIO mode */ 372 /* specify valid pin states for each pin in GPIO mode */
427 373 PORT_DATA_IO_PD(0), PORT_DATA_IO_PD(1),
428 _IO__D(0), _IO__D(1), __O___(2), _I___D(3), _I___D(4), 374 PORT_DATA_O(2), PORT_DATA_I_PD(3),
429 _I___D(5), _IO_UD(6), _I___D(7), _IO__D(8), __O___(9), 375 PORT_DATA_I_PD(4), PORT_DATA_I_PD(5),
430 376 PORT_DATA_IO_PU_PD(6), PORT_DATA_I_PD(7),
431 __O___(10), __O___(11), _IO_UD(12), _IO__D(13), _IO__D(14), 377 PORT_DATA_IO_PD(8), PORT_DATA_O(9),
432 __O___(15), _IO__D(16), _IO__D(17), _I___D(18), _IO___(19), 378
433 379 PORT_DATA_O(10), PORT_DATA_O(11),
434 _IO___(20), _IO___(21), _IO___(22), _IO___(23), _IO___(24), 380 PORT_DATA_IO_PU_PD(12), PORT_DATA_IO_PD(13),
435 _IO___(25), _IO___(26), _IO___(27), _IO___(28), _IO___(29), 381 PORT_DATA_IO_PD(14), PORT_DATA_O(15),
436 382 PORT_DATA_IO_PD(16), PORT_DATA_IO_PD(17),
437 _IO___(30), _IO___(31), _IO___(32), _IO___(33), _IO___(34), 383 PORT_DATA_I_PD(18), PORT_DATA_IO(19),
438 _IO___(35), _IO___(36), _IO___(37), _IO___(38), _IO___(39), 384
439 385 PORT_DATA_IO(20), PORT_DATA_IO(21),
440 _IO___(40), _IO___(41), _IO___(42), _IO___(43), _IO___(44), 386 PORT_DATA_IO(22), PORT_DATA_IO(23),
441 _IO___(45), _IO_U_(46), _IO_U_(47), _IO_U_(48), _IO_U_(49), 387 PORT_DATA_IO(24), PORT_DATA_IO(25),
442 388 PORT_DATA_IO(26), PORT_DATA_IO(27),
443 _IO_U_(50), _IO_U_(51), _IO_U_(52), _IO_U_(53), _IO_U_(54), 389 PORT_DATA_IO(28), PORT_DATA_IO(29),
444 _IO_U_(55), _IO_U_(56), _IO_U_(57), _IO_U_(58), _IO_U_(59), 390
445 391 PORT_DATA_IO(30), PORT_DATA_IO(31),
446 _IO_U_(60), _IO_U_(61), _IO___(62), __O___(63), __O___(64), 392 PORT_DATA_IO(32), PORT_DATA_IO(33),
447 _IO_U_(65), __O___(66), _IO_U_(67), __O___(68), _IO___(69), /*66?*/ 393 PORT_DATA_IO(34), PORT_DATA_IO(35),
448 394 PORT_DATA_IO(36), PORT_DATA_IO(37),
449 _IO___(70), _IO___(71), __O___(72), _I__U_(73), _I__UD(74), 395 PORT_DATA_IO(38), PORT_DATA_IO(39),
450 _IO_UD(75), _IO_UD(76), _IO_UD(77), _IO_UD(78), _IO_UD(79), 396
451 397 PORT_DATA_IO(40), PORT_DATA_IO(41),
452 _IO_UD(80), _IO_UD(81), _IO_UD(82), _IO_UD(83), _IO_UD(84), 398 PORT_DATA_IO(42), PORT_DATA_IO(43),
453 _IO_UD(85), _IO_UD(86), _IO_UD(87), _IO_UD(88), _IO_UD(89), 399 PORT_DATA_IO(44), PORT_DATA_IO(45),
454 400 PORT_DATA_IO_PU(46), PORT_DATA_IO_PU(47),
455 _IO_UD(90), _IO_UD(91), _IO_UD(92), _IO_UD(93), _IO_UD(94), 401 PORT_DATA_IO_PU(48), PORT_DATA_IO_PU(49),
456 _IO_UD(95), _IO_U_(96), _IO_UD(97), _IO_UD(98), __O___(99), /*99?*/ 402
457 403 PORT_DATA_IO_PU(50), PORT_DATA_IO_PU(51),
458 _IO__D(100), _IO__D(101), _IO__D(102), _IO__D(103), _IO__D(104), 404 PORT_DATA_IO_PU(52), PORT_DATA_IO_PU(53),
459 _IO__D(105), _IO_U_(106), _IO_U_(107), _IO_U_(108), _IO_U_(109), 405 PORT_DATA_IO_PU(54), PORT_DATA_IO_PU(55),
460 406 PORT_DATA_IO_PU(56), PORT_DATA_IO_PU(57),
461 _IO_U_(110), _IO_U_(111), _IO__D(112), _IO__D(113), _IO_U_(114), 407 PORT_DATA_IO_PU(58), PORT_DATA_IO_PU(59),
462 _IO_U_(115), _IO_U_(116), _IO_U_(117), _IO_U_(118), _IO_U_(119), 408
463 409 PORT_DATA_IO_PU(60), PORT_DATA_IO_PU(61),
464 _IO_U_(120), _IO__D(121), _IO__D(122), _IO__D(123), _IO__D(124), 410 PORT_DATA_IO(62), PORT_DATA_O(63),
465 _IO__D(125), _IO__D(126), _IO__D(127), _IO__D(128), _IO_UD(129), 411 PORT_DATA_O(64), PORT_DATA_IO_PU(65),
466 412 PORT_DATA_O(66), PORT_DATA_IO_PU(67), /*66?*/
467 _IO_UD(130), _IO_UD(131), _IO_UD(132), _IO_UD(133), _IO_UD(134), 413 PORT_DATA_O(68), PORT_DATA_IO(69),
468 _IO_UD(135), _IO__D(136), _IO__D(137), _IO__D(138), _IO__D(139), 414
469 415 PORT_DATA_IO(70), PORT_DATA_IO(71),
470 _IO__D(140), _IO__D(141), _IO__D(142), _IO_UD(143), _IO__D(144), 416 PORT_DATA_O(72), PORT_DATA_I_PU(73),
471 _IO__D(145), _IO__D(146), _IO__D(147), _IO__D(148), _IO__D(149), 417 PORT_DATA_I_PU_PD(74), PORT_DATA_IO_PU_PD(75),
472 418 PORT_DATA_IO_PU_PD(76), PORT_DATA_IO_PU_PD(77),
473 _IO__D(150), _IO__D(151), _IO_UD(152), _I___D(153), _IO_UD(154), 419 PORT_DATA_IO_PU_PD(78), PORT_DATA_IO_PU_PD(79),
474 _I___D(155), _IO__D(156), _IO__D(157), _I___D(158), _IO__D(159), 420
475 421 PORT_DATA_IO_PU_PD(80), PORT_DATA_IO_PU_PD(81),
476 __O___(160), _IO__D(161), _IO__D(162), _IO__D(163), _I___D(164), 422 PORT_DATA_IO_PU_PD(82), PORT_DATA_IO_PU_PD(83),
477 _IO__D(165), _I___D(166), _I___D(167), _I___D(168), _I___D(169), 423 PORT_DATA_IO_PU_PD(84), PORT_DATA_IO_PU_PD(85),
478 424 PORT_DATA_IO_PU_PD(86), PORT_DATA_IO_PU_PD(87),
479 _I___D(170), __O___(171), _IO_UD(172), _IO_UD(173), _IO_UD(174), 425 PORT_DATA_IO_PU_PD(88), PORT_DATA_IO_PU_PD(89),
480 _IO_UD(175), _IO_UD(176), _IO_UD(177), _IO_UD(178), __O___(179), 426
481 427 PORT_DATA_IO_PU_PD(90), PORT_DATA_IO_PU_PD(91),
482 _IO_UD(180), _IO_UD(181), _IO_UD(182), _IO_UD(183), _IO_UD(184), 428 PORT_DATA_IO_PU_PD(92), PORT_DATA_IO_PU_PD(93),
483 __O___(185), _IO_UD(186), _IO_UD(187), _IO_UD(188), _IO_UD(189), 429 PORT_DATA_IO_PU_PD(94), PORT_DATA_IO_PU_PD(95),
484 430 PORT_DATA_IO_PU(96), PORT_DATA_IO_PU_PD(97),
485 _IO_UD(190), 431 PORT_DATA_IO_PU_PD(98), PORT_DATA_O(99), /*99?*/
432
433 PORT_DATA_IO_PD(100), PORT_DATA_IO_PD(101),
434 PORT_DATA_IO_PD(102), PORT_DATA_IO_PD(103),
435 PORT_DATA_IO_PD(104), PORT_DATA_IO_PD(105),
436 PORT_DATA_IO_PU(106), PORT_DATA_IO_PU(107),
437 PORT_DATA_IO_PU(108), PORT_DATA_IO_PU(109),
438
439 PORT_DATA_IO_PU(110), PORT_DATA_IO_PU(111),
440 PORT_DATA_IO_PD(112), PORT_DATA_IO_PD(113),
441 PORT_DATA_IO_PU(114), PORT_DATA_IO_PU(115),
442 PORT_DATA_IO_PU(116), PORT_DATA_IO_PU(117),
443 PORT_DATA_IO_PU(118), PORT_DATA_IO_PU(119),
444
445 PORT_DATA_IO_PU(120), PORT_DATA_IO_PD(121),
446 PORT_DATA_IO_PD(122), PORT_DATA_IO_PD(123),
447 PORT_DATA_IO_PD(124), PORT_DATA_IO_PD(125),
448 PORT_DATA_IO_PD(126), PORT_DATA_IO_PD(127),
449 PORT_DATA_IO_PD(128), PORT_DATA_IO_PU_PD(129),
450
451 PORT_DATA_IO_PU_PD(130), PORT_DATA_IO_PU_PD(131),
452 PORT_DATA_IO_PU_PD(132), PORT_DATA_IO_PU_PD(133),
453 PORT_DATA_IO_PU_PD(134), PORT_DATA_IO_PU_PD(135),
454 PORT_DATA_IO_PD(136), PORT_DATA_IO_PD(137),
455 PORT_DATA_IO_PD(138), PORT_DATA_IO_PD(139),
456
457 PORT_DATA_IO_PD(140), PORT_DATA_IO_PD(141),
458 PORT_DATA_IO_PD(142), PORT_DATA_IO_PU_PD(143),
459 PORT_DATA_IO_PD(144), PORT_DATA_IO_PD(145),
460 PORT_DATA_IO_PD(146), PORT_DATA_IO_PD(147),
461 PORT_DATA_IO_PD(148), PORT_DATA_IO_PD(149),
462
463 PORT_DATA_IO_PD(150), PORT_DATA_IO_PD(151),
464 PORT_DATA_IO_PU_PD(152), PORT_DATA_I_PD(153),
465 PORT_DATA_IO_PU_PD(154), PORT_DATA_I_PD(155),
466 PORT_DATA_IO_PD(156), PORT_DATA_IO_PD(157),
467 PORT_DATA_I_PD(158), PORT_DATA_IO_PD(159),
468
469 PORT_DATA_O(160), PORT_DATA_IO_PD(161),
470 PORT_DATA_IO_PD(162), PORT_DATA_IO_PD(163),
471 PORT_DATA_I_PD(164), PORT_DATA_IO_PD(165),
472 PORT_DATA_I_PD(166), PORT_DATA_I_PD(167),
473 PORT_DATA_I_PD(168), PORT_DATA_I_PD(169),
474
475 PORT_DATA_I_PD(170), PORT_DATA_O(171),
476 PORT_DATA_IO_PU_PD(172), PORT_DATA_IO_PU_PD(173),
477 PORT_DATA_IO_PU_PD(174), PORT_DATA_IO_PU_PD(175),
478 PORT_DATA_IO_PU_PD(176), PORT_DATA_IO_PU_PD(177),
479 PORT_DATA_IO_PU_PD(178), PORT_DATA_O(179),
480
481 PORT_DATA_IO_PU_PD(180), PORT_DATA_IO_PU_PD(181),
482 PORT_DATA_IO_PU_PD(182), PORT_DATA_IO_PU_PD(183),
483 PORT_DATA_IO_PU_PD(184), PORT_DATA_O(185),
484 PORT_DATA_IO_PU_PD(186), PORT_DATA_IO_PU_PD(187),
485 PORT_DATA_IO_PU_PD(188), PORT_DATA_IO_PU_PD(189),
486
487 PORT_DATA_IO_PU_PD(190),
486 488
487 /* IRQ */ 489 /* IRQ */
488 PINMUX_DATA(IRQ0_6_MARK, PORT6_FN0, MSEL1CR_0_0), 490 PINMUX_DATA(IRQ0_6_MARK, PORT6_FN0, MSEL1CR_0_0),
@@ -926,10 +928,6 @@ static pinmux_enum_t pinmux_data[] = {
926 PINMUX_DATA(MFIv4_MARK, MSEL4CR_6_1), 928 PINMUX_DATA(MFIv4_MARK, MSEL4CR_6_1),
927}; 929};
928 930
929#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
930#define GPIO_PORT_ALL() _190(_GPIO_PORT, , unused)
931#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
932
933static struct pinmux_gpio pinmux_gpios[] = { 931static struct pinmux_gpio pinmux_gpios[] = {
934 932
935 /* PORT */ 933 /* PORT */
@@ -1201,22 +1199,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
1201 GPIO_FN(SDENC_DV_CLKI), 1199 GPIO_FN(SDENC_DV_CLKI),
1202}; 1200};
1203 1201
1204/* helper for top 4 bits in PORTnCR */
1205#define PCRH(in, in_pd, in_pu, out) \
1206 0, (out), (in), 0, \
1207 0, 0, 0, 0, \
1208 0, 0, (in_pd), 0, \
1209 0, 0, (in_pu), 0
1210
1211#define PORTCR(nr, reg) \
1212 { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
1213 PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
1214 PORT##nr##_IN_PU, PORT##nr##_OUT), \
1215 PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
1216 PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
1217 PORT##nr##_FN6, PORT##nr##_FN7 } \
1218 }
1219
1220static struct pinmux_cfg_reg pinmux_config_regs[] = { 1202static struct pinmux_cfg_reg pinmux_config_regs[] = {
1221 PORTCR(0, 0xE6051000), /* PORT0CR */ 1203 PORTCR(0, 0xE6051000), /* PORT0CR */
1222 PORTCR(1, 0xE6051001), /* PORT1CR */ 1204 PORTCR(1, 0xE6051001), /* PORT1CR */
diff --git a/arch/arm/mach-shmobile/pfc-sh7377.c b/arch/arm/mach-shmobile/pfc-sh7377.c
index 613e6842ad05..2f10511946ad 100644
--- a/arch/arm/mach-shmobile/pfc-sh7377.c
+++ b/arch/arm/mach-shmobile/pfc-sh7377.c
@@ -22,84 +22,65 @@
22#include <linux/gpio.h> 22#include <linux/gpio.h>
23#include <mach/sh7377.h> 23#include <mach/sh7377.h>
24 24
25#define _1(fn, pfx, sfx) fn(pfx, sfx) 25#define CPU_ALL_PORT(fn, pfx, sfx) \
26 26 PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
27#define _10(fn, pfx, sfx) \ 27 PORT_10(fn, pfx##10, sfx), \
28 _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \ 28 PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \
29 _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \ 29 PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \
30 _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \ 30 PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx), \
31 _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \ 31 PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx), \
32 _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx) 32 PORT_1(fn, pfx##118, sfx), \
33 33 PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \
34#define _90(fn, pfx, sfx) \ 34 PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx), \
35 _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \ 35 PORT_10(fn, pfx##15, sfx), \
36 _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \ 36 PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx), \
37 _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \ 37 PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx), \
38 _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx), \ 38 PORT_1(fn, pfx##164, sfx), \
39 _10(fn, pfx##9, sfx) 39 PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \
40 40 PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \
41#define _265(fn, pfx, sfx) \ 41 PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \
42 _10(fn, pfx, sfx), _90(fn, pfx, sfx), \ 42 PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \
43 _10(fn, pfx##10, sfx), \ 43 PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
44 _1(fn, pfx##110, sfx), _1(fn, pfx##111, sfx), \ 44 PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
45 _1(fn, pfx##112, sfx), _1(fn, pfx##113, sfx), \ 45 PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
46 _1(fn, pfx##114, sfx), _1(fn, pfx##115, sfx), \ 46 PORT_1(fn, pfx##260, sfx), PORT_1(fn, pfx##261, sfx), \
47 _1(fn, pfx##116, sfx), _1(fn, pfx##117, sfx), \ 47 PORT_1(fn, pfx##262, sfx), PORT_1(fn, pfx##263, sfx), \
48 _1(fn, pfx##118, sfx), \ 48 PORT_1(fn, pfx##264, sfx)
49 _1(fn, pfx##128, sfx), _1(fn, pfx##129, sfx), \
50 _10(fn, pfx##13, sfx), _10(fn, pfx##14, sfx), \
51 _10(fn, pfx##15, sfx), \
52 _1(fn, pfx##160, sfx), _1(fn, pfx##161, sfx), \
53 _1(fn, pfx##162, sfx), _1(fn, pfx##163, sfx), \
54 _1(fn, pfx##164, sfx), \
55 _1(fn, pfx##192, sfx), _1(fn, pfx##193, sfx), \
56 _1(fn, pfx##194, sfx), _1(fn, pfx##195, sfx), \
57 _1(fn, pfx##196, sfx), _1(fn, pfx##197, sfx), \
58 _1(fn, pfx##198, sfx), _1(fn, pfx##199, sfx), \
59 _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx), \
60 _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx), \
61 _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx), \
62 _1(fn, pfx##260, sfx), _1(fn, pfx##261, sfx), \
63 _1(fn, pfx##262, sfx), _1(fn, pfx##263, sfx), \
64 _1(fn, pfx##264, sfx)
65
66#define _PORT(pfx, sfx) pfx##_##sfx
67#define PORT_265(str) _265(_PORT, PORT, str)
68 49
69enum { 50enum {
70 PINMUX_RESERVED = 0, 51 PINMUX_RESERVED = 0,
71 52
72 PINMUX_DATA_BEGIN, 53 PINMUX_DATA_BEGIN,
73 PORT_265(DATA), /* PORT0_DATA -> PORT264_DATA */ 54 PORT_ALL(DATA), /* PORT0_DATA -> PORT264_DATA */
74 PINMUX_DATA_END, 55 PINMUX_DATA_END,
75 56
76 PINMUX_INPUT_BEGIN, 57 PINMUX_INPUT_BEGIN,
77 PORT_265(IN), /* PORT0_IN -> PORT264_IN */ 58 PORT_ALL(IN), /* PORT0_IN -> PORT264_IN */
78 PINMUX_INPUT_END, 59 PINMUX_INPUT_END,
79 60
80 PINMUX_INPUT_PULLUP_BEGIN, 61 PINMUX_INPUT_PULLUP_BEGIN,
81 PORT_265(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */ 62 PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */
82 PINMUX_INPUT_PULLUP_END, 63 PINMUX_INPUT_PULLUP_END,
83 64
84 PINMUX_INPUT_PULLDOWN_BEGIN, 65 PINMUX_INPUT_PULLDOWN_BEGIN,
85 PORT_265(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */ 66 PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */
86 PINMUX_INPUT_PULLDOWN_END, 67 PINMUX_INPUT_PULLDOWN_END,
87 68
88 PINMUX_OUTPUT_BEGIN, 69 PINMUX_OUTPUT_BEGIN,
89 PORT_265(OUT), /* PORT0_OUT -> PORT264_OUT */ 70 PORT_ALL(OUT), /* PORT0_OUT -> PORT264_OUT */
90 PINMUX_OUTPUT_END, 71 PINMUX_OUTPUT_END,
91 72
92 PINMUX_FUNCTION_BEGIN, 73 PINMUX_FUNCTION_BEGIN,
93 PORT_265(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */ 74 PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */
94 PORT_265(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */ 75 PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */
95 PORT_265(FN0), /* PORT0_FN0 -> PORT264_FN0 */ 76 PORT_ALL(FN0), /* PORT0_FN0 -> PORT264_FN0 */
96 PORT_265(FN1), /* PORT0_FN1 -> PORT264_FN1 */ 77 PORT_ALL(FN1), /* PORT0_FN1 -> PORT264_FN1 */
97 PORT_265(FN2), /* PORT0_FN2 -> PORT264_FN2 */ 78 PORT_ALL(FN2), /* PORT0_FN2 -> PORT264_FN2 */
98 PORT_265(FN3), /* PORT0_FN3 -> PORT264_FN3 */ 79 PORT_ALL(FN3), /* PORT0_FN3 -> PORT264_FN3 */
99 PORT_265(FN4), /* PORT0_FN4 -> PORT264_FN4 */ 80 PORT_ALL(FN4), /* PORT0_FN4 -> PORT264_FN4 */
100 PORT_265(FN5), /* PORT0_FN5 -> PORT264_FN5 */ 81 PORT_ALL(FN5), /* PORT0_FN5 -> PORT264_FN5 */
101 PORT_265(FN6), /* PORT0_FN6 -> PORT264_FN6 */ 82 PORT_ALL(FN6), /* PORT0_FN6 -> PORT264_FN6 */
102 PORT_265(FN7), /* PORT0_FN7 -> PORT264_FN7 */ 83 PORT_ALL(FN7), /* PORT0_FN7 -> PORT264_FN7 */
103 84
104 MSELBCR_MSEL17_1, MSELBCR_MSEL17_0, 85 MSELBCR_MSEL17_1, MSELBCR_MSEL17_0,
105 MSELBCR_MSEL16_1, MSELBCR_MSEL16_0, 86 MSELBCR_MSEL16_1, MSELBCR_MSEL16_0,
@@ -360,45 +341,6 @@ enum {
360 PINMUX_MARK_END, 341 PINMUX_MARK_END,
361}; 342};
362 343
363#define PORT_DATA_I(nr) \
364 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
365
366#define PORT_DATA_I_PD(nr) \
367 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
368 PORT##nr##_IN, PORT##nr##_IN_PD)
369
370#define PORT_DATA_I_PU(nr) \
371 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
372 PORT##nr##_IN, PORT##nr##_IN_PU)
373
374#define PORT_DATA_I_PU_PD(nr) \
375 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
376 PORT##nr##_IN, PORT##nr##_IN_PD, \
377 PORT##nr##_IN_PU)
378
379#define PORT_DATA_O(nr) \
380 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
381 PORT##nr##_OUT)
382
383#define PORT_DATA_IO(nr) \
384 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
385 PORT##nr##_OUT, PORT##nr##_IN)
386
387#define PORT_DATA_IO_PD(nr) \
388 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
389 PORT##nr##_OUT, PORT##nr##_IN, \
390 PORT##nr##_IN_PD)
391
392#define PORT_DATA_IO_PU(nr) \
393 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
394 PORT##nr##_OUT, PORT##nr##_IN, \
395 PORT##nr##_IN_PU)
396
397#define PORT_DATA_IO_PU_PD(nr) \
398 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
399 PORT##nr##_OUT, PORT##nr##_IN, \
400 PORT##nr##_IN_PD, PORT##nr##_IN_PU)
401
402static pinmux_enum_t pinmux_data[] = { 344static pinmux_enum_t pinmux_data[] = {
403 /* specify valid pin states for each pin in GPIO mode */ 345 /* specify valid pin states for each pin in GPIO mode */
404 /* 55-1 (GPIO) */ 346 /* 55-1 (GPIO) */
@@ -1078,13 +1020,9 @@ static pinmux_enum_t pinmux_data[] = {
1078 PINMUX_DATA(RESETOUTS_MARK, PORT264_FN1), 1020 PINMUX_DATA(RESETOUTS_MARK, PORT264_FN1),
1079}; 1021};
1080 1022
1081#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
1082#define GPIO_PORT_265() _265(_GPIO_PORT, , unused)
1083#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
1084
1085static struct pinmux_gpio pinmux_gpios[] = { 1023static struct pinmux_gpio pinmux_gpios[] = {
1086 /* 55-1 -> 55-5 (GPIO) */ 1024 /* 55-1 -> 55-5 (GPIO) */
1087 GPIO_PORT_265(), 1025 GPIO_PORT_ALL(),
1088 1026
1089 /* Special Pull-up / Pull-down Functions */ 1027 /* Special Pull-up / Pull-down Functions */
1090 GPIO_FN(PORT66_KEYIN0_PU), GPIO_FN(PORT67_KEYIN1_PU), 1028 GPIO_FN(PORT66_KEYIN0_PU), GPIO_FN(PORT67_KEYIN1_PU),
@@ -1362,23 +1300,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
1362 GPIO_FN(RESETOUTS), 1300 GPIO_FN(RESETOUTS),
1363}; 1301};
1364 1302
1365/* helper for top 4 bits in PORTnCR */
1366#define PCRH(in, in_pd, in_pu, out) \
1367 0, (out), (in), 0, \
1368 0, 0, 0, 0, \
1369 0, 0, (in_pd), 0, \
1370 0, 0, (in_pu), 0
1371
1372#define PORTCR(nr, reg) \
1373 { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
1374 PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
1375 PORT##nr##_IN_PU, PORT##nr##_OUT), \
1376 PORT##nr##_FN0, PORT##nr##_FN1, \
1377 PORT##nr##_FN2, PORT##nr##_FN3, \
1378 PORT##nr##_FN4, PORT##nr##_FN5, \
1379 PORT##nr##_FN6, PORT##nr##_FN7 } \
1380 }
1381
1382static struct pinmux_cfg_reg pinmux_config_regs[] = { 1303static struct pinmux_cfg_reg pinmux_config_regs[] = {
1383 PORTCR(0, 0xe6050000), /* PORT0CR */ 1304 PORTCR(0, 0xe6050000), /* PORT0CR */
1384 PORTCR(1, 0xe6050001), /* PORT1CR */ 1305 PORTCR(1, 0xe6050001), /* PORT1CR */
diff --git a/arch/arm/mach-shmobile/pfc-sh73a0.c b/arch/arm/mach-shmobile/pfc-sh73a0.c
index 5abe02fbd6b9..e05634ce2e0d 100644
--- a/arch/arm/mach-shmobile/pfc-sh73a0.c
+++ b/arch/arm/mach-shmobile/pfc-sh73a0.c
@@ -24,83 +24,71 @@
24#include <mach/sh73a0.h> 24#include <mach/sh73a0.h>
25#include <mach/irqs.h> 25#include <mach/irqs.h>
26 26
27#define _1(fn, pfx, sfx) fn(pfx, sfx) 27#define CPU_ALL_PORT(fn, pfx, sfx) \
28 28 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
29#define _10(fn, pfx, sfx) \ 29 PORT_10(fn, pfx##2, sfx), PORT_10(fn, pfx##3, sfx), \
30 _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \ 30 PORT_10(fn, pfx##4, sfx), PORT_10(fn, pfx##5, sfx), \
31 _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \ 31 PORT_10(fn, pfx##6, sfx), PORT_10(fn, pfx##7, sfx), \
32 _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \ 32 PORT_10(fn, pfx##8, sfx), PORT_10(fn, pfx##9, sfx), \
33 _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \ 33 PORT_10(fn, pfx##10, sfx), \
34 _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx) 34 PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \
35 35 PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \
36#define _310(fn, pfx, sfx) \ 36 PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx), \
37 _10(fn, pfx, sfx), _10(fn, pfx##1, sfx), \ 37 PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx), \
38 _10(fn, pfx##2, sfx), _10(fn, pfx##3, sfx), \ 38 PORT_1(fn, pfx##118, sfx), \
39 _10(fn, pfx##4, sfx), _10(fn, pfx##5, sfx), \ 39 PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \
40 _10(fn, pfx##6, sfx), _10(fn, pfx##7, sfx), \ 40 PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx), \
41 _10(fn, pfx##8, sfx), _10(fn, pfx##9, sfx), \ 41 PORT_10(fn, pfx##15, sfx), \
42 _10(fn, pfx##10, sfx), \ 42 PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx), \
43 _1(fn, pfx##110, sfx), _1(fn, pfx##111, sfx), \ 43 PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx), \
44 _1(fn, pfx##112, sfx), _1(fn, pfx##113, sfx), \ 44 PORT_1(fn, pfx##164, sfx), \
45 _1(fn, pfx##114, sfx), _1(fn, pfx##115, sfx), \ 45 PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \
46 _1(fn, pfx##116, sfx), _1(fn, pfx##117, sfx), \ 46 PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \
47 _1(fn, pfx##118, sfx), \ 47 PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \
48 _1(fn, pfx##128, sfx), _1(fn, pfx##129, sfx), \ 48 PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \
49 _10(fn, pfx##13, sfx), _10(fn, pfx##14, sfx), \ 49 PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
50 _10(fn, pfx##15, sfx), \ 50 PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
51 _1(fn, pfx##160, sfx), _1(fn, pfx##161, sfx), \ 51 PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
52 _1(fn, pfx##162, sfx), _1(fn, pfx##163, sfx), \ 52 PORT_10(fn, pfx##26, sfx), PORT_10(fn, pfx##27, sfx), \
53 _1(fn, pfx##164, sfx), \ 53 PORT_1(fn, pfx##280, sfx), PORT_1(fn, pfx##281, sfx), \
54 _1(fn, pfx##192, sfx), _1(fn, pfx##193, sfx), \ 54 PORT_1(fn, pfx##282, sfx), \
55 _1(fn, pfx##194, sfx), _1(fn, pfx##195, sfx), \ 55 PORT_1(fn, pfx##288, sfx), PORT_1(fn, pfx##289, sfx), \
56 _1(fn, pfx##196, sfx), _1(fn, pfx##197, sfx), \ 56 PORT_10(fn, pfx##29, sfx), PORT_10(fn, pfx##30, sfx)
57 _1(fn, pfx##198, sfx), _1(fn, pfx##199, sfx), \
58 _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx), \
59 _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx), \
60 _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx), \
61 _10(fn, pfx##26, sfx), _10(fn, pfx##27, sfx), \
62 _1(fn, pfx##280, sfx), _1(fn, pfx##281, sfx), \
63 _1(fn, pfx##282, sfx), \
64 _1(fn, pfx##288, sfx), _1(fn, pfx##289, sfx), \
65 _10(fn, pfx##29, sfx), _10(fn, pfx##30, sfx)
66
67#define _PORT(pfx, sfx) pfx##_##sfx
68#define PORT_310(str) _310(_PORT, PORT, str)
69 57
70enum { 58enum {
71 PINMUX_RESERVED = 0, 59 PINMUX_RESERVED = 0,
72 60
73 PINMUX_DATA_BEGIN, 61 PINMUX_DATA_BEGIN,
74 PORT_310(DATA), /* PORT0_DATA -> PORT309_DATA */ 62 PORT_ALL(DATA), /* PORT0_DATA -> PORT309_DATA */
75 PINMUX_DATA_END, 63 PINMUX_DATA_END,
76 64
77 PINMUX_INPUT_BEGIN, 65 PINMUX_INPUT_BEGIN,
78 PORT_310(IN), /* PORT0_IN -> PORT309_IN */ 66 PORT_ALL(IN), /* PORT0_IN -> PORT309_IN */
79 PINMUX_INPUT_END, 67 PINMUX_INPUT_END,
80 68
81 PINMUX_INPUT_PULLUP_BEGIN, 69 PINMUX_INPUT_PULLUP_BEGIN,
82 PORT_310(IN_PU), /* PORT0_IN_PU -> PORT309_IN_PU */ 70 PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT309_IN_PU */
83 PINMUX_INPUT_PULLUP_END, 71 PINMUX_INPUT_PULLUP_END,
84 72
85 PINMUX_INPUT_PULLDOWN_BEGIN, 73 PINMUX_INPUT_PULLDOWN_BEGIN,
86 PORT_310(IN_PD), /* PORT0_IN_PD -> PORT309_IN_PD */ 74 PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT309_IN_PD */
87 PINMUX_INPUT_PULLDOWN_END, 75 PINMUX_INPUT_PULLDOWN_END,
88 76
89 PINMUX_OUTPUT_BEGIN, 77 PINMUX_OUTPUT_BEGIN,
90 PORT_310(OUT), /* PORT0_OUT -> PORT309_OUT */ 78 PORT_ALL(OUT), /* PORT0_OUT -> PORT309_OUT */
91 PINMUX_OUTPUT_END, 79 PINMUX_OUTPUT_END,
92 80
93 PINMUX_FUNCTION_BEGIN, 81 PINMUX_FUNCTION_BEGIN,
94 PORT_310(FN_IN), /* PORT0_FN_IN -> PORT309_FN_IN */ 82 PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT309_FN_IN */
95 PORT_310(FN_OUT), /* PORT0_FN_OUT -> PORT309_FN_OUT */ 83 PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT309_FN_OUT */
96 PORT_310(FN0), /* PORT0_FN0 -> PORT309_FN0 */ 84 PORT_ALL(FN0), /* PORT0_FN0 -> PORT309_FN0 */
97 PORT_310(FN1), /* PORT0_FN1 -> PORT309_FN1 */ 85 PORT_ALL(FN1), /* PORT0_FN1 -> PORT309_FN1 */
98 PORT_310(FN2), /* PORT0_FN2 -> PORT309_FN2 */ 86 PORT_ALL(FN2), /* PORT0_FN2 -> PORT309_FN2 */
99 PORT_310(FN3), /* PORT0_FN3 -> PORT309_FN3 */ 87 PORT_ALL(FN3), /* PORT0_FN3 -> PORT309_FN3 */
100 PORT_310(FN4), /* PORT0_FN4 -> PORT309_FN4 */ 88 PORT_ALL(FN4), /* PORT0_FN4 -> PORT309_FN4 */
101 PORT_310(FN5), /* PORT0_FN5 -> PORT309_FN5 */ 89 PORT_ALL(FN5), /* PORT0_FN5 -> PORT309_FN5 */
102 PORT_310(FN6), /* PORT0_FN6 -> PORT309_FN6 */ 90 PORT_ALL(FN6), /* PORT0_FN6 -> PORT309_FN6 */
103 PORT_310(FN7), /* PORT0_FN7 -> PORT309_FN7 */ 91 PORT_ALL(FN7), /* PORT0_FN7 -> PORT309_FN7 */
104 92
105 MSEL2CR_MSEL19_0, MSEL2CR_MSEL19_1, 93 MSEL2CR_MSEL19_0, MSEL2CR_MSEL19_1,
106 MSEL2CR_MSEL18_0, MSEL2CR_MSEL18_1, 94 MSEL2CR_MSEL18_0, MSEL2CR_MSEL18_1,
@@ -508,6 +496,14 @@ enum {
508 SDHICMD2_PU_MARK, 496 SDHICMD2_PU_MARK,
509 MMCCMD0_PU_MARK, 497 MMCCMD0_PU_MARK,
510 MMCCMD1_PU_MARK, 498 MMCCMD1_PU_MARK,
499 MMCD0_0_PU_MARK,
500 MMCD0_1_PU_MARK,
501 MMCD0_2_PU_MARK,
502 MMCD0_3_PU_MARK,
503 MMCD0_4_PU_MARK,
504 MMCD0_5_PU_MARK,
505 MMCD0_6_PU_MARK,
506 MMCD0_7_PU_MARK,
511 FSIBISLD_PU_MARK, 507 FSIBISLD_PU_MARK,
512 FSIACK_PU_MARK, 508 FSIACK_PU_MARK,
513 FSIAILR_PU_MARK, 509 FSIAILR_PU_MARK,
@@ -517,45 +513,6 @@ enum {
517 PINMUX_MARK_END, 513 PINMUX_MARK_END,
518}; 514};
519 515
520#define PORT_DATA_I(nr) \
521 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
522
523#define PORT_DATA_I_PD(nr) \
524 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
525 PORT##nr##_IN, PORT##nr##_IN_PD)
526
527#define PORT_DATA_I_PU(nr) \
528 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
529 PORT##nr##_IN, PORT##nr##_IN_PU)
530
531#define PORT_DATA_I_PU_PD(nr) \
532 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
533 PORT##nr##_IN, PORT##nr##_IN_PD, \
534 PORT##nr##_IN_PU)
535
536#define PORT_DATA_O(nr) \
537 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
538 PORT##nr##_OUT)
539
540#define PORT_DATA_IO(nr) \
541 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
542 PORT##nr##_OUT, PORT##nr##_IN)
543
544#define PORT_DATA_IO_PD(nr) \
545 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
546 PORT##nr##_OUT, PORT##nr##_IN, \
547 PORT##nr##_IN_PD)
548
549#define PORT_DATA_IO_PU(nr) \
550 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
551 PORT##nr##_OUT, PORT##nr##_IN, \
552 PORT##nr##_IN_PU)
553
554#define PORT_DATA_IO_PU_PD(nr) \
555 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
556 PORT##nr##_OUT, PORT##nr##_IN, \
557 PORT##nr##_IN_PD, PORT##nr##_IN_PU)
558
559static pinmux_enum_t pinmux_data[] = { 516static pinmux_enum_t pinmux_data[] = {
560 /* specify valid pin states for each pin in GPIO mode */ 517 /* specify valid pin states for each pin in GPIO mode */
561 518
@@ -1561,6 +1518,24 @@ static pinmux_enum_t pinmux_data[] = {
1561 MSEL4CR_MSEL15_0), 1518 MSEL4CR_MSEL15_0),
1562 PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU, 1519 PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU,
1563 MSEL4CR_MSEL15_1), 1520 MSEL4CR_MSEL15_1),
1521
1522 PINMUX_DATA(MMCD0_0_PU_MARK,
1523 PORT271_FN1, PORT271_IN_PU, MSEL4CR_MSEL15_0),
1524 PINMUX_DATA(MMCD0_1_PU_MARK,
1525 PORT272_FN1, PORT272_IN_PU, MSEL4CR_MSEL15_0),
1526 PINMUX_DATA(MMCD0_2_PU_MARK,
1527 PORT273_FN1, PORT273_IN_PU, MSEL4CR_MSEL15_0),
1528 PINMUX_DATA(MMCD0_3_PU_MARK,
1529 PORT274_FN1, PORT274_IN_PU, MSEL4CR_MSEL15_0),
1530 PINMUX_DATA(MMCD0_4_PU_MARK,
1531 PORT275_FN1, PORT275_IN_PU, MSEL4CR_MSEL15_0),
1532 PINMUX_DATA(MMCD0_5_PU_MARK,
1533 PORT276_FN1, PORT276_IN_PU, MSEL4CR_MSEL15_0),
1534 PINMUX_DATA(MMCD0_6_PU_MARK,
1535 PORT277_FN1, PORT277_IN_PU, MSEL4CR_MSEL15_0),
1536 PINMUX_DATA(MMCD0_7_PU_MARK,
1537 PORT278_FN1, PORT278_IN_PU, MSEL4CR_MSEL15_0),
1538
1564 PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU), 1539 PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU),
1565 PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU), 1540 PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU),
1566 PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU), 1541 PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU),
@@ -1568,12 +1543,8 @@ static pinmux_enum_t pinmux_data[] = {
1568 PINMUX_DATA(FSIAISLD_PU_MARK, PORT55_FN1, PORT55_IN_PU), 1543 PINMUX_DATA(FSIAISLD_PU_MARK, PORT55_FN1, PORT55_IN_PU),
1569}; 1544};
1570 1545
1571#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
1572#define GPIO_PORT_310() _310(_GPIO_PORT, , unused)
1573#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
1574
1575static struct pinmux_gpio pinmux_gpios[] = { 1546static struct pinmux_gpio pinmux_gpios[] = {
1576 GPIO_PORT_310(), 1547 GPIO_PORT_ALL(),
1577 1548
1578 /* Table 25-1 (Functions 0-7) */ 1549 /* Table 25-1 (Functions 0-7) */
1579 GPIO_FN(VBUS_0), 1550 GPIO_FN(VBUS_0),
@@ -2236,24 +2207,20 @@ static struct pinmux_gpio pinmux_gpios[] = {
2236 GPIO_FN(SDHICMD2_PU), 2207 GPIO_FN(SDHICMD2_PU),
2237 GPIO_FN(MMCCMD0_PU), 2208 GPIO_FN(MMCCMD0_PU),
2238 GPIO_FN(MMCCMD1_PU), 2209 GPIO_FN(MMCCMD1_PU),
2210 GPIO_FN(MMCD0_0_PU),
2211 GPIO_FN(MMCD0_1_PU),
2212 GPIO_FN(MMCD0_2_PU),
2213 GPIO_FN(MMCD0_3_PU),
2214 GPIO_FN(MMCD0_4_PU),
2215 GPIO_FN(MMCD0_5_PU),
2216 GPIO_FN(MMCD0_6_PU),
2217 GPIO_FN(MMCD0_7_PU),
2239 GPIO_FN(FSIACK_PU), 2218 GPIO_FN(FSIACK_PU),
2240 GPIO_FN(FSIAILR_PU), 2219 GPIO_FN(FSIAILR_PU),
2241 GPIO_FN(FSIAIBT_PU), 2220 GPIO_FN(FSIAIBT_PU),
2242 GPIO_FN(FSIAISLD_PU), 2221 GPIO_FN(FSIAISLD_PU),
2243}; 2222};
2244 2223
2245#define PORTCR(nr, reg) \
2246 { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
2247 0, \
2248 /*0001*/ PORT##nr##_OUT , \
2249 /*0010*/ PORT##nr##_IN , 0, 0, 0, 0, 0, 0, 0, \
2250 /*1010*/ PORT##nr##_IN_PD, 0, 0, 0, \
2251 /*1110*/ PORT##nr##_IN_PU, 0, \
2252 PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
2253 PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
2254 PORT##nr##_FN6, PORT##nr##_FN7, 0, 0, 0, 0, 0, 0, 0, 0 } \
2255 }
2256
2257static struct pinmux_cfg_reg pinmux_config_regs[] = { 2224static struct pinmux_cfg_reg pinmux_config_regs[] = {
2258 PORTCR(0, 0xe6050000), /* PORT0CR */ 2225 PORTCR(0, 0xe6050000), /* PORT0CR */
2259 PORTCR(1, 0xe6050001), /* PORT1CR */ 2226 PORTCR(1, 0xe6050001), /* PORT1CR */
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c
index 79612737c5b2..0a5b22942fd3 100644
--- a/arch/arm/mach-shmobile/pm-sh7372.c
+++ b/arch/arm/mach-shmobile/pm-sh7372.c
@@ -402,22 +402,18 @@ static void sh7372_setup_a3sm(unsigned long msk, unsigned long msk2)
402 402
403#ifdef CONFIG_CPU_IDLE 403#ifdef CONFIG_CPU_IDLE
404 404
405static void sh7372_cpuidle_setup(struct cpuidle_device *dev) 405static void sh7372_cpuidle_setup(struct cpuidle_driver *drv)
406{ 406{
407 struct cpuidle_state *state; 407 struct cpuidle_state *state = &drv->states[drv->state_count];
408 int i = dev->state_count;
409 408
410 state = &dev->states[i];
411 snprintf(state->name, CPUIDLE_NAME_LEN, "C2"); 409 snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
412 strncpy(state->desc, "Core Standby Mode", CPUIDLE_DESC_LEN); 410 strncpy(state->desc, "Core Standby Mode", CPUIDLE_DESC_LEN);
413 state->exit_latency = 10; 411 state->exit_latency = 10;
414 state->target_residency = 20 + 10; 412 state->target_residency = 20 + 10;
415 state->power_usage = 1; /* perhaps not */ 413 state->flags = CPUIDLE_FLAG_TIME_VALID;
416 state->flags = 0; 414 shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_core_standby;
417 state->flags |= CPUIDLE_FLAG_TIME_VALID;
418 shmobile_cpuidle_modes[i] = sh7372_enter_core_standby;
419 415
420 dev->state_count = i + 1; 416 drv->state_count++;
421} 417}
422 418
423static void sh7372_cpuidle_init(void) 419static void sh7372_cpuidle_init(void)
diff --git a/arch/arm/mach-shmobile/pm_runtime.c b/arch/arm/mach-shmobile/pm_runtime.c
deleted file mode 100644
index bd5c6a3b8c55..000000000000
--- a/arch/arm/mach-shmobile/pm_runtime.c
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * arch/arm/mach-shmobile/pm_runtime.c
3 *
4 * Runtime PM support code for SuperH Mobile ARM
5 *
6 * Copyright (C) 2009-2010 Magnus Damm
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/io.h>
16#include <linux/pm_runtime.h>
17#include <linux/pm_domain.h>
18#include <linux/pm_clock.h>
19#include <linux/platform_device.h>
20#include <linux/clk.h>
21#include <linux/sh_clk.h>
22#include <linux/bitmap.h>
23#include <linux/slab.h>
24
25#ifdef CONFIG_PM_RUNTIME
26
27static int default_platform_runtime_idle(struct device *dev)
28{
29 /* suspend synchronously to disable clocks immediately */
30 return pm_runtime_suspend(dev);
31}
32
33static struct dev_pm_domain default_pm_domain = {
34 .ops = {
35 .runtime_suspend = pm_clk_suspend,
36 .runtime_resume = pm_clk_resume,
37 .runtime_idle = default_platform_runtime_idle,
38 USE_PLATFORM_PM_SLEEP_OPS
39 },
40};
41
42#define DEFAULT_PM_DOMAIN_PTR (&default_pm_domain)
43
44#else
45
46#define DEFAULT_PM_DOMAIN_PTR NULL
47
48#endif /* CONFIG_PM_RUNTIME */
49
50static struct pm_clk_notifier_block platform_bus_notifier = {
51 .pm_domain = DEFAULT_PM_DOMAIN_PTR,
52 .con_ids = { NULL, },
53};
54
55static int __init sh_pm_runtime_init(void)
56{
57 pm_clk_add_notifier(&platform_bus_type, &platform_bus_notifier);
58 return 0;
59}
60core_initcall(sh_pm_runtime_init);
61
62static int __init sh_pm_runtime_late_init(void)
63{
64 pm_genpd_poweroff_unused();
65 return 0;
66}
67late_initcall(sh_pm_runtime_late_init);
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
index 53da4224ba3d..de3bb41c8e9e 100644
--- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
@@ -11,35 +11,8 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
15#include <mach/hardware.h>
16
17 .macro disable_fiq 14 .macro disable_fiq
18 .endm 15 .endm
19 16
20 .macro get_irqnr_preamble, base, tmp
21 .endm
22
23 .macro arch_ret_to_user, tmp1, tmp2 17 .macro arch_ret_to_user, tmp1, tmp2
24 .endm 18 .endm
25
26 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
27 ldr \base, =VA_SPEAR3XX_ML1_VIC_BASE
28 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
29 teq \irqstat, #0
30 beq 1001f @ this will set/reset
31 @ zero register
32 /*
33 * Following code will find bit position of least significang
34 * bit set in irqstat, using following equation
35 * least significant bit set in n = (n & ~(n-1))
36 */
37 sub \tmp, \irqstat, #1 @ tmp = irqstat - 1
38 mvn \tmp, \tmp @ tmp = ~tmp
39 and \irqstat, \irqstat, \tmp @ irqstat &= tmp
40 /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
41 clz \tmp, \irqstat @ tmp = leading zeros
42 rsb \irqnr, \tmp, #0x1F @ irqnr = 32 - tmp - 1
43
441001: /* EQ will be set if no irqs pending */
45 .endm
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c
index a5ff98eed1db..61068ba67923 100644
--- a/arch/arm/mach-spear3xx/spear300_evb.c
+++ b/arch/arm/mach-spear3xx/spear300_evb.c
@@ -11,6 +11,7 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
14#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
15#include <asm/mach-types.h> 16#include <asm/mach-types.h>
16#include <mach/generic.h> 17#include <mach/generic.h>
@@ -67,6 +68,7 @@ MACHINE_START(SPEAR300, "ST-SPEAR300-EVB")
67 .atag_offset = 0x100, 68 .atag_offset = 0x100,
68 .map_io = spear3xx_map_io, 69 .map_io = spear3xx_map_io,
69 .init_irq = spear3xx_init_irq, 70 .init_irq = spear3xx_init_irq,
71 .handle_irq = vic_handle_irq,
70 .timer = &spear3xx_timer, 72 .timer = &spear3xx_timer,
71 .init_machine = spear300_evb_init, 73 .init_machine = spear300_evb_init,
72MACHINE_END 74MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c
index 45d180d59362..7903abe92bf6 100644
--- a/arch/arm/mach-spear3xx/spear310_evb.c
+++ b/arch/arm/mach-spear3xx/spear310_evb.c
@@ -11,6 +11,7 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
14#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
15#include <asm/mach-types.h> 16#include <asm/mach-types.h>
16#include <mach/generic.h> 17#include <mach/generic.h>
@@ -73,6 +74,7 @@ MACHINE_START(SPEAR310, "ST-SPEAR310-EVB")
73 .atag_offset = 0x100, 74 .atag_offset = 0x100,
74 .map_io = spear3xx_map_io, 75 .map_io = spear3xx_map_io,
75 .init_irq = spear3xx_init_irq, 76 .init_irq = spear3xx_init_irq,
77 .handle_irq = vic_handle_irq,
76 .timer = &spear3xx_timer, 78 .timer = &spear3xx_timer,
77 .init_machine = spear310_evb_init, 79 .init_machine = spear310_evb_init,
78MACHINE_END 80MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c
index 22879848d73a..e9751f970933 100644
--- a/arch/arm/mach-spear3xx/spear320_evb.c
+++ b/arch/arm/mach-spear3xx/spear320_evb.c
@@ -11,6 +11,7 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
14#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
15#include <asm/mach-types.h> 16#include <asm/mach-types.h>
16#include <mach/generic.h> 17#include <mach/generic.h>
@@ -71,6 +72,7 @@ MACHINE_START(SPEAR320, "ST-SPEAR320-EVB")
71 .atag_offset = 0x100, 72 .atag_offset = 0x100,
72 .map_io = spear3xx_map_io, 73 .map_io = spear3xx_map_io,
73 .init_irq = spear3xx_init_irq, 74 .init_irq = spear3xx_init_irq,
75 .handle_irq = vic_handle_irq,
74 .timer = &spear3xx_timer, 76 .timer = &spear3xx_timer,
75 .init_machine = spear320_evb_init, 77 .init_machine = spear320_evb_init,
76MACHINE_END 78MACHINE_END
diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
index 8a0b0ed7b203..d490a910d925 100644
--- a/arch/arm/mach-spear6xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
@@ -11,44 +11,8 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
15#include <mach/hardware.h>
16
17 .macro disable_fiq 14 .macro disable_fiq
18 .endm 15 .endm
19 16
20 .macro get_irqnr_preamble, base, tmp
21 .endm
22
23 .macro arch_ret_to_user, tmp1, tmp2 17 .macro arch_ret_to_user, tmp1, tmp2
24 .endm 18 .endm
25
26 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
27 ldr \base, =VA_SPEAR6XX_CPU_VIC_PRI_BASE
28 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
29 mov \irqnr, #0
30 teq \irqstat, #0
31 bne 1001f
32 ldr \base, =VA_SPEAR6XX_CPU_VIC_SEC_BASE
33 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
34 teq \irqstat, #0
35 beq 1002f @ this will set/reset
36 @ zero register
37 mov \irqnr, #32
381001:
39 /*
40 * Following code will find bit position of least significang
41 * bit set in irqstat, using following equation
42 * least significant bit set in n = (n & ~(n-1))
43 */
44 sub \tmp, \irqstat, #1 @ tmp = irqstat - 1
45 mvn \tmp, \tmp @ tmp = ~tmp
46 and \irqstat, \irqstat, \tmp @ irqstat &= tmp
47 /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
48 clz \tmp, \irqstat @ tmp = leading zeros
49
50 rsb \tmp, \tmp, #0x1F @ tmp = 32 - tmp - 1
51 add \irqnr, \irqnr, \tmp
52
531002: /* EQ will be set if no irqs pending */
54 .endm
diff --git a/arch/arm/mach-spear6xx/spear600_evb.c b/arch/arm/mach-spear6xx/spear600_evb.c
index 8238fe38e713..ff139ed0a61e 100644
--- a/arch/arm/mach-spear6xx/spear600_evb.c
+++ b/arch/arm/mach-spear6xx/spear600_evb.c
@@ -11,6 +11,7 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <asm/hardware/vic.h>
14#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
15#include <asm/mach-types.h> 16#include <asm/mach-types.h>
16#include <mach/generic.h> 17#include <mach/generic.h>
@@ -46,6 +47,7 @@ MACHINE_START(SPEAR600, "ST-SPEAR600-EVB")
46 .atag_offset = 0x100, 47 .atag_offset = 0x100,
47 .map_io = spear6xx_map_io, 48 .map_io = spear6xx_map_io,
48 .init_irq = spear6xx_init_irq, 49 .init_irq = spear6xx_init_irq,
50 .handle_irq = vic_handle_irq,
49 .timer = &spear6xx_timer, 51 .timer = &spear6xx_timer,
50 .init_machine = spear600_evb_init, 52 .init_machine = spear600_evb_init,
51MACHINE_END 53MACHINE_END
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
index d368f8dafcfd..f6f03ce340fc 100644
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -32,6 +32,7 @@
32#include <linux/i2c.h> 32#include <linux/i2c.h>
33#include <linux/i2c-tegra.h> 33#include <linux/i2c-tegra.h>
34 34
35#include <asm/hardware/gic.h>
35#include <asm/mach-types.h> 36#include <asm/mach-types.h>
36#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
37#include <asm/mach/time.h> 38#include <asm/mach/time.h>
@@ -101,6 +102,13 @@ static void __init tegra_dt_init(void)
101 102
102 tegra_clk_init_from_table(tegra_dt_clk_init_table); 103 tegra_clk_init_from_table(tegra_dt_clk_init_table);
103 104
105 /*
106 * Finished with the static registrations now; fill in the missing
107 * devices
108 */
109 of_platform_populate(NULL, tegra_dt_match_table,
110 tegra20_auxdata_lookup, NULL);
111
104 for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) { 112 for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
105 if (of_machine_is_compatible(pinmux_configs[i].machine)) { 113 if (of_machine_is_compatible(pinmux_configs[i].machine)) {
106 pinmux_configs[i].init(); 114 pinmux_configs[i].init();
@@ -110,12 +118,6 @@ static void __init tegra_dt_init(void)
110 118
111 WARN(i == ARRAY_SIZE(pinmux_configs), 119 WARN(i == ARRAY_SIZE(pinmux_configs),
112 "Unknown platform! Pinmuxing not initialized\n"); 120 "Unknown platform! Pinmuxing not initialized\n");
113
114 /*
115 * Finished with the static registrations now; fill in the missing
116 * devices
117 */
118 of_platform_populate(NULL, tegra_dt_match_table, tegra20_auxdata_lookup, NULL);
119} 121}
120 122
121static const char * tegra_dt_board_compat[] = { 123static const char * tegra_dt_board_compat[] = {
@@ -129,6 +131,7 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
129 .map_io = tegra_map_common_io, 131 .map_io = tegra_map_common_io,
130 .init_early = tegra_init_early, 132 .init_early = tegra_init_early,
131 .init_irq = tegra_init_irq, 133 .init_irq = tegra_init_irq,
134 .handle_irq = gic_handle_irq,
132 .timer = &tegra_timer, 135 .timer = &tegra_timer,
133 .init_machine = tegra_dt_init, 136 .init_machine = tegra_dt_init,
134 .dt_compat = tegra_dt_board_compat, 137 .dt_compat = tegra_dt_board_compat,
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index e99b45618cd0..7a4a26d5174c 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -16,6 +16,8 @@
16 16
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/of.h>
20
19#include <mach/pinmux.h> 21#include <mach/pinmux.h>
20 22
21#include "gpio-names.h" 23#include "gpio-names.h"
@@ -161,7 +163,9 @@ static struct tegra_gpio_table gpio_table[] = {
161 163
162void harmony_pinmux_init(void) 164void harmony_pinmux_init(void)
163{ 165{
164 platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); 166 if (!of_machine_is_compatible("nvidia,tegra20"))
167 platform_add_devices(pinmux_devices,
168 ARRAY_SIZE(pinmux_devices));
165 169
166 tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux)); 170 tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
167 171
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index f0bdc5e3fe52..fd190a8dc665 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -31,6 +31,7 @@
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
32#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
33#include <asm/mach/time.h> 33#include <asm/mach/time.h>
34#include <asm/hardware/gic.h>
34#include <asm/setup.h> 35#include <asm/setup.h>
35 36
36#include <mach/tegra_wm8903_pdata.h> 37#include <mach/tegra_wm8903_pdata.h>
@@ -187,6 +188,7 @@ MACHINE_START(HARMONY, "harmony")
187 .map_io = tegra_map_common_io, 188 .map_io = tegra_map_common_io,
188 .init_early = tegra_init_early, 189 .init_early = tegra_init_early,
189 .init_irq = tegra_init_irq, 190 .init_irq = tegra_init_irq,
191 .handle_irq = gic_handle_irq,
190 .timer = &tegra_timer, 192 .timer = &tegra_timer,
191 .init_machine = tegra_harmony_init, 193 .init_machine = tegra_harmony_init,
192MACHINE_END 194MACHINE_END
diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c
index fb20894862b0..be30e215f4b7 100644
--- a/arch/arm/mach-tegra/board-paz00-pinmux.c
+++ b/arch/arm/mach-tegra/board-paz00-pinmux.c
@@ -16,6 +16,8 @@
16 16
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/of.h>
20
19#include <mach/pinmux.h> 21#include <mach/pinmux.h>
20 22
21#include "gpio-names.h" 23#include "gpio-names.h"
@@ -158,7 +160,9 @@ static struct tegra_gpio_table gpio_table[] = {
158 160
159void paz00_pinmux_init(void) 161void paz00_pinmux_init(void)
160{ 162{
161 platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); 163 if (!of_machine_is_compatible("nvidia,tegra20"))
164 platform_add_devices(pinmux_devices,
165 ARRAY_SIZE(pinmux_devices));
162 166
163 tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux)); 167 tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux));
164 168
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index 55c55ba89f1e..0b7e1cfee70d 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -29,6 +29,7 @@
29#include <linux/gpio.h> 29#include <linux/gpio.h>
30#include <linux/rfkill-gpio.h> 30#include <linux/rfkill-gpio.h>
31 31
32#include <asm/hardware/gic.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
34#include <asm/mach/time.h> 35#include <asm/mach/time.h>
@@ -190,6 +191,7 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")
190 .map_io = tegra_map_common_io, 191 .map_io = tegra_map_common_io,
191 .init_early = tegra_init_early, 192 .init_early = tegra_init_early,
192 .init_irq = tegra_init_irq, 193 .init_irq = tegra_init_irq,
194 .handle_irq = gic_handle_irq,
193 .timer = &tegra_timer, 195 .timer = &tegra_timer,
194 .init_machine = tegra_paz00_init, 196 .init_machine = tegra_paz00_init,
195MACHINE_END 197MACHINE_END
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
index fbce31daa3c9..b1c2972f62fe 100644
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -16,6 +16,7 @@
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/of.h>
19 20
20#include <mach/pinmux.h> 21#include <mach/pinmux.h>
21#include <mach/pinmux-t2.h> 22#include <mach/pinmux-t2.h>
@@ -191,6 +192,7 @@ static struct tegra_gpio_table common_gpio_table[] = {
191 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true }, 192 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
192 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true }, 193 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true },
193 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true }, 194 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true },
195 { .gpio = TEGRA_GPIO_HP_DET, .enable = true },
194 { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true }, 196 { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true },
195 { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true }, 197 { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
196 { .gpio = TEGRA_GPIO_USB1, .enable = true }, 198 { .gpio = TEGRA_GPIO_USB1, .enable = true },
@@ -218,7 +220,9 @@ static void __init update_pinmux(struct tegra_pingroup_config *newtbl, int size)
218 220
219void __init seaboard_common_pinmux_init(void) 221void __init seaboard_common_pinmux_init(void)
220{ 222{
221 platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); 223 if (!of_machine_is_compatible("nvidia,tegra20"))
224 platform_add_devices(pinmux_devices,
225 ARRAY_SIZE(pinmux_devices));
222 226
223 tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux)); 227 tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux));
224 228
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c
index bf13ea355efc..7328379b1356 100644
--- a/arch/arm/mach-tegra/board-seaboard.c
+++ b/arch/arm/mach-tegra/board-seaboard.c
@@ -34,6 +34,7 @@
34 34
35#include <asm/mach-types.h> 35#include <asm/mach-types.h>
36#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
37#include <asm/hardware/gic.h>
37 38
38#include "board.h" 39#include "board.h"
39#include "board-seaboard.h" 40#include "board-seaboard.h"
@@ -284,6 +285,7 @@ MACHINE_START(SEABOARD, "seaboard")
284 .map_io = tegra_map_common_io, 285 .map_io = tegra_map_common_io,
285 .init_early = tegra_init_early, 286 .init_early = tegra_init_early,
286 .init_irq = tegra_init_irq, 287 .init_irq = tegra_init_irq,
288 .handle_irq = gic_handle_irq,
287 .timer = &tegra_timer, 289 .timer = &tegra_timer,
288 .init_machine = tegra_seaboard_init, 290 .init_machine = tegra_seaboard_init,
289MACHINE_END 291MACHINE_END
@@ -293,6 +295,7 @@ MACHINE_START(KAEN, "kaen")
293 .map_io = tegra_map_common_io, 295 .map_io = tegra_map_common_io,
294 .init_early = tegra_init_early, 296 .init_early = tegra_init_early,
295 .init_irq = tegra_init_irq, 297 .init_irq = tegra_init_irq,
298 .handle_irq = gic_handle_irq,
296 .timer = &tegra_timer, 299 .timer = &tegra_timer,
297 .init_machine = tegra_kaen_init, 300 .init_machine = tegra_kaen_init,
298MACHINE_END 301MACHINE_END
@@ -302,6 +305,7 @@ MACHINE_START(WARIO, "wario")
302 .map_io = tegra_map_common_io, 305 .map_io = tegra_map_common_io,
303 .init_early = tegra_init_early, 306 .init_early = tegra_init_early,
304 .init_irq = tegra_init_irq, 307 .init_irq = tegra_init_irq,
308 .handle_irq = gic_handle_irq,
305 .timer = &tegra_timer, 309 .timer = &tegra_timer,
306 .init_machine = tegra_wario_init, 310 .init_machine = tegra_wario_init,
307MACHINE_END 311MACHINE_END
diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c
index 4969dd28a04c..7ab719d46da0 100644
--- a/arch/arm/mach-tegra/board-trimslice-pinmux.c
+++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c
@@ -16,6 +16,7 @@
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/of.h>
19 20
20#include <mach/pinmux.h> 21#include <mach/pinmux.h>
21 22
@@ -157,7 +158,9 @@ static struct tegra_gpio_table gpio_table[] = {
157 158
158void __init trimslice_pinmux_init(void) 159void __init trimslice_pinmux_init(void)
159{ 160{
160 platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); 161 if (!of_machine_is_compatible("nvidia,tegra20"))
162 platform_add_devices(pinmux_devices,
163 ARRAY_SIZE(pinmux_devices));
161 tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux)); 164 tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
162 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); 165 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
163} 166}
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c
index 1a6617b7806f..60a36a2e0be1 100644
--- a/arch/arm/mach-tegra/board-trimslice.c
+++ b/arch/arm/mach-tegra/board-trimslice.c
@@ -26,6 +26,7 @@
26#include <linux/i2c.h> 26#include <linux/i2c.h>
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28 28
29#include <asm/hardware/gic.h>
29#include <asm/mach-types.h> 30#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
31#include <asm/setup.h> 32#include <asm/setup.h>
@@ -176,6 +177,7 @@ MACHINE_START(TRIMSLICE, "trimslice")
176 .map_io = tegra_map_common_io, 177 .map_io = tegra_map_common_io,
177 .init_early = tegra_init_early, 178 .init_early = tegra_init_early,
178 .init_irq = tegra_init_irq, 179 .init_irq = tegra_init_irq,
180 .handle_irq = gic_handle_irq,
179 .timer = &tegra_timer, 181 .timer = &tegra_timer,
180 .init_machine = tegra_trimslice_init, 182 .init_machine = tegra_trimslice_init,
181MACHINE_END 183MACHINE_END
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S
index dd165c53889d..ac11262149c7 100644
--- a/arch/arm/mach-tegra/include/mach/entry-macro.S
+++ b/arch/arm/mach-tegra/include/mach/entry-macro.S
@@ -12,30 +12,15 @@
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 * 13 *
14 */ 14 */
15#include <mach/iomap.h>
16#include <mach/io.h>
17
18#if defined(CONFIG_ARM_GIC)
19#define HAVE_GET_IRQNR_PREAMBLE
20#include <asm/hardware/entry-macro-gic.S>
21
22 /* Uses the GIC interrupt controller built into the cpu */
23#define ICTRL_BASE (IO_CPU_VIRT + 0x100)
24 15
25 .macro disable_fiq 16 .macro disable_fiq
26 .endm 17 .endm
27 18
28 .macro get_irqnr_preamble, base, tmp 19 .macro arch_ret_to_user, tmp1, tmp2
29 movw \base, #(ICTRL_BASE & 0x0000ffff)
30 movt \base, #((ICTRL_BASE & 0xffff0000) >> 16)
31 .endm 20 .endm
32 21
33 .macro arch_ret_to_user, tmp1, tmp2 22#if !defined(CONFIG_ARM_GIC)
34 .endm
35#else
36 /* legacy interrupt controller for AP16 */ 23 /* legacy interrupt controller for AP16 */
37 .macro disable_fiq
38 .endm
39 24
40 .macro get_irqnr_preamble, base, tmp 25 .macro get_irqnr_preamble, base, tmp
41 @ enable imprecise aborts 26 @ enable imprecise aborts
@@ -46,9 +31,6 @@
46 orr \base, #0x0000f000 31 orr \base, #0x0000f000
47 .endm 32 .endm
48 33
49 .macro arch_ret_to_user, tmp1, tmp2
50 .endm
51
52 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 34 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
53 ldr \irqnr, [\base, #0x20] @ EVT_IRQ_STS 35 ldr \irqnr, [\base, #0x20] @ EVT_IRQ_STS
54 cmp \irqnr, #0x80 36 cmp \irqnr, #0x80
diff --git a/arch/arm/mach-u300/include/mach/entry-macro.S b/arch/arm/mach-u300/include/mach/entry-macro.S
index 20731ae39d38..7181d6ac6651 100644
--- a/arch/arm/mach-u300/include/mach/entry-macro.S
+++ b/arch/arm/mach-u300/include/mach/entry-macro.S
@@ -8,33 +8,9 @@
8 * Low-level IRQ helper macros for ST-Ericsson U300 8 * Low-level IRQ helper macros for ST-Ericsson U300
9 * Author: Linus Walleij <linus.walleij@stericsson.com> 9 * Author: Linus Walleij <linus.walleij@stericsson.com>
10 */ 10 */
11#include <mach/hardware.h>
12#include <asm/hardware/vic.h>
13 11
14 .macro disable_fiq 12 .macro disable_fiq
15 .endm 13 .endm
16 14
17 .macro get_irqnr_preamble, base, tmp
18 .endm
19
20 .macro arch_ret_to_user, tmp1, tmp2 15 .macro arch_ret_to_user, tmp1, tmp2
21 .endm 16 .endm
22
23 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
24 ldr \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON0_BASE
25 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
26 mov \irqnr, #0
27 teq \irqstat, #0
28 bne 1002f
291001: ldr \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON1_BASE
30 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
31 mov \irqnr, #32
32 teq \irqstat, #0
33 beq 1003f
341002: tst \irqstat, #1
35 bne 1003f
36 add \irqnr, \irqnr, #1
37 movs \irqstat, \irqstat, lsr #1
38 bne 1002b
391003: /* EQ will be set if no irqs pending */
40 .endm
diff --git a/arch/arm/mach-u300/u300.c b/arch/arm/mach-u300/u300.c
index 89422ee7f3a8..4a4fd334eb6e 100644
--- a/arch/arm/mach-u300/u300.c
+++ b/arch/arm/mach-u300/u300.c
@@ -19,6 +19,7 @@
19#include <linux/io.h> 19#include <linux/io.h>
20#include <mach/hardware.h> 20#include <mach/hardware.h>
21#include <mach/platform.h> 21#include <mach/platform.h>
22#include <asm/hardware/vic.h>
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <asm/memory.h> 25#include <asm/memory.h>
@@ -49,6 +50,7 @@ MACHINE_START(U300, MACH_U300_STRING)
49 .atag_offset = BOOT_PARAMS_OFFSET, 50 .atag_offset = BOOT_PARAMS_OFFSET,
50 .map_io = u300_map_io, 51 .map_io = u300_map_io,
51 .init_irq = u300_init_irq, 52 .init_irq = u300_init_irq,
53 .handle_irq = vic_handle_irq,
52 .timer = &u300_timer, 54 .timer = &u300_timer,
53 .init_machine = u300_init_machine, 55 .init_machine = u300_init_machine,
54MACHINE_END 56MACHINE_END
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index bdd7b80dd7ad..de1f5f8f7330 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -33,6 +33,7 @@
33#include <linux/leds.h> 33#include <linux/leds.h>
34#include <asm/mach-types.h> 34#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
36#include <asm/hardware/gic.h>
36 37
37#include <plat/i2c.h> 38#include <plat/i2c.h>
38#include <plat/ste_dma40.h> 39#include <plat/ste_dma40.h>
@@ -695,6 +696,7 @@ MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
695 .init_irq = ux500_init_irq, 696 .init_irq = ux500_init_irq,
696 /* we re-use nomadik timer here */ 697 /* we re-use nomadik timer here */
697 .timer = &ux500_timer, 698 .timer = &ux500_timer,
699 .handle_irq = gic_handle_irq,
698 .init_machine = mop500_init_machine, 700 .init_machine = mop500_init_machine,
699MACHINE_END 701MACHINE_END
700 702
@@ -703,6 +705,7 @@ MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
703 .map_io = u8500_map_io, 705 .map_io = u8500_map_io,
704 .init_irq = ux500_init_irq, 706 .init_irq = ux500_init_irq,
705 .timer = &ux500_timer, 707 .timer = &ux500_timer,
708 .handle_irq = gic_handle_irq,
706 .init_machine = hrefv60_init_machine, 709 .init_machine = hrefv60_init_machine,
707MACHINE_END 710MACHINE_END
708 711
@@ -712,5 +715,6 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
712 .init_irq = ux500_init_irq, 715 .init_irq = ux500_init_irq,
713 /* we re-use nomadik timer here */ 716 /* we re-use nomadik timer here */
714 .timer = &ux500_timer, 717 .timer = &ux500_timer,
718 .handle_irq = gic_handle_irq,
715 .init_machine = snowball_init_machine, 719 .init_machine = snowball_init_machine,
716MACHINE_END 720MACHINE_END
diff --git a/arch/arm/mach-ux500/board-u5500.c b/arch/arm/mach-ux500/board-u5500.c
index 82025ba70c03..fe1569b67c91 100644
--- a/arch/arm/mach-ux500/board-u5500.c
+++ b/arch/arm/mach-ux500/board-u5500.c
@@ -12,6 +12,7 @@
12#include <linux/i2c.h> 12#include <linux/i2c.h>
13#include <linux/mfd/ab5500/ab5500.h> 13#include <linux/mfd/ab5500/ab5500.h>
14 14
15#include <asm/hardware/gic.h>
15#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
16#include <asm/mach-types.h> 17#include <asm/mach-types.h>
17 18
@@ -149,5 +150,6 @@ MACHINE_START(U5500, "ST-Ericsson U5500 Platform")
149 .map_io = u5500_map_io, 150 .map_io = u5500_map_io,
150 .init_irq = ux500_init_irq, 151 .init_irq = ux500_init_irq,
151 .timer = &ux500_timer, 152 .timer = &ux500_timer,
153 .handle_irq = gic_handle_irq,
152 .init_machine = u5500_init_machine, 154 .init_machine = u5500_init_machine,
153MACHINE_END 155MACHINE_END
diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S
index 071bba94f727..e16299e1020a 100644
--- a/arch/arm/mach-ux500/include/mach/entry-macro.S
+++ b/arch/arm/mach-ux500/include/mach/entry-macro.S
@@ -10,8 +10,6 @@
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13#include <mach/hardware.h>
14#include <asm/hardware/entry-macro-gic.S>
15 13
16 .macro disable_fiq 14 .macro disable_fiq
17 .endm 15 .endm
diff --git a/arch/arm/mach-versatile/include/mach/entry-macro.S b/arch/arm/mach-versatile/include/mach/entry-macro.S
index e6f7c1663160..b6f0dbf122ee 100644
--- a/arch/arm/mach-versatile/include/mach/entry-macro.S
+++ b/arch/arm/mach-versatile/include/mach/entry-macro.S
@@ -7,39 +7,9 @@
7 * License version 2. This program is licensed "as is" without any 7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <mach/hardware.h>
11#include <mach/platform.h>
12#include <asm/hardware/vic.h>
13 10
14 .macro disable_fiq 11 .macro disable_fiq
15 .endm 12 .endm
16 13
17 .macro get_irqnr_preamble, base, tmp
18 ldr \base, =IO_ADDRESS(VERSATILE_VIC_BASE)
19 .endm
20
21 .macro arch_ret_to_user, tmp1, tmp2 14 .macro arch_ret_to_user, tmp1, tmp2
22 .endm 15 .endm
23
24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
25 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
26 mov \irqnr, #0
27 teq \irqstat, #0
28 beq 1003f
29
301001: tst \irqstat, #15
31 bne 1002f
32 add \irqnr, \irqnr, #4
33 movs \irqstat, \irqstat, lsr #4
34 bne 1001b
351002: tst \irqstat, #1
36 bne 1003f
37 add \irqnr, \irqnr, #1
38 movs \irqstat, \irqstat, lsr #1
39 bne 1002b
401003: /* EQ will be set if no irqs pending */
41
42@ clz \irqnr, \irqstat
43@1003: /* EQ will be set if we reach MAXIRQNUM */
44 .endm
45
diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c
index fda4866703cd..c83a1f379f7a 100644
--- a/arch/arm/mach-versatile/versatile_ab.c
+++ b/arch/arm/mach-versatile/versatile_ab.c
@@ -27,6 +27,7 @@
27 27
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/irq.h> 29#include <asm/irq.h>
30#include <asm/hardware/vic.h>
30#include <asm/mach-types.h> 31#include <asm/mach-types.h>
31 32
32#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
@@ -39,6 +40,7 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
39 .map_io = versatile_map_io, 40 .map_io = versatile_map_io,
40 .init_early = versatile_init_early, 41 .init_early = versatile_init_early,
41 .init_irq = versatile_init_irq, 42 .init_irq = versatile_init_irq,
43 .handle_irq = vic_handle_irq,
42 .timer = &versatile_timer, 44 .timer = &versatile_timer,
43 .init_machine = versatile_init, 45 .init_machine = versatile_init,
44MACHINE_END 46MACHINE_END
diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c
index 54e037c090f5..f4d1e0f072c8 100644
--- a/arch/arm/mach-versatile/versatile_dt.c
+++ b/arch/arm/mach-versatile/versatile_dt.c
@@ -24,6 +24,7 @@
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/of_irq.h> 25#include <linux/of_irq.h>
26#include <linux/of_platform.h> 26#include <linux/of_platform.h>
27#include <asm/hardware/vic.h>
27#include <asm/mach-types.h> 28#include <asm/mach-types.h>
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
29 30
@@ -45,6 +46,7 @@ DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)")
45 .map_io = versatile_map_io, 46 .map_io = versatile_map_io,
46 .init_early = versatile_init_early, 47 .init_early = versatile_init_early,
47 .init_irq = versatile_init_irq, 48 .init_irq = versatile_init_irq,
49 .handle_irq = vic_handle_irq,
48 .timer = &versatile_timer, 50 .timer = &versatile_timer,
49 .init_machine = versatile_dt_init, 51 .init_machine = versatile_dt_init,
50 .dt_compat = versatile_dt_match, 52 .dt_compat = versatile_dt_match,
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index feaf9cbe60f6..4d31eeb6c101 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -28,6 +28,7 @@
28#include <linux/io.h> 28#include <linux/io.h>
29 29
30#include <mach/hardware.h> 30#include <mach/hardware.h>
31#include <asm/hardware/vic.h>
31#include <asm/irq.h> 32#include <asm/irq.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33 34
@@ -107,6 +108,7 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
107 .map_io = versatile_map_io, 108 .map_io = versatile_map_io,
108 .init_early = versatile_init_early, 109 .init_early = versatile_init_early,
109 .init_irq = versatile_init_irq, 110 .init_irq = versatile_init_irq,
111 .handle_irq = vic_handle_irq,
110 .timer = &versatile_timer, 112 .timer = &versatile_timer,
111 .init_machine = versatile_pb_init, 113 .init_machine = versatile_pb_init,
112MACHINE_END 114MACHINE_END
diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S
index 73c11297509e..a14f9e62ca92 100644
--- a/arch/arm/mach-vexpress/include/mach/entry-macro.S
+++ b/arch/arm/mach-vexpress/include/mach/entry-macro.S
@@ -1,5 +1,3 @@
1#include <asm/hardware/entry-macro-gic.S>
2
3 .macro disable_fiq 1 .macro disable_fiq
4 .endm 2 .endm
5 3
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 1fafc3244607..7aa07a8ce232 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -23,6 +23,7 @@
23#include <asm/hardware/arm_timer.h> 23#include <asm/hardware/arm_timer.h>
24#include <asm/hardware/timer-sp.h> 24#include <asm/hardware/timer-sp.h>
25#include <asm/hardware/sp810.h> 25#include <asm/hardware/sp810.h>
26#include <asm/hardware/gic.h>
26 27
27#include <mach/ct-ca9x4.h> 28#include <mach/ct-ca9x4.h>
28#include <mach/motherboard.h> 29#include <mach/motherboard.h>
@@ -448,5 +449,6 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express")
448 .init_early = v2m_init_early, 449 .init_early = v2m_init_early,
449 .init_irq = v2m_init_irq, 450 .init_irq = v2m_init_irq,
450 .timer = &v2m_timer, 451 .timer = &v2m_timer,
452 .handle_irq = gic_handle_irq,
451 .init_machine = v2m_init, 453 .init_machine = v2m_init,
452MACHINE_END 454MACHINE_END
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 73e93687b81a..ab5cfddc0d7b 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -112,6 +112,7 @@ static const char *xilinx_dt_match[] = {
112MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") 112MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
113 .map_io = xilinx_map_io, 113 .map_io = xilinx_map_io,
114 .init_irq = xilinx_irq_init, 114 .init_irq = xilinx_irq_init,
115 .handle_irq = gic_handle_irq,
115 .init_machine = xilinx_init_machine, 116 .init_machine = xilinx_init_machine,
116 .timer = &xttcpss_sys_timer, 117 .timer = &xttcpss_sys_timer,
117 .dt_compat = xilinx_dt_match, 118 .dt_compat = xilinx_dt_match,
diff --git a/arch/arm/mach-zynq/include/mach/entry-macro.S b/arch/arm/mach-zynq/include/mach/entry-macro.S
index 3cfc01b37461..d621fb732569 100644
--- a/arch/arm/mach-zynq/include/mach/entry-macro.S
+++ b/arch/arm/mach-zynq/include/mach/entry-macro.S
@@ -20,9 +20,6 @@
20 * GNU General Public License for more details. 20 * GNU General Public License for more details.
21 */ 21 */
22 22
23#include <mach/hardware.h>
24#include <asm/hardware/entry-macro-gic.S>
25
26 .macro disable_fiq 23 .macro disable_fiq
27 .endm 24 .endm
28 25
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index a08a95107a63..b3a1f2b3ada3 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -10,7 +10,7 @@ choice
10 10
11config ARCH_IMX_V4_V5 11config ARCH_IMX_V4_V5
12 bool "i.MX1, i.MX21, i.MX25, i.MX27" 12 bool "i.MX1, i.MX21, i.MX25, i.MX27"
13 select AUTO_ZRELADDR 13 select AUTO_ZRELADDR if !ZBOOT_ROM
14 select ARM_PATCH_PHYS_VIRT 14 select ARM_PATCH_PHYS_VIRT
15 help 15 help
16 This enables support for systems based on the Freescale i.MX ARMv4 16 This enables support for systems based on the Freescale i.MX ARMv4
@@ -26,7 +26,7 @@ config ARCH_IMX_V6_V7
26 26
27config ARCH_MX5 27config ARCH_MX5
28 bool "i.MX50, i.MX51, i.MX53" 28 bool "i.MX50, i.MX51, i.MX53"
29 select AUTO_ZRELADDR 29 select AUTO_ZRELADDR if !ZBOOT_ROM
30 select ARM_PATCH_PHYS_VIRT 30 select ARM_PATCH_PHYS_VIRT
31 help 31 help
32 This enables support for machines using Freescale's i.MX50 and i.MX53 32 This enables support for machines using Freescale's i.MX50 and i.MX53
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index b9f0f5f499a4..076db84f3e31 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -5,7 +5,6 @@
5# Common support 5# Common support
6obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o 6obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o
7 7
8obj-$(CONFIG_ARM_GIC) += gic.o
9obj-$(CONFIG_MXC_TZIC) += tzic.o 8obj-$(CONFIG_MXC_TZIC) += tzic.o
10obj-$(CONFIG_MXC_AVIC) += avic.o 9obj-$(CONFIG_MXC_AVIC) += avic.o
11 10
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c
index 8875fb415f68..55f15699a383 100644
--- a/arch/arm/plat-mxc/avic.c
+++ b/arch/arm/plat-mxc/avic.c
@@ -22,6 +22,7 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <mach/common.h> 23#include <mach/common.h>
24#include <asm/mach/irq.h> 24#include <asm/mach/irq.h>
25#include <asm/exception.h>
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26 27
27#include "irq-common.h" 28#include "irq-common.h"
diff --git a/arch/arm/plat-mxc/gic.c b/arch/arm/plat-mxc/gic.c
deleted file mode 100644
index b3b8eed263b8..000000000000
--- a/arch/arm/plat-mxc/gic.c
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/io.h>
14#include <asm/exception.h>
15#include <asm/localtimer.h>
16#include <asm/hardware/gic.h>
17#ifdef CONFIG_SMP
18#include <asm/smp.h>
19#endif
20
21asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
22{
23 u32 irqstat, irqnr;
24
25 do {
26 irqstat = readl_relaxed(gic_cpu_base_addr + GIC_CPU_INTACK);
27 irqnr = irqstat & 0x3ff;
28 if (irqnr == 1023)
29 break;
30
31 if (irqnr > 29 && irqnr < 1021)
32 handle_IRQ(irqnr, regs);
33#ifdef CONFIG_SMP
34 else if (irqnr < 16) {
35 writel_relaxed(irqstat, gic_cpu_base_addr +
36 GIC_CPU_EOI);
37 handle_IPI(irqnr, regs);
38 }
39#endif
40#ifdef CONFIG_LOCAL_TIMERS
41 else if (irqnr == 29) {
42 writel_relaxed(irqstat, gic_cpu_base_addr +
43 GIC_CPU_EOI);
44 handle_local_timer(regs);
45 }
46#endif
47 } while (1);
48}
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 83b745a5e1b7..14b4703e6e46 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -90,7 +90,6 @@ extern void imx_print_silicon_rev(const char *cpu, int srev);
90 90
91void avic_handle_irq(struct pt_regs *); 91void avic_handle_irq(struct pt_regs *);
92void tzic_handle_irq(struct pt_regs *); 92void tzic_handle_irq(struct pt_regs *);
93void gic_handle_irq(struct pt_regs *);
94 93
95#define imx1_handle_irq avic_handle_irq 94#define imx1_handle_irq avic_handle_irq
96#define imx21_handle_irq avic_handle_irq 95#define imx21_handle_irq avic_handle_irq
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index 9fe0dfcf4e7e..def5d30cb67e 100644
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -9,22 +9,8 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11 11
12/* Unused, we use CONFIG_MULTI_IRQ_HANDLER */
13
14 .macro disable_fiq 12 .macro disable_fiq
15 .endm 13 .endm
16 14
17 .macro get_irqnr_preamble, base, tmp
18 .endm
19
20 .macro arch_ret_to_user, tmp1, tmp2 15 .macro arch_ret_to_user, tmp1, tmp2
21 .endm 16 .endm
22
23 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
24 .endm
25
26 .macro test_for_ipi, irqnr, irqstat, base, tmp
27 .endm
28
29 .macro test_for_ltirq, irqnr, irqstat, base, tmp
30 .endm
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
index e993a184189a..a3c164c7ba82 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/plat-mxc/tzic.c
@@ -17,6 +17,7 @@
17#include <linux/io.h> 17#include <linux/io.h>
18 18
19#include <asm/mach/irq.h> 19#include <asm/mach/irq.h>
20#include <asm/exception.h>
20 21
21#include <mach/hardware.h> 22#include <mach/hardware.h>
22#include <mach/common.h> 23#include <mach/common.h>
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index d3a9fcd53c45..ebda7382c65b 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -436,10 +436,6 @@
436#define INTCPS_NR_MIR_REGS 3 436#define INTCPS_NR_MIR_REGS 3
437#define INTCPS_NR_IRQS 96 437#define INTCPS_NR_IRQS 96
438 438
439#ifndef __ASSEMBLY__
440extern void __iomem *omap_irq_base;
441#endif
442
443#include <mach/hardware.h> 439#include <mach/hardware.h>
444 440
445#ifdef CONFIG_FIQ 441#ifdef CONFIG_FIQ
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 9b9968fa8695..8167ce66188c 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -11,6 +11,7 @@ config PLAT_S5P
11 default y 11 default y
12 select ARM_VIC if !ARCH_EXYNOS4 12 select ARM_VIC if !ARCH_EXYNOS4
13 select ARM_GIC if ARCH_EXYNOS4 13 select ARM_GIC if ARCH_EXYNOS4
14 select GIC_NON_BANKED if ARCH_EXYNOS4
14 select NO_IOPORT 15 select NO_IOPORT
15 select ARCH_REQUIRE_GPIOLIB 16 select ARCH_REQUIRE_GPIOLIB
16 select S3C_GPIO_TRACK 17 select S3C_GPIO_TRACK