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authorThomas Gleixner <tglx@linutronix.de>2013-07-04 17:11:22 -0400
committerThomas Gleixner <tglx@linutronix.de>2013-07-04 17:11:22 -0400
commit2b0f89317e99735bbf32eaede81f707f98ab1b5e (patch)
tree16daa236e21876b11f1c0b9256cd4046aadba020 /arch/arm
parent07bd1172902e782f288e4d44b1fde7dec0f08b6f (diff)
parentfa18f7bde3ad4568d1d343b60d963bfbd8dc3991 (diff)
Merge branch 'timers/posix-cpu-timers-for-tglx' of
git://git.kernel.org/pub/scm/linux/kernel/git/frederic/linux-dynticks into timers/core Frederic sayed: "Most of these patches have been hanging around for several month now, in -mmotm for a significant chunk. They already missed a few releases." Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig26
-rw-r--r--arch/arm/boot/compressed/Makefile5
-rw-r--r--arch/arm/boot/compressed/debug.S28
-rw-r--r--arch/arm/boot/compressed/head-sa1100.S1
-rw-r--r--arch/arm/boot/compressed/head-shark.S1
-rw-r--r--arch/arm/boot/compressed/head.S5
-rw-r--r--arch/arm/boot/dts/Makefile4
-rw-r--r--arch/arm/boot/dts/am33xx.dtsi4
-rw-r--r--arch/arm/boot/dts/armada-370-xp.dtsi3
-rw-r--r--arch/arm/boot/dts/armada-370.dtsi7
-rw-r--r--arch/arm/boot/dts/armada-xp-gp.dts4
-rw-r--r--arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts4
-rw-r--r--arch/arm/boot/dts/armada-xp.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi1
-rw-r--r--arch/arm/boot/dts/at91sam9x25ek.dts2
-rw-r--r--arch/arm/boot/dts/bcm2835.dtsi1
-rw-r--r--arch/arm/boot/dts/exynos5250-pinctrl.dtsi2
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi19
-rw-r--r--arch/arm/boot/dts/imx25.dtsi12
-rw-r--r--arch/arm/boot/dts/imx27.dtsi6
-rw-r--r--arch/arm/boot/dts/imx51.dtsi2
-rw-r--r--arch/arm/boot/dts/imx53.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3.dtsi2
-rw-r--r--arch/arm/boot/dts/omap4-panda-common.dtsi20
-rw-r--r--arch/arm/boot/dts/omap4-sdp.dts20
-rw-r--r--arch/arm/boot/dts/omap5.dtsi3
-rw-r--r--arch/arm/boot/dts/sama5d3.dtsi12
-rw-r--r--arch/arm/boot/dts/sama5d3xcm.dtsi4
-rw-r--r--arch/arm/boot/dts/ste-nomadik-s8815.dts12
-rw-r--r--arch/arm/boot/dts/sun4i-a10-mini-xplus.dts4
-rw-r--r--arch/arm/configs/exynos_defconfig54
-rw-r--r--arch/arm/configs/omap1_defconfig1
-rw-r--r--arch/arm/configs/omap2plus_defconfig2
-rw-r--r--arch/arm/configs/tegra_defconfig3
-rw-r--r--arch/arm/crypto/sha1-armv4-large.S2
-rw-r--r--arch/arm/include/asm/cacheflush.h4
-rw-r--r--arch/arm/include/asm/cputype.h2
-rw-r--r--arch/arm/include/asm/glue-proc.h9
-rw-r--r--arch/arm/include/asm/percpu.h11
-rw-r--r--arch/arm/include/asm/smp_plat.h2
-rw-r--r--arch/arm/include/asm/tlb.h27
-rw-r--r--arch/arm/include/debug/ux500.S6
-rw-r--r--arch/arm/kernel/devtree.c10
-rw-r--r--arch/arm/kernel/machine_kexec.c4
-rw-r--r--arch/arm/kernel/process.c44
-rw-r--r--arch/arm/kernel/setup.c2
-rw-r--r--arch/arm/kernel/smp.c15
-rw-r--r--arch/arm/kernel/topology.c2
-rw-r--r--arch/arm/kvm/arm.c15
-rw-r--r--arch/arm/kvm/mmu.c41
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c7
-rw-r--r--arch/arm/mach-at91/at91sam9n12.c6
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pmc.h6
-rw-r--r--arch/arm/mach-exynos/Kconfig3
-rw-r--r--arch/arm/mach-exynos/common.c41
-rw-r--r--arch/arm/mach-exynos/common.h2
-rw-r--r--arch/arm/mach-exynos/include/mach/pm-core.h14
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c5
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c15
-rw-r--r--arch/arm/mach-imx/headsmp.S12
-rw-r--r--arch/arm/mach-imx/platsmp.c14
-rw-r--r--arch/arm/mach-kirkwood/board-ts219.c10
-rw-r--r--arch/arm/mach-kirkwood/common.c6
-rw-r--r--arch/arm/mach-kirkwood/mpp.c5
-rw-r--r--arch/arm/mach-kirkwood/ts219-setup.c2
-rw-r--r--arch/arm/mach-mvebu/Kconfig1
-rw-r--r--arch/arm/mach-mvebu/armada-370-xp.c7
-rw-r--r--arch/arm/mach-mvebu/coherency_ll.S16
-rw-r--r--arch/arm/mach-omap1/dma.c1
-rw-r--r--arch/arm/mach-omap2/cclock33xx_data.c26
-rw-r--r--arch/arm/mach-omap2/clock36xx.c18
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c113
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.h7
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c3
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_data.c15
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c4
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c6
-rw-r--r--arch/arm/mach-omap2/pm34xx.c6
-rw-r--r--arch/arm/mach-omap2/serial.c31
-rw-r--r--arch/arm/mach-orion5x/common.c7
-rw-r--r--arch/arm/mach-prima2/pm.c6
-rw-r--r--arch/arm/mach-prima2/rstc.c6
-rw-r--r--arch/arm/mach-shmobile/board-marzen.c6
-rw-r--r--arch/arm/mach-shmobile/setup-sh73a0.c2
-rw-r--r--arch/arm/mach-sunxi/Kconfig1
-rw-r--r--arch/arm/mach-tegra/tegra2_emc.c5
-rw-r--r--arch/arm/mach-ux500/Kconfig1
-rw-r--r--arch/arm/mach-ux500/board-mop500-regulators.c3
-rw-r--r--arch/arm/mach-ux500/board-mop500.c6
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c6
-rw-r--r--arch/arm/mach-ux500/cpuidle.c4
-rw-r--r--arch/arm/mach-ux500/setup.h2
-rw-r--r--arch/arm/mach-vt8500/vt8500.c1
-rw-r--r--arch/arm/mm/cache-v7.S8
-rw-r--r--arch/arm/mm/flush.c33
-rw-r--r--arch/arm/mm/mmu.c8
-rw-r--r--arch/arm/mm/nommu.c6
-rw-r--r--arch/arm/mm/proc-fa526.S1
-rw-r--r--arch/arm/mm/proc-macros.S5
-rw-r--r--arch/arm/mm/proc-v7.S38
-rw-r--r--arch/arm/plat-orion/common.c12
-rw-r--r--arch/arm/plat-orion/include/plat/common.h1
-rw-r--r--arch/arm/plat-samsung/adc.c5
-rw-r--r--arch/arm/plat-samsung/devs.c6
-rw-r--r--arch/arm/plat-samsung/include/plat/uncompress.h10
-rw-r--r--arch/arm/plat-samsung/pm.c18
-rw-r--r--arch/arm/vfp/entry.S2
108 files changed, 705 insertions, 382 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 53d3a356f61f..b02e6bbc1b46 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1088,6 +1088,20 @@ if !MMU
1088source "arch/arm/Kconfig-nommu" 1088source "arch/arm/Kconfig-nommu"
1089endif 1089endif
1090 1090
1091config PJ4B_ERRATA_4742
1092 bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
1093 depends on CPU_PJ4B && MACH_ARMADA_370
1094 default y
1095 help
1096 When coming out of either a Wait for Interrupt (WFI) or a Wait for
1097 Event (WFE) IDLE states, a specific timing sensitivity exists between
1098 the retiring WFI/WFE instructions and the newly issued subsequent
1099 instructions. This sensitivity can result in a CPU hang scenario.
1100 Workaround:
1101 The software must insert either a Data Synchronization Barrier (DSB)
1102 or Data Memory Barrier (DMB) command immediately after the WFI/WFE
1103 instruction
1104
1091config ARM_ERRATA_326103 1105config ARM_ERRATA_326103
1092 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory" 1106 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1093 depends on CPU_V6 1107 depends on CPU_V6
@@ -1190,6 +1204,16 @@ config PL310_ERRATA_588369
1190 is not correctly implemented in PL310 as clean lines are not 1204 is not correctly implemented in PL310 as clean lines are not
1191 invalidated as a result of these operations. 1205 invalidated as a result of these operations.
1192 1206
1207config ARM_ERRATA_643719
1208 bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
1209 depends on CPU_V7 && SMP
1210 help
1211 This option enables the workaround for the 643719 Cortex-A9 (prior to
1212 r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
1213 register returns zero when it should return one. The workaround
1214 corrects this value, ensuring cache maintenance operations which use
1215 it behave as intended and avoiding data corruption.
1216
1193config ARM_ERRATA_720789 1217config ARM_ERRATA_720789
1194 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" 1218 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1195 depends on CPU_V7 1219 depends on CPU_V7
@@ -2007,7 +2031,7 @@ config XIP_PHYS_ADDR
2007 2031
2008config KEXEC 2032config KEXEC
2009 bool "Kexec system call (EXPERIMENTAL)" 2033 bool "Kexec system call (EXPERIMENTAL)"
2010 depends on (!SMP || HOTPLUG_CPU) 2034 depends on (!SMP || PM_SLEEP_SMP)
2011 help 2035 help
2012 kexec is a system call that implements the ability to shutdown your 2036 kexec is a system call that implements the ability to shutdown your
2013 current kernel, and to start another kernel. It is like a reboot 2037 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 3580d57ea218..120b83bfde20 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -116,7 +116,8 @@ targets := vmlinux vmlinux.lds \
116 116
117# Make sure files are removed during clean 117# Make sure files are removed during clean
118extra-y += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern \ 118extra-y += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern \
119 lib1funcs.S ashldi3.S $(libfdt) $(libfdt_hdrs) 119 lib1funcs.S ashldi3.S $(libfdt) $(libfdt_hdrs) \
120 hyp-stub.S
120 121
121ifeq ($(CONFIG_FUNCTION_TRACER),y) 122ifeq ($(CONFIG_FUNCTION_TRACER),y)
122ORIG_CFLAGS := $(KBUILD_CFLAGS) 123ORIG_CFLAGS := $(KBUILD_CFLAGS)
@@ -124,7 +125,7 @@ KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
124endif 125endif
125 126
126ccflags-y := -fpic -mno-single-pic-base -fno-builtin -I$(obj) 127ccflags-y := -fpic -mno-single-pic-base -fno-builtin -I$(obj)
127asflags-y := -Wa,-march=all -DZIMAGE 128asflags-y := -DZIMAGE
128 129
129# Supply kernel BSS size to the decompressor via a linker symbol. 130# Supply kernel BSS size to the decompressor via a linker symbol.
130KBSS_SZ = $(shell $(CROSS_COMPILE)size $(obj)/../../../../vmlinux | \ 131KBSS_SZ = $(shell $(CROSS_COMPILE)size $(obj)/../../../../vmlinux | \
diff --git a/arch/arm/boot/compressed/debug.S b/arch/arm/boot/compressed/debug.S
index 6e8382d5b7a4..5392ee63338f 100644
--- a/arch/arm/boot/compressed/debug.S
+++ b/arch/arm/boot/compressed/debug.S
@@ -1,6 +1,8 @@
1#include <linux/linkage.h> 1#include <linux/linkage.h>
2#include <asm/assembler.h> 2#include <asm/assembler.h>
3 3
4#ifndef CONFIG_DEBUG_SEMIHOSTING
5
4#include CONFIG_DEBUG_LL_INCLUDE 6#include CONFIG_DEBUG_LL_INCLUDE
5 7
6ENTRY(putc) 8ENTRY(putc)
@@ -10,3 +12,29 @@ ENTRY(putc)
10 busyuart r3, r1 12 busyuart r3, r1
11 mov pc, lr 13 mov pc, lr
12ENDPROC(putc) 14ENDPROC(putc)
15
16#else
17
18ENTRY(putc)
19 adr r1, 1f
20 ldmia r1, {r2, r3}
21 add r2, r2, r1
22 ldr r1, [r2, r3]
23 strb r0, [r1]
24 mov r0, #0x03 @ SYS_WRITEC
25 ARM( svc #0x123456 )
26 THUMB( svc #0xab )
27 mov pc, lr
28 .align 2
291: .word _GLOBAL_OFFSET_TABLE_ - .
30 .word semi_writec_buf(GOT)
31ENDPROC(putc)
32
33 .bss
34 .global semi_writec_buf
35 .type semi_writec_buf, %object
36semi_writec_buf:
37 .space 4
38 .size semi_writec_buf, 4
39
40#endif
diff --git a/arch/arm/boot/compressed/head-sa1100.S b/arch/arm/boot/compressed/head-sa1100.S
index 6179d94dd5c6..3115e313d9f6 100644
--- a/arch/arm/boot/compressed/head-sa1100.S
+++ b/arch/arm/boot/compressed/head-sa1100.S
@@ -11,6 +11,7 @@
11#include <asm/mach-types.h> 11#include <asm/mach-types.h>
12 12
13 .section ".start", "ax" 13 .section ".start", "ax"
14 .arch armv4
14 15
15__SA1100_start: 16__SA1100_start:
16 17
diff --git a/arch/arm/boot/compressed/head-shark.S b/arch/arm/boot/compressed/head-shark.S
index 089c560e07f1..92b56897ed64 100644
--- a/arch/arm/boot/compressed/head-shark.S
+++ b/arch/arm/boot/compressed/head-shark.S
@@ -18,6 +18,7 @@
18 18
19 .section ".start", "ax" 19 .section ".start", "ax"
20 20
21 .arch armv4
21 b __beginning 22 b __beginning
22 23
23__ofw_data: .long 0 @ the number of memory blocks 24__ofw_data: .long 0 @ the number of memory blocks
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index fe4d9c3ad761..032a8d987148 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -11,6 +11,7 @@
11#include <linux/linkage.h> 11#include <linux/linkage.h>
12#include <asm/assembler.h> 12#include <asm/assembler.h>
13 13
14 .arch armv7-a
14/* 15/*
15 * Debugging stuff 16 * Debugging stuff
16 * 17 *
@@ -805,8 +806,8 @@ call_cache_fn: adr r12, proc_types
805 .align 2 806 .align 2
806 .type proc_types,#object 807 .type proc_types,#object
807proc_types: 808proc_types:
808 .word 0x00000000 @ old ARM ID 809 .word 0x41000000 @ old ARM ID
809 .word 0x0000f000 810 .word 0xff00f000
810 mov pc, lr 811 mov pc, lr
811 THUMB( nop ) 812 THUMB( nop )
812 mov pc, lr 813 mov pc, lr
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b9f7121e6ecf..f0895c581a89 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -177,7 +177,9 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \
177 spear320-evb.dtb \ 177 spear320-evb.dtb \
178 spear320-hmi.dtb 178 spear320-hmi.dtb
179dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb 179dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
180dtb-$(CONFIG_ARCH_SUNXI) += sun4i-a10-cubieboard.dtb \ 180dtb-$(CONFIG_ARCH_SUNXI) += \
181 sun4i-a10-cubieboard.dtb \
182 sun4i-a10-mini-xplus.dtb \
181 sun4i-a10-hackberry.dtb \ 183 sun4i-a10-hackberry.dtb \
182 sun5i-a13-olinuxino.dtb 184 sun5i-a13-olinuxino.dtb
183dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ 185dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 1460d9b88adf..8e1248f01fab 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -409,8 +409,8 @@
409 ti,hwmods = "gpmc"; 409 ti,hwmods = "gpmc";
410 reg = <0x50000000 0x2000>; 410 reg = <0x50000000 0x2000>;
411 interrupts = <100>; 411 interrupts = <100>;
412 num-cs = <7>; 412 gpmc,num-cs = <7>;
413 num-waitpins = <2>; 413 gpmc,num-waitpins = <2>;
414 #address-cells = <2>; 414 #address-cells = <2>;
415 #size-cells = <1>; 415 #size-cells = <1>;
416 status = "disabled"; 416 status = "disabled";
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 272bbc65fab0..550eb772c30e 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -33,7 +33,8 @@
33 #size-cells = <1>; 33 #size-cells = <1>;
34 compatible = "simple-bus"; 34 compatible = "simple-bus";
35 interrupt-parent = <&mpic>; 35 interrupt-parent = <&mpic>;
36 ranges = <0 0 0xd0000000 0x100000>; 36 ranges = <0 0 0xd0000000 0x0100000 /* internal registers */
37 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>;
37 38
38 internal-regs { 39 internal-regs {
39 compatible = "simple-bus"; 40 compatible = "simple-bus";
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index b2c1b5af9749..aee2b1866ce2 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -29,7 +29,8 @@
29 }; 29 };
30 30
31 soc { 31 soc {
32 ranges = <0 0xd0000000 0x100000>; 32 ranges = <0 0xd0000000 0x0100000 /* internal registers */
33 0xe0000000 0xe0000000 0x8100000 /* PCIe */>;
33 internal-regs { 34 internal-regs {
34 system-controller@18200 { 35 system-controller@18200 {
35 compatible = "marvell,armada-370-xp-system-controller"; 36 compatible = "marvell,armada-370-xp-system-controller";
@@ -38,12 +39,12 @@
38 39
39 L2: l2-cache { 40 L2: l2-cache {
40 compatible = "marvell,aurora-outer-cache"; 41 compatible = "marvell,aurora-outer-cache";
41 reg = <0xd0008000 0x1000>; 42 reg = <0x08000 0x1000>;
42 cache-id-part = <0x100>; 43 cache-id-part = <0x100>;
43 wt-override; 44 wt-override;
44 }; 45 };
45 46
46 mpic: interrupt-controller@20000 { 47 interrupt-controller@20000 {
47 reg = <0x20a00 0x1d0>, <0x21870 0x58>; 48 reg = <0x20a00 0x1d0>, <0x21870 0x58>;
48 }; 49 };
49 50
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index 26ad06fc147e..76db557adbe7 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -39,6 +39,10 @@
39 }; 39 };
40 40
41 soc { 41 soc {
42 ranges = <0 0 0xd0000000 0x100000 /* Internal registers 1MiB */
43 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */
44 0xf0000000 0 0xf0000000 0x1000000 /* Device Bus, NOR 16MiB */>;
45
42 internal-regs { 46 internal-regs {
43 serial@12000 { 47 serial@12000 {
44 clock-frequency = <250000000>; 48 clock-frequency = <250000000>;
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index f14d36c46159..fdea75c73411 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -27,6 +27,10 @@
27 }; 27 };
28 28
29 soc { 29 soc {
30 ranges = <0 0 0xd0000000 0x100000 /* Internal registers 1MiB */
31 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */
32 0xf0000000 0 0xf0000000 0x8000000 /* Device Bus, NOR 128MiB */>;
33
30 internal-regs { 34 internal-regs {
31 serial@12000 { 35 serial@12000 {
32 clock-frequency = <250000000>; 36 clock-frequency = <250000000>;
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index bacab11c10dc..5b902f9a3af2 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -31,7 +31,7 @@
31 wt-override; 31 wt-override;
32 }; 32 };
33 33
34 mpic: interrupt-controller@20000 { 34 interrupt-controller@20000 {
35 reg = <0x20a00 0x2d0>, <0x21070 0x58>; 35 reg = <0x20a00 0x2d0>, <0x21070 0x58>;
36 }; 36 };
37 37
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 70b5ccbac234..84c4bef2d726 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -264,7 +264,7 @@
264 atmel,pins = 264 atmel,pins =
265 <0 10 0x2 0x0 /* PA10 periph B */ 265 <0 10 0x2 0x0 /* PA10 periph B */
266 0 11 0x2 0x0 /* PA11 periph B */ 266 0 11 0x2 0x0 /* PA11 periph B */
267 0 24 0x2 0x0 /* PA24 periph B */ 267 0 22 0x2 0x0 /* PA22 periph B */
268 0 25 0x2 0x0 /* PA25 periph B */ 268 0 25 0x2 0x0 /* PA25 periph B */
269 0 26 0x2 0x0 /* PA26 periph B */ 269 0 26 0x2 0x0 /* PA26 periph B */
270 0 27 0x2 0x0 /* PA27 periph B */ 270 0 27 0x2 0x0 /* PA27 periph B */
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 3de8e6dfbcb1..8d25f889928e 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -57,6 +57,7 @@
57 compatible = "atmel,at91rm9200-aic"; 57 compatible = "atmel,at91rm9200-aic";
58 interrupt-controller; 58 interrupt-controller;
59 reg = <0xfffff000 0x200>; 59 reg = <0xfffff000 0x200>;
60 atmel,external-irqs = <31>;
60 }; 61 };
61 62
62 ramc0: ramc@ffffe800 { 63 ramc0: ramc@ffffe800 {
diff --git a/arch/arm/boot/dts/at91sam9x25ek.dts b/arch/arm/boot/dts/at91sam9x25ek.dts
index 3b40d11d65e7..315250b4995e 100644
--- a/arch/arm/boot/dts/at91sam9x25ek.dts
+++ b/arch/arm/boot/dts/at91sam9x25ek.dts
@@ -11,7 +11,7 @@
11/include/ "at91sam9x5ek.dtsi" 11/include/ "at91sam9x5ek.dtsi"
12 12
13/ { 13/ {
14 model = "Atmel AT91SAM9G25-EK"; 14 model = "Atmel AT91SAM9X25-EK";
15 compatible = "atmel,at91sam9x25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; 15 compatible = "atmel,at91sam9x25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
16 16
17 ahb { 17 ahb {
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index f0052dccf9a8..1e12aeff403b 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -44,6 +44,7 @@
44 reg = <0x7e201000 0x1000>; 44 reg = <0x7e201000 0x1000>;
45 interrupts = <2 25>; 45 interrupts = <2 25>;
46 clock-frequency = <3000000>; 46 clock-frequency = <3000000>;
47 arm,primecell-periphid = <0x00241011>;
47 }; 48 };
48 49
49 gpio: gpio { 50 gpio: gpio {
diff --git a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
index d1650fb34c0a..ded558bb0f3b 100644
--- a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
@@ -763,7 +763,7 @@
763 }; 763 };
764 }; 764 };
765 765
766 pinctrl@03680000 { 766 pinctrl@03860000 {
767 gpz: gpz { 767 gpz: gpz {
768 gpio-controller; 768 gpio-controller;
769 #gpio-cells = <2>; 769 #gpio-cells = <2>;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 98dfc3ea5c0b..fc9fb3d526e2 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -161,9 +161,9 @@
161 interrupts = <0 50 0>; 161 interrupts = <0 50 0>;
162 }; 162 };
163 163
164 pinctrl_3: pinctrl@03680000 { 164 pinctrl_3: pinctrl@03860000 {
165 compatible = "samsung,exynos5250-pinctrl"; 165 compatible = "samsung,exynos5250-pinctrl";
166 reg = <0x0368000 0x1000>; 166 reg = <0x03860000 0x1000>;
167 interrupts = <0 47 0>; 167 interrupts = <0 47 0>;
168 }; 168 };
169 169
@@ -497,6 +497,21 @@
497 clock-names = "usbhost"; 497 clock-names = "usbhost";
498 }; 498 };
499 499
500 usbphy@12130000 {
501 compatible = "samsung,exynos5250-usb2phy";
502 reg = <0x12130000 0x100>;
503 clocks = <&clock 1>, <&clock 285>;
504 clock-names = "ext_xtal", "usbhost";
505 #address-cells = <1>;
506 #size-cells = <1>;
507 ranges;
508
509 usbphy-sys {
510 reg = <0x10040704 0x8>,
511 <0x10050230 0x4>;
512 };
513 };
514
500 amba { 515 amba {
501 #address-cells = <1>; 516 #address-cells = <1>;
502 #size-cells = <1>; 517 #size-cells = <1>;
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index d2550e0bca24..701153992c69 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -141,8 +141,8 @@
141 #size-cells = <0>; 141 #size-cells = <0>;
142 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 142 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
143 reg = <0x43fa4000 0x4000>; 143 reg = <0x43fa4000 0x4000>;
144 clocks = <&clks 62>; 144 clocks = <&clks 62>, <&clks 62>;
145 clock-names = "ipg"; 145 clock-names = "ipg", "per";
146 interrupts = <14>; 146 interrupts = <14>;
147 status = "disabled"; 147 status = "disabled";
148 }; 148 };
@@ -182,8 +182,8 @@
182 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 182 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
183 reg = <0x50004000 0x4000>; 183 reg = <0x50004000 0x4000>;
184 interrupts = <0>; 184 interrupts = <0>;
185 clocks = <&clks 80>; 185 clocks = <&clks 80>, <&clks 80>;
186 clock-names = "ipg"; 186 clock-names = "ipg", "per";
187 status = "disabled"; 187 status = "disabled";
188 }; 188 };
189 189
@@ -210,8 +210,8 @@
210 #size-cells = <0>; 210 #size-cells = <0>;
211 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 211 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
212 reg = <0x50010000 0x4000>; 212 reg = <0x50010000 0x4000>;
213 clocks = <&clks 79>; 213 clocks = <&clks 79>, <&clks 79>;
214 clock-names = "ipg"; 214 clock-names = "ipg", "per";
215 interrupts = <13>; 215 interrupts = <13>;
216 status = "disabled"; 216 status = "disabled";
217 }; 217 };
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index ff4bd4873edf..75bd11386516 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -131,7 +131,7 @@
131 compatible = "fsl,imx27-cspi"; 131 compatible = "fsl,imx27-cspi";
132 reg = <0x1000e000 0x1000>; 132 reg = <0x1000e000 0x1000>;
133 interrupts = <16>; 133 interrupts = <16>;
134 clocks = <&clks 53>, <&clks 0>; 134 clocks = <&clks 53>, <&clks 53>;
135 clock-names = "ipg", "per"; 135 clock-names = "ipg", "per";
136 status = "disabled"; 136 status = "disabled";
137 }; 137 };
@@ -142,7 +142,7 @@
142 compatible = "fsl,imx27-cspi"; 142 compatible = "fsl,imx27-cspi";
143 reg = <0x1000f000 0x1000>; 143 reg = <0x1000f000 0x1000>;
144 interrupts = <15>; 144 interrupts = <15>;
145 clocks = <&clks 52>, <&clks 0>; 145 clocks = <&clks 52>, <&clks 52>;
146 clock-names = "ipg", "per"; 146 clock-names = "ipg", "per";
147 status = "disabled"; 147 status = "disabled";
148 }; 148 };
@@ -223,7 +223,7 @@
223 compatible = "fsl,imx27-cspi"; 223 compatible = "fsl,imx27-cspi";
224 reg = <0x10017000 0x1000>; 224 reg = <0x10017000 0x1000>;
225 interrupts = <6>; 225 interrupts = <6>;
226 clocks = <&clks 51>, <&clks 0>; 226 clocks = <&clks 51>, <&clks 51>;
227 clock-names = "ipg", "per"; 227 clock-names = "ipg", "per";
228 status = "disabled"; 228 status = "disabled";
229 }; 229 };
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 21bb786c5b31..53fdde69bbf4 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -631,7 +631,7 @@
631 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; 631 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
632 reg = <0x83fc0000 0x4000>; 632 reg = <0x83fc0000 0x4000>;
633 interrupts = <38>; 633 interrupts = <38>;
634 clocks = <&clks 55>, <&clks 0>; 634 clocks = <&clks 55>, <&clks 55>;
635 clock-names = "ipg", "per"; 635 clock-names = "ipg", "per";
636 status = "disabled"; 636 status = "disabled";
637 }; 637 };
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 845982eaac22..eb83aa039b8b 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -714,7 +714,7 @@
714 compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; 714 compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
715 reg = <0x63fc0000 0x4000>; 715 reg = <0x63fc0000 0x4000>;
716 interrupts = <38>; 716 interrupts = <38>;
717 clocks = <&clks 55>, <&clks 0>; 717 clocks = <&clks 55>, <&clks 55>;
718 clock-names = "ipg", "per"; 718 clock-names = "ipg", "per";
719 status = "disabled"; 719 status = "disabled";
720 }; 720 };
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 82a404da1c0d..99ba6e14ebf3 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -516,7 +516,7 @@
516 usb_otg_hs: usb_otg_hs@480ab000 { 516 usb_otg_hs: usb_otg_hs@480ab000 {
517 compatible = "ti,omap3-musb"; 517 compatible = "ti,omap3-musb";
518 reg = <0x480ab000 0x1000>; 518 reg = <0x480ab000 0x1000>;
519 interrupts = <0 92 0x4>, <0 93 0x4>; 519 interrupts = <92>, <93>;
520 interrupt-names = "mc", "dma"; 520 interrupt-names = "mc", "dma";
521 ti,hwmods = "usb_otg_hs"; 521 ti,hwmods = "usb_otg_hs";
522 multipoint = <1>; 522 multipoint = <1>;
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index 03bd60deb52b..eeb734e25709 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -56,9 +56,23 @@
56 }; 56 };
57}; 57};
58 58
59&omap4_pmx_wkup {
60 pinctrl-names = "default";
61 pinctrl-0 = <
62 &twl6030_wkup_pins
63 >;
64
65 twl6030_wkup_pins: pinmux_twl6030_wkup_pins {
66 pinctrl-single,pins = <
67 0x14 0x2 /* fref_clk0_out.sys_drm_msecure OUTPUT | MODE2 */
68 >;
69 };
70};
71
59&omap4_pmx_core { 72&omap4_pmx_core {
60 pinctrl-names = "default"; 73 pinctrl-names = "default";
61 pinctrl-0 = < 74 pinctrl-0 = <
75 &twl6030_pins
62 &twl6040_pins 76 &twl6040_pins
63 &mcpdm_pins 77 &mcpdm_pins
64 &mcbsp1_pins 78 &mcbsp1_pins
@@ -66,6 +80,12 @@
66 &tpd12s015_pins 80 &tpd12s015_pins
67 >; 81 >;
68 82
83 twl6030_pins: pinmux_twl6030_pins {
84 pinctrl-single,pins = <
85 0x15e 0x4118 /* sys_nirq1.sys_nirq1 OMAP_WAKEUP_EN | INPUT_PULLUP | MODE0 */
86 >;
87 };
88
69 twl6040_pins: pinmux_twl6040_pins { 89 twl6040_pins: pinmux_twl6040_pins {
70 pinctrl-single,pins = < 90 pinctrl-single,pins = <
71 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */ 91 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index a35d9cd58063..98505a2ef162 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -142,9 +142,23 @@
142 }; 142 };
143}; 143};
144 144
145&omap4_pmx_wkup {
146 pinctrl-names = "default";
147 pinctrl-0 = <
148 &twl6030_wkup_pins
149 >;
150
151 twl6030_wkup_pins: pinmux_twl6030_wkup_pins {
152 pinctrl-single,pins = <
153 0x14 0x2 /* fref_clk0_out.sys_drm_msecure OUTPUT | MODE2 */
154 >;
155 };
156};
157
145&omap4_pmx_core { 158&omap4_pmx_core {
146 pinctrl-names = "default"; 159 pinctrl-names = "default";
147 pinctrl-0 = < 160 pinctrl-0 = <
161 &twl6030_pins
148 &twl6040_pins 162 &twl6040_pins
149 &mcpdm_pins 163 &mcpdm_pins
150 &dmic_pins 164 &dmic_pins
@@ -179,6 +193,12 @@
179 >; 193 >;
180 }; 194 };
181 195
196 twl6030_pins: pinmux_twl6030_pins {
197 pinctrl-single,pins = <
198 0x15e 0x4118 /* sys_nirq1.sys_nirq1 OMAP_WAKEUP_EN | INPUT_PULLUP | MODE0 */
199 >;
200 };
201
182 twl6040_pins: pinmux_twl6040_pins { 202 twl6040_pins: pinmux_twl6040_pins {
183 pinctrl-single,pins = < 203 pinctrl-single,pins = <
184 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */ 204 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 3dd7ff825828..635cae283011 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -538,6 +538,7 @@
538 interrupts = <0 41 0x4>; 538 interrupts = <0 41 0x4>;
539 ti,hwmods = "timer5"; 539 ti,hwmods = "timer5";
540 ti,timer-dsp; 540 ti,timer-dsp;
541 ti,timer-pwm;
541 }; 542 };
542 543
543 timer6: timer@4013a000 { 544 timer6: timer@4013a000 {
@@ -574,6 +575,7 @@
574 reg = <0x4803e000 0x80>; 575 reg = <0x4803e000 0x80>;
575 interrupts = <0 45 0x4>; 576 interrupts = <0 45 0x4>;
576 ti,hwmods = "timer9"; 577 ti,hwmods = "timer9";
578 ti,timer-pwm;
577 }; 579 };
578 580
579 timer10: timer@48086000 { 581 timer10: timer@48086000 {
@@ -581,6 +583,7 @@
581 reg = <0x48086000 0x80>; 583 reg = <0x48086000 0x80>;
582 interrupts = <0 46 0x4>; 584 interrupts = <0 46 0x4>;
583 ti,hwmods = "timer10"; 585 ti,hwmods = "timer10";
586 ti,timer-pwm;
584 }; 587 };
585 588
586 timer11: timer@48088000 { 589 timer11: timer@48088000 {
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 2e643ea51cce..5000e0d42849 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -75,11 +75,6 @@
75 compatible = "atmel,at91sam9x5-spi"; 75 compatible = "atmel,at91sam9x5-spi";
76 reg = <0xf0004000 0x100>; 76 reg = <0xf0004000 0x100>;
77 interrupts = <24 4 3>; 77 interrupts = <24 4 3>;
78 cs-gpios = <&pioD 13 0
79 &pioD 14 0 /* conflicts with SCK0 and CANRX0 */
80 &pioD 15 0 /* conflicts with CTS0 and CANTX0 */
81 &pioD 16 0 /* conflicts with RTS0 and PWMFI3 */
82 >;
83 pinctrl-names = "default"; 78 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_spi0>; 79 pinctrl-0 = <&pinctrl_spi0>;
85 status = "disabled"; 80 status = "disabled";
@@ -156,7 +151,7 @@
156 }; 151 };
157 152
158 macb0: ethernet@f0028000 { 153 macb0: ethernet@f0028000 {
159 compatible = "cnds,pc302-gem", "cdns,gem"; 154 compatible = "cdns,pc302-gem", "cdns,gem";
160 reg = <0xf0028000 0x100>; 155 reg = <0xf0028000 0x100>;
161 interrupts = <34 4 3>; 156 interrupts = <34 4 3>;
162 pinctrl-names = "default"; 157 pinctrl-names = "default";
@@ -203,11 +198,6 @@
203 compatible = "atmel,at91sam9x5-spi"; 198 compatible = "atmel,at91sam9x5-spi";
204 reg = <0xf8008000 0x100>; 199 reg = <0xf8008000 0x100>;
205 interrupts = <25 4 3>; 200 interrupts = <25 4 3>;
206 cs-gpios = <&pioC 25 0
207 &pioC 26 0 /* conflitcs with TWD1 and ISI_D11 */
208 &pioC 27 0 /* conflitcs with TWCK1 and ISI_D10 */
209 &pioC 28 0 /* conflitcs with PWMFI0 and ISI_D9 */
210 >;
211 pinctrl-names = "default"; 201 pinctrl-names = "default";
212 pinctrl-0 = <&pinctrl_spi1>; 202 pinctrl-0 = <&pinctrl_spi1>;
213 status = "disabled"; 203 status = "disabled";
diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi
index 1f8ed404626c..b336e7787cb3 100644
--- a/arch/arm/boot/dts/sama5d3xcm.dtsi
+++ b/arch/arm/boot/dts/sama5d3xcm.dtsi
@@ -32,6 +32,10 @@
32 32
33 ahb { 33 ahb {
34 apb { 34 apb {
35 spi0: spi@f0004000 {
36 cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
37 };
38
35 macb0: ethernet@f0028000 { 39 macb0: ethernet@f0028000 {
36 phy-mode = "rgmii"; 40 phy-mode = "rgmii";
37 }; 41 };
diff --git a/arch/arm/boot/dts/ste-nomadik-s8815.dts b/arch/arm/boot/dts/ste-nomadik-s8815.dts
index b28fbf3408e3..6f82d9368948 100644
--- a/arch/arm/boot/dts/ste-nomadik-s8815.dts
+++ b/arch/arm/boot/dts/ste-nomadik-s8815.dts
@@ -14,13 +14,19 @@
14 bootargs = "root=/dev/ram0 console=ttyAMA1,115200n8 earlyprintk"; 14 bootargs = "root=/dev/ram0 console=ttyAMA1,115200n8 earlyprintk";
15 }; 15 };
16 16
17 /* This is where the interrupt is routed on the S8815 board */
18 external-bus@34000000 {
19 ethernet@300 {
20 interrupt-parent = <&gpio3>;
21 interrupts = <8 0x1>;
22 };
23 };
24
17 /* Custom board node with GPIO pins to active etc */ 25 /* Custom board node with GPIO pins to active etc */
18 usb-s8815 { 26 usb-s8815 {
19 /* The S8815 is using this very GPIO pin for the SMSC91x IRQs */ 27 /* The S8815 is using this very GPIO pin for the SMSC91x IRQs */
20 ethernet-gpio { 28 ethernet-gpio {
21 gpios = <&gpio3 19 0x1>; 29 gpios = <&gpio3 8 0x1>;
22 interrupts = <19 0x1>;
23 interrupt-parent = <&gpio3>;
24 }; 30 };
25 /* This will bias the MMC/SD card detect line */ 31 /* This will bias the MMC/SD card detect line */
26 mmcsd-gpio { 32 mmcsd-gpio {
diff --git a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
index 4a7c35d6726a..078ed7f618d7 100644
--- a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
+++ b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
@@ -22,8 +22,8 @@
22 bootargs = "earlyprintk console=ttyS0,115200"; 22 bootargs = "earlyprintk console=ttyS0,115200";
23 }; 23 };
24 24
25 soc { 25 soc@01c20000 {
26 uart0: uart@01c28000 { 26 uart0: serial@01c28000 {
27 pinctrl-names = "default"; 27 pinctrl-names = "default";
28 pinctrl-0 = <&uart0_pins_a>; 28 pinctrl-0 = <&uart0_pins_a>;
29 status = "okay"; 29 status = "okay";
diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig
index e40b435d204e..227abf9cc601 100644
--- a/arch/arm/configs/exynos_defconfig
+++ b/arch/arm/configs/exynos_defconfig
@@ -1,4 +1,4 @@
1CONFIG_EXPERIMENTAL=y 1CONFIG_SYSVIPC=y
2CONFIG_NO_HZ=y 2CONFIG_NO_HZ=y
3CONFIG_HIGH_RES_TIMERS=y 3CONFIG_HIGH_RES_TIMERS=y
4CONFIG_BLK_DEV_INITRD=y 4CONFIG_BLK_DEV_INITRD=y
@@ -7,17 +7,18 @@ CONFIG_MODULES=y
7CONFIG_MODULE_UNLOAD=y 7CONFIG_MODULE_UNLOAD=y
8# CONFIG_BLK_DEV_BSG is not set 8# CONFIG_BLK_DEV_BSG is not set
9CONFIG_PARTITION_ADVANCED=y 9CONFIG_PARTITION_ADVANCED=y
10CONFIG_EFI_PARTITION=y
11CONFIG_ARCH_EXYNOS=y 10CONFIG_ARCH_EXYNOS=y
12CONFIG_S3C_LOWLEVEL_UART_PORT=1 11CONFIG_S3C_LOWLEVEL_UART_PORT=3
13CONFIG_S3C24XX_PWM=y 12CONFIG_S3C24XX_PWM=y
14CONFIG_ARCH_EXYNOS5=y 13CONFIG_ARCH_EXYNOS5=y
15CONFIG_MACH_EXYNOS4_DT=y 14CONFIG_MACH_EXYNOS4_DT=y
16CONFIG_MACH_EXYNOS5_DT=y
17CONFIG_SMP=y 15CONFIG_SMP=y
18CONFIG_NR_CPUS=2 16CONFIG_NR_CPUS=2
19CONFIG_PREEMPT=y 17CONFIG_PREEMPT=y
20CONFIG_AEABI=y 18CONFIG_AEABI=y
19CONFIG_HIGHMEM=y
20CONFIG_ZBOOT_ROM_TEXT=0x0
21CONFIG_ZBOOT_ROM_BSS=0x0
21CONFIG_ARM_APPENDED_DTB=y 22CONFIG_ARM_APPENDED_DTB=y
22CONFIG_ARM_ATAG_DTB_COMPAT=y 23CONFIG_ARM_ATAG_DTB_COMPAT=y
23CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc mem=256M" 24CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc mem=256M"
@@ -30,35 +31,58 @@ CONFIG_NET_KEY=y
30CONFIG_INET=y 31CONFIG_INET=y
31CONFIG_RFKILL_REGULATOR=y 32CONFIG_RFKILL_REGULATOR=y
32CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 33CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
34CONFIG_DEVTMPFS=y
35CONFIG_DEVTMPFS_MOUNT=y
33CONFIG_PROC_DEVICETREE=y 36CONFIG_PROC_DEVICETREE=y
34CONFIG_BLK_DEV_LOOP=y 37CONFIG_BLK_DEV_LOOP=y
38CONFIG_BLK_DEV_CRYPTOLOOP=y
35CONFIG_BLK_DEV_RAM=y 39CONFIG_BLK_DEV_RAM=y
36CONFIG_BLK_DEV_RAM_SIZE=8192 40CONFIG_BLK_DEV_RAM_SIZE=8192
37CONFIG_SCSI=y 41CONFIG_SCSI=y
38CONFIG_BLK_DEV_SD=y 42CONFIG_BLK_DEV_SD=y
39CONFIG_CHR_DEV_SG=y 43CONFIG_CHR_DEV_SG=y
44CONFIG_MD=y
45CONFIG_BLK_DEV_DM=y
46CONFIG_DM_CRYPT=m
40CONFIG_NETDEVICES=y 47CONFIG_NETDEVICES=y
41CONFIG_SMSC911X=y 48CONFIG_SMSC911X=y
42CONFIG_USB_USBNET=y 49CONFIG_USB_USBNET=y
43CONFIG_USB_NET_SMSC75XX=y 50CONFIG_USB_NET_SMSC75XX=y
44CONFIG_USB_NET_SMSC95XX=y 51CONFIG_USB_NET_SMSC95XX=y
45CONFIG_INPUT_EVDEV=y 52CONFIG_INPUT_EVDEV=y
46# CONFIG_INPUT_KEYBOARD is not set 53CONFIG_KEYBOARD_CROS_EC=y
47# CONFIG_INPUT_MOUSE is not set 54# CONFIG_MOUSE_PS2 is not set
55CONFIG_MOUSE_CYAPA=y
48CONFIG_INPUT_TOUCHSCREEN=y 56CONFIG_INPUT_TOUCHSCREEN=y
49CONFIG_SERIAL_8250=y 57CONFIG_SERIAL_8250=y
50CONFIG_SERIAL_SAMSUNG=y 58CONFIG_SERIAL_SAMSUNG=y
51CONFIG_SERIAL_SAMSUNG_CONSOLE=y 59CONFIG_SERIAL_SAMSUNG_CONSOLE=y
52CONFIG_SERIAL_OF_PLATFORM=y 60CONFIG_SERIAL_OF_PLATFORM=y
53CONFIG_HW_RANDOM=y 61CONFIG_HW_RANDOM=y
62CONFIG_TCG_TPM=y
63CONFIG_TCG_TIS_I2C_INFINEON=y
54CONFIG_I2C=y 64CONFIG_I2C=y
65CONFIG_I2C_MUX=y
66CONFIG_I2C_ARB_GPIO_CHALLENGE=y
67CONFIG_I2C_S3C2410=y
68CONFIG_DEBUG_GPIO=y
55# CONFIG_HWMON is not set 69# CONFIG_HWMON is not set
70CONFIG_MFD_CROS_EC=y
71CONFIG_MFD_CROS_EC_I2C=y
72CONFIG_MFD_MAX77686=y
73CONFIG_MFD_MAX8997=y
74CONFIG_MFD_SEC_CORE=y
56CONFIG_MFD_TPS65090=y 75CONFIG_MFD_TPS65090=y
57CONFIG_REGULATOR=y 76CONFIG_REGULATOR=y
58CONFIG_REGULATOR_FIXED_VOLTAGE=y 77CONFIG_REGULATOR_FIXED_VOLTAGE=y
59CONFIG_REGULATOR_GPIO=y 78CONFIG_REGULATOR_GPIO=y
79CONFIG_REGULATOR_MAX8997=y
80CONFIG_REGULATOR_MAX77686=y
81CONFIG_REGULATOR_S5M8767=y
60CONFIG_REGULATOR_TPS65090=y 82CONFIG_REGULATOR_TPS65090=y
61CONFIG_FB=y 83CONFIG_FB=y
84CONFIG_FB_MODE_HELPERS=y
85CONFIG_FB_SIMPLE=y
62CONFIG_EXYNOS_VIDEO=y 86CONFIG_EXYNOS_VIDEO=y
63CONFIG_EXYNOS_MIPI_DSI=y 87CONFIG_EXYNOS_MIPI_DSI=y
64CONFIG_EXYNOS_DP=y 88CONFIG_EXYNOS_DP=y
@@ -67,6 +91,20 @@ CONFIG_FONTS=y
67CONFIG_FONT_7x14=y 91CONFIG_FONT_7x14=y
68CONFIG_LOGO=y 92CONFIG_LOGO=y
69CONFIG_USB=y 93CONFIG_USB=y
94CONFIG_USB_EHCI_HCD=y
95CONFIG_USB_EHCI_S5P=y
96CONFIG_USB_STORAGE=y
97CONFIG_USB_DWC3=y
98CONFIG_USB_PHY=y
99CONFIG_SAMSUNG_USB2PHY=y
100CONFIG_SAMSUNG_USB3PHY=y
101CONFIG_MMC=y
102CONFIG_MMC_SDHCI=y
103CONFIG_MMC_SDHCI_S3C=y
104CONFIG_MMC_DW=y
105CONFIG_MMC_DW_IDMAC=y
106CONFIG_MMC_DW_EXYNOS=y
107CONFIG_COMMON_CLK_MAX77686=y
70CONFIG_EXT2_FS=y 108CONFIG_EXT2_FS=y
71CONFIG_EXT3_FS=y 109CONFIG_EXT3_FS=y
72CONFIG_EXT4_FS=y 110CONFIG_EXT4_FS=y
@@ -79,6 +117,7 @@ CONFIG_ROMFS_FS=y
79CONFIG_NLS_CODEPAGE_437=y 117CONFIG_NLS_CODEPAGE_437=y
80CONFIG_NLS_ASCII=y 118CONFIG_NLS_ASCII=y
81CONFIG_NLS_ISO8859_1=y 119CONFIG_NLS_ISO8859_1=y
120CONFIG_PRINTK_TIME=y
82CONFIG_MAGIC_SYSRQ=y 121CONFIG_MAGIC_SYSRQ=y
83CONFIG_DEBUG_KERNEL=y 122CONFIG_DEBUG_KERNEL=y
84CONFIG_DETECT_HUNG_TASK=y 123CONFIG_DETECT_HUNG_TASK=y
@@ -87,6 +126,5 @@ CONFIG_DEBUG_SPINLOCK=y
87CONFIG_DEBUG_MUTEXES=y 126CONFIG_DEBUG_MUTEXES=y
88CONFIG_DEBUG_INFO=y 127CONFIG_DEBUG_INFO=y
89CONFIG_DEBUG_USER=y 128CONFIG_DEBUG_USER=y
90CONFIG_DEBUG_LL=y 129CONFIG_CRYPTO_SHA256=y
91CONFIG_EARLY_PRINTK=y
92CONFIG_CRC_CCITT=y 130CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig
index 7e0ebb64a7f9..9940f7b4e438 100644
--- a/arch/arm/configs/omap1_defconfig
+++ b/arch/arm/configs/omap1_defconfig
@@ -199,7 +199,6 @@ CONFIG_USB_PHY=y
199CONFIG_USB_DEBUG=y 199CONFIG_USB_DEBUG=y
200CONFIG_USB_DEVICEFS=y 200CONFIG_USB_DEVICEFS=y
201# CONFIG_USB_DEVICE_CLASS is not set 201# CONFIG_USB_DEVICE_CLASS is not set
202CONFIG_USB_SUSPEND=y
203CONFIG_USB_MON=y 202CONFIG_USB_MON=y
204CONFIG_USB_OHCI_HCD=y 203CONFIG_USB_OHCI_HCD=y
205CONFIG_USB_STORAGE=y 204CONFIG_USB_STORAGE=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index c1ef64bc5abd..abbe31937c65 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -20,6 +20,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
20CONFIG_MODVERSIONS=y 20CONFIG_MODVERSIONS=y
21CONFIG_MODULE_SRCVERSION_ALL=y 21CONFIG_MODULE_SRCVERSION_ALL=y
22# CONFIG_BLK_DEV_BSG is not set 22# CONFIG_BLK_DEV_BSG is not set
23CONFIG_ARCH_MULTI_V6=y
23CONFIG_ARCH_OMAP2PLUS=y 24CONFIG_ARCH_OMAP2PLUS=y
24CONFIG_OMAP_RESET_CLOCKS=y 25CONFIG_OMAP_RESET_CLOCKS=y
25CONFIG_OMAP_MUX_DEBUG=y 26CONFIG_OMAP_MUX_DEBUG=y
@@ -204,7 +205,6 @@ CONFIG_USB=y
204CONFIG_USB_DEBUG=y 205CONFIG_USB_DEBUG=y
205CONFIG_USB_ANNOUNCE_NEW_DEVICES=y 206CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
206CONFIG_USB_DEVICEFS=y 207CONFIG_USB_DEVICEFS=y
207CONFIG_USB_SUSPEND=y
208CONFIG_USB_MON=y 208CONFIG_USB_MON=y
209CONFIG_USB_WDM=y 209CONFIG_USB_WDM=y
210CONFIG_USB_STORAGE=y 210CONFIG_USB_STORAGE=y
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index a5f0485133cf..f7ba316164d4 100644
--- a/arch/arm/configs/tegra_defconfig
+++ b/arch/arm/configs/tegra_defconfig
@@ -153,6 +153,7 @@ CONFIG_MEDIA_CAMERA_SUPPORT=y
153CONFIG_MEDIA_USB_SUPPORT=y 153CONFIG_MEDIA_USB_SUPPORT=y
154CONFIG_USB_VIDEO_CLASS=m 154CONFIG_USB_VIDEO_CLASS=m
155CONFIG_DRM=y 155CONFIG_DRM=y
156CONFIG_TEGRA_HOST1X=y
156CONFIG_DRM_TEGRA=y 157CONFIG_DRM_TEGRA=y
157CONFIG_BACKLIGHT_LCD_SUPPORT=y 158CONFIG_BACKLIGHT_LCD_SUPPORT=y
158# CONFIG_LCD_CLASS_DEVICE is not set 159# CONFIG_LCD_CLASS_DEVICE is not set
@@ -202,7 +203,7 @@ CONFIG_TEGRA20_APB_DMA=y
202CONFIG_STAGING=y 203CONFIG_STAGING=y
203CONFIG_SENSORS_ISL29018=y 204CONFIG_SENSORS_ISL29018=y
204CONFIG_SENSORS_ISL29028=y 205CONFIG_SENSORS_ISL29028=y
205CONFIG_SENSORS_AK8975=y 206CONFIG_AK8975=y
206CONFIG_MFD_NVEC=y 207CONFIG_MFD_NVEC=y
207CONFIG_KEYBOARD_NVEC=y 208CONFIG_KEYBOARD_NVEC=y
208CONFIG_SERIO_NVEC_PS2=y 209CONFIG_SERIO_NVEC_PS2=y
diff --git a/arch/arm/crypto/sha1-armv4-large.S b/arch/arm/crypto/sha1-armv4-large.S
index 92c6eed7aac9..99207c45ec10 100644
--- a/arch/arm/crypto/sha1-armv4-large.S
+++ b/arch/arm/crypto/sha1-armv4-large.S
@@ -195,6 +195,7 @@ ENTRY(sha1_block_data_order)
195 add r3,r3,r10 @ E+=F_00_19(B,C,D) 195 add r3,r3,r10 @ E+=F_00_19(B,C,D)
196 cmp r14,sp 196 cmp r14,sp
197 bne .L_00_15 @ [((11+4)*5+2)*3] 197 bne .L_00_15 @ [((11+4)*5+2)*3]
198 sub sp,sp,#25*4
198#if __ARM_ARCH__<7 199#if __ARM_ARCH__<7
199 ldrb r10,[r1,#2] 200 ldrb r10,[r1,#2]
200 ldrb r9,[r1,#3] 201 ldrb r9,[r1,#3]
@@ -290,7 +291,6 @@ ENTRY(sha1_block_data_order)
290 add r3,r3,r10 @ E+=F_00_19(B,C,D) 291 add r3,r3,r10 @ E+=F_00_19(B,C,D)
291 292
292 ldr r8,.LK_20_39 @ [+15+16*4] 293 ldr r8,.LK_20_39 @ [+15+16*4]
293 sub sp,sp,#25*4
294 cmn sp,#0 @ [+3], clear carry to denote 20_39 294 cmn sp,#0 @ [+3], clear carry to denote 20_39
295.L_20_39_or_60_79: 295.L_20_39_or_60_79:
296 ldr r9,[r14,#15*4] 296 ldr r9,[r14,#15*4]
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index bff71388e72a..17d0ae8672fa 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -320,9 +320,7 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
320} 320}
321 321
322#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE 322#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
323static inline void flush_kernel_dcache_page(struct page *page) 323extern void flush_kernel_dcache_page(struct page *);
324{
325}
326 324
327#define flush_dcache_mmap_lock(mapping) \ 325#define flush_dcache_mmap_lock(mapping) \
328 spin_lock_irq(&(mapping)->tree_lock) 326 spin_lock_irq(&(mapping)->tree_lock)
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index 7652712d1d14..dba62cb1ad08 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -32,6 +32,8 @@
32 32
33#define MPIDR_HWID_BITMASK 0xFFFFFF 33#define MPIDR_HWID_BITMASK 0xFFFFFF
34 34
35#define MPIDR_INVALID (~MPIDR_HWID_BITMASK)
36
35#define MPIDR_LEVEL_BITS 8 37#define MPIDR_LEVEL_BITS 8
36#define MPIDR_LEVEL_MASK ((1 << MPIDR_LEVEL_BITS) - 1) 38#define MPIDR_LEVEL_MASK ((1 << MPIDR_LEVEL_BITS) - 1)
37 39
diff --git a/arch/arm/include/asm/glue-proc.h b/arch/arm/include/asm/glue-proc.h
index ac1dd54724b6..8017e94acc5e 100644
--- a/arch/arm/include/asm/glue-proc.h
+++ b/arch/arm/include/asm/glue-proc.h
@@ -230,6 +230,15 @@
230# endif 230# endif
231#endif 231#endif
232 232
233#ifdef CONFIG_CPU_PJ4B
234# ifdef CPU_NAME
235# undef MULTI_CPU
236# define MULTI_CPU
237# else
238# define CPU_NAME cpu_pj4b
239# endif
240#endif
241
233#ifndef MULTI_CPU 242#ifndef MULTI_CPU
234#define cpu_proc_init __glue(CPU_NAME,_proc_init) 243#define cpu_proc_init __glue(CPU_NAME,_proc_init)
235#define cpu_proc_fin __glue(CPU_NAME,_proc_fin) 244#define cpu_proc_fin __glue(CPU_NAME,_proc_fin)
diff --git a/arch/arm/include/asm/percpu.h b/arch/arm/include/asm/percpu.h
index 968c0a14e0a3..209e6504922e 100644
--- a/arch/arm/include/asm/percpu.h
+++ b/arch/arm/include/asm/percpu.h
@@ -30,8 +30,15 @@ static inline void set_my_cpu_offset(unsigned long off)
30static inline unsigned long __my_cpu_offset(void) 30static inline unsigned long __my_cpu_offset(void)
31{ 31{
32 unsigned long off; 32 unsigned long off;
33 /* Read TPIDRPRW */ 33 register unsigned long *sp asm ("sp");
34 asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) : : "memory"); 34
35 /*
36 * Read TPIDRPRW.
37 * We want to allow caching the value, so avoid using volatile and
38 * instead use a fake stack read to hazard against barrier().
39 */
40 asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) : "Q" (*sp));
41
35 return off; 42 return off;
36} 43}
37#define __my_cpu_offset __my_cpu_offset() 44#define __my_cpu_offset __my_cpu_offset()
diff --git a/arch/arm/include/asm/smp_plat.h b/arch/arm/include/asm/smp_plat.h
index aaa61b6f50ff..e78983202737 100644
--- a/arch/arm/include/asm/smp_plat.h
+++ b/arch/arm/include/asm/smp_plat.h
@@ -49,7 +49,7 @@ static inline int cache_ops_need_broadcast(void)
49/* 49/*
50 * Logical CPU mapping. 50 * Logical CPU mapping.
51 */ 51 */
52extern int __cpu_logical_map[]; 52extern u32 __cpu_logical_map[];
53#define cpu_logical_map(cpu) __cpu_logical_map[cpu] 53#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
54/* 54/*
55 * Retrieve logical cpu index corresponding to a given MPIDR[23:0] 55 * Retrieve logical cpu index corresponding to a given MPIDR[23:0]
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h
index 99a19512ee26..bdf2b8458ec1 100644
--- a/arch/arm/include/asm/tlb.h
+++ b/arch/arm/include/asm/tlb.h
@@ -33,18 +33,6 @@
33#include <asm/pgalloc.h> 33#include <asm/pgalloc.h>
34#include <asm/tlbflush.h> 34#include <asm/tlbflush.h>
35 35
36/*
37 * We need to delay page freeing for SMP as other CPUs can access pages
38 * which have been removed but not yet had their TLB entries invalidated.
39 * Also, as ARMv7 speculative prefetch can drag new entries into the TLB,
40 * we need to apply this same delaying tactic to ensure correct operation.
41 */
42#if defined(CONFIG_SMP) || defined(CONFIG_CPU_32v7)
43#define tlb_fast_mode(tlb) 0
44#else
45#define tlb_fast_mode(tlb) 1
46#endif
47
48#define MMU_GATHER_BUNDLE 8 36#define MMU_GATHER_BUNDLE 8
49 37
50/* 38/*
@@ -112,12 +100,10 @@ static inline void __tlb_alloc_page(struct mmu_gather *tlb)
112static inline void tlb_flush_mmu(struct mmu_gather *tlb) 100static inline void tlb_flush_mmu(struct mmu_gather *tlb)
113{ 101{
114 tlb_flush(tlb); 102 tlb_flush(tlb);
115 if (!tlb_fast_mode(tlb)) { 103 free_pages_and_swap_cache(tlb->pages, tlb->nr);
116 free_pages_and_swap_cache(tlb->pages, tlb->nr); 104 tlb->nr = 0;
117 tlb->nr = 0; 105 if (tlb->pages == tlb->local)
118 if (tlb->pages == tlb->local) 106 __tlb_alloc_page(tlb);
119 __tlb_alloc_page(tlb);
120 }
121} 107}
122 108
123static inline void 109static inline void
@@ -178,11 +164,6 @@ tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
178 164
179static inline int __tlb_remove_page(struct mmu_gather *tlb, struct page *page) 165static inline int __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
180{ 166{
181 if (tlb_fast_mode(tlb)) {
182 free_page_and_swap_cache(page);
183 return 1; /* avoid calling tlb_flush_mmu */
184 }
185
186 tlb->pages[tlb->nr++] = page; 167 tlb->pages[tlb->nr++] = page;
187 VM_BUG_ON(tlb->nr > tlb->max); 168 VM_BUG_ON(tlb->nr > tlb->max);
188 return tlb->max - tlb->nr; 169 return tlb->max - tlb->nr;
diff --git a/arch/arm/include/debug/ux500.S b/arch/arm/include/debug/ux500.S
index 2848857f5b62..fbd24beeb1fa 100644
--- a/arch/arm/include/debug/ux500.S
+++ b/arch/arm/include/debug/ux500.S
@@ -24,9 +24,9 @@
24#define U8500_UART0_PHYS_BASE (0x80120000) 24#define U8500_UART0_PHYS_BASE (0x80120000)
25#define U8500_UART1_PHYS_BASE (0x80121000) 25#define U8500_UART1_PHYS_BASE (0x80121000)
26#define U8500_UART2_PHYS_BASE (0x80007000) 26#define U8500_UART2_PHYS_BASE (0x80007000)
27#define U8500_UART0_VIRT_BASE (0xa8120000) 27#define U8500_UART0_VIRT_BASE (0xf8120000)
28#define U8500_UART1_VIRT_BASE (0xa8121000) 28#define U8500_UART1_VIRT_BASE (0xf8121000)
29#define U8500_UART2_VIRT_BASE (0xa8007000) 29#define U8500_UART2_VIRT_BASE (0xf8007000)
30#define __UX500_PHYS_UART(n) U8500_UART##n##_PHYS_BASE 30#define __UX500_PHYS_UART(n) U8500_UART##n##_PHYS_BASE
31#define __UX500_VIRT_UART(n) U8500_UART##n##_VIRT_BASE 31#define __UX500_VIRT_UART(n) U8500_UART##n##_VIRT_BASE
32#endif 32#endif
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
index 5af04f6daa33..5859c8bc727c 100644
--- a/arch/arm/kernel/devtree.c
+++ b/arch/arm/kernel/devtree.c
@@ -82,7 +82,7 @@ void __init arm_dt_init_cpu_maps(void)
82 u32 i, j, cpuidx = 1; 82 u32 i, j, cpuidx = 1;
83 u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0; 83 u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0;
84 84
85 u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = UINT_MAX }; 85 u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID };
86 bool bootcpu_valid = false; 86 bool bootcpu_valid = false;
87 cpus = of_find_node_by_path("/cpus"); 87 cpus = of_find_node_by_path("/cpus");
88 88
@@ -92,6 +92,9 @@ void __init arm_dt_init_cpu_maps(void)
92 for_each_child_of_node(cpus, cpu) { 92 for_each_child_of_node(cpus, cpu) {
93 u32 hwid; 93 u32 hwid;
94 94
95 if (of_node_cmp(cpu->type, "cpu"))
96 continue;
97
95 pr_debug(" * %s...\n", cpu->full_name); 98 pr_debug(" * %s...\n", cpu->full_name);
96 /* 99 /*
97 * A device tree containing CPU nodes with missing "reg" 100 * A device tree containing CPU nodes with missing "reg"
@@ -149,9 +152,10 @@ void __init arm_dt_init_cpu_maps(void)
149 tmp_map[i] = hwid; 152 tmp_map[i] = hwid;
150 } 153 }
151 154
152 if (WARN(!bootcpu_valid, "DT missing boot CPU MPIDR[23:0], " 155 if (!bootcpu_valid) {
153 "fall back to default cpu_logical_map\n")) 156 pr_warn("DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map\n");
154 return; 157 return;
158 }
155 159
156 /* 160 /*
157 * Since the boot CPU node contains proper data, and all nodes have 161 * Since the boot CPU node contains proper data, and all nodes have
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index 8ef8c9337809..4fb074c446bf 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -134,6 +134,10 @@ void machine_kexec(struct kimage *image)
134 unsigned long reboot_code_buffer_phys; 134 unsigned long reboot_code_buffer_phys;
135 void *reboot_code_buffer; 135 void *reboot_code_buffer;
136 136
137 if (num_online_cpus() > 1) {
138 pr_err("kexec: error: multiple CPUs still online\n");
139 return;
140 }
137 141
138 page_list = image->head & PAGE_MASK; 142 page_list = image->head & PAGE_MASK;
139 143
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index f21970316836..6e8931ccf13e 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -184,30 +184,61 @@ int __init reboot_setup(char *str)
184 184
185__setup("reboot=", reboot_setup); 185__setup("reboot=", reboot_setup);
186 186
187/*
188 * Called by kexec, immediately prior to machine_kexec().
189 *
190 * This must completely disable all secondary CPUs; simply causing those CPUs
191 * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
192 * kexec'd kernel to use any and all RAM as it sees fit, without having to
193 * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
194 * functionality embodied in disable_nonboot_cpus() to achieve this.
195 */
187void machine_shutdown(void) 196void machine_shutdown(void)
188{ 197{
189#ifdef CONFIG_SMP 198 disable_nonboot_cpus();
190 smp_send_stop();
191#endif
192} 199}
193 200
201/*
202 * Halting simply requires that the secondary CPUs stop performing any
203 * activity (executing tasks, handling interrupts). smp_send_stop()
204 * achieves this.
205 */
194void machine_halt(void) 206void machine_halt(void)
195{ 207{
196 machine_shutdown(); 208 smp_send_stop();
209
197 local_irq_disable(); 210 local_irq_disable();
198 while (1); 211 while (1);
199} 212}
200 213
214/*
215 * Power-off simply requires that the secondary CPUs stop performing any
216 * activity (executing tasks, handling interrupts). smp_send_stop()
217 * achieves this. When the system power is turned off, it will take all CPUs
218 * with it.
219 */
201void machine_power_off(void) 220void machine_power_off(void)
202{ 221{
203 machine_shutdown(); 222 smp_send_stop();
223
204 if (pm_power_off) 224 if (pm_power_off)
205 pm_power_off(); 225 pm_power_off();
206} 226}
207 227
228/*
229 * Restart requires that the secondary CPUs stop performing any activity
230 * while the primary CPU resets the system. Systems with a single CPU can
231 * use soft_restart() as their machine descriptor's .restart hook, since that
232 * will cause the only available CPU to reset. Systems with multiple CPUs must
233 * provide a HW restart implementation, to ensure that all CPUs reset at once.
234 * This is required so that any code running after reset on the primary CPU
235 * doesn't have to co-ordinate with other CPUs to ensure they aren't still
236 * executing pre-reset code, and using RAM that the primary CPU's code wishes
237 * to use. Implementing such co-ordination would be essentially impossible.
238 */
208void machine_restart(char *cmd) 239void machine_restart(char *cmd)
209{ 240{
210 machine_shutdown(); 241 smp_send_stop();
211 242
212 arm_pm_restart(reboot_mode, cmd); 243 arm_pm_restart(reboot_mode, cmd);
213 244
@@ -411,7 +442,6 @@ static struct vm_area_struct gate_vma = {
411 .vm_start = 0xffff0000, 442 .vm_start = 0xffff0000,
412 .vm_end = 0xffff0000 + PAGE_SIZE, 443 .vm_end = 0xffff0000 + PAGE_SIZE,
413 .vm_flags = VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYEXEC, 444 .vm_flags = VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYEXEC,
414 .vm_mm = &init_mm,
415}; 445};
416 446
417static int __init gate_vma_init(void) 447static int __init gate_vma_init(void)
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 1522c7ae31b0..b4b1d397592b 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -444,7 +444,7 @@ void notrace cpu_init(void)
444 : "r14"); 444 : "r14");
445} 445}
446 446
447int __cpu_logical_map[NR_CPUS]; 447u32 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID };
448 448
449void __init smp_setup_processor_id(void) 449void __init smp_setup_processor_id(void)
450{ 450{
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 47ab90563bf4..5919eb451bb9 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -251,7 +251,7 @@ void __ref cpu_die(void)
251 * this returns, power and/or clocks can be removed at any point 251 * this returns, power and/or clocks can be removed at any point
252 * from this CPU and its cache by platform_cpu_kill(). 252 * from this CPU and its cache by platform_cpu_kill().
253 */ 253 */
254 RCU_NONIDLE(complete(&cpu_died)); 254 complete(&cpu_died);
255 255
256 /* 256 /*
257 * Ensure that the cache lines associated with that completion are 257 * Ensure that the cache lines associated with that completion are
@@ -651,17 +651,6 @@ void smp_send_reschedule(int cpu)
651 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); 651 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
652} 652}
653 653
654#ifdef CONFIG_HOTPLUG_CPU
655static void smp_kill_cpus(cpumask_t *mask)
656{
657 unsigned int cpu;
658 for_each_cpu(cpu, mask)
659 platform_cpu_kill(cpu);
660}
661#else
662static void smp_kill_cpus(cpumask_t *mask) { }
663#endif
664
665void smp_send_stop(void) 654void smp_send_stop(void)
666{ 655{
667 unsigned long timeout; 656 unsigned long timeout;
@@ -679,8 +668,6 @@ void smp_send_stop(void)
679 668
680 if (num_online_cpus() > 1) 669 if (num_online_cpus() > 1)
681 pr_warning("SMP: failed to stop secondary CPUs\n"); 670 pr_warning("SMP: failed to stop secondary CPUs\n");
682
683 smp_kill_cpus(&mask);
684} 671}
685 672
686/* 673/*
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index f10316b4ecdc..c5a59546a256 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -13,6 +13,7 @@
13 13
14#include <linux/cpu.h> 14#include <linux/cpu.h>
15#include <linux/cpumask.h> 15#include <linux/cpumask.h>
16#include <linux/export.h>
16#include <linux/init.h> 17#include <linux/init.h>
17#include <linux/percpu.h> 18#include <linux/percpu.h>
18#include <linux/node.h> 19#include <linux/node.h>
@@ -200,6 +201,7 @@ static inline void update_cpu_power(unsigned int cpuid, unsigned int mpidr) {}
200 * cpu topology table 201 * cpu topology table
201 */ 202 */
202struct cputopo_arm cpu_topology[NR_CPUS]; 203struct cputopo_arm cpu_topology[NR_CPUS];
204EXPORT_SYMBOL_GPL(cpu_topology);
203 205
204const struct cpumask *cpu_coregroup_mask(int cpu) 206const struct cpumask *cpu_coregroup_mask(int cpu)
205{ 207{
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index 37d216d814cd..ef1703b9587b 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -492,6 +492,11 @@ static void vcpu_pause(struct kvm_vcpu *vcpu)
492 wait_event_interruptible(*wq, !vcpu->arch.pause); 492 wait_event_interruptible(*wq, !vcpu->arch.pause);
493} 493}
494 494
495static int kvm_vcpu_initialized(struct kvm_vcpu *vcpu)
496{
497 return vcpu->arch.target >= 0;
498}
499
495/** 500/**
496 * kvm_arch_vcpu_ioctl_run - the main VCPU run function to execute guest code 501 * kvm_arch_vcpu_ioctl_run - the main VCPU run function to execute guest code
497 * @vcpu: The VCPU pointer 502 * @vcpu: The VCPU pointer
@@ -508,8 +513,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
508 int ret; 513 int ret;
509 sigset_t sigsaved; 514 sigset_t sigsaved;
510 515
511 /* Make sure they initialize the vcpu with KVM_ARM_VCPU_INIT */ 516 if (unlikely(!kvm_vcpu_initialized(vcpu)))
512 if (unlikely(vcpu->arch.target < 0))
513 return -ENOEXEC; 517 return -ENOEXEC;
514 518
515 ret = kvm_vcpu_first_run_init(vcpu); 519 ret = kvm_vcpu_first_run_init(vcpu);
@@ -710,6 +714,10 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
710 case KVM_SET_ONE_REG: 714 case KVM_SET_ONE_REG:
711 case KVM_GET_ONE_REG: { 715 case KVM_GET_ONE_REG: {
712 struct kvm_one_reg reg; 716 struct kvm_one_reg reg;
717
718 if (unlikely(!kvm_vcpu_initialized(vcpu)))
719 return -ENOEXEC;
720
713 if (copy_from_user(&reg, argp, sizeof(reg))) 721 if (copy_from_user(&reg, argp, sizeof(reg)))
714 return -EFAULT; 722 return -EFAULT;
715 if (ioctl == KVM_SET_ONE_REG) 723 if (ioctl == KVM_SET_ONE_REG)
@@ -722,6 +730,9 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
722 struct kvm_reg_list reg_list; 730 struct kvm_reg_list reg_list;
723 unsigned n; 731 unsigned n;
724 732
733 if (unlikely(!kvm_vcpu_initialized(vcpu)))
734 return -ENOEXEC;
735
725 if (copy_from_user(&reg_list, user_list, sizeof(reg_list))) 736 if (copy_from_user(&reg_list, user_list, sizeof(reg_list)))
726 return -EFAULT; 737 return -EFAULT;
727 n = reg_list.n; 738 n = reg_list.n;
diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
index 965706578f13..84ba67b982c0 100644
--- a/arch/arm/kvm/mmu.c
+++ b/arch/arm/kvm/mmu.c
@@ -43,7 +43,14 @@ static phys_addr_t hyp_idmap_vector;
43 43
44static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) 44static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
45{ 45{
46 kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, kvm, ipa); 46 /*
47 * This function also gets called when dealing with HYP page
48 * tables. As HYP doesn't have an associated struct kvm (and
49 * the HYP page tables are fairly static), we don't do
50 * anything there.
51 */
52 if (kvm)
53 kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, kvm, ipa);
47} 54}
48 55
49static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, 56static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
@@ -78,18 +85,20 @@ static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
78 return p; 85 return p;
79} 86}
80 87
81static void clear_pud_entry(pud_t *pud) 88static void clear_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr)
82{ 89{
83 pmd_t *pmd_table = pmd_offset(pud, 0); 90 pmd_t *pmd_table = pmd_offset(pud, 0);
84 pud_clear(pud); 91 pud_clear(pud);
92 kvm_tlb_flush_vmid_ipa(kvm, addr);
85 pmd_free(NULL, pmd_table); 93 pmd_free(NULL, pmd_table);
86 put_page(virt_to_page(pud)); 94 put_page(virt_to_page(pud));
87} 95}
88 96
89static void clear_pmd_entry(pmd_t *pmd) 97static void clear_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr)
90{ 98{
91 pte_t *pte_table = pte_offset_kernel(pmd, 0); 99 pte_t *pte_table = pte_offset_kernel(pmd, 0);
92 pmd_clear(pmd); 100 pmd_clear(pmd);
101 kvm_tlb_flush_vmid_ipa(kvm, addr);
93 pte_free_kernel(NULL, pte_table); 102 pte_free_kernel(NULL, pte_table);
94 put_page(virt_to_page(pmd)); 103 put_page(virt_to_page(pmd));
95} 104}
@@ -100,11 +109,12 @@ static bool pmd_empty(pmd_t *pmd)
100 return page_count(pmd_page) == 1; 109 return page_count(pmd_page) == 1;
101} 110}
102 111
103static void clear_pte_entry(pte_t *pte) 112static void clear_pte_entry(struct kvm *kvm, pte_t *pte, phys_addr_t addr)
104{ 113{
105 if (pte_present(*pte)) { 114 if (pte_present(*pte)) {
106 kvm_set_pte(pte, __pte(0)); 115 kvm_set_pte(pte, __pte(0));
107 put_page(virt_to_page(pte)); 116 put_page(virt_to_page(pte));
117 kvm_tlb_flush_vmid_ipa(kvm, addr);
108 } 118 }
109} 119}
110 120
@@ -114,7 +124,8 @@ static bool pte_empty(pte_t *pte)
114 return page_count(pte_page) == 1; 124 return page_count(pte_page) == 1;
115} 125}
116 126
117static void unmap_range(pgd_t *pgdp, unsigned long long start, u64 size) 127static void unmap_range(struct kvm *kvm, pgd_t *pgdp,
128 unsigned long long start, u64 size)
118{ 129{
119 pgd_t *pgd; 130 pgd_t *pgd;
120 pud_t *pud; 131 pud_t *pud;
@@ -138,15 +149,15 @@ static void unmap_range(pgd_t *pgdp, unsigned long long start, u64 size)
138 } 149 }
139 150
140 pte = pte_offset_kernel(pmd, addr); 151 pte = pte_offset_kernel(pmd, addr);
141 clear_pte_entry(pte); 152 clear_pte_entry(kvm, pte, addr);
142 range = PAGE_SIZE; 153 range = PAGE_SIZE;
143 154
144 /* If we emptied the pte, walk back up the ladder */ 155 /* If we emptied the pte, walk back up the ladder */
145 if (pte_empty(pte)) { 156 if (pte_empty(pte)) {
146 clear_pmd_entry(pmd); 157 clear_pmd_entry(kvm, pmd, addr);
147 range = PMD_SIZE; 158 range = PMD_SIZE;
148 if (pmd_empty(pmd)) { 159 if (pmd_empty(pmd)) {
149 clear_pud_entry(pud); 160 clear_pud_entry(kvm, pud, addr);
150 range = PUD_SIZE; 161 range = PUD_SIZE;
151 } 162 }
152 } 163 }
@@ -165,14 +176,14 @@ void free_boot_hyp_pgd(void)
165 mutex_lock(&kvm_hyp_pgd_mutex); 176 mutex_lock(&kvm_hyp_pgd_mutex);
166 177
167 if (boot_hyp_pgd) { 178 if (boot_hyp_pgd) {
168 unmap_range(boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE); 179 unmap_range(NULL, boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE);
169 unmap_range(boot_hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE); 180 unmap_range(NULL, boot_hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE);
170 kfree(boot_hyp_pgd); 181 kfree(boot_hyp_pgd);
171 boot_hyp_pgd = NULL; 182 boot_hyp_pgd = NULL;
172 } 183 }
173 184
174 if (hyp_pgd) 185 if (hyp_pgd)
175 unmap_range(hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE); 186 unmap_range(NULL, hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE);
176 187
177 kfree(init_bounce_page); 188 kfree(init_bounce_page);
178 init_bounce_page = NULL; 189 init_bounce_page = NULL;
@@ -200,9 +211,10 @@ void free_hyp_pgds(void)
200 211
201 if (hyp_pgd) { 212 if (hyp_pgd) {
202 for (addr = PAGE_OFFSET; virt_addr_valid(addr); addr += PGDIR_SIZE) 213 for (addr = PAGE_OFFSET; virt_addr_valid(addr); addr += PGDIR_SIZE)
203 unmap_range(hyp_pgd, KERN_TO_HYP(addr), PGDIR_SIZE); 214 unmap_range(NULL, hyp_pgd, KERN_TO_HYP(addr), PGDIR_SIZE);
204 for (addr = VMALLOC_START; is_vmalloc_addr((void*)addr); addr += PGDIR_SIZE) 215 for (addr = VMALLOC_START; is_vmalloc_addr((void*)addr); addr += PGDIR_SIZE)
205 unmap_range(hyp_pgd, KERN_TO_HYP(addr), PGDIR_SIZE); 216 unmap_range(NULL, hyp_pgd, KERN_TO_HYP(addr), PGDIR_SIZE);
217
206 kfree(hyp_pgd); 218 kfree(hyp_pgd);
207 hyp_pgd = NULL; 219 hyp_pgd = NULL;
208 } 220 }
@@ -393,7 +405,7 @@ int kvm_alloc_stage2_pgd(struct kvm *kvm)
393 */ 405 */
394static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size) 406static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size)
395{ 407{
396 unmap_range(kvm->arch.pgd, start, size); 408 unmap_range(kvm, kvm->arch.pgd, start, size);
397} 409}
398 410
399/** 411/**
@@ -675,7 +687,6 @@ static void handle_hva_to_gpa(struct kvm *kvm,
675static void kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, void *data) 687static void kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
676{ 688{
677 unmap_stage2_range(kvm, gpa, PAGE_SIZE); 689 unmap_stage2_range(kvm, gpa, PAGE_SIZE);
678 kvm_tlb_flush_vmid_ipa(kvm, gpa);
679} 690}
680 691
681int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) 692int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index 2acdff4c1dfe..180b3024bec3 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -174,6 +174,7 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
174static struct clock_event_device clkevt = { 174static struct clock_event_device clkevt = {
175 .name = "at91_tick", 175 .name = "at91_tick",
176 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 176 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
177 .shift = 32,
177 .rating = 150, 178 .rating = 150,
178 .set_next_event = clkevt32k_next_event, 179 .set_next_event = clkevt32k_next_event,
179 .set_mode = clkevt32k_mode, 180 .set_mode = clkevt32k_mode,
@@ -264,9 +265,11 @@ void __init at91rm9200_timer_init(void)
264 at91_st_write(AT91_ST_RTMR, 1); 265 at91_st_write(AT91_ST_RTMR, 1);
265 266
266 /* Setup timer clockevent, with minimum of two ticks (important!!) */ 267 /* Setup timer clockevent, with minimum of two ticks (important!!) */
268 clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
269 clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
270 clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
267 clkevt.cpumask = cpumask_of(0); 271 clkevt.cpumask = cpumask_of(0);
268 clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK, 272 clockevents_register_device(&clkevt);
269 2, AT91_ST_ALMV);
270 273
271 /* register clocksource */ 274 /* register clocksource */
272 clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK); 275 clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index 13cdbcd48f51..c7d670d11802 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -223,13 +223,7 @@ static void __init at91sam9n12_map_io(void)
223 at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE); 223 at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE);
224} 224}
225 225
226void __init at91sam9n12_initialize(void)
227{
228 at91_extern_irq = (1 << AT91SAM9N12_ID_IRQ0);
229}
230
231AT91_SOC_START(at91sam9n12) 226AT91_SOC_START(at91sam9n12)
232 .map_io = at91sam9n12_map_io, 227 .map_io = at91sam9n12_map_io,
233 .register_clocks = at91sam9n12_register_clocks, 228 .register_clocks = at91sam9n12_register_clocks,
234 .init = at91sam9n12_initialize,
235AT91_SOC_END 229AT91_SOC_END
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 31df12029c4e..2bd7f51b0b82 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -179,9 +179,9 @@ extern void __iomem *at91_pmc_base;
179#define AT91_PMC_PCR_CMD (0x1 << 12) /* Command (read=0, write=1) */ 179#define AT91_PMC_PCR_CMD (0x1 << 12) /* Command (read=0, write=1) */
180#define AT91_PMC_PCR_DIV(n) ((n) << 16) /* Divisor Value */ 180#define AT91_PMC_PCR_DIV(n) ((n) << 16) /* Divisor Value */
181#define AT91_PMC_PCR_DIV0 0x0 /* Peripheral clock is MCK */ 181#define AT91_PMC_PCR_DIV0 0x0 /* Peripheral clock is MCK */
182#define AT91_PMC_PCR_DIV2 0x2 /* Peripheral clock is MCK/2 */ 182#define AT91_PMC_PCR_DIV2 0x1 /* Peripheral clock is MCK/2 */
183#define AT91_PMC_PCR_DIV4 0x4 /* Peripheral clock is MCK/4 */ 183#define AT91_PMC_PCR_DIV4 0x2 /* Peripheral clock is MCK/4 */
184#define AT91_PMC_PCR_DIV8 0x8 /* Peripheral clock is MCK/8 */ 184#define AT91_PMC_PCR_DIV8 0x3 /* Peripheral clock is MCK/8 */
185#define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */ 185#define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */
186 186
187#endif 187#endif
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index d19edff0ea6e..ff18fc2ea46f 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -250,6 +250,7 @@ config MACH_ARMLEX4210
250config MACH_UNIVERSAL_C210 250config MACH_UNIVERSAL_C210
251 bool "Mobile UNIVERSAL_C210 Board" 251 bool "Mobile UNIVERSAL_C210 Board"
252 select CLKSRC_MMIO 252 select CLKSRC_MMIO
253 select CLKSRC_SAMSUNG_PWM
253 select CPU_EXYNOS4210 254 select CPU_EXYNOS4210
254 select EXYNOS4_SETUP_FIMC 255 select EXYNOS4_SETUP_FIMC
255 select EXYNOS4_SETUP_FIMD0 256 select EXYNOS4_SETUP_FIMD0
@@ -281,7 +282,6 @@ config MACH_UNIVERSAL_C210
281 select S5P_DEV_TV 282 select S5P_DEV_TV
282 select S5P_GPIO_INT 283 select S5P_GPIO_INT
283 select S5P_SETUP_MIPIPHY 284 select S5P_SETUP_MIPIPHY
284 select SAMSUNG_HRT
285 help 285 help
286 Machine support for Samsung Mobile Universal S5PC210 Reference 286 Machine support for Samsung Mobile Universal S5PC210 Reference
287 Board. 287 Board.
@@ -410,6 +410,7 @@ config MACH_EXYNOS4_DT
410 depends on ARCH_EXYNOS4 410 depends on ARCH_EXYNOS4
411 select ARM_AMBA 411 select ARM_AMBA
412 select CLKSRC_OF 412 select CLKSRC_OF
413 select CLKSRC_SAMSUNG_PWM if CPU_EXYNOS4210
413 select CPU_EXYNOS4210 414 select CPU_EXYNOS4210
414 select KEYBOARD_SAMSUNG if INPUT_KEYBOARD 415 select KEYBOARD_SAMSUNG if INPUT_KEYBOARD
415 select PINCTRL 416 select PINCTRL
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 745e304ad0de..f7e504b7874d 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -10,12 +10,14 @@
10 */ 10 */
11 11
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/bitops.h>
13#include <linux/interrupt.h> 14#include <linux/interrupt.h>
14#include <linux/irq.h> 15#include <linux/irq.h>
15#include <linux/irqchip.h> 16#include <linux/irqchip.h>
16#include <linux/io.h> 17#include <linux/io.h>
17#include <linux/device.h> 18#include <linux/device.h>
18#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <clocksource/samsung_pwm.h>
19#include <linux/sched.h> 21#include <linux/sched.h>
20#include <linux/serial_core.h> 22#include <linux/serial_core.h>
21#include <linux/of.h> 23#include <linux/of.h>
@@ -302,6 +304,13 @@ static struct map_desc exynos5440_iodesc0[] __initdata = {
302 }, 304 },
303}; 305};
304 306
307static struct samsung_pwm_variant exynos4_pwm_variant = {
308 .bits = 32,
309 .div_base = 0,
310 .has_tint_cstat = true,
311 .tclk_mask = 0,
312};
313
305void exynos4_restart(char mode, const char *cmd) 314void exynos4_restart(char mode, const char *cmd)
306{ 315{
307 __raw_writel(0x1, S5P_SWRESET); 316 __raw_writel(0x1, S5P_SWRESET);
@@ -317,9 +326,16 @@ void exynos5_restart(char mode, const char *cmd)
317 val = 0x1; 326 val = 0x1;
318 addr = EXYNOS_SWRESET; 327 addr = EXYNOS_SWRESET;
319 } else if (of_machine_is_compatible("samsung,exynos5440")) { 328 } else if (of_machine_is_compatible("samsung,exynos5440")) {
329 u32 status;
320 np = of_find_compatible_node(NULL, NULL, "samsung,exynos5440-clock"); 330 np = of_find_compatible_node(NULL, NULL, "samsung,exynos5440-clock");
331
332 addr = of_iomap(np, 0) + 0xbc;
333 status = __raw_readl(addr);
334
321 addr = of_iomap(np, 0) + 0xcc; 335 addr = of_iomap(np, 0) + 0xcc;
322 val = (0xfff << 20) | (0x1 << 16); 336 val = __raw_readl(addr);
337
338 val = (val & 0xffff0000) | (status & 0xffff);
323 } else { 339 } else {
324 pr_err("%s: cannot support non-DT\n", __func__); 340 pr_err("%s: cannot support non-DT\n", __func__);
325 return; 341 return;
@@ -370,6 +386,8 @@ int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
370 386
371void __init exynos_init_io(struct map_desc *mach_desc, int size) 387void __init exynos_init_io(struct map_desc *mach_desc, int size)
372{ 388{
389 debug_ll_io_init();
390
373#ifdef CONFIG_OF 391#ifdef CONFIG_OF
374 if (initial_boot_params) 392 if (initial_boot_params)
375 of_scan_flat_dt(exynos_fdt_map_chipid, NULL); 393 of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
@@ -442,8 +460,20 @@ static void __init exynos5440_map_io(void)
442 iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0)); 460 iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0));
443} 461}
444 462
463void __init exynos_set_timer_source(u8 channels)
464{
465 exynos4_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
466 exynos4_pwm_variant.output_mask &= ~channels;
467}
468
445void __init exynos_init_time(void) 469void __init exynos_init_time(void)
446{ 470{
471 unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
472 EXYNOS4_IRQ_TIMER0_VIC, EXYNOS4_IRQ_TIMER1_VIC,
473 EXYNOS4_IRQ_TIMER2_VIC, EXYNOS4_IRQ_TIMER3_VIC,
474 EXYNOS4_IRQ_TIMER4_VIC,
475 };
476
447 if (of_have_populated_dt()) { 477 if (of_have_populated_dt()) {
448#ifdef CONFIG_OF 478#ifdef CONFIG_OF
449 of_clk_init(NULL); 479 of_clk_init(NULL);
@@ -455,7 +485,14 @@ void __init exynos_init_time(void)
455 exynos4_clk_init(NULL, !soc_is_exynos4210(), S5P_VA_CMU, readl(S5P_VA_CHIPID + 8) & 1); 485 exynos4_clk_init(NULL, !soc_is_exynos4210(), S5P_VA_CMU, readl(S5P_VA_CHIPID + 8) & 1);
456 exynos4_clk_register_fixed_ext(xxti_f, xusbxti_f); 486 exynos4_clk_register_fixed_ext(xxti_f, xusbxti_f);
457#endif 487#endif
458 mct_init(S5P_VA_SYSTIMER, EXYNOS4_IRQ_MCT_G0, EXYNOS4_IRQ_MCT_L0, EXYNOS4_IRQ_MCT_L1); 488#ifdef CONFIG_CLKSRC_SAMSUNG_PWM
489 if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
490 samsung_pwm_clocksource_init(S3C_VA_TIMER,
491 timer_irqs, &exynos4_pwm_variant);
492 else
493#endif
494 mct_init(S5P_VA_SYSTIMER, EXYNOS4_IRQ_MCT_G0,
495 EXYNOS4_IRQ_MCT_L0, EXYNOS4_IRQ_MCT_L1);
459 } 496 }
460} 497}
461 498
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 60dd35cc01a6..11fc1e29819b 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -32,6 +32,8 @@ void exynos4_clk_register_fixed_ext(unsigned long, unsigned long);
32 32
33void exynos_firmware_init(void); 33void exynos_firmware_init(void);
34 34
35void exynos_set_timer_source(u8 channels);
36
35#ifdef CONFIG_PM_GENERIC_DOMAINS 37#ifdef CONFIG_PM_GENERIC_DOMAINS
36int exynos_pm_late_initcall(void); 38int exynos_pm_late_initcall(void);
37#else 39#else
diff --git a/arch/arm/mach-exynos/include/mach/pm-core.h b/arch/arm/mach-exynos/include/mach/pm-core.h
index 7dbbfec13ea5..296090e7f423 100644
--- a/arch/arm/mach-exynos/include/mach/pm-core.h
+++ b/arch/arm/mach-exynos/include/mach/pm-core.h
@@ -18,8 +18,15 @@
18#ifndef __ASM_ARCH_PM_CORE_H 18#ifndef __ASM_ARCH_PM_CORE_H
19#define __ASM_ARCH_PM_CORE_H __FILE__ 19#define __ASM_ARCH_PM_CORE_H __FILE__
20 20
21#include <linux/of.h>
21#include <mach/regs-pmu.h> 22#include <mach/regs-pmu.h>
22 23
24#ifdef CONFIG_PINCTRL_EXYNOS
25extern u32 exynos_get_eint_wake_mask(void);
26#else
27static inline u32 exynos_get_eint_wake_mask(void) { return 0xffffffff; }
28#endif
29
23static inline void s3c_pm_debug_init_uart(void) 30static inline void s3c_pm_debug_init_uart(void)
24{ 31{
25 /* nothing here yet */ 32 /* nothing here yet */
@@ -27,7 +34,12 @@ static inline void s3c_pm_debug_init_uart(void)
27 34
28static inline void s3c_pm_arch_prepare_irqs(void) 35static inline void s3c_pm_arch_prepare_irqs(void)
29{ 36{
30 __raw_writel(s3c_irqwake_eintmask, S5P_EINT_WAKEUP_MASK); 37 u32 eintmask = s3c_irqwake_eintmask;
38
39 if (of_have_populated_dt())
40 eintmask = exynos_get_eint_wake_mask();
41
42 __raw_writel(eintmask, S5P_EINT_WAKEUP_MASK);
31 __raw_writel(s3c_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK); 43 __raw_writel(s3c_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK);
32} 44}
33 45
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 327d50d4681d..74ddb2b55614 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -41,7 +41,6 @@
41#include <plat/mfc.h> 41#include <plat/mfc.h>
42#include <plat/sdhci.h> 42#include <plat/sdhci.h>
43#include <plat/fimc-core.h> 43#include <plat/fimc-core.h>
44#include <plat/samsung-time.h>
45#include <plat/camport.h> 44#include <plat/camport.h>
46 45
47#include <mach/map.h> 46#include <mach/map.h>
@@ -1094,7 +1093,7 @@ static void __init universal_map_io(void)
1094{ 1093{
1095 exynos_init_io(NULL, 0); 1094 exynos_init_io(NULL, 0);
1096 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); 1095 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
1097 samsung_set_timer_source(SAMSUNG_PWM2, SAMSUNG_PWM4); 1096 exynos_set_timer_source(BIT(2) | BIT(4));
1098 xxti_f = 0; 1097 xxti_f = 0;
1099 xusbxti_f = 24000000; 1098 xusbxti_f = 24000000;
1100} 1099}
@@ -1154,7 +1153,7 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1154 .map_io = universal_map_io, 1153 .map_io = universal_map_io,
1155 .init_machine = universal_machine_init, 1154 .init_machine = universal_machine_init,
1156 .init_late = exynos_init_late, 1155 .init_late = exynos_init_late,
1157 .init_time = samsung_timer_init, 1156 .init_time = exynos_init_time,
1158 .reserve = &universal_reserve, 1157 .reserve = &universal_reserve,
1159 .restart = exynos4_restart, 1158 .restart = exynos4_restart,
1160MACHINE_END 1159MACHINE_END
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 151259003086..4e3148ce852d 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -177,17 +177,18 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
177static const char *step_sels[] = { "osc", "pll2_pfd2_396m", }; 177static const char *step_sels[] = { "osc", "pll2_pfd2_396m", };
178static const char *pll1_sw_sels[] = { "pll1_sys", "step", }; 178static const char *pll1_sw_sels[] = { "pll1_sys", "step", };
179static const char *periph_pre_sels[] = { "pll2_bus", "pll2_pfd2_396m", "pll2_pfd0_352m", "pll2_198m", }; 179static const char *periph_pre_sels[] = { "pll2_bus", "pll2_pfd2_396m", "pll2_pfd0_352m", "pll2_198m", };
180static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", }; 180static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "osc", "dummy", };
181static const char *periph2_clk2_sels[] = { "pll3_usb_otg", "pll2_bus", };
181static const char *periph_sels[] = { "periph_pre", "periph_clk2", }; 182static const char *periph_sels[] = { "periph_pre", "periph_clk2", };
182static const char *periph2_sels[] = { "periph2_pre", "periph2_clk2", }; 183static const char *periph2_sels[] = { "periph2_pre", "periph2_clk2", };
183static const char *axi_sels[] = { "periph", "pll2_pfd2_396m", "pll3_pfd1_540m", }; 184static const char *axi_sels[] = { "periph", "pll2_pfd2_396m", "periph", "pll3_pfd1_540m", };
184static const char *audio_sels[] = { "pll4_post_div", "pll3_pfd2_508m", "pll3_pfd3_454m", "pll3_usb_otg", }; 185static const char *audio_sels[] = { "pll4_post_div", "pll3_pfd2_508m", "pll3_pfd3_454m", "pll3_usb_otg", };
185static const char *gpu_axi_sels[] = { "axi", "ahb", }; 186static const char *gpu_axi_sels[] = { "axi", "ahb", };
186static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m", "pll2_pfd2_396m", }; 187static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m", "pll2_pfd2_396m", };
187static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", }; 188static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };
188static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd9_720m", }; 189static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll3_pfd0_720m", };
189static const char *ipu_sels[] = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", }; 190static const char *ipu_sels[] = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };
190static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", }; 191static const char *ldb_di_sels[] = { "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", };
191static const char *ipu_di_pre_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", }; 192static const char *ipu_di_pre_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };
192static const char *ipu1_di0_sels[] = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", }; 193static const char *ipu1_di0_sels[] = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
193static const char *ipu1_di1_sels[] = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", }; 194static const char *ipu1_di1_sels[] = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
@@ -369,8 +370,8 @@ int __init mx6q_clocks_init(void)
369 clk[pll1_sw] = imx_clk_mux("pll1_sw", base + 0xc, 2, 1, pll1_sw_sels, ARRAY_SIZE(pll1_sw_sels)); 370 clk[pll1_sw] = imx_clk_mux("pll1_sw", base + 0xc, 2, 1, pll1_sw_sels, ARRAY_SIZE(pll1_sw_sels));
370 clk[periph_pre] = imx_clk_mux("periph_pre", base + 0x18, 18, 2, periph_pre_sels, ARRAY_SIZE(periph_pre_sels)); 371 clk[periph_pre] = imx_clk_mux("periph_pre", base + 0x18, 18, 2, periph_pre_sels, ARRAY_SIZE(periph_pre_sels));
371 clk[periph2_pre] = imx_clk_mux("periph2_pre", base + 0x18, 21, 2, periph_pre_sels, ARRAY_SIZE(periph_pre_sels)); 372 clk[periph2_pre] = imx_clk_mux("periph2_pre", base + 0x18, 21, 2, periph_pre_sels, ARRAY_SIZE(periph_pre_sels));
372 clk[periph_clk2_sel] = imx_clk_mux("periph_clk2_sel", base + 0x18, 12, 1, periph_clk2_sels, ARRAY_SIZE(periph_clk2_sels)); 373 clk[periph_clk2_sel] = imx_clk_mux("periph_clk2_sel", base + 0x18, 12, 2, periph_clk2_sels, ARRAY_SIZE(periph_clk2_sels));
373 clk[periph2_clk2_sel] = imx_clk_mux("periph2_clk2_sel", base + 0x18, 20, 1, periph_clk2_sels, ARRAY_SIZE(periph_clk2_sels)); 374 clk[periph2_clk2_sel] = imx_clk_mux("periph2_clk2_sel", base + 0x18, 20, 1, periph2_clk2_sels, ARRAY_SIZE(periph2_clk2_sels));
374 clk[axi_sel] = imx_clk_mux("axi_sel", base + 0x14, 6, 2, axi_sels, ARRAY_SIZE(axi_sels)); 375 clk[axi_sel] = imx_clk_mux("axi_sel", base + 0x14, 6, 2, axi_sels, ARRAY_SIZE(axi_sels));
375 clk[esai_sel] = imx_clk_mux("esai_sel", base + 0x20, 19, 2, audio_sels, ARRAY_SIZE(audio_sels)); 376 clk[esai_sel] = imx_clk_mux("esai_sel", base + 0x20, 19, 2, audio_sels, ARRAY_SIZE(audio_sels));
376 clk[asrc_sel] = imx_clk_mux("asrc_sel", base + 0x30, 7, 2, audio_sels, ARRAY_SIZE(audio_sels)); 377 clk[asrc_sel] = imx_clk_mux("asrc_sel", base + 0x30, 7, 2, audio_sels, ARRAY_SIZE(audio_sels));
@@ -498,7 +499,7 @@ int __init mx6q_clocks_init(void)
498 clk[ldb_di1] = imx_clk_gate2("ldb_di1", "ldb_di1_podf", base + 0x74, 14); 499 clk[ldb_di1] = imx_clk_gate2("ldb_di1", "ldb_di1_podf", base + 0x74, 14);
499 clk[ipu2_di1] = imx_clk_gate2("ipu2_di1", "ipu2_di1_sel", base + 0x74, 10); 500 clk[ipu2_di1] = imx_clk_gate2("ipu2_di1", "ipu2_di1_sel", base + 0x74, 10);
500 clk[hsi_tx] = imx_clk_gate2("hsi_tx", "hsi_tx_podf", base + 0x74, 16); 501 clk[hsi_tx] = imx_clk_gate2("hsi_tx", "hsi_tx_podf", base + 0x74, 16);
501 clk[mlb] = imx_clk_gate2("mlb", "pll8_mlb", base + 0x74, 18); 502 clk[mlb] = imx_clk_gate2("mlb", "axi", base + 0x74, 18);
502 clk[mmdc_ch0_axi] = imx_clk_gate2("mmdc_ch0_axi", "mmdc_ch0_axi_podf", base + 0x74, 20); 503 clk[mmdc_ch0_axi] = imx_clk_gate2("mmdc_ch0_axi", "mmdc_ch0_axi_podf", base + 0x74, 20);
503 clk[mmdc_ch1_axi] = imx_clk_gate2("mmdc_ch1_axi", "mmdc_ch1_axi_podf", base + 0x74, 22); 504 clk[mmdc_ch1_axi] = imx_clk_gate2("mmdc_ch1_axi", "mmdc_ch1_axi_podf", base + 0x74, 22);
504 clk[ocram] = imx_clk_gate2("ocram", "ahb", base + 0x74, 28); 505 clk[ocram] = imx_clk_gate2("ocram", "ahb", base + 0x74, 28);
diff --git a/arch/arm/mach-imx/headsmp.S b/arch/arm/mach-imx/headsmp.S
index 67b9c48dcafe..627f16f0e9d1 100644
--- a/arch/arm/mach-imx/headsmp.S
+++ b/arch/arm/mach-imx/headsmp.S
@@ -18,8 +18,20 @@
18 .section ".text.head", "ax" 18 .section ".text.head", "ax"
19 19
20#ifdef CONFIG_SMP 20#ifdef CONFIG_SMP
21diag_reg_offset:
22 .word g_diag_reg - .
23
24 .macro set_diag_reg
25 adr r0, diag_reg_offset
26 ldr r1, [r0]
27 add r1, r1, r0 @ r1 = physical &g_diag_reg
28 ldr r0, [r1]
29 mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
30 .endm
31
21ENTRY(v7_secondary_startup) 32ENTRY(v7_secondary_startup)
22 bl v7_invalidate_l1 33 bl v7_invalidate_l1
34 set_diag_reg
23 b secondary_startup 35 b secondary_startup
24ENDPROC(v7_secondary_startup) 36ENDPROC(v7_secondary_startup)
25#endif 37#endif
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index 4a69305db65e..c6e1ab544882 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -12,6 +12,7 @@
12 12
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/smp.h> 14#include <linux/smp.h>
15#include <asm/cacheflush.h>
15#include <asm/page.h> 16#include <asm/page.h>
16#include <asm/smp_scu.h> 17#include <asm/smp_scu.h>
17#include <asm/mach/map.h> 18#include <asm/mach/map.h>
@@ -21,6 +22,7 @@
21 22
22#define SCU_STANDBY_ENABLE (1 << 5) 23#define SCU_STANDBY_ENABLE (1 << 5)
23 24
25u32 g_diag_reg;
24static void __iomem *scu_base; 26static void __iomem *scu_base;
25 27
26static struct map_desc scu_io_desc __initdata = { 28static struct map_desc scu_io_desc __initdata = {
@@ -80,6 +82,18 @@ void imx_smp_prepare(void)
80static void __init imx_smp_prepare_cpus(unsigned int max_cpus) 82static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
81{ 83{
82 imx_smp_prepare(); 84 imx_smp_prepare();
85
86 /*
87 * The diagnostic register holds the errata bits. Mostly bootloader
88 * does not bring up secondary cores, so that when errata bits are set
89 * in bootloader, they are set only for boot cpu. But on a SMP
90 * configuration, it should be equally done on every single core.
91 * Read the register from boot cpu here, and will replicate it into
92 * secondary cores when booting them.
93 */
94 asm("mrc p15, 0, %0, c15, c0, 1" : "=r" (g_diag_reg) : : "cc");
95 __cpuc_flush_dcache_area(&g_diag_reg, sizeof(g_diag_reg));
96 outer_clean_range(__pa(&g_diag_reg), __pa(&g_diag_reg + 1));
83} 97}
84 98
85struct smp_operations imx_smp_ops __initdata = { 99struct smp_operations imx_smp_ops __initdata = {
diff --git a/arch/arm/mach-kirkwood/board-ts219.c b/arch/arm/mach-kirkwood/board-ts219.c
index acb0187c7ee1..4695d5f35fc9 100644
--- a/arch/arm/mach-kirkwood/board-ts219.c
+++ b/arch/arm/mach-kirkwood/board-ts219.c
@@ -41,13 +41,3 @@ void __init qnap_dt_ts219_init(void)
41 41
42 pm_power_off = qnap_tsx1x_power_off; 42 pm_power_off = qnap_tsx1x_power_off;
43} 43}
44
45/* FIXME: Will not work with DT. Maybe use MPP40_GPIO? */
46static int __init ts219_pci_init(void)
47{
48 if (machine_is_ts219())
49 kirkwood_pcie_init(KW_PCIE0);
50
51 return 0;
52}
53subsys_initcall(ts219_pci_init);
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index c2cae69e6d2b..f38922897563 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -528,12 +528,6 @@ void __init kirkwood_init_early(void)
528{ 528{
529 orion_time_set_base(TIMER_VIRT_BASE); 529 orion_time_set_base(TIMER_VIRT_BASE);
530 530
531 /*
532 * Some Kirkwood devices allocate their coherent buffers from atomic
533 * context. Increase size of atomic coherent pool to make sure such
534 * the allocations won't fail.
535 */
536 init_dma_coherent_pool_size(SZ_1M);
537 mvebu_mbus_init("marvell,kirkwood-mbus", 531 mvebu_mbus_init("marvell,kirkwood-mbus",
538 BRIDGE_WINS_BASE, BRIDGE_WINS_SZ, 532 BRIDGE_WINS_BASE, BRIDGE_WINS_SZ,
539 DDR_WINDOW_CPU_BASE, DDR_WINDOW_CPU_SZ); 533 DDR_WINDOW_CPU_BASE, DDR_WINDOW_CPU_SZ);
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
index 827cde42414f..e96fd71abd76 100644
--- a/arch/arm/mach-kirkwood/mpp.c
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -22,9 +22,10 @@ static unsigned int __init kirkwood_variant(void)
22 22
23 kirkwood_pcie_id(&dev, &rev); 23 kirkwood_pcie_id(&dev, &rev);
24 24
25 if ((dev == MV88F6281_DEV_ID && rev >= MV88F6281_REV_A0) || 25 if (dev == MV88F6281_DEV_ID && rev >= MV88F6281_REV_A0)
26 (dev == MV88F6282_DEV_ID))
27 return MPP_F6281_MASK; 26 return MPP_F6281_MASK;
27 if (dev == MV88F6282_DEV_ID)
28 return MPP_F6282_MASK;
28 if (dev == MV88F6192_DEV_ID && rev >= MV88F6192_REV_A0) 29 if (dev == MV88F6192_DEV_ID && rev >= MV88F6192_REV_A0)
29 return MPP_F6192_MASK; 30 return MPP_F6192_MASK;
30 if (dev == MV88F6180_DEV_ID) 31 if (dev == MV88F6180_DEV_ID)
diff --git a/arch/arm/mach-kirkwood/ts219-setup.c b/arch/arm/mach-kirkwood/ts219-setup.c
index 283abff90228..e1267d6b468f 100644
--- a/arch/arm/mach-kirkwood/ts219-setup.c
+++ b/arch/arm/mach-kirkwood/ts219-setup.c
@@ -124,7 +124,7 @@ static void __init qnap_ts219_init(void)
124static int __init ts219_pci_init(void) 124static int __init ts219_pci_init(void)
125{ 125{
126 if (machine_is_ts219()) 126 if (machine_is_ts219())
127 kirkwood_pcie_init(KW_PCIE0); 127 kirkwood_pcie_init(KW_PCIE1 | KW_PCIE0);
128 128
129 return 0; 129 return 0;
130} 130}
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index e11acbb0a46d..80a8bcacd9d5 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -15,6 +15,7 @@ config ARCH_MVEBU
15 select MVEBU_CLK_GATING 15 select MVEBU_CLK_GATING
16 select MVEBU_MBUS 16 select MVEBU_MBUS
17 select ZONE_DMA if ARM_LPAE 17 select ZONE_DMA if ARM_LPAE
18 select ARCH_REQUIRE_GPIOLIB
18 19
19if ARCH_MVEBU 20if ARCH_MVEBU
20 21
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c
index 42a4cb3087e2..1c48890bb72b 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.c
+++ b/arch/arm/mach-mvebu/armada-370-xp.c
@@ -54,13 +54,6 @@ void __init armada_370_xp_init_early(void)
54 char *mbus_soc_name; 54 char *mbus_soc_name;
55 55
56 /* 56 /*
57 * Some Armada 370/XP devices allocate their coherent buffers
58 * from atomic context. Increase size of atomic coherent pool
59 * to make sure such the allocations won't fail.
60 */
61 init_dma_coherent_pool_size(SZ_1M);
62
63 /*
64 * This initialization will be replaced by a DT-based 57 * This initialization will be replaced by a DT-based
65 * initialization once the mvebu-mbus driver gains DT support. 58 * initialization once the mvebu-mbus driver gains DT support.
66 */ 59 */
diff --git a/arch/arm/mach-mvebu/coherency_ll.S b/arch/arm/mach-mvebu/coherency_ll.S
index 53e8391192cd..5476669ba905 100644
--- a/arch/arm/mach-mvebu/coherency_ll.S
+++ b/arch/arm/mach-mvebu/coherency_ll.S
@@ -32,15 +32,21 @@ ENTRY(ll_set_cpu_coherent)
32 32
33 /* Add CPU to SMP group - Atomic */ 33 /* Add CPU to SMP group - Atomic */
34 add r3, r0, #ARMADA_XP_CFB_CTL_REG_OFFSET 34 add r3, r0, #ARMADA_XP_CFB_CTL_REG_OFFSET
35 ldr r2, [r3] 351:
36 ldrex r2, [r3]
36 orr r2, r2, r1 37 orr r2, r2, r1
37 str r2, [r3] 38 strex r0, r2, [r3]
39 cmp r0, #0
40 bne 1b
38 41
39 /* Enable coherency on CPU - Atomic */ 42 /* Enable coherency on CPU - Atomic */
40 add r3, r0, #ARMADA_XP_CFB_CFG_REG_OFFSET 43 add r3, r3, #ARMADA_XP_CFB_CFG_REG_OFFSET
41 ldr r2, [r3] 441:
45 ldrex r2, [r3]
42 orr r2, r2, r1 46 orr r2, r2, r1
43 str r2, [r3] 47 strex r0, r2, [r3]
48 cmp r0, #0
49 bne 1b
44 50
45 dsb 51 dsb
46 52
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c
index 68ab858e27b7..a94b3a718d1a 100644
--- a/arch/arm/mach-omap1/dma.c
+++ b/arch/arm/mach-omap1/dma.c
@@ -345,6 +345,7 @@ static int __init omap1_system_dma_init(void)
345 dev_err(&pdev->dev, 345 dev_err(&pdev->dev,
346 "%s: Memory allocation failed for d->chan!\n", 346 "%s: Memory allocation failed for d->chan!\n",
347 __func__); 347 __func__);
348 ret = -ENOMEM;
348 goto exit_release_d; 349 goto exit_release_d;
349 } 350 }
350 351
diff --git a/arch/arm/mach-omap2/cclock33xx_data.c b/arch/arm/mach-omap2/cclock33xx_data.c
index 6ebc7803bc3e..af3544ce4f02 100644
--- a/arch/arm/mach-omap2/cclock33xx_data.c
+++ b/arch/arm/mach-omap2/cclock33xx_data.c
@@ -454,9 +454,29 @@ DEFINE_CLK_GATE(cefuse_fck, "sys_clkin_ck", &sys_clkin_ck, 0x0,
454 */ 454 */
455DEFINE_CLK_FIXED_FACTOR(clkdiv32k_ck, "clk_24mhz", &clk_24mhz, 0x0, 1, 732); 455DEFINE_CLK_FIXED_FACTOR(clkdiv32k_ck, "clk_24mhz", &clk_24mhz, 0x0, 1, 732);
456 456
457DEFINE_CLK_GATE(clkdiv32k_ick, "clkdiv32k_ck", &clkdiv32k_ck, 0x0, 457static struct clk clkdiv32k_ick;
458 AM33XX_CM_PER_CLKDIV32K_CLKCTRL, AM33XX_MODULEMODE_SWCTRL_SHIFT, 458
459 0x0, NULL); 459static const char *clkdiv32k_ick_parent_names[] = {
460 "clkdiv32k_ck",
461};
462
463static const struct clk_ops clkdiv32k_ick_ops = {
464 .enable = &omap2_dflt_clk_enable,
465 .disable = &omap2_dflt_clk_disable,
466 .is_enabled = &omap2_dflt_clk_is_enabled,
467 .init = &omap2_init_clk_clkdm,
468};
469
470static struct clk_hw_omap clkdiv32k_ick_hw = {
471 .hw = {
472 .clk = &clkdiv32k_ick,
473 },
474 .enable_reg = AM33XX_CM_PER_CLKDIV32K_CLKCTRL,
475 .enable_bit = AM33XX_MODULEMODE_SWCTRL_SHIFT,
476 .clkdm_name = "clk_24mhz_clkdm",
477};
478
479DEFINE_STRUCT_CLK(clkdiv32k_ick, clkdiv32k_ick_parent_names, clkdiv32k_ick_ops);
460 480
461/* "usbotg_fck" is an additional clock and not really a modulemode */ 481/* "usbotg_fck" is an additional clock and not really a modulemode */
462DEFINE_CLK_GATE(usbotg_fck, "dpll_per_ck", &dpll_per_ck, 0x0, 482DEFINE_CLK_GATE(usbotg_fck, "dpll_per_ck", &dpll_per_ck, 0x0,
diff --git a/arch/arm/mach-omap2/clock36xx.c b/arch/arm/mach-omap2/clock36xx.c
index 8f3bf4e50908..bbd6a3f717e6 100644
--- a/arch/arm/mach-omap2/clock36xx.c
+++ b/arch/arm/mach-omap2/clock36xx.c
@@ -20,11 +20,12 @@
20 20
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/clk-provider.h>
23#include <linux/io.h> 24#include <linux/io.h>
24 25
25#include "clock.h" 26#include "clock.h"
26#include "clock36xx.h" 27#include "clock36xx.h"
27 28#define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
28 29
29/** 30/**
30 * omap36xx_pwrdn_clk_enable_with_hsdiv_restore - enable clocks suffering 31 * omap36xx_pwrdn_clk_enable_with_hsdiv_restore - enable clocks suffering
@@ -39,29 +40,28 @@
39 */ 40 */
40int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *clk) 41int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *clk)
41{ 42{
42 struct clk_hw_omap *parent; 43 struct clk_divider *parent;
43 struct clk_hw *parent_hw; 44 struct clk_hw *parent_hw;
44 u32 dummy_v, orig_v, clksel_shift; 45 u32 dummy_v, orig_v;
45 int ret; 46 int ret;
46 47
47 /* Clear PWRDN bit of HSDIVIDER */ 48 /* Clear PWRDN bit of HSDIVIDER */
48 ret = omap2_dflt_clk_enable(clk); 49 ret = omap2_dflt_clk_enable(clk);
49 50
50 parent_hw = __clk_get_hw(__clk_get_parent(clk->clk)); 51 parent_hw = __clk_get_hw(__clk_get_parent(clk->clk));
51 parent = to_clk_hw_omap(parent_hw); 52 parent = to_clk_divider(parent_hw);
52 53
53 /* Restore the dividers */ 54 /* Restore the dividers */
54 if (!ret) { 55 if (!ret) {
55 clksel_shift = __ffs(parent->clksel_mask); 56 orig_v = __raw_readl(parent->reg);
56 orig_v = __raw_readl(parent->clksel_reg);
57 dummy_v = orig_v; 57 dummy_v = orig_v;
58 58
59 /* Write any other value different from the Read value */ 59 /* Write any other value different from the Read value */
60 dummy_v ^= (1 << clksel_shift); 60 dummy_v ^= (1 << parent->shift);
61 __raw_writel(dummy_v, parent->clksel_reg); 61 __raw_writel(dummy_v, parent->reg);
62 62
63 /* Write the original divider */ 63 /* Write the original divider */
64 __raw_writel(orig_v, parent->clksel_reg); 64 __raw_writel(orig_v, parent->reg);
65 } 65 }
66 66
67 return ret; 67 return ret;
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index d25a95fe9921..7341eff63f56 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1356,13 +1356,27 @@ static void _enable_sysc(struct omap_hwmod *oh)
1356 1356
1357 clkdm = _get_clkdm(oh); 1357 clkdm = _get_clkdm(oh);
1358 if (sf & SYSC_HAS_SIDLEMODE) { 1358 if (sf & SYSC_HAS_SIDLEMODE) {
1359 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1360 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1361 idlemode = HWMOD_IDLEMODE_NO;
1362 } else {
1363 if (sf & SYSC_HAS_ENAWAKEUP)
1364 _enable_wakeup(oh, &v);
1365 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1366 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1367 else
1368 idlemode = HWMOD_IDLEMODE_SMART;
1369 }
1370
1371 /*
1372 * This is special handling for some IPs like
1373 * 32k sync timer. Force them to idle!
1374 */
1359 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU); 1375 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1360 if (clkdm_act && !(oh->class->sysc->idlemodes & 1376 if (clkdm_act && !(oh->class->sysc->idlemodes &
1361 (SIDLE_SMART | SIDLE_SMART_WKUP))) 1377 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1362 idlemode = HWMOD_IDLEMODE_FORCE; 1378 idlemode = HWMOD_IDLEMODE_FORCE;
1363 else 1379
1364 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1365 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
1366 _set_slave_idlemode(oh, idlemode, &v); 1380 _set_slave_idlemode(oh, idlemode, &v);
1367 } 1381 }
1368 1382
@@ -1391,10 +1405,6 @@ static void _enable_sysc(struct omap_hwmod *oh)
1391 (sf & SYSC_HAS_CLOCKACTIVITY)) 1405 (sf & SYSC_HAS_CLOCKACTIVITY))
1392 _set_clockactivity(oh, oh->class->sysc->clockact, &v); 1406 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
1393 1407
1394 /* If slave is in SMARTIDLE, also enable wakeup */
1395 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1396 _enable_wakeup(oh, &v);
1397
1398 _write_sysconfig(v, oh); 1408 _write_sysconfig(v, oh);
1399 1409
1400 /* 1410 /*
@@ -1430,13 +1440,16 @@ static void _idle_sysc(struct omap_hwmod *oh)
1430 sf = oh->class->sysc->sysc_flags; 1440 sf = oh->class->sysc->sysc_flags;
1431 1441
1432 if (sf & SYSC_HAS_SIDLEMODE) { 1442 if (sf & SYSC_HAS_SIDLEMODE) {
1433 /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */ 1443 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1434 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1435 !(oh->class->sysc->idlemodes &
1436 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1437 idlemode = HWMOD_IDLEMODE_FORCE; 1444 idlemode = HWMOD_IDLEMODE_FORCE;
1438 else 1445 } else {
1439 idlemode = HWMOD_IDLEMODE_SMART; 1446 if (sf & SYSC_HAS_ENAWAKEUP)
1447 _enable_wakeup(oh, &v);
1448 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1449 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1450 else
1451 idlemode = HWMOD_IDLEMODE_SMART;
1452 }
1440 _set_slave_idlemode(oh, idlemode, &v); 1453 _set_slave_idlemode(oh, idlemode, &v);
1441 } 1454 }
1442 1455
@@ -1455,10 +1468,6 @@ static void _idle_sysc(struct omap_hwmod *oh)
1455 _set_master_standbymode(oh, idlemode, &v); 1468 _set_master_standbymode(oh, idlemode, &v);
1456 } 1469 }
1457 1470
1458 /* If slave is in SMARTIDLE, also enable wakeup */
1459 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1460 _enable_wakeup(oh, &v);
1461
1462 _write_sysconfig(v, oh); 1471 _write_sysconfig(v, oh);
1463} 1472}
1464 1473
@@ -2065,7 +2074,7 @@ static int _omap4_get_context_lost(struct omap_hwmod *oh)
2065 * do so is present in the hwmod data, then call it and pass along the 2074 * do so is present in the hwmod data, then call it and pass along the
2066 * return value; otherwise, return 0. 2075 * return value; otherwise, return 0.
2067 */ 2076 */
2068static int __init _enable_preprogram(struct omap_hwmod *oh) 2077static int _enable_preprogram(struct omap_hwmod *oh)
2069{ 2078{
2070 if (!oh->class->enable_preprogram) 2079 if (!oh->class->enable_preprogram)
2071 return 0; 2080 return 0;
@@ -2246,42 +2255,6 @@ static int _idle(struct omap_hwmod *oh)
2246} 2255}
2247 2256
2248/** 2257/**
2249 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
2250 * @oh: struct omap_hwmod *
2251 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
2252 *
2253 * Sets the IP block's OCP autoidle bit in hardware, and updates our
2254 * local copy. Intended to be used by drivers that require
2255 * direct manipulation of the AUTOIDLE bits.
2256 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
2257 * along the return value from _set_module_autoidle().
2258 *
2259 * Any users of this function should be scrutinized carefully.
2260 */
2261int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
2262{
2263 u32 v;
2264 int retval = 0;
2265 unsigned long flags;
2266
2267 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
2268 return -EINVAL;
2269
2270 spin_lock_irqsave(&oh->_lock, flags);
2271
2272 v = oh->_sysc_cache;
2273
2274 retval = _set_module_autoidle(oh, autoidle, &v);
2275
2276 if (!retval)
2277 _write_sysconfig(v, oh);
2278
2279 spin_unlock_irqrestore(&oh->_lock, flags);
2280
2281 return retval;
2282}
2283
2284/**
2285 * _shutdown - shutdown an omap_hwmod 2258 * _shutdown - shutdown an omap_hwmod
2286 * @oh: struct omap_hwmod * 2259 * @oh: struct omap_hwmod *
2287 * 2260 *
@@ -3180,38 +3153,6 @@ error:
3180} 3153}
3181 3154
3182/** 3155/**
3183 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
3184 * @oh: struct omap_hwmod *
3185 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
3186 *
3187 * Sets the IP block's OCP slave idlemode in hardware, and updates our
3188 * local copy. Intended to be used by drivers that have some erratum
3189 * that requires direct manipulation of the SIDLEMODE bits. Returns
3190 * -EINVAL if @oh is null, or passes along the return value from
3191 * _set_slave_idlemode().
3192 *
3193 * XXX Does this function have any current users? If not, we should
3194 * remove it; it is better to let the rest of the hwmod code handle this.
3195 * Any users of this function should be scrutinized carefully.
3196 */
3197int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
3198{
3199 u32 v;
3200 int retval = 0;
3201
3202 if (!oh)
3203 return -EINVAL;
3204
3205 v = oh->_sysc_cache;
3206
3207 retval = _set_slave_idlemode(oh, idlemode, &v);
3208 if (!retval)
3209 _write_sysconfig(v, oh);
3210
3211 return retval;
3212}
3213
3214/**
3215 * omap_hwmod_lookup - look up a registered omap_hwmod by name 3156 * omap_hwmod_lookup - look up a registered omap_hwmod by name
3216 * @name: name of the omap_hwmod to look up 3157 * @name: name of the omap_hwmod to look up
3217 * 3158 *
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index fe5962921f07..0c898f58ac9b 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -463,6 +463,9 @@ struct omap_hwmod_omap4_prcm {
463 * is kept in force-standby mode. Failing to do so causes PM problems 463 * is kept in force-standby mode. Failing to do so causes PM problems
464 * with musb on OMAP3630 at least. Note that musb has a dedicated register 464 * with musb on OMAP3630 at least. Note that musb has a dedicated register
465 * to control MSTANDBY signal when MIDLEMODE is set to force-standby. 465 * to control MSTANDBY signal when MIDLEMODE is set to force-standby.
466 * HWMOD_SWSUP_SIDLE_ACT: omap_hwmod code should manually bring the module
467 * out of idle, but rely on smart-idle to the put it back in idle,
468 * so the wakeups are still functional (Only known case for now is UART)
466 */ 469 */
467#define HWMOD_SWSUP_SIDLE (1 << 0) 470#define HWMOD_SWSUP_SIDLE (1 << 0)
468#define HWMOD_SWSUP_MSTANDBY (1 << 1) 471#define HWMOD_SWSUP_MSTANDBY (1 << 1)
@@ -476,6 +479,7 @@ struct omap_hwmod_omap4_prcm {
476#define HWMOD_EXT_OPT_MAIN_CLK (1 << 9) 479#define HWMOD_EXT_OPT_MAIN_CLK (1 << 9)
477#define HWMOD_BLOCK_WFI (1 << 10) 480#define HWMOD_BLOCK_WFI (1 << 10)
478#define HWMOD_FORCE_MSTANDBY (1 << 11) 481#define HWMOD_FORCE_MSTANDBY (1 << 11)
482#define HWMOD_SWSUP_SIDLE_ACT (1 << 12)
479 483
480/* 484/*
481 * omap_hwmod._int_flags definitions 485 * omap_hwmod._int_flags definitions
@@ -641,9 +645,6 @@ int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name);
641int omap_hwmod_enable_clocks(struct omap_hwmod *oh); 645int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
642int omap_hwmod_disable_clocks(struct omap_hwmod *oh); 646int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
643 647
644int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode);
645int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle);
646
647int omap_hwmod_reset(struct omap_hwmod *oh); 648int omap_hwmod_reset(struct omap_hwmod *oh);
648void omap_hwmod_ocp_barrier(struct omap_hwmod *oh); 649void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
649 650
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index c8c64b3e1acc..d05fc7b54567 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -512,6 +512,7 @@ struct omap_hwmod omap2xxx_uart1_hwmod = {
512 .mpu_irqs = omap2_uart1_mpu_irqs, 512 .mpu_irqs = omap2_uart1_mpu_irqs,
513 .sdma_reqs = omap2_uart1_sdma_reqs, 513 .sdma_reqs = omap2_uart1_sdma_reqs,
514 .main_clk = "uart1_fck", 514 .main_clk = "uart1_fck",
515 .flags = HWMOD_SWSUP_SIDLE_ACT,
515 .prcm = { 516 .prcm = {
516 .omap2 = { 517 .omap2 = {
517 .module_offs = CORE_MOD, 518 .module_offs = CORE_MOD,
@@ -531,6 +532,7 @@ struct omap_hwmod omap2xxx_uart2_hwmod = {
531 .mpu_irqs = omap2_uart2_mpu_irqs, 532 .mpu_irqs = omap2_uart2_mpu_irqs,
532 .sdma_reqs = omap2_uart2_sdma_reqs, 533 .sdma_reqs = omap2_uart2_sdma_reqs,
533 .main_clk = "uart2_fck", 534 .main_clk = "uart2_fck",
535 .flags = HWMOD_SWSUP_SIDLE_ACT,
534 .prcm = { 536 .prcm = {
535 .omap2 = { 537 .omap2 = {
536 .module_offs = CORE_MOD, 538 .module_offs = CORE_MOD,
@@ -550,6 +552,7 @@ struct omap_hwmod omap2xxx_uart3_hwmod = {
550 .mpu_irqs = omap2_uart3_mpu_irqs, 552 .mpu_irqs = omap2_uart3_mpu_irqs,
551 .sdma_reqs = omap2_uart3_sdma_reqs, 553 .sdma_reqs = omap2_uart3_sdma_reqs,
552 .main_clk = "uart3_fck", 554 .main_clk = "uart3_fck",
555 .flags = HWMOD_SWSUP_SIDLE_ACT,
553 .prcm = { 556 .prcm = {
554 .omap2 = { 557 .omap2 = {
555 .module_offs = CORE_MOD, 558 .module_offs = CORE_MOD,
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 01d8f324450a..69337af748cc 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -1995,6 +1995,7 @@ static struct omap_hwmod am33xx_uart1_hwmod = {
1995 .name = "uart1", 1995 .name = "uart1",
1996 .class = &uart_class, 1996 .class = &uart_class,
1997 .clkdm_name = "l4_wkup_clkdm", 1997 .clkdm_name = "l4_wkup_clkdm",
1998 .flags = HWMOD_SWSUP_SIDLE_ACT,
1998 .mpu_irqs = am33xx_uart1_irqs, 1999 .mpu_irqs = am33xx_uart1_irqs,
1999 .sdma_reqs = uart1_edma_reqs, 2000 .sdma_reqs = uart1_edma_reqs,
2000 .main_clk = "dpll_per_m2_div4_wkupdm_ck", 2001 .main_clk = "dpll_per_m2_div4_wkupdm_ck",
@@ -2006,6 +2007,13 @@ static struct omap_hwmod am33xx_uart1_hwmod = {
2006 }, 2007 },
2007}; 2008};
2008 2009
2010/* uart2 */
2011static struct omap_hwmod_dma_info uart2_edma_reqs[] = {
2012 { .name = "tx", .dma_req = 28, },
2013 { .name = "rx", .dma_req = 29, },
2014 { .dma_req = -1 }
2015};
2016
2009static struct omap_hwmod_irq_info am33xx_uart2_irqs[] = { 2017static struct omap_hwmod_irq_info am33xx_uart2_irqs[] = {
2010 { .irq = 73 + OMAP_INTC_START, }, 2018 { .irq = 73 + OMAP_INTC_START, },
2011 { .irq = -1 }, 2019 { .irq = -1 },
@@ -2015,8 +2023,9 @@ static struct omap_hwmod am33xx_uart2_hwmod = {
2015 .name = "uart2", 2023 .name = "uart2",
2016 .class = &uart_class, 2024 .class = &uart_class,
2017 .clkdm_name = "l4ls_clkdm", 2025 .clkdm_name = "l4ls_clkdm",
2026 .flags = HWMOD_SWSUP_SIDLE_ACT,
2018 .mpu_irqs = am33xx_uart2_irqs, 2027 .mpu_irqs = am33xx_uart2_irqs,
2019 .sdma_reqs = uart1_edma_reqs, 2028 .sdma_reqs = uart2_edma_reqs,
2020 .main_clk = "dpll_per_m2_div4_ck", 2029 .main_clk = "dpll_per_m2_div4_ck",
2021 .prcm = { 2030 .prcm = {
2022 .omap4 = { 2031 .omap4 = {
@@ -2042,6 +2051,7 @@ static struct omap_hwmod am33xx_uart3_hwmod = {
2042 .name = "uart3", 2051 .name = "uart3",
2043 .class = &uart_class, 2052 .class = &uart_class,
2044 .clkdm_name = "l4ls_clkdm", 2053 .clkdm_name = "l4ls_clkdm",
2054 .flags = HWMOD_SWSUP_SIDLE_ACT,
2045 .mpu_irqs = am33xx_uart3_irqs, 2055 .mpu_irqs = am33xx_uart3_irqs,
2046 .sdma_reqs = uart3_edma_reqs, 2056 .sdma_reqs = uart3_edma_reqs,
2047 .main_clk = "dpll_per_m2_div4_ck", 2057 .main_clk = "dpll_per_m2_div4_ck",
@@ -2062,6 +2072,7 @@ static struct omap_hwmod am33xx_uart4_hwmod = {
2062 .name = "uart4", 2072 .name = "uart4",
2063 .class = &uart_class, 2073 .class = &uart_class,
2064 .clkdm_name = "l4ls_clkdm", 2074 .clkdm_name = "l4ls_clkdm",
2075 .flags = HWMOD_SWSUP_SIDLE_ACT,
2065 .mpu_irqs = am33xx_uart4_irqs, 2076 .mpu_irqs = am33xx_uart4_irqs,
2066 .sdma_reqs = uart1_edma_reqs, 2077 .sdma_reqs = uart1_edma_reqs,
2067 .main_clk = "dpll_per_m2_div4_ck", 2078 .main_clk = "dpll_per_m2_div4_ck",
@@ -2082,6 +2093,7 @@ static struct omap_hwmod am33xx_uart5_hwmod = {
2082 .name = "uart5", 2093 .name = "uart5",
2083 .class = &uart_class, 2094 .class = &uart_class,
2084 .clkdm_name = "l4ls_clkdm", 2095 .clkdm_name = "l4ls_clkdm",
2096 .flags = HWMOD_SWSUP_SIDLE_ACT,
2085 .mpu_irqs = am33xx_uart5_irqs, 2097 .mpu_irqs = am33xx_uart5_irqs,
2086 .sdma_reqs = uart1_edma_reqs, 2098 .sdma_reqs = uart1_edma_reqs,
2087 .main_clk = "dpll_per_m2_div4_ck", 2099 .main_clk = "dpll_per_m2_div4_ck",
@@ -2102,6 +2114,7 @@ static struct omap_hwmod am33xx_uart6_hwmod = {
2102 .name = "uart6", 2114 .name = "uart6",
2103 .class = &uart_class, 2115 .class = &uart_class,
2104 .clkdm_name = "l4ls_clkdm", 2116 .clkdm_name = "l4ls_clkdm",
2117 .flags = HWMOD_SWSUP_SIDLE_ACT,
2105 .mpu_irqs = am33xx_uart6_irqs, 2118 .mpu_irqs = am33xx_uart6_irqs,
2106 .sdma_reqs = uart1_edma_reqs, 2119 .sdma_reqs = uart1_edma_reqs,
2107 .main_clk = "dpll_per_m2_div4_ck", 2120 .main_clk = "dpll_per_m2_div4_ck",
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 4083606ea1da..31c7126eb3bb 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -490,6 +490,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
490 .mpu_irqs = omap2_uart1_mpu_irqs, 490 .mpu_irqs = omap2_uart1_mpu_irqs,
491 .sdma_reqs = omap2_uart1_sdma_reqs, 491 .sdma_reqs = omap2_uart1_sdma_reqs,
492 .main_clk = "uart1_fck", 492 .main_clk = "uart1_fck",
493 .flags = HWMOD_SWSUP_SIDLE_ACT,
493 .prcm = { 494 .prcm = {
494 .omap2 = { 495 .omap2 = {
495 .module_offs = CORE_MOD, 496 .module_offs = CORE_MOD,
@@ -508,6 +509,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
508 .mpu_irqs = omap2_uart2_mpu_irqs, 509 .mpu_irqs = omap2_uart2_mpu_irqs,
509 .sdma_reqs = omap2_uart2_sdma_reqs, 510 .sdma_reqs = omap2_uart2_sdma_reqs,
510 .main_clk = "uart2_fck", 511 .main_clk = "uart2_fck",
512 .flags = HWMOD_SWSUP_SIDLE_ACT,
511 .prcm = { 513 .prcm = {
512 .omap2 = { 514 .omap2 = {
513 .module_offs = CORE_MOD, 515 .module_offs = CORE_MOD,
@@ -526,6 +528,7 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
526 .mpu_irqs = omap2_uart3_mpu_irqs, 528 .mpu_irqs = omap2_uart3_mpu_irqs,
527 .sdma_reqs = omap2_uart3_sdma_reqs, 529 .sdma_reqs = omap2_uart3_sdma_reqs,
528 .main_clk = "uart3_fck", 530 .main_clk = "uart3_fck",
531 .flags = HWMOD_SWSUP_SIDLE_ACT,
529 .prcm = { 532 .prcm = {
530 .omap2 = { 533 .omap2 = {
531 .module_offs = OMAP3430_PER_MOD, 534 .module_offs = OMAP3430_PER_MOD,
@@ -555,6 +558,7 @@ static struct omap_hwmod omap36xx_uart4_hwmod = {
555 .mpu_irqs = uart4_mpu_irqs, 558 .mpu_irqs = uart4_mpu_irqs,
556 .sdma_reqs = uart4_sdma_reqs, 559 .sdma_reqs = uart4_sdma_reqs,
557 .main_clk = "uart4_fck", 560 .main_clk = "uart4_fck",
561 .flags = HWMOD_SWSUP_SIDLE_ACT,
558 .prcm = { 562 .prcm = {
559 .omap2 = { 563 .omap2 = {
560 .module_offs = OMAP3430_PER_MOD, 564 .module_offs = OMAP3430_PER_MOD,
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index eaba9dc91a0d..848b6dc67590 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -3434,6 +3434,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {
3434 .name = "uart1", 3434 .name = "uart1",
3435 .class = &omap44xx_uart_hwmod_class, 3435 .class = &omap44xx_uart_hwmod_class,
3436 .clkdm_name = "l4_per_clkdm", 3436 .clkdm_name = "l4_per_clkdm",
3437 .flags = HWMOD_SWSUP_SIDLE_ACT,
3437 .mpu_irqs = omap44xx_uart1_irqs, 3438 .mpu_irqs = omap44xx_uart1_irqs,
3438 .sdma_reqs = omap44xx_uart1_sdma_reqs, 3439 .sdma_reqs = omap44xx_uart1_sdma_reqs,
3439 .main_clk = "func_48m_fclk", 3440 .main_clk = "func_48m_fclk",
@@ -3462,6 +3463,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {
3462 .name = "uart2", 3463 .name = "uart2",
3463 .class = &omap44xx_uart_hwmod_class, 3464 .class = &omap44xx_uart_hwmod_class,
3464 .clkdm_name = "l4_per_clkdm", 3465 .clkdm_name = "l4_per_clkdm",
3466 .flags = HWMOD_SWSUP_SIDLE_ACT,
3465 .mpu_irqs = omap44xx_uart2_irqs, 3467 .mpu_irqs = omap44xx_uart2_irqs,
3466 .sdma_reqs = omap44xx_uart2_sdma_reqs, 3468 .sdma_reqs = omap44xx_uart2_sdma_reqs,
3467 .main_clk = "func_48m_fclk", 3469 .main_clk = "func_48m_fclk",
@@ -3490,7 +3492,8 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {
3490 .name = "uart3", 3492 .name = "uart3",
3491 .class = &omap44xx_uart_hwmod_class, 3493 .class = &omap44xx_uart_hwmod_class,
3492 .clkdm_name = "l4_per_clkdm", 3494 .clkdm_name = "l4_per_clkdm",
3493 .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, 3495 .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET |
3496 HWMOD_SWSUP_SIDLE_ACT,
3494 .mpu_irqs = omap44xx_uart3_irqs, 3497 .mpu_irqs = omap44xx_uart3_irqs,
3495 .sdma_reqs = omap44xx_uart3_sdma_reqs, 3498 .sdma_reqs = omap44xx_uart3_sdma_reqs,
3496 .main_clk = "func_48m_fclk", 3499 .main_clk = "func_48m_fclk",
@@ -3519,6 +3522,7 @@ static struct omap_hwmod omap44xx_uart4_hwmod = {
3519 .name = "uart4", 3522 .name = "uart4",
3520 .class = &omap44xx_uart_hwmod_class, 3523 .class = &omap44xx_uart_hwmod_class,
3521 .clkdm_name = "l4_per_clkdm", 3524 .clkdm_name = "l4_per_clkdm",
3525 .flags = HWMOD_SWSUP_SIDLE_ACT,
3522 .mpu_irqs = omap44xx_uart4_irqs, 3526 .mpu_irqs = omap44xx_uart4_irqs,
3523 .sdma_reqs = omap44xx_uart4_sdma_reqs, 3527 .sdma_reqs = omap44xx_uart4_sdma_reqs,
3524 .main_clk = "func_48m_fclk", 3528 .main_clk = "func_48m_fclk",
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index c01859398b54..5a2d8034c8de 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -546,8 +546,10 @@ static void __init prcm_setup_regs(void)
546 /* Clear any pending PRCM interrupts */ 546 /* Clear any pending PRCM interrupts */
547 omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); 547 omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
548 548
549 if (omap3_has_iva()) 549 /*
550 omap3_iva_idle(); 550 * We need to idle iva2_pwrdm even on am3703 with no iva2.
551 */
552 omap3_iva_idle();
551 553
552 omap3_d2d_idle(); 554 omap3_d2d_idle();
553} 555}
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 8396b5b7e912..f6601563aa69 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -95,38 +95,9 @@ static void omap_uart_enable_wakeup(struct device *dev, bool enable)
95 omap_hwmod_disable_wakeup(od->hwmods[0]); 95 omap_hwmod_disable_wakeup(od->hwmods[0]);
96} 96}
97 97
98/*
99 * Errata i291: [UART]:Cannot Acknowledge Idle Requests
100 * in Smartidle Mode When Configured for DMA Operations.
101 * WA: configure uart in force idle mode.
102 */
103static void omap_uart_set_noidle(struct device *dev)
104{
105 struct platform_device *pdev = to_platform_device(dev);
106 struct omap_device *od = to_omap_device(pdev);
107
108 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_NO);
109}
110
111static void omap_uart_set_smartidle(struct device *dev)
112{
113 struct platform_device *pdev = to_platform_device(dev);
114 struct omap_device *od = to_omap_device(pdev);
115 u8 idlemode;
116
117 if (od->hwmods[0]->class->sysc->idlemodes & SIDLE_SMART_WKUP)
118 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
119 else
120 idlemode = HWMOD_IDLEMODE_SMART;
121
122 omap_hwmod_set_slave_idlemode(od->hwmods[0], idlemode);
123}
124
125#else 98#else
126static void omap_uart_enable_wakeup(struct device *dev, bool enable) 99static void omap_uart_enable_wakeup(struct device *dev, bool enable)
127{} 100{}
128static void omap_uart_set_noidle(struct device *dev) {}
129static void omap_uart_set_smartidle(struct device *dev) {}
130#endif /* CONFIG_PM */ 101#endif /* CONFIG_PM */
131 102
132#ifdef CONFIG_OMAP_MUX 103#ifdef CONFIG_OMAP_MUX
@@ -299,8 +270,6 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
299 omap_up.uartclk = OMAP24XX_BASE_BAUD * 16; 270 omap_up.uartclk = OMAP24XX_BASE_BAUD * 16;
300 omap_up.flags = UPF_BOOT_AUTOCONF; 271 omap_up.flags = UPF_BOOT_AUTOCONF;
301 omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count; 272 omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count;
302 omap_up.set_forceidle = omap_uart_set_smartidle;
303 omap_up.set_noidle = omap_uart_set_noidle;
304 omap_up.enable_wakeup = omap_uart_enable_wakeup; 273 omap_up.enable_wakeup = omap_uart_enable_wakeup;
305 omap_up.dma_rx_buf_size = info->dma_rx_buf_size; 274 omap_up.dma_rx_buf_size = info->dma_rx_buf_size;
306 omap_up.dma_rx_timeout = info->dma_rx_timeout; 275 omap_up.dma_rx_timeout = info->dma_rx_timeout;
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index b97fd672e89d..f8a6db9239bf 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -199,13 +199,6 @@ void __init orion5x_init_early(void)
199 199
200 orion_time_set_base(TIMER_VIRT_BASE); 200 orion_time_set_base(TIMER_VIRT_BASE);
201 201
202 /*
203 * Some Orion5x devices allocate their coherent buffers from atomic
204 * context. Increase size of atomic coherent pool to make sure such
205 * the allocations won't fail.
206 */
207 init_dma_coherent_pool_size(SZ_1M);
208
209 /* Initialize the MBUS driver */ 202 /* Initialize the MBUS driver */
210 orion5x_pcie_id(&dev, &rev); 203 orion5x_pcie_id(&dev, &rev);
211 if (dev == MV88F5281_DEV_ID) 204 if (dev == MV88F5281_DEV_ID)
diff --git a/arch/arm/mach-prima2/pm.c b/arch/arm/mach-prima2/pm.c
index 9936c180bf01..8f595c0cc8d9 100644
--- a/arch/arm/mach-prima2/pm.c
+++ b/arch/arm/mach-prima2/pm.c
@@ -101,8 +101,10 @@ static int __init sirfsoc_of_pwrc_init(void)
101 struct device_node *np; 101 struct device_node *np;
102 102
103 np = of_find_matching_node(NULL, pwrc_ids); 103 np = of_find_matching_node(NULL, pwrc_ids);
104 if (!np) 104 if (!np) {
105 panic("unable to find compatible pwrc node in dtb\n"); 105 pr_err("unable to find compatible sirf pwrc node in dtb\n");
106 return -ENOENT;
107 }
106 108
107 /* 109 /*
108 * pwrc behind rtciobrg is not located in memory space 110 * pwrc behind rtciobrg is not located in memory space
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c
index 435019ca0a48..d5e0cbc934c0 100644
--- a/arch/arm/mach-prima2/rstc.c
+++ b/arch/arm/mach-prima2/rstc.c
@@ -28,8 +28,10 @@ static int __init sirfsoc_of_rstc_init(void)
28 struct device_node *np; 28 struct device_node *np;
29 29
30 np = of_find_matching_node(NULL, rstc_ids); 30 np = of_find_matching_node(NULL, rstc_ids);
31 if (!np) 31 if (!np) {
32 panic("unable to find compatible rstc node in dtb\n"); 32 pr_err("unable to find compatible sirf rstc node in dtb\n");
33 return -ENOENT;
34 }
33 35
34 sirfsoc_rstc_base = of_iomap(np, 0); 36 sirfsoc_rstc_base = of_iomap(np, 0);
35 if (!sirfsoc_rstc_base) 37 if (!sirfsoc_rstc_base)
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
index 91052855cc12..b9594e911ce7 100644
--- a/arch/arm/mach-shmobile/board-marzen.c
+++ b/arch/arm/mach-shmobile/board-marzen.c
@@ -212,8 +212,8 @@ static struct platform_device *marzen_devices[] __initdata = {
212static struct usb_phy *phy; 212static struct usb_phy *phy;
213static int usb_power_on(struct platform_device *pdev) 213static int usb_power_on(struct platform_device *pdev)
214{ 214{
215 if (!phy) 215 if (IS_ERR(phy))
216 return -EIO; 216 return PTR_ERR(phy);
217 217
218 pm_runtime_enable(&pdev->dev); 218 pm_runtime_enable(&pdev->dev);
219 pm_runtime_get_sync(&pdev->dev); 219 pm_runtime_get_sync(&pdev->dev);
@@ -225,7 +225,7 @@ static int usb_power_on(struct platform_device *pdev)
225 225
226static void usb_power_off(struct platform_device *pdev) 226static void usb_power_off(struct platform_device *pdev)
227{ 227{
228 if (!phy) 228 if (IS_ERR(phy))
229 return; 229 return;
230 230
231 usb_phy_shutdown(phy); 231 usb_phy_shutdown(phy);
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index fdf3894b1cc3..9696f3646864 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -252,7 +252,7 @@ static struct sh_timer_config cmt10_platform_data = {
252 .name = "CMT10", 252 .name = "CMT10",
253 .channel_offset = 0x10, 253 .channel_offset = 0x10,
254 .timer_bit = 0, 254 .timer_bit = 0,
255 .clockevent_rating = 125, 255 .clockevent_rating = 80,
256 .clocksource_rating = 125, 256 .clocksource_rating = 125,
257}; 257};
258 258
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index d259c782d742..5b045e302b43 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -1,5 +1,6 @@
1config ARCH_SUNXI 1config ARCH_SUNXI
2 bool "Allwinner A1X SOCs" if ARCH_MULTI_V7 2 bool "Allwinner A1X SOCs" if ARCH_MULTI_V7
3 select ARCH_REQUIRE_GPIOLIB
3 select CLKSRC_MMIO 4 select CLKSRC_MMIO
4 select CLKSRC_OF 5 select CLKSRC_OF
5 select COMMON_CLK 6 select COMMON_CLK
diff --git a/arch/arm/mach-tegra/tegra2_emc.c b/arch/arm/mach-tegra/tegra2_emc.c
index 9e8bdfa2b369..31e69a019bdd 100644
--- a/arch/arm/mach-tegra/tegra2_emc.c
+++ b/arch/arm/mach-tegra/tegra2_emc.c
@@ -307,11 +307,6 @@ static int tegra_emc_probe(struct platform_device *pdev)
307 } 307 }
308 308
309 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 309 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
310 if (!res) {
311 dev_err(&pdev->dev, "missing register base\n");
312 return -ENOMEM;
313 }
314
315 emc_regbase = devm_ioremap_resource(&pdev->dev, res); 310 emc_regbase = devm_ioremap_resource(&pdev->dev, res);
316 if (IS_ERR(emc_regbase)) 311 if (IS_ERR(emc_regbase))
317 return PTR_ERR(emc_regbase); 312 return PTR_ERR(emc_regbase);
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 6a4387e39df8..b19b07204aaf 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -51,6 +51,7 @@ config MACH_MOP500
51 bool "U8500 Development platform, MOP500 versions" 51 bool "U8500 Development platform, MOP500 versions"
52 select I2C 52 select I2C
53 select I2C_NOMADIK 53 select I2C_NOMADIK
54 select REGULATOR
54 select REGULATOR_FIXED_VOLTAGE 55 select REGULATOR_FIXED_VOLTAGE
55 select SOC_BUS 56 select SOC_BUS
56 select UX500_SOC_DB8500 57 select UX500_SOC_DB8500
diff --git a/arch/arm/mach-ux500/board-mop500-regulators.c b/arch/arm/mach-ux500/board-mop500-regulators.c
index 33c353bc1c4a..d6b7c8556fa1 100644
--- a/arch/arm/mach-ux500/board-mop500-regulators.c
+++ b/arch/arm/mach-ux500/board-mop500-regulators.c
@@ -374,6 +374,7 @@ static struct ab8500_regulator_reg_init ab8500_reg_init[] = {
374static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = { 374static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
375 /* supplies to the display/camera */ 375 /* supplies to the display/camera */
376 [AB8500_LDO_AUX1] = { 376 [AB8500_LDO_AUX1] = {
377 .supply_regulator = "ab8500-ext-supply3",
377 .constraints = { 378 .constraints = {
378 .name = "V-DISPLAY", 379 .name = "V-DISPLAY",
379 .min_uV = 2800000, 380 .min_uV = 2800000,
@@ -387,6 +388,7 @@ static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
387 }, 388 },
388 /* supplies to the on-board eMMC */ 389 /* supplies to the on-board eMMC */
389 [AB8500_LDO_AUX2] = { 390 [AB8500_LDO_AUX2] = {
391 .supply_regulator = "ab8500-ext-supply3",
390 .constraints = { 392 .constraints = {
391 .name = "V-eMMC1", 393 .name = "V-eMMC1",
392 .min_uV = 1100000, 394 .min_uV = 1100000,
@@ -402,6 +404,7 @@ static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
402 }, 404 },
403 /* supply for VAUX3, supplies to SDcard slots */ 405 /* supply for VAUX3, supplies to SDcard slots */
404 [AB8500_LDO_AUX3] = { 406 [AB8500_LDO_AUX3] = {
407 .supply_regulator = "ab8500-ext-supply3",
405 .constraints = { 408 .constraints = {
406 .name = "V-MMC-SD", 409 .name = "V-MMC-SD",
407 .min_uV = 1100000, 410 .min_uV = 1100000,
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 3cd555ac6d0a..78389de94dde 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -623,7 +623,7 @@ static void __init mop500_init_machine(void)
623 sdi0_reg_info.gpios[0].gpio = GPIO_SDMMC_1V8_3V_SEL; 623 sdi0_reg_info.gpios[0].gpio = GPIO_SDMMC_1V8_3V_SEL;
624 624
625 mop500_pinmaps_init(); 625 mop500_pinmaps_init();
626 parent = u8500_init_devices(&ab8500_platdata); 626 parent = u8500_init_devices();
627 627
628 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++) 628 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
629 mop500_platform_devs[i]->dev.parent = parent; 629 mop500_platform_devs[i]->dev.parent = parent;
@@ -660,7 +660,7 @@ static void __init snowball_init_machine(void)
660 sdi0_reg_info.gpios[0].gpio = SNOWBALL_SDMMC_1V8_3V_GPIO; 660 sdi0_reg_info.gpios[0].gpio = SNOWBALL_SDMMC_1V8_3V_GPIO;
661 661
662 snowball_pinmaps_init(); 662 snowball_pinmaps_init();
663 parent = u8500_init_devices(&ab8500_platdata); 663 parent = u8500_init_devices();
664 664
665 for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++) 665 for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
666 snowball_platform_devs[i]->dev.parent = parent; 666 snowball_platform_devs[i]->dev.parent = parent;
@@ -698,7 +698,7 @@ static void __init hrefv60_init_machine(void)
698 sdi0_reg_info.gpios[0].gpio = HREFV60_SDMMC_1V8_3V_GPIO; 698 sdi0_reg_info.gpios[0].gpio = HREFV60_SDMMC_1V8_3V_GPIO;
699 699
700 hrefv60_pinmaps_init(); 700 hrefv60_pinmaps_init();
701 parent = u8500_init_devices(&ab8500_platdata); 701 parent = u8500_init_devices();
702 702
703 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++) 703 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
704 mop500_platform_devs[i]->dev.parent = parent; 704 mop500_platform_devs[i]->dev.parent = parent;
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index e90b5ab23b6d..46cca52890bc 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -206,7 +206,7 @@ static struct device * __init db8500_soc_device_init(void)
206/* 206/*
207 * This function is called from the board init 207 * This function is called from the board init
208 */ 208 */
209struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500) 209struct device * __init u8500_init_devices(void)
210{ 210{
211 struct device *parent; 211 struct device *parent;
212 int i; 212 int i;
@@ -220,8 +220,6 @@ struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500)
220 for (i = 0; i < ARRAY_SIZE(platform_devs); i++) 220 for (i = 0; i < ARRAY_SIZE(platform_devs); i++)
221 platform_devs[i]->dev.parent = parent; 221 platform_devs[i]->dev.parent = parent;
222 222
223 db8500_prcmu_device.dev.platform_data = ab8500;
224
225 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); 223 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
226 224
227 return parent; 225 return parent;
@@ -278,7 +276,7 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
278 OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL), 276 OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
279 OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", 277 OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
280 &db8500_prcmu_pdata), 278 &db8500_prcmu_pdata),
281 OF_DEV_AUXDATA("smsc,lan9115", 0x50000000, "smsc911x", NULL), 279 OF_DEV_AUXDATA("smsc,lan9115", 0x50000000, "smsc911x.0", NULL),
282 /* Requires device name bindings. */ 280 /* Requires device name bindings. */
283 OF_DEV_AUXDATA("stericsson,nmk-pinctrl", U8500_PRCMU_BASE, 281 OF_DEV_AUXDATA("stericsson,nmk-pinctrl", U8500_PRCMU_BASE,
284 "pinctrl-db8500", NULL), 282 "pinctrl-db8500", NULL),
diff --git a/arch/arm/mach-ux500/cpuidle.c b/arch/arm/mach-ux500/cpuidle.c
index 317a2be129fb..a45dd09daed9 100644
--- a/arch/arm/mach-ux500/cpuidle.c
+++ b/arch/arm/mach-ux500/cpuidle.c
@@ -21,6 +21,7 @@
21#include <asm/proc-fns.h> 21#include <asm/proc-fns.h>
22 22
23#include "db8500-regs.h" 23#include "db8500-regs.h"
24#include "id.h"
24 25
25static atomic_t master = ATOMIC_INIT(0); 26static atomic_t master = ATOMIC_INIT(0);
26static DEFINE_SPINLOCK(master_lock); 27static DEFINE_SPINLOCK(master_lock);
@@ -114,6 +115,9 @@ static struct cpuidle_driver ux500_idle_driver = {
114 115
115int __init ux500_idle_init(void) 116int __init ux500_idle_init(void)
116{ 117{
118 if (!(cpu_is_u8500_family() || cpu_is_ux540_family()))
119 return -ENODEV;
120
117 /* Configure wake up reasons */ 121 /* Configure wake up reasons */
118 prcmu_enable_wakeups(PRCMU_WAKEUP(ARM) | PRCMU_WAKEUP(RTC) | 122 prcmu_enable_wakeups(PRCMU_WAKEUP(ARM) | PRCMU_WAKEUP(RTC) |
119 PRCMU_WAKEUP(ABB)); 123 PRCMU_WAKEUP(ABB));
diff --git a/arch/arm/mach-ux500/setup.h b/arch/arm/mach-ux500/setup.h
index bddce2b49372..cad3ca86c540 100644
--- a/arch/arm/mach-ux500/setup.h
+++ b/arch/arm/mach-ux500/setup.h
@@ -18,7 +18,7 @@
18void __init ux500_map_io(void); 18void __init ux500_map_io(void);
19extern void __init u8500_map_io(void); 19extern void __init u8500_map_io(void);
20 20
21extern struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500); 21extern struct device * __init u8500_init_devices(void);
22 22
23extern void __init ux500_init_irq(void); 23extern void __init ux500_init_irq(void);
24extern void __init ux500_init_late(void); 24extern void __init ux500_init_late(void);
diff --git a/arch/arm/mach-vt8500/vt8500.c b/arch/arm/mach-vt8500/vt8500.c
index 1dd281efc020..f5c33df7a597 100644
--- a/arch/arm/mach-vt8500/vt8500.c
+++ b/arch/arm/mach-vt8500/vt8500.c
@@ -173,6 +173,7 @@ static const char * const vt8500_dt_compat[] = {
173 "wm,wm8505", 173 "wm,wm8505",
174 "wm,wm8750", 174 "wm,wm8750",
175 "wm,wm8850", 175 "wm,wm8850",
176 NULL
176}; 177};
177 178
178DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)") 179DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)")
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 15451ee4acc8..515b00064da8 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -92,6 +92,14 @@ ENTRY(v7_flush_dcache_louis)
92 mrc p15, 1, r0, c0, c0, 1 @ read clidr, r0 = clidr 92 mrc p15, 1, r0, c0, c0, 1 @ read clidr, r0 = clidr
93 ALT_SMP(ands r3, r0, #(7 << 21)) @ extract LoUIS from clidr 93 ALT_SMP(ands r3, r0, #(7 << 21)) @ extract LoUIS from clidr
94 ALT_UP(ands r3, r0, #(7 << 27)) @ extract LoUU from clidr 94 ALT_UP(ands r3, r0, #(7 << 27)) @ extract LoUU from clidr
95#ifdef CONFIG_ARM_ERRATA_643719
96 ALT_SMP(mrceq p15, 0, r2, c0, c0, 0) @ read main ID register
97 ALT_UP(moveq pc, lr) @ LoUU is zero, so nothing to do
98 ldreq r1, =0x410fc090 @ ID of ARM Cortex A9 r0p?
99 biceq r2, r2, #0x0000000f @ clear minor revision number
100 teqeq r2, r1 @ test for errata affected core and if so...
101 orreqs r3, #(1 << 21) @ fix LoUIS value (and set flags state to 'ne')
102#endif
95 ALT_SMP(mov r3, r3, lsr #20) @ r3 = LoUIS * 2 103 ALT_SMP(mov r3, r3, lsr #20) @ r3 = LoUIS * 2
96 ALT_UP(mov r3, r3, lsr #26) @ r3 = LoUU * 2 104 ALT_UP(mov r3, r3, lsr #26) @ r3 = LoUU * 2
97 moveq pc, lr @ return if level == 0 105 moveq pc, lr @ return if level == 0
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 0d473cce501c..32aa5861119f 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -301,6 +301,39 @@ void flush_dcache_page(struct page *page)
301EXPORT_SYMBOL(flush_dcache_page); 301EXPORT_SYMBOL(flush_dcache_page);
302 302
303/* 303/*
304 * Ensure cache coherency for the kernel mapping of this page. We can
305 * assume that the page is pinned via kmap.
306 *
307 * If the page only exists in the page cache and there are no user
308 * space mappings, this is a no-op since the page was already marked
309 * dirty at creation. Otherwise, we need to flush the dirty kernel
310 * cache lines directly.
311 */
312void flush_kernel_dcache_page(struct page *page)
313{
314 if (cache_is_vivt() || cache_is_vipt_aliasing()) {
315 struct address_space *mapping;
316
317 mapping = page_mapping(page);
318
319 if (!mapping || mapping_mapped(mapping)) {
320 void *addr;
321
322 addr = page_address(page);
323 /*
324 * kmap_atomic() doesn't set the page virtual
325 * address for highmem pages, and
326 * kunmap_atomic() takes care of cache
327 * flushing already.
328 */
329 if (!IS_ENABLED(CONFIG_HIGHMEM) || addr)
330 __cpuc_flush_dcache_area(addr, PAGE_SIZE);
331 }
332 }
333}
334EXPORT_SYMBOL(flush_kernel_dcache_page);
335
336/*
304 * Flush an anonymous page so that users of get_user_pages() 337 * Flush an anonymous page so that users of get_user_pages()
305 * can safely access the data. The expected sequence is: 338 * can safely access the data. The expected sequence is:
306 * 339 *
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index e0d8565671a6..4d409e6a552d 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -616,10 +616,12 @@ static void __init alloc_init_pte(pmd_t *pmd, unsigned long addr,
616 } while (pte++, addr += PAGE_SIZE, addr != end); 616 } while (pte++, addr += PAGE_SIZE, addr != end);
617} 617}
618 618
619static void __init map_init_section(pmd_t *pmd, unsigned long addr, 619static void __init __map_init_section(pmd_t *pmd, unsigned long addr,
620 unsigned long end, phys_addr_t phys, 620 unsigned long end, phys_addr_t phys,
621 const struct mem_type *type) 621 const struct mem_type *type)
622{ 622{
623 pmd_t *p = pmd;
624
623#ifndef CONFIG_ARM_LPAE 625#ifndef CONFIG_ARM_LPAE
624 /* 626 /*
625 * In classic MMU format, puds and pmds are folded in to 627 * In classic MMU format, puds and pmds are folded in to
@@ -638,7 +640,7 @@ static void __init map_init_section(pmd_t *pmd, unsigned long addr,
638 phys += SECTION_SIZE; 640 phys += SECTION_SIZE;
639 } while (pmd++, addr += SECTION_SIZE, addr != end); 641 } while (pmd++, addr += SECTION_SIZE, addr != end);
640 642
641 flush_pmd_entry(pmd); 643 flush_pmd_entry(p);
642} 644}
643 645
644static void __init alloc_init_pmd(pud_t *pud, unsigned long addr, 646static void __init alloc_init_pmd(pud_t *pud, unsigned long addr,
@@ -661,7 +663,7 @@ static void __init alloc_init_pmd(pud_t *pud, unsigned long addr,
661 */ 663 */
662 if (type->prot_sect && 664 if (type->prot_sect &&
663 ((addr | next | phys) & ~SECTION_MASK) == 0) { 665 ((addr | next | phys) & ~SECTION_MASK) == 0) {
664 map_init_section(pmd, addr, next, phys, type); 666 __map_init_section(pmd, addr, next, phys, type);
665 } else { 667 } else {
666 alloc_init_pte(pmd, addr, next, 668 alloc_init_pte(pmd, addr, next,
667 __phys_to_pfn(phys), type); 669 __phys_to_pfn(phys), type);
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index d51225f90ae2..eb5293a69a84 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -57,6 +57,12 @@ void flush_dcache_page(struct page *page)
57} 57}
58EXPORT_SYMBOL(flush_dcache_page); 58EXPORT_SYMBOL(flush_dcache_page);
59 59
60void flush_kernel_dcache_page(struct page *page)
61{
62 __cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
63}
64EXPORT_SYMBOL(flush_kernel_dcache_page);
65
60void copy_to_user_page(struct vm_area_struct *vma, struct page *page, 66void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
61 unsigned long uaddr, void *dst, const void *src, 67 unsigned long uaddr, void *dst, const void *src,
62 unsigned long len) 68 unsigned long len)
diff --git a/arch/arm/mm/proc-fa526.S b/arch/arm/mm/proc-fa526.S
index d217e9795d74..aaeb6c127c7a 100644
--- a/arch/arm/mm/proc-fa526.S
+++ b/arch/arm/mm/proc-fa526.S
@@ -81,7 +81,6 @@ ENDPROC(cpu_fa526_reset)
81 */ 81 */
82 .align 4 82 .align 4
83ENTRY(cpu_fa526_do_idle) 83ENTRY(cpu_fa526_do_idle)
84 mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt
85 mov pc, lr 84 mov pc, lr
86 85
87 86
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index f9a0aa725ea9..e3c48a3fe063 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -333,3 +333,8 @@ ENTRY(\name\()_tlb_fns)
333 .endif 333 .endif
334 .size \name\()_tlb_fns, . - \name\()_tlb_fns 334 .size \name\()_tlb_fns, . - \name\()_tlb_fns
335.endm 335.endm
336
337.macro globl_equ x, y
338 .globl \x
339 .equ \x, \y
340.endm
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 2c73a7301ff7..e35fec34453e 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -140,6 +140,29 @@ ENTRY(cpu_v7_do_resume)
140ENDPROC(cpu_v7_do_resume) 140ENDPROC(cpu_v7_do_resume)
141#endif 141#endif
142 142
143#ifdef CONFIG_CPU_PJ4B
144 globl_equ cpu_pj4b_switch_mm, cpu_v7_switch_mm
145 globl_equ cpu_pj4b_set_pte_ext, cpu_v7_set_pte_ext
146 globl_equ cpu_pj4b_proc_init, cpu_v7_proc_init
147 globl_equ cpu_pj4b_proc_fin, cpu_v7_proc_fin
148 globl_equ cpu_pj4b_reset, cpu_v7_reset
149#ifdef CONFIG_PJ4B_ERRATA_4742
150ENTRY(cpu_pj4b_do_idle)
151 dsb @ WFI may enter a low-power mode
152 wfi
153 dsb @barrier
154 mov pc, lr
155ENDPROC(cpu_pj4b_do_idle)
156#else
157 globl_equ cpu_pj4b_do_idle, cpu_v7_do_idle
158#endif
159 globl_equ cpu_pj4b_dcache_clean_area, cpu_v7_dcache_clean_area
160 globl_equ cpu_pj4b_do_suspend, cpu_v7_do_suspend
161 globl_equ cpu_pj4b_do_resume, cpu_v7_do_resume
162 globl_equ cpu_pj4b_suspend_size, cpu_v7_suspend_size
163
164#endif
165
143 __CPUINIT 166 __CPUINIT
144 167
145/* 168/*
@@ -350,6 +373,9 @@ __v7_setup_stack:
350 373
351 @ define struct processor (see <asm/proc-fns.h> and proc-macros.S) 374 @ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
352 define_processor_functions v7, dabort=v7_early_abort, pabort=v7_pabort, suspend=1 375 define_processor_functions v7, dabort=v7_early_abort, pabort=v7_pabort, suspend=1
376#ifdef CONFIG_CPU_PJ4B
377 define_processor_functions pj4b, dabort=v7_early_abort, pabort=v7_pabort, suspend=1
378#endif
353 379
354 .section ".rodata" 380 .section ".rodata"
355 381
@@ -362,7 +388,7 @@ __v7_setup_stack:
362 /* 388 /*
363 * Standard v7 proc info content 389 * Standard v7 proc info content
364 */ 390 */
365.macro __v7_proc initfunc, mm_mmuflags = 0, io_mmuflags = 0, hwcaps = 0 391.macro __v7_proc initfunc, mm_mmuflags = 0, io_mmuflags = 0, hwcaps = 0, proc_fns = v7_processor_functions
366 ALT_SMP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \ 392 ALT_SMP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \
367 PMD_SECT_AF | PMD_FLAGS_SMP | \mm_mmuflags) 393 PMD_SECT_AF | PMD_FLAGS_SMP | \mm_mmuflags)
368 ALT_UP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \ 394 ALT_UP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \
@@ -375,7 +401,7 @@ __v7_setup_stack:
375 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_FAST_MULT | \ 401 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_FAST_MULT | \
376 HWCAP_EDSP | HWCAP_TLS | \hwcaps 402 HWCAP_EDSP | HWCAP_TLS | \hwcaps
377 .long cpu_v7_name 403 .long cpu_v7_name
378 .long v7_processor_functions 404 .long \proc_fns
379 .long v7wbi_tlb_fns 405 .long v7wbi_tlb_fns
380 .long v6_user_fns 406 .long v6_user_fns
381 .long v7_cache_fns 407 .long v7_cache_fns
@@ -407,12 +433,14 @@ __v7_ca9mp_proc_info:
407 /* 433 /*
408 * Marvell PJ4B processor. 434 * Marvell PJ4B processor.
409 */ 435 */
436#ifdef CONFIG_CPU_PJ4B
410 .type __v7_pj4b_proc_info, #object 437 .type __v7_pj4b_proc_info, #object
411__v7_pj4b_proc_info: 438__v7_pj4b_proc_info:
412 .long 0x562f5840 439 .long 0x560f5800
413 .long 0xfffffff0 440 .long 0xff0fff00
414 __v7_proc __v7_pj4b_setup 441 __v7_proc __v7_pj4b_setup, proc_fns = pj4b_processor_functions
415 .size __v7_pj4b_proc_info, . - __v7_pj4b_proc_info 442 .size __v7_pj4b_proc_info, . - __v7_pj4b_proc_info
443#endif
416 444
417 /* 445 /*
418 * ARM Ltd. Cortex A7 processor. 446 * ARM Ltd. Cortex A7 processor.
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index 251f827271e9..c019b7aaf776 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -383,7 +383,7 @@ static struct resource orion_ge10_shared_resources[] = {
383 383
384static struct platform_device orion_ge10_shared = { 384static struct platform_device orion_ge10_shared = {
385 .name = MV643XX_ETH_SHARED_NAME, 385 .name = MV643XX_ETH_SHARED_NAME,
386 .id = 1, 386 .id = 2,
387 .dev = { 387 .dev = {
388 .platform_data = &orion_ge10_shared_data, 388 .platform_data = &orion_ge10_shared_data,
389 }, 389 },
@@ -398,8 +398,8 @@ static struct resource orion_ge10_resources[] = {
398 398
399static struct platform_device orion_ge10 = { 399static struct platform_device orion_ge10 = {
400 .name = MV643XX_ETH_NAME, 400 .name = MV643XX_ETH_NAME,
401 .id = 1, 401 .id = 2,
402 .num_resources = 2, 402 .num_resources = 1,
403 .resource = orion_ge10_resources, 403 .resource = orion_ge10_resources,
404 .dev = { 404 .dev = {
405 .coherent_dma_mask = DMA_BIT_MASK(32), 405 .coherent_dma_mask = DMA_BIT_MASK(32),
@@ -432,7 +432,7 @@ static struct resource orion_ge11_shared_resources[] = {
432 432
433static struct platform_device orion_ge11_shared = { 433static struct platform_device orion_ge11_shared = {
434 .name = MV643XX_ETH_SHARED_NAME, 434 .name = MV643XX_ETH_SHARED_NAME,
435 .id = 1, 435 .id = 3,
436 .dev = { 436 .dev = {
437 .platform_data = &orion_ge11_shared_data, 437 .platform_data = &orion_ge11_shared_data,
438 }, 438 },
@@ -447,8 +447,8 @@ static struct resource orion_ge11_resources[] = {
447 447
448static struct platform_device orion_ge11 = { 448static struct platform_device orion_ge11 = {
449 .name = MV643XX_ETH_NAME, 449 .name = MV643XX_ETH_NAME,
450 .id = 1, 450 .id = 3,
451 .num_resources = 2, 451 .num_resources = 1,
452 .resource = orion_ge11_resources, 452 .resource = orion_ge11_resources,
453 .dev = { 453 .dev = {
454 .coherent_dma_mask = DMA_BIT_MASK(32), 454 .coherent_dma_mask = DMA_BIT_MASK(32),
diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h
index e06fc5fefa14..d9a24f605a2b 100644
--- a/arch/arm/plat-orion/include/plat/common.h
+++ b/arch/arm/plat-orion/include/plat/common.h
@@ -10,6 +10,7 @@
10 10
11#ifndef __PLAT_COMMON_H 11#ifndef __PLAT_COMMON_H
12#include <linux/mv643xx_eth.h> 12#include <linux/mv643xx_eth.h>
13#include <linux/platform_data/usb-ehci-orion.h>
13 14
14struct dsa_platform_data; 15struct dsa_platform_data;
15struct mv_sata_platform_data; 16struct mv_sata_platform_data;
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c
index ca07cb1b155a..79690f2f6d3f 100644
--- a/arch/arm/plat-samsung/adc.c
+++ b/arch/arm/plat-samsung/adc.c
@@ -381,11 +381,6 @@ static int s3c_adc_probe(struct platform_device *pdev)
381 } 381 }
382 382
383 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 383 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
384 if (!regs) {
385 dev_err(dev, "failed to find registers\n");
386 return -ENXIO;
387 }
388
389 adc->regs = devm_ioremap_resource(dev, regs); 384 adc->regs = devm_ioremap_resource(dev, regs);
390 if (IS_ERR(adc->regs)) 385 if (IS_ERR(adc->regs))
391 return PTR_ERR(adc->regs); 386 return PTR_ERR(adc->regs);
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 30c2fe243f76..0f9c3f431a5f 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -311,9 +311,9 @@ struct platform_device s5p_device_jpeg = {
311#ifdef CONFIG_S5P_DEV_FIMD0 311#ifdef CONFIG_S5P_DEV_FIMD0
312static struct resource s5p_fimd0_resource[] = { 312static struct resource s5p_fimd0_resource[] = {
313 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K), 313 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
314 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC), 314 [1] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_VSYNC, "vsync"),
315 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO), 315 [2] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_FIFO, "fifo"),
316 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM), 316 [3] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_SYSTEM, "lcd_sys"),
317}; 317};
318 318
319struct platform_device s5p_device_fimd0 = { 319struct platform_device s5p_device_fimd0 = {
diff --git a/arch/arm/plat-samsung/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h
index 438b24846e7f..02b66d723d1a 100644
--- a/arch/arm/plat-samsung/include/plat/uncompress.h
+++ b/arch/arm/plat-samsung/include/plat/uncompress.h
@@ -66,6 +66,9 @@ uart_rd(unsigned int reg)
66 66
67static void putc(int ch) 67static void putc(int ch)
68{ 68{
69 if (!config_enabled(CONFIG_DEBUG_LL))
70 return;
71
69 if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) { 72 if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
70 int level; 73 int level;
71 74
@@ -118,7 +121,12 @@ static void arch_decomp_error(const char *x)
118#ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO 121#ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO
119static inline void arch_enable_uart_fifo(void) 122static inline void arch_enable_uart_fifo(void)
120{ 123{
121 u32 fifocon = uart_rd(S3C2410_UFCON); 124 u32 fifocon;
125
126 if (!config_enabled(CONFIG_DEBUG_LL))
127 return;
128
129 fifocon = uart_rd(S3C2410_UFCON);
122 130
123 if (!(fifocon & S3C2410_UFCON_FIFOMODE)) { 131 if (!(fifocon & S3C2410_UFCON_FIFOMODE)) {
124 fifocon |= S3C2410_UFCON_RESETBOTH; 132 fifocon |= S3C2410_UFCON_RESETBOTH;
diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c
index 53210ec4e8ec..bd7124c87fea 100644
--- a/arch/arm/plat-samsung/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -16,6 +16,7 @@
16#include <linux/suspend.h> 16#include <linux/suspend.h>
17#include <linux/errno.h> 17#include <linux/errno.h>
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/of.h>
19#include <linux/serial_core.h> 20#include <linux/serial_core.h>
20#include <linux/io.h> 21#include <linux/io.h>
21 22
@@ -261,7 +262,8 @@ static int s3c_pm_enter(suspend_state_t state)
261 * require a full power-cycle) 262 * require a full power-cycle)
262 */ 263 */
263 264
264 if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) && 265 if (!of_have_populated_dt() &&
266 !any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
265 !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) { 267 !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
266 printk(KERN_ERR "%s: No wake-up sources!\n", __func__); 268 printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
267 printk(KERN_ERR "%s: Aborting sleep\n", __func__); 269 printk(KERN_ERR "%s: Aborting sleep\n", __func__);
@@ -270,8 +272,11 @@ static int s3c_pm_enter(suspend_state_t state)
270 272
271 /* save all necessary core registers not covered by the drivers */ 273 /* save all necessary core registers not covered by the drivers */
272 274
273 samsung_pm_save_gpios(); 275 if (!of_have_populated_dt()) {
274 samsung_pm_saved_gpios(); 276 samsung_pm_save_gpios();
277 samsung_pm_saved_gpios();
278 }
279
275 s3c_pm_save_uarts(); 280 s3c_pm_save_uarts();
276 s3c_pm_save_core(); 281 s3c_pm_save_core();
277 282
@@ -310,8 +315,11 @@ static int s3c_pm_enter(suspend_state_t state)
310 315
311 s3c_pm_restore_core(); 316 s3c_pm_restore_core();
312 s3c_pm_restore_uarts(); 317 s3c_pm_restore_uarts();
313 samsung_pm_restore_gpios(); 318
314 s3c_pm_restored_gpios(); 319 if (!of_have_populated_dt()) {
320 samsung_pm_restore_gpios();
321 s3c_pm_restored_gpios();
322 }
315 323
316 s3c_pm_debug_init(); 324 s3c_pm_debug_init();
317 325
diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S
index 323ce1a62bbf..46e17492fd1f 100644
--- a/arch/arm/vfp/entry.S
+++ b/arch/arm/vfp/entry.S
@@ -60,7 +60,7 @@ ENTRY(vfp_testing_entry)
60 str r11, [r10, #TI_PREEMPT] 60 str r11, [r10, #TI_PREEMPT]
61#endif 61#endif
62 ldr r0, VFP_arch_address 62 ldr r0, VFP_arch_address
63 str r5, [r0] @ known non-zero value 63 str r0, [r0] @ set to non-zero value
64 mov pc, r9 @ we have handled the fault 64 mov pc, r9 @ we have handled the fault
65ENDPROC(vfp_testing_entry) 65ENDPROC(vfp_testing_entry)
66 66
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-07 12:08:27 -0500