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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2011-04-27 04:45:33 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-04-28 14:40:42 -0400
commit16dc062b42459e6ddd244c2bc8255cac45db47e4 (patch)
treea5e24cc662bed825ed0c8d294a09c1ecc74376d9 /arch/arm
parente8dad69408a9812d6bb42d03e74d2c314534a4fa (diff)
ARM: 6888/1: remove ns9xxx port
The port is actually unmaintained and only received global cleanups and a few build fixes since mid 2008. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig14
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/configs/ns9xxx_defconfig56
-rw-r--r--arch/arm/mach-ns9xxx/Kconfig40
-rw-r--r--arch/arm/mach-ns9xxx/Makefile12
-rw-r--r--arch/arm/mach-ns9xxx/Makefile.boot2
-rw-r--r--arch/arm/mach-ns9xxx/board-a9m9750dev.c156
-rw-r--r--arch/arm/mach-ns9xxx/board-a9m9750dev.h15
-rw-r--r--arch/arm/mach-ns9xxx/board-jscc9p9360.c17
-rw-r--r--arch/arm/mach-ns9xxx/board-jscc9p9360.h13
-rw-r--r--arch/arm/mach-ns9xxx/clock.c215
-rw-r--r--arch/arm/mach-ns9xxx/clock.h35
-rw-r--r--arch/arm/mach-ns9xxx/generic.c19
-rw-r--r--arch/arm/mach-ns9xxx/generic.h16
-rw-r--r--arch/arm/mach-ns9xxx/gpio-ns9360.c118
-rw-r--r--arch/arm/mach-ns9xxx/gpio-ns9360.h13
-rw-r--r--arch/arm/mach-ns9xxx/gpio.c147
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/board.h40
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/debug-macro.S21
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/entry-macro.S28
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/gpio.h47
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/hardware.h77
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/io.h20
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/irqs.h86
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/memory.h24
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/module.h55
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h32
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/processor.h42
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/regs-bbu.h45
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h24
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/regs-mem.h135
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h31
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h148
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/system.h35
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/timex.h20
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/uncompress.h164
-rw-r--r--arch/arm/mach-ns9xxx/include/mach/vmalloc.h16
-rw-r--r--arch/arm/mach-ns9xxx/irq.c74
-rw-r--r--arch/arm/mach-ns9xxx/mach-cc9p9360dev.c43
-rw-r--r--arch/arm/mach-ns9xxx/mach-cc9p9360js.c31
-rw-r--r--arch/arm/mach-ns9xxx/plat-serial8250.c70
-rw-r--r--arch/arm/mach-ns9xxx/processor-ns9360.c53
-rw-r--r--arch/arm/mach-ns9xxx/time-ns9360.c181
43 files changed, 0 insertions, 2431 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 377a7a595b08..0c23b52ee9fb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -554,18 +554,6 @@ config ARCH_KS8695
554 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based 554 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
555 System-on-Chip devices. 555 System-on-Chip devices.
556 556
557config ARCH_NS9XXX
558 bool "NetSilicon NS9xxx"
559 select CPU_ARM926T
560 select GENERIC_GPIO
561 select GENERIC_CLOCKEVENTS
562 select HAVE_CLK
563 help
564 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
565 System.
566
567 <http://www.digi.com/products/microprocessors/index.jsp>
568
569config ARCH_W90X900 557config ARCH_W90X900
570 bool "Nuvoton W90X900 CPU" 558 bool "Nuvoton W90X900 CPU"
571 select CPU_ARM926T 559 select CPU_ARM926T
@@ -951,8 +939,6 @@ source "arch/arm/mach-netx/Kconfig"
951source "arch/arm/mach-nomadik/Kconfig" 939source "arch/arm/mach-nomadik/Kconfig"
952source "arch/arm/plat-nomadik/Kconfig" 940source "arch/arm/plat-nomadik/Kconfig"
953 941
954source "arch/arm/mach-ns9xxx/Kconfig"
955
956source "arch/arm/mach-nuc93x/Kconfig" 942source "arch/arm/mach-nuc93x/Kconfig"
957 943
958source "arch/arm/plat-omap/Kconfig" 944source "arch/arm/plat-omap/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index c7d321a3d95d..d88a69b72b4b 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -164,7 +164,6 @@ machine-$(CONFIG_ARCH_MXC91231) := mxc91231
164machine-$(CONFIG_ARCH_MXS) := mxs 164machine-$(CONFIG_ARCH_MXS) := mxs
165machine-$(CONFIG_ARCH_NETX) := netx 165machine-$(CONFIG_ARCH_NETX) := netx
166machine-$(CONFIG_ARCH_NOMADIK) := nomadik 166machine-$(CONFIG_ARCH_NOMADIK) := nomadik
167machine-$(CONFIG_ARCH_NS9XXX) := ns9xxx
168machine-$(CONFIG_ARCH_OMAP1) := omap1 167machine-$(CONFIG_ARCH_OMAP1) := omap1
169machine-$(CONFIG_ARCH_OMAP2) := omap2 168machine-$(CONFIG_ARCH_OMAP2) := omap2
170machine-$(CONFIG_ARCH_OMAP3) := omap2 169machine-$(CONFIG_ARCH_OMAP3) := omap2
diff --git a/arch/arm/configs/ns9xxx_defconfig b/arch/arm/configs/ns9xxx_defconfig
deleted file mode 100644
index 1f528a002983..000000000000
--- a/arch/arm/configs/ns9xxx_defconfig
+++ /dev/null
@@ -1,56 +0,0 @@
1CONFIG_IKCONFIG=y
2CONFIG_IKCONFIG_PROC=y
3CONFIG_BLK_DEV_INITRD=y
4CONFIG_MODULES=y
5CONFIG_MODULE_UNLOAD=y
6# CONFIG_IOSCHED_DEADLINE is not set
7# CONFIG_IOSCHED_CFQ is not set
8CONFIG_ARCH_NS9XXX=y
9CONFIG_MACH_CC9P9360DEV=y
10CONFIG_MACH_CC9P9360JS=y
11CONFIG_NO_HZ=y
12CONFIG_HIGH_RES_TIMERS=y
13CONFIG_FPE_NWFPE=y
14CONFIG_NET=y
15CONFIG_PACKET=m
16CONFIG_INET=y
17CONFIG_IP_PNP=y
18CONFIG_SYN_COOKIES=y
19CONFIG_MTD=m
20CONFIG_MTD_CONCAT=m
21CONFIG_MTD_CHAR=m
22CONFIG_MTD_BLOCK=m
23CONFIG_MTD_CFI=m
24CONFIG_MTD_JEDECPROBE=m
25CONFIG_MTD_CFI_AMDSTD=m
26CONFIG_MTD_PHYSMAP=m
27CONFIG_BLK_DEV_LOOP=m
28CONFIG_NETDEVICES=y
29CONFIG_NET_ETHERNET=y
30# CONFIG_SERIO_SERPORT is not set
31CONFIG_SERIAL_8250=y
32CONFIG_SERIAL_8250_CONSOLE=y
33# CONFIG_LEGACY_PTYS is not set
34# CONFIG_HW_RANDOM is not set
35CONFIG_I2C=m
36CONFIG_I2C_GPIO=m
37# CONFIG_HWMON is not set
38# CONFIG_VGA_CONSOLE is not set
39# CONFIG_USB_SUPPORT is not set
40CONFIG_NEW_LEDS=y
41CONFIG_LEDS_CLASS=m
42CONFIG_LEDS_GPIO=m
43CONFIG_LEDS_TRIGGERS=y
44CONFIG_LEDS_TRIGGER_TIMER=m
45CONFIG_LEDS_TRIGGER_HEARTBEAT=m
46CONFIG_RTC_CLASS=m
47CONFIG_EXT2_FS=m
48CONFIG_TMPFS=y
49CONFIG_JFFS2_FS=m
50CONFIG_NFS_FS=y
51CONFIG_ROOT_NFS=y
52# CONFIG_ENABLE_MUST_CHECK is not set
53CONFIG_DEBUG_KERNEL=y
54CONFIG_DEBUG_INFO=y
55CONFIG_DEBUG_USER=y
56CONFIG_DEBUG_ERRORS=y
diff --git a/arch/arm/mach-ns9xxx/Kconfig b/arch/arm/mach-ns9xxx/Kconfig
deleted file mode 100644
index dd0cd5ac4b8b..000000000000
--- a/arch/arm/mach-ns9xxx/Kconfig
+++ /dev/null
@@ -1,40 +0,0 @@
1if ARCH_NS9XXX
2
3menu "NS9xxx Implementations"
4
5config NS9XXX_HAVE_SERIAL8250
6 bool
7
8config PROCESSOR_NS9360
9 bool
10
11config MODULE_CC9P9360
12 bool
13 select PROCESSOR_NS9360
14
15config BOARD_A9M9750DEV
16 select NS9XXX_HAVE_SERIAL8250
17 bool
18
19config BOARD_JSCC9P9360
20 bool
21
22config MACH_CC9P9360DEV
23 bool "ConnectCore 9P 9360 on an A9M9750 Devboard"
24 select MODULE_CC9P9360
25 select BOARD_A9M9750DEV
26 help
27 Say Y here if you are using the Digi ConnectCore 9P 9360
28 on an A9M9750 Development Board.
29
30config MACH_CC9P9360JS
31 bool "ConnectCore 9P 9360 on a JSCC9P9360 Devboard"
32 select MODULE_CC9P9360
33 select BOARD_JSCC9P9360
34 help
35 Say Y here if you are using the Digi ConnectCore 9P 9360
36 on an JSCC9P9360 Development Board.
37
38endmenu
39
40endif
diff --git a/arch/arm/mach-ns9xxx/Makefile b/arch/arm/mach-ns9xxx/Makefile
deleted file mode 100644
index 41efaf9ad50b..000000000000
--- a/arch/arm/mach-ns9xxx/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
1obj-y := clock.o generic.o gpio.o irq.o
2
3obj-$(CONFIG_MACH_CC9P9360DEV) += mach-cc9p9360dev.o
4obj-$(CONFIG_MACH_CC9P9360JS) += mach-cc9p9360js.o
5
6obj-$(CONFIG_PROCESSOR_NS9360) += gpio-ns9360.o processor-ns9360.o time-ns9360.o
7
8obj-$(CONFIG_BOARD_A9M9750DEV) += board-a9m9750dev.o
9obj-$(CONFIG_BOARD_JSCC9P9360) += board-jscc9p9360.o
10
11# platform devices
12obj-$(CONFIG_NS9XXX_HAVE_SERIAL8250) += plat-serial8250.o
diff --git a/arch/arm/mach-ns9xxx/Makefile.boot b/arch/arm/mach-ns9xxx/Makefile.boot
deleted file mode 100644
index 54654919229b..000000000000
--- a/arch/arm/mach-ns9xxx/Makefile.boot
+++ /dev/null
@@ -1,2 +0,0 @@
1zreladdr-y := 0x8000
2params_phys-y := 0x100
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
deleted file mode 100644
index e27687d53504..000000000000
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c
+++ /dev/null
@@ -1,156 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/board-a9m9750dev.c
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <linux/irq.h>
12
13#include <asm/mach/map.h>
14#include <asm/gpio.h>
15
16#include <mach/board.h>
17#include <mach/processor-ns9360.h>
18#include <mach/regs-sys-ns9360.h>
19#include <mach/regs-mem.h>
20#include <mach/regs-bbu.h>
21#include <mach/regs-board-a9m9750dev.h>
22
23#include "board-a9m9750dev.h"
24
25static struct map_desc board_a9m9750dev_io_desc[] __initdata = {
26 { /* FPGA on CS0 */
27 .virtual = io_p2v(NS9XXX_CSxSTAT_PHYS(0)),
28 .pfn = __phys_to_pfn(NS9XXX_CSxSTAT_PHYS(0)),
29 .length = NS9XXX_CS0STAT_LENGTH,
30 .type = MT_DEVICE,
31 },
32};
33
34void __init board_a9m9750dev_map_io(void)
35{
36 iotable_init(board_a9m9750dev_io_desc,
37 ARRAY_SIZE(board_a9m9750dev_io_desc));
38}
39
40static void a9m9750dev_fpga_ack_irq(struct irq_data *d)
41{
42 /* nothing */
43}
44
45static void a9m9750dev_fpga_mask_irq(struct irq_data *d)
46{
47 u8 ier;
48
49 ier = __raw_readb(FPGA_IER);
50
51 ier &= ~(1 << (d->irq - FPGA_IRQ(0)));
52
53 __raw_writeb(ier, FPGA_IER);
54}
55
56static void a9m9750dev_fpga_maskack_irq(struct irq_data *d)
57{
58 a9m9750dev_fpga_mask_irq(d);
59 a9m9750dev_fpga_ack_irq(d);
60}
61
62static void a9m9750dev_fpga_unmask_irq(struct irq_data *d)
63{
64 u8 ier;
65
66 ier = __raw_readb(FPGA_IER);
67
68 ier |= 1 << (d->irq - FPGA_IRQ(0));
69
70 __raw_writeb(ier, FPGA_IER);
71}
72
73static struct irq_chip a9m9750dev_fpga_chip = {
74 .irq_ack = a9m9750dev_fpga_ack_irq,
75 .irq_mask = a9m9750dev_fpga_mask_irq,
76 .irq_mask_ack = a9m9750dev_fpga_maskack_irq,
77 .irq_unmask = a9m9750dev_fpga_unmask_irq,
78};
79
80static void a9m9750dev_fpga_demux_handler(unsigned int irq,
81 struct irq_desc *desc)
82{
83 u8 stat = __raw_readb(FPGA_ISR);
84
85 desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
86
87 while (stat != 0) {
88 int irqno = fls(stat) - 1;
89
90 stat &= ~(1 << irqno);
91
92 generic_handle_irq(FPGA_IRQ(irqno));
93 }
94
95 desc->irq_data.chip->irq_unmask(&desc->irq_data);
96}
97
98void __init board_a9m9750dev_init_irq(void)
99{
100 u32 eic;
101 int i;
102
103 if (gpio_request(11, "board a9m9750dev extirq2") == 0)
104 ns9360_gpio_configure(11, 0, 1);
105 else
106 printk(KERN_ERR "%s: cannot get gpio 11 for IRQ_NS9XXX_EXT2\n",
107 __func__);
108
109 for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) {
110 irq_set_chip_and_handler(i, &a9m9750dev_fpga_chip,
111 handle_level_irq);
112 set_irq_flags(i, IRQF_VALID);
113 }
114
115 /* IRQ_NS9XXX_EXT2: level sensitive + active low */
116 eic = __raw_readl(SYS_EIC(2));
117 REGSET(eic, SYS_EIC, PLTY, AL);
118 REGSET(eic, SYS_EIC, LVEDG, LEVEL);
119 __raw_writel(eic, SYS_EIC(2));
120
121 irq_set_chained_handler(IRQ_NS9XXX_EXT2,
122 a9m9750dev_fpga_demux_handler);
123}
124
125void __init board_a9m9750dev_init_machine(void)
126{
127 u32 reg;
128
129 /* setup static CS0: memory base ... */
130 reg = __raw_readl(SYS_SMCSSMB(0));
131 REGSETIM(reg, SYS_SMCSSMB, CSxB, NS9XXX_CSxSTAT_PHYS(0) >> 12);
132 __raw_writel(reg, SYS_SMCSSMB(0));
133
134 /* ... and mask */
135 reg = __raw_readl(SYS_SMCSSMM(0));
136 REGSETIM(reg, SYS_SMCSSMM, CSxM, 0xfffff);
137 REGSET(reg, SYS_SMCSSMM, CSEx, EN);
138 __raw_writel(reg, SYS_SMCSSMM(0));
139
140 /* setup static CS0: memory configuration */
141 reg = __raw_readl(MEM_SMC(0));
142 REGSET(reg, MEM_SMC, PSMC, OFF);
143 REGSET(reg, MEM_SMC, BSMC, OFF);
144 REGSET(reg, MEM_SMC, EW, OFF);
145 REGSET(reg, MEM_SMC, PB, 1);
146 REGSET(reg, MEM_SMC, PC, AL);
147 REGSET(reg, MEM_SMC, PM, DIS);
148 REGSET(reg, MEM_SMC, MW, 8);
149 __raw_writel(reg, MEM_SMC(0));
150
151 /* setup static CS0: timing */
152 __raw_writel(0x2, MEM_SMWED(0));
153 __raw_writel(0x2, MEM_SMOED(0));
154 __raw_writel(0x6, MEM_SMRD(0));
155 __raw_writel(0x6, MEM_SMWD(0));
156}
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.h b/arch/arm/mach-ns9xxx/board-a9m9750dev.h
deleted file mode 100644
index edc75abbc5dd..000000000000
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.h
+++ /dev/null
@@ -1,15 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/board-a9m9750dev.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <linux/init.h>
12
13void __init board_a9m9750dev_map_io(void);
14void __init board_a9m9750dev_init_machine(void);
15void __init board_a9m9750dev_init_irq(void);
diff --git a/arch/arm/mach-ns9xxx/board-jscc9p9360.c b/arch/arm/mach-ns9xxx/board-jscc9p9360.c
deleted file mode 100644
index 4bd3eec04bfe..000000000000
--- a/arch/arm/mach-ns9xxx/board-jscc9p9360.c
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/board-jscc9p9360.c
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include "board-jscc9p9360.h"
12
13void __init board_jscc9p9360_init_machine(void)
14{
15 /* TODO: reserve GPIOs for push buttons, etc pp */
16}
17
diff --git a/arch/arm/mach-ns9xxx/board-jscc9p9360.h b/arch/arm/mach-ns9xxx/board-jscc9p9360.h
deleted file mode 100644
index 1a81a074df45..000000000000
--- a/arch/arm/mach-ns9xxx/board-jscc9p9360.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/board-jscc9p9360.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <linux/init.h>
12
13void __init board_jscc9p9360_init_machine(void);
diff --git a/arch/arm/mach-ns9xxx/clock.c b/arch/arm/mach-ns9xxx/clock.c
deleted file mode 100644
index cf81cbc57544..000000000000
--- a/arch/arm/mach-ns9xxx/clock.c
+++ /dev/null
@@ -1,215 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/clock.c
3 *
4 * Copyright (C) 2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <linux/err.h>
12#include <linux/module.h>
13#include <linux/list.h>
14#include <linux/clk.h>
15#include <linux/string.h>
16#include <linux/platform_device.h>
17#include <linux/semaphore.h>
18
19#include "clock.h"
20
21static LIST_HEAD(clocks);
22static DEFINE_SPINLOCK(clk_lock);
23
24struct clk *clk_get(struct device *dev, const char *id)
25{
26 struct clk *p, *ret = NULL, *retgen = NULL;
27 unsigned long flags;
28 int idno;
29
30 if (dev == NULL || dev->bus != &platform_bus_type)
31 idno = -1;
32 else
33 idno = to_platform_device(dev)->id;
34
35 spin_lock_irqsave(&clk_lock, flags);
36 list_for_each_entry(p, &clocks, node) {
37 if (strcmp(id, p->name) == 0) {
38 if (p->id == idno) {
39 if (!try_module_get(p->owner))
40 continue;
41 ret = p;
42 break;
43 } else if (p->id == -1)
44 /* remember match with id == -1 in case there is
45 * no clock for idno */
46 retgen = p;
47 }
48 }
49
50 if (!ret && retgen && try_module_get(retgen->owner))
51 ret = retgen;
52
53 if (ret)
54 ++ret->refcount;
55
56 spin_unlock_irqrestore(&clk_lock, flags);
57
58 return ret ? ret : ERR_PTR(-ENOENT);
59}
60EXPORT_SYMBOL(clk_get);
61
62void clk_put(struct clk *clk)
63{
64 module_put(clk->owner);
65 --clk->refcount;
66}
67EXPORT_SYMBOL(clk_put);
68
69static int clk_enable_unlocked(struct clk *clk)
70{
71 int ret = 0;
72 if (clk->parent) {
73 ret = clk_enable_unlocked(clk->parent);
74 if (ret)
75 return ret;
76 }
77
78 if (clk->usage++ == 0 && clk->endisable)
79 ret = clk->endisable(clk, 1);
80
81 return ret;
82}
83
84int clk_enable(struct clk *clk)
85{
86 int ret;
87 unsigned long flags;
88
89 spin_lock_irqsave(&clk_lock, flags);
90
91 ret = clk_enable_unlocked(clk);
92
93 spin_unlock_irqrestore(&clk_lock, flags);
94
95 return ret;
96}
97EXPORT_SYMBOL(clk_enable);
98
99static void clk_disable_unlocked(struct clk *clk)
100{
101 if (--clk->usage == 0 && clk->endisable)
102 clk->endisable(clk, 0);
103
104 if (clk->parent)
105 clk_disable_unlocked(clk->parent);
106}
107
108void clk_disable(struct clk *clk)
109{
110 unsigned long flags;
111
112 spin_lock_irqsave(&clk_lock, flags);
113
114 clk_disable_unlocked(clk);
115
116 spin_unlock_irqrestore(&clk_lock, flags);
117}
118EXPORT_SYMBOL(clk_disable);
119
120unsigned long clk_get_rate(struct clk *clk)
121{
122 if (clk->get_rate)
123 return clk->get_rate(clk);
124
125 if (clk->rate)
126 return clk->rate;
127
128 if (clk->parent)
129 return clk_get_rate(clk->parent);
130
131 return 0;
132}
133EXPORT_SYMBOL(clk_get_rate);
134
135int clk_register(struct clk *clk)
136{
137 unsigned long flags;
138
139 spin_lock_irqsave(&clk_lock, flags);
140
141 list_add(&clk->node, &clocks);
142
143 if (clk->parent)
144 ++clk->parent->refcount;
145
146 spin_unlock_irqrestore(&clk_lock, flags);
147
148 return 0;
149}
150
151int clk_unregister(struct clk *clk)
152{
153 int ret = 0;
154 unsigned long flags;
155
156 spin_lock_irqsave(&clk_lock, flags);
157
158 if (clk->usage || clk->refcount)
159 ret = -EBUSY;
160 else
161 list_del(&clk->node);
162
163 if (clk->parent)
164 --clk->parent->refcount;
165
166 spin_unlock_irqrestore(&clk_lock, flags);
167
168 return ret;
169}
170
171#if defined CONFIG_DEBUG_FS
172
173#include <linux/debugfs.h>
174#include <linux/seq_file.h>
175
176static int clk_debugfs_show(struct seq_file *s, void *null)
177{
178 unsigned long flags;
179 struct clk *p;
180
181 spin_lock_irqsave(&clk_lock, flags);
182
183 list_for_each_entry(p, &clocks, node)
184 seq_printf(s, "%s.%d: usage=%lu refcount=%lu rate=%lu\n",
185 p->name, p->id, p->usage, p->refcount,
186 p->usage ? clk_get_rate(p) : 0);
187
188 spin_unlock_irqrestore(&clk_lock, flags);
189
190 return 0;
191}
192
193static int clk_debugfs_open(struct inode *inode, struct file *file)
194{
195 return single_open(file, clk_debugfs_show, NULL);
196}
197
198static const struct file_operations clk_debugfs_operations = {
199 .open = clk_debugfs_open,
200 .read = seq_read,
201 .llseek = seq_lseek,
202 .release = single_release,
203};
204
205static int __init clk_debugfs_init(void)
206{
207 struct dentry *dentry;
208
209 dentry = debugfs_create_file("clk", S_IFREG | S_IRUGO, NULL, NULL,
210 &clk_debugfs_operations);
211 return IS_ERR(dentry) ? PTR_ERR(dentry) : 0;
212}
213subsys_initcall(clk_debugfs_init);
214
215#endif /* if defined CONFIG_DEBUG_FS */
diff --git a/arch/arm/mach-ns9xxx/clock.h b/arch/arm/mach-ns9xxx/clock.h
deleted file mode 100644
index b86c30dd79eb..000000000000
--- a/arch/arm/mach-ns9xxx/clock.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/clock.h
3 *
4 * Copyright (C) 2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __NS9XXX_CLOCK_H
12#define __NS9XXX_CLOCK_H
13
14#include <linux/list.h>
15
16struct clk {
17 struct module *owner;
18 const char *name;
19 int id;
20
21 struct clk *parent;
22
23 unsigned long rate;
24 int (*endisable)(struct clk *, int enable);
25 unsigned long (*get_rate)(struct clk *);
26
27 struct list_head node;
28 unsigned long refcount;
29 unsigned long usage;
30};
31
32int clk_register(struct clk *clk);
33int clk_unregister(struct clk *clk);
34
35#endif /* ifndef __NS9XXX_CLOCK_H */
diff --git a/arch/arm/mach-ns9xxx/generic.c b/arch/arm/mach-ns9xxx/generic.c
deleted file mode 100644
index 1e0f467879cc..000000000000
--- a/arch/arm/mach-ns9xxx/generic.c
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/generic.c
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <asm/memory.h>
14
15#include "generic.h"
16
17void __init ns9xxx_init_machine(void)
18{
19}
diff --git a/arch/arm/mach-ns9xxx/generic.h b/arch/arm/mach-ns9xxx/generic.h
deleted file mode 100644
index 82493191aad6..000000000000
--- a/arch/arm/mach-ns9xxx/generic.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/generic.h
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <linux/time.h>
12#include <asm/mach/time.h>
13#include <linux/init.h>
14
15void __init ns9xxx_init_irq(void);
16void __init ns9xxx_init_machine(void);
diff --git a/arch/arm/mach-ns9xxx/gpio-ns9360.c b/arch/arm/mach-ns9xxx/gpio-ns9360.c
deleted file mode 100644
index 377330c1b250..000000000000
--- a/arch/arm/mach-ns9xxx/gpio-ns9360.c
+++ /dev/null
@@ -1,118 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/gpio-ns9360.c
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <linux/bug.h>
12#include <linux/errno.h>
13#include <linux/io.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16
17#include <mach/regs-bbu.h>
18#include <mach/processor-ns9360.h>
19
20#include "gpio-ns9360.h"
21
22static inline int ns9360_valid_gpio(unsigned gpio)
23{
24 return gpio <= 72;
25}
26
27static inline void __iomem *ns9360_gpio_get_gconfaddr(unsigned gpio)
28{
29 if (gpio < 56)
30 return BBU_GCONFb1(gpio / 8);
31 else
32 /*
33 * this could be optimised away on
34 * ns9750 only builds, but it isn't ...
35 */
36 return BBU_GCONFb2((gpio - 56) / 8);
37}
38
39static inline void __iomem *ns9360_gpio_get_gctrladdr(unsigned gpio)
40{
41 if (gpio < 32)
42 return BBU_GCTRL1;
43 else if (gpio < 64)
44 return BBU_GCTRL2;
45 else
46 /* this could be optimised away on ns9750 only builds */
47 return BBU_GCTRL3;
48}
49
50static inline void __iomem *ns9360_gpio_get_gstataddr(unsigned gpio)
51{
52 if (gpio < 32)
53 return BBU_GSTAT1;
54 else if (gpio < 64)
55 return BBU_GSTAT2;
56 else
57 /* this could be optimised away on ns9750 only builds */
58 return BBU_GSTAT3;
59}
60
61/*
62 * each gpio can serve for 4 different purposes [0..3]. These are called
63 * "functions" and passed in the parameter func. Functions 0-2 are always some
64 * special things, function 3 is GPIO. If func == 3 dir specifies input or
65 * output, and with inv you can enable an inverter (independent of func).
66 */
67int __ns9360_gpio_configure(unsigned gpio, int dir, int inv, int func)
68{
69 void __iomem *conf = ns9360_gpio_get_gconfaddr(gpio);
70 u32 confval;
71
72 confval = __raw_readl(conf);
73 REGSETIM_IDX(confval, BBU_GCONFx, DIR, gpio & 7, dir);
74 REGSETIM_IDX(confval, BBU_GCONFx, INV, gpio & 7, inv);
75 REGSETIM_IDX(confval, BBU_GCONFx, FUNC, gpio & 7, func);
76 __raw_writel(confval, conf);
77
78 return 0;
79}
80
81int ns9360_gpio_configure(unsigned gpio, int inv, int func)
82{
83 if (likely(ns9360_valid_gpio(gpio))) {
84 if (func == 3) {
85 printk(KERN_WARNING "use gpio_direction_input "
86 "or gpio_direction_output\n");
87 return -EINVAL;
88 } else
89 return __ns9360_gpio_configure(gpio, 0, inv, func);
90 } else
91 return -EINVAL;
92}
93EXPORT_SYMBOL(ns9360_gpio_configure);
94
95int ns9360_gpio_get_value(unsigned gpio)
96{
97 void __iomem *stat = ns9360_gpio_get_gstataddr(gpio);
98 int ret;
99
100 ret = 1 & (__raw_readl(stat) >> (gpio & 31));
101
102 return ret;
103}
104
105void ns9360_gpio_set_value(unsigned gpio, int value)
106{
107 void __iomem *ctrl = ns9360_gpio_get_gctrladdr(gpio);
108 u32 ctrlval;
109
110 ctrlval = __raw_readl(ctrl);
111
112 if (value)
113 ctrlval |= 1 << (gpio & 31);
114 else
115 ctrlval &= ~(1 << (gpio & 31));
116
117 __raw_writel(ctrlval, ctrl);
118}
diff --git a/arch/arm/mach-ns9xxx/gpio-ns9360.h b/arch/arm/mach-ns9xxx/gpio-ns9360.h
deleted file mode 100644
index 131cd1715caa..000000000000
--- a/arch/arm/mach-ns9xxx/gpio-ns9360.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/gpio-ns9360.h
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11int __ns9360_gpio_configure(unsigned gpio, int dir, int inv, int func);
12int ns9360_gpio_get_value(unsigned gpio);
13void ns9360_gpio_set_value(unsigned gpio, int value);
diff --git a/arch/arm/mach-ns9xxx/gpio.c b/arch/arm/mach-ns9xxx/gpio.c
deleted file mode 100644
index 5503ca09c4ae..000000000000
--- a/arch/arm/mach-ns9xxx/gpio.c
+++ /dev/null
@@ -1,147 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/gpio.c
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <linux/kernel.h>
12#include <linux/compiler.h>
13#include <linux/init.h>
14#include <linux/spinlock.h>
15#include <linux/module.h>
16#include <linux/bitops.h>
17
18#include <mach/gpio.h>
19#include <mach/processor.h>
20#include <mach/processor-ns9360.h>
21#include <asm/bug.h>
22#include <asm/types.h>
23
24#include "gpio-ns9360.h"
25
26#if defined(CONFIG_PROCESSOR_NS9360)
27#define GPIO_MAX 72
28#elif defined(CONFIG_PROCESSOR_NS9750)
29#define GPIO_MAX 49
30#endif
31
32/* protects BBU_GCONFx and BBU_GCTRLx */
33static spinlock_t gpio_lock = __SPIN_LOCK_UNLOCKED(gpio_lock);
34
35/* only access gpiores with atomic ops */
36static DECLARE_BITMAP(gpiores, GPIO_MAX + 1);
37
38static inline int ns9xxx_valid_gpio(unsigned gpio)
39{
40#if defined(CONFIG_PROCESSOR_NS9360)
41 if (processor_is_ns9360())
42 return gpio <= 72;
43 else
44#endif
45#if defined(CONFIG_PROCESSOR_NS9750)
46 if (processor_is_ns9750())
47 return gpio <= 49;
48 else
49#endif
50 {
51 BUG();
52 return 0;
53 }
54}
55
56int gpio_request(unsigned gpio, const char *label)
57{
58 if (likely(ns9xxx_valid_gpio(gpio)))
59 return test_and_set_bit(gpio, gpiores) ? -EBUSY : 0;
60 else
61 return -EINVAL;
62}
63EXPORT_SYMBOL(gpio_request);
64
65void gpio_free(unsigned gpio)
66{
67 might_sleep();
68 clear_bit(gpio, gpiores);
69 return;
70}
71EXPORT_SYMBOL(gpio_free);
72
73int gpio_direction_input(unsigned gpio)
74{
75 if (likely(ns9xxx_valid_gpio(gpio))) {
76 int ret = -EINVAL;
77 unsigned long flags;
78
79 spin_lock_irqsave(&gpio_lock, flags);
80#if defined(CONFIG_PROCESSOR_NS9360)
81 if (processor_is_ns9360())
82 ret = __ns9360_gpio_configure(gpio, 0, 0, 3);
83 else
84#endif
85 BUG();
86
87 spin_unlock_irqrestore(&gpio_lock, flags);
88
89 return ret;
90
91 } else
92 return -EINVAL;
93}
94EXPORT_SYMBOL(gpio_direction_input);
95
96int gpio_direction_output(unsigned gpio, int value)
97{
98 if (likely(ns9xxx_valid_gpio(gpio))) {
99 int ret = -EINVAL;
100 unsigned long flags;
101
102 gpio_set_value(gpio, value);
103
104 spin_lock_irqsave(&gpio_lock, flags);
105#if defined(CONFIG_PROCESSOR_NS9360)
106 if (processor_is_ns9360())
107 ret = __ns9360_gpio_configure(gpio, 1, 0, 3);
108 else
109#endif
110 BUG();
111
112 spin_unlock_irqrestore(&gpio_lock, flags);
113
114 return ret;
115 } else
116 return -EINVAL;
117}
118EXPORT_SYMBOL(gpio_direction_output);
119
120int gpio_get_value(unsigned gpio)
121{
122#if defined(CONFIG_PROCESSOR_NS9360)
123 if (processor_is_ns9360())
124 return ns9360_gpio_get_value(gpio);
125 else
126#endif
127 {
128 BUG();
129 return -EINVAL;
130 }
131}
132EXPORT_SYMBOL(gpio_get_value);
133
134void gpio_set_value(unsigned gpio, int value)
135{
136 unsigned long flags;
137 spin_lock_irqsave(&gpio_lock, flags);
138#if defined(CONFIG_PROCESSOR_NS9360)
139 if (processor_is_ns9360())
140 ns9360_gpio_set_value(gpio, value);
141 else
142#endif
143 BUG();
144
145 spin_unlock_irqrestore(&gpio_lock, flags);
146}
147EXPORT_SYMBOL(gpio_set_value);
diff --git a/arch/arm/mach-ns9xxx/include/mach/board.h b/arch/arm/mach-ns9xxx/include/mach/board.h
deleted file mode 100644
index 19ca6de46a45..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/board.h
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/board.h
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_BOARD_H
12#define __ASM_ARCH_BOARD_H
13
14#include <asm/mach-types.h>
15
16#define board_is_a9m9750dev() (0 \
17 || machine_is_cc9p9750dev() \
18 )
19
20#define board_is_a9mvali() (0 \
21 || machine_is_cc9p9750val() \
22 )
23
24#define board_is_jscc9p9210() (0 \
25 || machine_is_cc9p9210js() \
26 )
27
28#define board_is_jscc9p9215() (0 \
29 || machine_is_cc9p9215js() \
30 )
31
32#define board_is_jscc9p9360() (0 \
33 || machine_is_cc9p9360js() \
34 )
35
36#define board_is_uncbas() (0 \
37 || machine_is_cc7ucamry() \
38 )
39
40#endif /* ifndef __ASM_ARCH_BOARD_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/debug-macro.S b/arch/arm/mach-ns9xxx/include/mach/debug-macro.S
deleted file mode 100644
index 5a2acbdc3d67..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/debug-macro.S
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/debug-macro.S
3 * Copyright (C) 2006 by Digi International Inc.
4 * All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published by
8 * the Free Software Foundation.
9 */
10#include <mach/hardware.h>
11#include <asm/memory.h>
12
13#include <mach/regs-board-a9m9750dev.h>
14
15 .macro addruart, rp, rv
16 ldr \rp, =NS9XXX_CSxSTAT_PHYS(0)
17 ldr \rv, =io_p2v(NS9XXX_CSxSTAT_PHYS(0))
18 .endm
19
20#define UART_SHIFT 2
21#include <asm/hardware/debug-8250.S>
diff --git a/arch/arm/mach-ns9xxx/include/mach/entry-macro.S b/arch/arm/mach-ns9xxx/include/mach/entry-macro.S
deleted file mode 100644
index 71ca0319b547..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/entry-macro.S
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/entry-macro.S
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <mach/hardware.h>
12#include <mach/regs-sys-common.h>
13
14 .macro get_irqnr_preamble, base, tmp
15 ldr \base, =SYS_ISRADDR
16 .endm
17
18 .macro arch_ret_to_user, tmp1, tmp2
19 .endm
20
21 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
22 ldr \irqstat, [\base, #(SYS_ISA - SYS_ISRADDR)]
23 cmp \irqstat, #0
24 ldrne \irqnr, [\base]
25 .endm
26
27 .macro disable_fiq
28 .endm
diff --git a/arch/arm/mach-ns9xxx/include/mach/gpio.h b/arch/arm/mach-ns9xxx/include/mach/gpio.h
deleted file mode 100644
index 5eb349032579..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/gpio.h
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/gpio.h
3 *
4 * Copyright (C) 2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10*/
11#ifndef __ASM_ARCH_GPIO_H
12#define __ASM_ARCH_GPIO_H
13
14#include <asm/errno.h>
15
16int gpio_request(unsigned gpio, const char *label);
17
18void gpio_free(unsigned gpio);
19
20int ns9xxx_gpio_configure(unsigned gpio, int inv, int func);
21
22int gpio_direction_input(unsigned gpio);
23
24int gpio_direction_output(unsigned gpio, int value);
25
26int gpio_get_value(unsigned gpio);
27
28void gpio_set_value(unsigned gpio, int value);
29
30/*
31 * ns9xxx can use gpio pins to trigger an irq, but it's not generic
32 * enough to be supported by the gpio_to_irq/irq_to_gpio interface
33 */
34static inline int gpio_to_irq(unsigned gpio)
35{
36 return -EINVAL;
37}
38
39static inline int irq_to_gpio(unsigned irq)
40{
41 return -EINVAL;
42}
43
44/* get the cansleep() stubs */
45#include <asm-generic/gpio.h>
46
47#endif /* ifndef __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/hardware.h b/arch/arm/mach-ns9xxx/include/mach/hardware.h
deleted file mode 100644
index 76631128e11c..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/hardware.h
+++ /dev/null
@@ -1,77 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/hardware.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_HARDWARE_H
12#define __ASM_ARCH_HARDWARE_H
13
14/*
15 * NetSilicon NS9xxx internal mapping:
16 *
17 * physical <--> virtual
18 * 0x90000000 - 0x906fffff <--> 0xf9000000 - 0xf96fffff
19 * 0xa0100000 - 0xa0afffff <--> 0xfa100000 - 0xfaafffff
20 */
21#define io_p2v(x) (0xf0000000 \
22 + (((x) & 0xf0000000) >> 4) \
23 + ((x) & 0x00ffffff))
24
25#define io_v2p(x) ((((x) & 0x0f000000) << 4) \
26 + ((x) & 0x00ffffff))
27
28#define __REGSHIFT(mask) ((mask) & (-(mask)))
29
30#define __REGBIT(bit) ((u32)1 << (bit))
31#define __REGBITS(hbit, lbit) ((((u32)1 << ((hbit) - (lbit) + 1)) - 1) << (lbit))
32#define __REGVAL(mask, value) (((value) * __REGSHIFT(mask)) & (mask))
33
34#ifndef __ASSEMBLY__
35
36# define __REG(x) ((void __iomem __force *)io_p2v((x)))
37# define __REG2(x, y) ((void __iomem __force *)(io_p2v((x)) + 4 * (y)))
38
39# define __REGSET(var, field, value) \
40 ((var) = (((var) & ~((field) & ~(value))) | (value)))
41
42# define REGSET(var, reg, field, value) \
43 __REGSET(var, reg ## _ ## field, reg ## _ ## field ## _ ## value)
44
45# define REGSET_IDX(var, reg, field, idx, value) \
46 __REGSET(var, reg ## _ ## field((idx)), reg ## _ ## field ## _ ## value((idx)))
47
48# define REGSETIM(var, reg, field, value) \
49 __REGSET(var, reg ## _ ## field, __REGVAL(reg ## _ ## field, (value)))
50
51# define REGSETIM_IDX(var, reg, field, idx, value) \
52 __REGSET(var, reg ## _ ## field((idx)), __REGVAL(reg ## _ ## field((idx)), (value)))
53
54# define __REGGET(var, field) \
55 (((var) & (field)))
56
57# define REGGET(var, reg, field) \
58 __REGGET(var, reg ## _ ## field)
59
60# define REGGET_IDX(var, reg, field, idx) \
61 __REGGET(var, reg ## _ ## field((idx)))
62
63# define REGGETIM(var, reg, field) \
64 __REGGET(var, reg ## _ ## field) / __REGSHIFT(reg ## _ ## field)
65
66# define REGGETIM_IDX(var, reg, field, idx) \
67 __REGGET(var, reg ## _ ## field((idx))) / \
68 __REGSHIFT(reg ## _ ## field((idx)))
69
70#else
71
72# define __REG(x) io_p2v(x)
73# define __REG2(x, y) io_p2v((x) + 4 * (y))
74
75#endif
76
77#endif /* ifndef __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/io.h b/arch/arm/mach-ns9xxx/include/mach/io.h
deleted file mode 100644
index f08451d2e1bc..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/io.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/io.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_IO_H
12#define __ASM_ARCH_IO_H
13
14#define IO_SPACE_LIMIT 0xffffffff /* XXX */
15
16#define __io(a) __typesafe_io(a)
17#define __mem_pci(a) (a)
18#define __mem_isa(a) (IO_BASE + (a))
19
20#endif /* ifndef __ASM_ARCH_IO_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/irqs.h b/arch/arm/mach-ns9xxx/include/mach/irqs.h
deleted file mode 100644
index 13483949e210..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/irqs.h
+++ /dev/null
@@ -1,86 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/irqs.h
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_IRQS_H
12#define __ASM_ARCH_IRQS_H
13
14/* NetSilicon 9360 */
15#define IRQ_NS9XXX_WATCHDOG 0
16#define IRQ_NS9XXX_AHBBUSERR 1
17#define IRQ_NS9360_BBUSAGG 2
18/* irq 3 is reserved for NS9360 */
19#define IRQ_NS9XXX_ETHRX 4
20#define IRQ_NS9XXX_ETHTX 5
21#define IRQ_NS9XXX_ETHPHY 6
22#define IRQ_NS9360_LCD 7
23#define IRQ_NS9360_SERBRX 8
24#define IRQ_NS9360_SERBTX 9
25#define IRQ_NS9360_SERARX 10
26#define IRQ_NS9360_SERATX 11
27#define IRQ_NS9360_SERCRX 12
28#define IRQ_NS9360_SERCTX 13
29#define IRQ_NS9360_I2C 14
30#define IRQ_NS9360_BBUSDMA 15
31#define IRQ_NS9360_TIMER0 16
32#define IRQ_NS9360_TIMER1 17
33#define IRQ_NS9360_TIMER2 18
34#define IRQ_NS9360_TIMER3 19
35#define IRQ_NS9360_TIMER4 20
36#define IRQ_NS9360_TIMER5 21
37#define IRQ_NS9360_TIMER6 22
38#define IRQ_NS9360_TIMER7 23
39#define IRQ_NS9360_RTC 24
40#define IRQ_NS9360_USBHOST 25
41#define IRQ_NS9360_USBDEVICE 26
42#define IRQ_NS9360_IEEE1284 27
43#define IRQ_NS9XXX_EXT0 28
44#define IRQ_NS9XXX_EXT1 29
45#define IRQ_NS9XXX_EXT2 30
46#define IRQ_NS9XXX_EXT3 31
47
48#define BBUS_IRQ(irq) (32 + irq)
49
50#define IRQ_BBUS_DMA BBUS_IRQ(0)
51#define IRQ_BBUS_SERBRX BBUS_IRQ(2)
52#define IRQ_BBUS_SERBTX BBUS_IRQ(3)
53#define IRQ_BBUS_SERARX BBUS_IRQ(4)
54#define IRQ_BBUS_SERATX BBUS_IRQ(5)
55#define IRQ_BBUS_SERCRX BBUS_IRQ(6)
56#define IRQ_BBUS_SERCTX BBUS_IRQ(7)
57#define IRQ_BBUS_SERDRX BBUS_IRQ(8)
58#define IRQ_BBUS_SERDTX BBUS_IRQ(9)
59#define IRQ_BBUS_I2C BBUS_IRQ(10)
60#define IRQ_BBUS_1284 BBUS_IRQ(11)
61#define IRQ_BBUS_UTIL BBUS_IRQ(12)
62#define IRQ_BBUS_RTC BBUS_IRQ(13)
63#define IRQ_BBUS_USBHST BBUS_IRQ(14)
64#define IRQ_BBUS_USBDEV BBUS_IRQ(15)
65#define IRQ_BBUS_AHBDMA1 BBUS_IRQ(24)
66#define IRQ_BBUS_AHBDMA2 BBUS_IRQ(25)
67
68/*
69 * these Interrupts are specific for the a9m9750dev board.
70 * They are generated by an FPGA that interrupts the CPU on
71 * IRQ_NS9360_EXT2
72 */
73#define FPGA_IRQ(irq) (64 + irq)
74
75#define IRQ_FPGA_UARTA FPGA_IRQ(0)
76#define IRQ_FPGA_UARTB FPGA_IRQ(1)
77#define IRQ_FPGA_UARTC FPGA_IRQ(2)
78#define IRQ_FPGA_UARTD FPGA_IRQ(3)
79#define IRQ_FPGA_TOUCH FPGA_IRQ(4)
80#define IRQ_FPGA_CF FPGA_IRQ(5)
81#define IRQ_FPGA_CAN0 FPGA_IRQ(6)
82#define IRQ_FPGA_CAN1 FPGA_IRQ(7)
83
84#define NR_IRQS 72
85
86#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/memory.h b/arch/arm/mach-ns9xxx/include/mach/memory.h
deleted file mode 100644
index 5c65aee6e7a9..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/memory.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/memory.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10*/
11#ifndef __ASM_ARCH_MEMORY_H
12#define __ASM_ARCH_MEMORY_H
13
14/* x in [0..3] */
15#define NS9XXX_CSxSTAT_PHYS(x) UL(((x) + 4) << 28)
16
17#define NS9XXX_CS0STAT_LENGTH UL(0x1000)
18#define NS9XXX_CS1STAT_LENGTH UL(0x1000)
19#define NS9XXX_CS2STAT_LENGTH UL(0x1000)
20#define NS9XXX_CS3STAT_LENGTH UL(0x1000)
21
22#define PLAT_PHYS_OFFSET UL(0x00000000)
23
24#endif
diff --git a/arch/arm/mach-ns9xxx/include/mach/module.h b/arch/arm/mach-ns9xxx/include/mach/module.h
deleted file mode 100644
index 628e9752589b..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/module.h
+++ /dev/null
@@ -1,55 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/module.h
3 *
4 * Copyright (C) 2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_MODULE_H
12#define __ASM_ARCH_MODULE_H
13
14#include <asm/mach-types.h>
15
16#define module_is_cc7ucamry() (0 \
17 || machine_is_cc7ucamry() \
18 )
19
20#define module_is_cc9c() (0 \
21 )
22
23#define module_is_cc9p9210() (0 \
24 || machine_is_cc9p9210() \
25 || machine_is_cc9p9210js() \
26 )
27
28#define module_is_cc9p9215() (0 \
29 || machine_is_cc9p9215() \
30 || machine_is_cc9p9215js() \
31 )
32
33#define module_is_cc9p9360() (0 \
34 || machine_is_cc9p9360dev() \
35 || machine_is_cc9p9360js() \
36 )
37
38#define module_is_cc9p9750() (0 \
39 || machine_is_a9m9750() \
40 || machine_is_cc9p9750js() \
41 || machine_is_cc9p9750val() \
42 )
43
44#define module_is_ccw9c() (0 \
45 )
46
47#define module_is_inc20otter() (0 \
48 || machine_is_inc20otter() \
49 )
50
51#define module_is_otter() (0 \
52 || machine_is_otter() \
53 )
54
55#endif /* ifndef __ASM_ARCH_MODULE_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h b/arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h
deleted file mode 100644
index f41deda5129e..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/processor-ns9360.h
3 *
4 * Copyright (C) 2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_PROCESSORNS9360_H
12#define __ASM_ARCH_PROCESSORNS9360_H
13
14#include <linux/init.h>
15
16void ns9360_reset(char mode);
17
18unsigned long ns9360_systemclock(void) __attribute__((const));
19
20static inline unsigned long ns9360_cpuclock(void) __attribute__((const));
21static inline unsigned long ns9360_cpuclock(void)
22{
23 return ns9360_systemclock() / 2;
24}
25
26void __init ns9360_map_io(void);
27
28extern struct sys_timer ns9360_timer;
29
30int ns9360_gpio_configure(unsigned gpio, int inv, int func);
31
32#endif /* ifndef __ASM_ARCH_PROCESSORNS9360_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/processor.h b/arch/arm/mach-ns9xxx/include/mach/processor.h
deleted file mode 100644
index 9f77f746a386..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/processor.h
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/processor.h
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_PROCESSOR_H
12#define __ASM_ARCH_PROCESSOR_H
13
14#include <mach/module.h>
15
16#define processor_is_ns9210() (0 \
17 || module_is_cc7ucamry() \
18 || module_is_cc9p9210() \
19 || module_is_inc20otter() \
20 || module_is_otter() \
21 )
22
23#define processor_is_ns9215() (0 \
24 || module_is_cc9p9215() \
25 )
26
27#define processor_is_ns9360() (0 \
28 || module_is_cc9p9360() \
29 || module_is_cc9c() \
30 || module_is_ccw9c() \
31 )
32
33#define processor_is_ns9750() (0 \
34 || module_is_cc9p9750() \
35 )
36
37#define processor_is_ns921x() (0 \
38 || processor_is_ns9210() \
39 || processor_is_ns9215() \
40 )
41
42#endif /* ifndef __ASM_ARCH_PROCESSOR_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-bbu.h b/arch/arm/mach-ns9xxx/include/mach/regs-bbu.h
deleted file mode 100644
index af227c058fb9..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/regs-bbu.h
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/regs-bbu.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_REGSBBU_H
12#define __ASM_ARCH_REGSBBU_H
13
14#include <mach/hardware.h>
15
16/* BBus Utility */
17
18/* GPIO Configuration Registers block 1 */
19/* NOTE: the HRM starts counting at 1 for the GPIO registers, here the start is
20 * at 0 for each block. That is, BBU_GCONFb1(0) is GPIO Configuration Register
21 * #1, BBU_GCONFb2(0) is GPIO Configuration Register #8. */
22#define BBU_GCONFb1(x) __REG2(0x90600010, (x))
23#define BBU_GCONFb2(x) __REG2(0x90600100, (x))
24
25#define BBU_GCONFx_DIR(m) __REGBIT(3 + (((m) & 7) << 2))
26#define BBU_GCONFx_DIR_INPUT(m) __REGVAL(BBU_GCONFx_DIR(m), 0)
27#define BBU_GCONFx_DIR_OUTPUT(m) __REGVAL(BBU_GCONFx_DIR(m), 1)
28#define BBU_GCONFx_INV(m) __REGBIT(2 + (((m) & 7) << 2))
29#define BBU_GCONFx_INV_NO(m) __REGVAL(BBU_GCONFx_INV(m), 0)
30#define BBU_GCONFx_INV_YES(m) __REGVAL(BBU_GCONFx_INV(m), 1)
31#define BBU_GCONFx_FUNC(m) __REGBITS(1 + (((m) & 7) << 2), ((m) & 7) << 2)
32#define BBU_GCONFx_FUNC_0(m) __REGVAL(BBU_GCONFx_FUNC(m), 0)
33#define BBU_GCONFx_FUNC_1(m) __REGVAL(BBU_GCONFx_FUNC(m), 1)
34#define BBU_GCONFx_FUNC_2(m) __REGVAL(BBU_GCONFx_FUNC(m), 2)
35#define BBU_GCONFx_FUNC_3(m) __REGVAL(BBU_GCONFx_FUNC(m), 3)
36
37#define BBU_GCTRL1 __REG(0x90600030)
38#define BBU_GCTRL2 __REG(0x90600034)
39#define BBU_GCTRL3 __REG(0x90600120)
40
41#define BBU_GSTAT1 __REG(0x90600040)
42#define BBU_GSTAT2 __REG(0x90600044)
43#define BBU_GSTAT3 __REG(0x90600130)
44
45#endif /* ifndef __ASM_ARCH_REGSBBU_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h b/arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h
deleted file mode 100644
index cd1593693f56..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/regs-board-a9m9750dev.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_REGSBOARDA9M9750_H
12#define __ASM_ARCH_REGSBOARDA9M9750_H
13
14#include <mach/hardware.h>
15
16#define FPGA_UARTA_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0))
17#define FPGA_UARTB_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x08)
18#define FPGA_UARTC_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x10)
19#define FPGA_UARTD_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x18)
20
21#define FPGA_IER __REG(NS9XXX_CSxSTAT_PHYS(0) + 0x50)
22#define FPGA_ISR __REG(NS9XXX_CSxSTAT_PHYS(0) + 0x60)
23
24#endif /* ifndef __ASM_ARCH_REGSBOARDA9M9750_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-mem.h b/arch/arm/mach-ns9xxx/include/mach/regs-mem.h
deleted file mode 100644
index f1625bf8cdce..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/regs-mem.h
+++ /dev/null
@@ -1,135 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/regs-mem.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_REGSMEM_H
12#define __ASM_ARCH_REGSMEM_H
13
14#include <mach/hardware.h>
15
16/* Memory Module */
17
18/* Control register */
19#define MEM_CTRL __REG(0xa0700000)
20
21/* Status register */
22#define MEM_STAT __REG(0xa0700004)
23
24/* Configuration register */
25#define MEM_CONF __REG(0xa0700008)
26
27/* Dynamic Memory Control register */
28#define MEM_DMCTRL __REG(0xa0700020)
29
30/* Dynamic Memory Refresh Timer */
31#define MEM_DMRT __REG(0xa0700024)
32
33/* Dynamic Memory Read Configuration register */
34#define MEM_DMRC __REG(0xa0700028)
35
36/* Dynamic Memory Precharge Command Period (tRP) */
37#define MEM_DMPCP __REG(0xa0700030)
38
39/* Dynamic Memory Active to Precharge Command Period (tRAS) */
40#define MEM_DMAPCP __REG(0xa0700034)
41
42/* Dynamic Memory Self-Refresh Exit Time (tSREX) */
43#define MEM_DMSRET __REG(0xa0700038)
44
45/* Dynamic Memory Last Data Out to Active Time (tAPR) */
46#define MEM_DMLDOAT __REG(0xa070003c)
47
48/* Dynamic Memory Data-in to Active Command Time (tDAL or TAPW) */
49#define MEM_DMDIACT __REG(0xa0700040)
50
51/* Dynamic Memory Write Recovery Time (tWR, tDPL, tRWL, tRDL) */
52#define MEM_DMWRT __REG(0xa0700044)
53
54/* Dynamic Memory Active to Active Command Period (tRC) */
55#define MEM_DMAACP __REG(0xa0700048)
56
57/* Dynamic Memory Auto Refresh Period, and Auto Refresh to Active Command Period (tRFC) */
58#define MEM_DMARP __REG(0xa070004c)
59
60/* Dynamic Memory Exit Self-Refresh to Active Command (tXSR) */
61#define MEM_DMESRAC __REG(0xa0700050)
62
63/* Dynamic Memory Active Bank A to Active B Time (tRRD) */
64#define MEM_DMABAABT __REG(0xa0700054)
65
66/* Dynamic Memory Load Mode register to Active Command Time (tMRD) */
67#define MEM_DMLMACT __REG(0xa0700058)
68
69/* Static Memory Extended Wait */
70#define MEM_SMEW __REG(0xa0700080)
71
72/* Dynamic Memory Configuration Register x */
73#define MEM_DMCONF(x) __REG2(0xa0700100, (x) << 3)
74
75/* Dynamic Memory RAS and CAS Delay x */
76#define MEM_DMRCD(x) __REG2(0xa0700104, (x) << 3)
77
78/* Static Memory Configuration Register x */
79#define MEM_SMC(x) __REG2(0xa0700200, (x) << 3)
80
81/* Static Memory Configuration Register x: Write protect */
82#define MEM_SMC_PSMC __REGBIT(20)
83#define MEM_SMC_PSMC_OFF __REGVAL(MEM_SMC_PSMC, 0)
84#define MEM_SMC_PSMC_ON __REGVAL(MEM_SMC_PSMC, 1)
85
86/* Static Memory Configuration Register x: Buffer enable */
87#define MEM_SMC_BSMC __REGBIT(19)
88#define MEM_SMC_BSMC_OFF __REGVAL(MEM_SMC_BSMC, 0)
89#define MEM_SMC_BSMC_ON __REGVAL(MEM_SMC_BSMC, 1)
90
91/* Static Memory Configuration Register x: Extended Wait */
92#define MEM_SMC_EW __REGBIT(8)
93#define MEM_SMC_EW_OFF __REGVAL(MEM_SMC_EW, 0)
94#define MEM_SMC_EW_ON __REGVAL(MEM_SMC_EW, 1)
95
96/* Static Memory Configuration Register x: Byte lane state */
97#define MEM_SMC_PB __REGBIT(7)
98#define MEM_SMC_PB_0 __REGVAL(MEM_SMC_PB, 0)
99#define MEM_SMC_PB_1 __REGVAL(MEM_SMC_PB, 1)
100
101/* Static Memory Configuration Register x: Chip select polarity */
102#define MEM_SMC_PC __REGBIT(6)
103#define MEM_SMC_PC_AL __REGVAL(MEM_SMC_PC, 0)
104#define MEM_SMC_PC_AH __REGVAL(MEM_SMC_PC, 1)
105
106/* static memory configuration register x: page mode*/
107#define MEM_SMC_PM __REGBIT(3)
108#define MEM_SMC_PM_DIS __REGVAL(MEM_SMC_PM, 0)
109#define MEM_SMC_PM_ASYNC __REGVAL(MEM_SMC_PM, 1)
110
111/* static memory configuration register x: Memory width */
112#define MEM_SMC_MW __REGBITS(1, 0)
113#define MEM_SMC_MW_8 __REGVAL(MEM_SMC_MW, 0)
114#define MEM_SMC_MW_16 __REGVAL(MEM_SMC_MW, 1)
115#define MEM_SMC_MW_32 __REGVAL(MEM_SMC_MW, 2)
116
117/* Static Memory Write Enable Delay x */
118#define MEM_SMWED(x) __REG2(0xa0700204, (x) << 3)
119
120/* Static Memory Output Enable Delay x */
121#define MEM_SMOED(x) __REG2(0xa0700208, (x) << 3)
122
123/* Static Memory Read Delay x */
124#define MEM_SMRD(x) __REG2(0xa070020c, (x) << 3)
125
126/* Static Memory Page Mode Read Delay 0 */
127#define MEM_SMPMRD(x) __REG2(0xa0700210, (x) << 3)
128
129/* Static Memory Write Delay */
130#define MEM_SMWD(x) __REG2(0xa0700214, (x) << 3)
131
132/* Static Memory Turn Round Delay x */
133#define MEM_SWT(x) __REG2(0xa0700218, (x) << 3)
134
135#endif /* ifndef __ASM_ARCH_REGSMEM_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h b/arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h
deleted file mode 100644
index 14f91dfd5736..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/regs-sys-common.h
3 *
4 * Copyright (C) 2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11
12#ifndef __ASM_ARCH_REGSSYSCOMMON_H
13#define __ASM_ARCH_REGSSYSCOMMON_H
14#include <mach/hardware.h>
15
16/* Interrupt Vector Address Register Level x */
17#define SYS_IVA(x) __REG2(0xa09000c4, (x))
18
19/* Interrupt Configuration registers */
20#define SYS_IC(x) __REG2(0xa0900144, (x))
21
22/* ISRADDR */
23#define SYS_ISRADDR __REG(0xa0900164)
24
25/* Interrupt Status Active */
26#define SYS_ISA __REG(0xa0900168)
27
28/* Interrupt Status Raw */
29#define SYS_ISR __REG(0xa090016c)
30
31#endif /* ifndef __ASM_ARCH_REGSSYSCOMMON_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h b/arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h
deleted file mode 100644
index 8ff254d9901c..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h
+++ /dev/null
@@ -1,148 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/regs-sys-ns9360.h
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_REGSSYSNS9360_H
12#define __ASM_ARCH_REGSSYSNS9360_H
13
14#include <mach/hardware.h>
15
16/* System Control Module */
17
18/* AHB Arbiter Gen Configuration */
19#define SYS_AHBAGENCONF __REG(0xa0900000)
20
21/* BRC */
22#define SYS_BRC(x) __REG2(0xa0900004, (x))
23
24/* Timer x Reload Count register */
25#define SYS_TRC(x) __REG2(0xa0900044, (x))
26
27/* Timer x Read register */
28#define SYS_TR(x) __REG2(0xa0900084, (x))
29
30/* Timer Interrupt Status register */
31#define SYS_TIS __REG(0xa0900170)
32
33/* PLL Configuration register */
34#define SYS_PLL __REG(0xa0900188)
35
36/* PLL FS status */
37#define SYS_PLL_FS __REGBITS(24, 23)
38
39/* PLL ND status */
40#define SYS_PLL_ND __REGBITS(20, 16)
41
42/* PLL Configuration register: PLL SW change */
43#define SYS_PLL_SWC __REGBIT(15)
44#define SYS_PLL_SWC_NO __REGVAL(SYS_PLL_SWC, 0)
45#define SYS_PLL_SWC_YES __REGVAL(SYS_PLL_SWC, 1)
46
47/* Timer x Control register */
48#define SYS_TC(x) __REG2(0xa0900190, (x))
49
50/* Timer x Control register: Timer enable */
51#define SYS_TCx_TEN __REGBIT(15)
52#define SYS_TCx_TEN_DIS __REGVAL(SYS_TCx_TEN, 0)
53#define SYS_TCx_TEN_EN __REGVAL(SYS_TCx_TEN, 1)
54
55/* Timer x Control register: CPU debug mode */
56#define SYS_TCx_TDBG __REGBIT(10)
57#define SYS_TCx_TDBG_CONT __REGVAL(SYS_TCx_TDBG, 0)
58#define SYS_TCx_TDBG_STOP __REGVAL(SYS_TCx_TDBG, 1)
59
60/* Timer x Control register: Interrupt clear */
61#define SYS_TCx_INTC __REGBIT(9)
62#define SYS_TCx_INTC_UNSET __REGVAL(SYS_TCx_INTC, 0)
63#define SYS_TCx_INTC_SET __REGVAL(SYS_TCx_INTC, 1)
64
65/* Timer x Control register: Timer clock select */
66#define SYS_TCx_TLCS __REGBITS(8, 6)
67#define SYS_TCx_TLCS_CPU __REGVAL(SYS_TCx_TLCS, 0) /* CPU clock */
68#define SYS_TCx_TLCS_DIV2 __REGVAL(SYS_TCx_TLCS, 1) /* CPU clock / 2 */
69#define SYS_TCx_TLCS_DIV4 __REGVAL(SYS_TCx_TLCS, 2) /* CPU clock / 4 */
70#define SYS_TCx_TLCS_DIV8 __REGVAL(SYS_TCx_TLCS, 3) /* CPU clock / 8 */
71#define SYS_TCx_TLCS_DIV16 __REGVAL(SYS_TCx_TLCS, 4) /* CPU clock / 16 */
72#define SYS_TCx_TLCS_DIV32 __REGVAL(SYS_TCx_TLCS, 5) /* CPU clock / 32 */
73#define SYS_TCx_TLCS_DIV64 __REGVAL(SYS_TCx_TLCS, 6) /* CPU clock / 64 */
74#define SYS_TCx_TLCS_EXT __REGVAL(SYS_TCx_TLCS, 7)
75
76/* Timer x Control register: Timer mode */
77#define SYS_TCx_TM __REGBITS(5, 4)
78#define SYS_TCx_TM_IEE __REGVAL(SYS_TCx_TM, 0) /* Internal timer or external event */
79#define SYS_TCx_TM_ELL __REGVAL(SYS_TCx_TM, 1) /* External low-level, gated timer */
80#define SYS_TCx_TM_EHL __REGVAL(SYS_TCx_TM, 2) /* External high-level, gated timer */
81#define SYS_TCx_TM_CONCAT __REGVAL(SYS_TCx_TM, 3) /* Concatenate the lower timer. */
82
83/* Timer x Control register: Interrupt select */
84#define SYS_TCx_INTS __REGBIT(3)
85#define SYS_TCx_INTS_DIS __REGVAL(SYS_TCx_INTS, 0)
86#define SYS_TCx_INTS_EN __REGVAL(SYS_TCx_INTS, 1)
87
88/* Timer x Control register: Up/down select */
89#define SYS_TCx_UDS __REGBIT(2)
90#define SYS_TCx_UDS_UP __REGVAL(SYS_TCx_UDS, 0)
91#define SYS_TCx_UDS_DOWN __REGVAL(SYS_TCx_UDS, 1)
92
93/* Timer x Control register: 32- or 16-bit timer */
94#define SYS_TCx_TSZ __REGBIT(1)
95#define SYS_TCx_TSZ_16 __REGVAL(SYS_TCx_TSZ, 0)
96#define SYS_TCx_TSZ_32 __REGVAL(SYS_TCx_TSZ, 1)
97
98/* Timer x Control register: Reload enable */
99#define SYS_TCx_REN __REGBIT(0)
100#define SYS_TCx_REN_DIS __REGVAL(SYS_TCx_REN, 0)
101#define SYS_TCx_REN_EN __REGVAL(SYS_TCx_REN, 1)
102
103/* System Memory Chip Select x Dynamic Memory Base */
104#define SYS_SMCSDMB(x) __REG2(0xa09001d0, (x) << 1)
105
106/* System Memory Chip Select x Dynamic Memory Mask */
107#define SYS_SMCSDMM(x) __REG2(0xa09001d4, (x) << 1)
108
109/* System Memory Chip Select x Static Memory Base */
110#define SYS_SMCSSMB(x) __REG2(0xa09001f0, (x) << 1)
111
112/* System Memory Chip Select x Static Memory Base: Chip select x base */
113#define SYS_SMCSSMB_CSxB __REGBITS(31, 12)
114
115/* System Memory Chip Select x Static Memory Mask */
116#define SYS_SMCSSMM(x) __REG2(0xa09001f4, (x) << 1)
117
118/* System Memory Chip Select x Static Memory Mask: Chip select x mask */
119#define SYS_SMCSSMM_CSxM __REGBITS(31, 12)
120
121/* System Memory Chip Select x Static Memory Mask: Chip select x enable */
122#define SYS_SMCSSMM_CSEx __REGBIT(0)
123#define SYS_SMCSSMM_CSEx_DIS __REGVAL(SYS_SMCSSMM_CSEx, 0)
124#define SYS_SMCSSMM_CSEx_EN __REGVAL(SYS_SMCSSMM_CSEx, 1)
125
126/* General purpose, user-defined ID register */
127#define SYS_GENID __REG(0xa0900210)
128
129/* External Interrupt x Control register */
130#define SYS_EIC(x) __REG2(0xa0900214, (x))
131
132/* External Interrupt x Control register: Status */
133#define SYS_EIC_STS __REGBIT(3)
134
135/* External Interrupt x Control register: Clear */
136#define SYS_EIC_CLR __REGBIT(2)
137
138/* External Interrupt x Control register: Polarity */
139#define SYS_EIC_PLTY __REGBIT(1)
140#define SYS_EIC_PLTY_AH __REGVAL(SYS_EIC_PLTY, 0)
141#define SYS_EIC_PLTY_AL __REGVAL(SYS_EIC_PLTY, 1)
142
143/* External Interrupt x Control register: Level edge */
144#define SYS_EIC_LVEDG __REGBIT(0)
145#define SYS_EIC_LVEDG_LEVEL __REGVAL(SYS_EIC_LVEDG, 0)
146#define SYS_EIC_LVEDG_EDGE __REGVAL(SYS_EIC_LVEDG, 1)
147
148#endif /* ifndef __ASM_ARCH_REGSSYSNS9360_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/system.h b/arch/arm/mach-ns9xxx/include/mach/system.h
deleted file mode 100644
index 1561588ca364..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/system.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/system.h
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H
13
14#include <asm/proc-fns.h>
15#include <mach/processor.h>
16#include <mach/processor-ns9360.h>
17
18static inline void arch_idle(void)
19{
20 cpu_do_idle();
21}
22
23static inline void arch_reset(char mode, const char *cmd)
24{
25#ifdef CONFIG_PROCESSOR_NS9360
26 if (processor_is_ns9360())
27 ns9360_reset(mode);
28 else
29#endif
30 BUG();
31
32 BUG();
33}
34
35#endif /* ifndef __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/timex.h b/arch/arm/mach-ns9xxx/include/mach/timex.h
deleted file mode 100644
index 734a8d8bd578..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/timex.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/timex.h
3 *
4 * Copyright (C) 2005-2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_TIMEX_H
12#define __ASM_ARCH_TIMEX_H
13
14/*
15 * value for CLOCK_TICK_RATE stolen from arch/arm/mach-s3c2410/include/mach/timex.h.
16 * See there for an explanation.
17 */
18#define CLOCK_TICK_RATE 12000000
19
20#endif /* ifndef __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/uncompress.h b/arch/arm/mach-ns9xxx/include/mach/uncompress.h
deleted file mode 100644
index 770a68c46e81..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/uncompress.h
+++ /dev/null
@@ -1,164 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/uncompress.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_UNCOMPRESS_H
12#define __ASM_ARCH_UNCOMPRESS_H
13
14#include <linux/io.h>
15
16#define __REG(x) ((void __iomem __force *)(x))
17
18static void putc_dummy(char c, void __iomem *base)
19{
20 /* nothing */
21}
22
23static int timeout;
24
25static void putc_ns9360(char c, void __iomem *base)
26{
27 do {
28 if (timeout)
29 --timeout;
30
31 if (__raw_readl(base + 8) & (1 << 3)) {
32 __raw_writeb(c, base + 16);
33 timeout = 0x10000;
34 break;
35 }
36 } while (timeout);
37}
38
39static void putc_a9m9750dev(char c, void __iomem *base)
40{
41 do {
42 if (timeout)
43 --timeout;
44
45 if (__raw_readb(base + 5) & (1 << 5)) {
46 __raw_writeb(c, base);
47 timeout = 0x10000;
48 break;
49 }
50 } while (timeout);
51
52}
53
54static void putc_ns921x(char c, void __iomem *base)
55{
56 do {
57 if (timeout)
58 --timeout;
59
60 if (!(__raw_readl(base) & (1 << 11))) {
61 __raw_writeb(c, base + 0x0028);
62 timeout = 0x10000;
63 break;
64 }
65 } while (timeout);
66}
67
68#define MSCS __REG(0xA0900184)
69
70#define NS9360_UARTA __REG(0x90200040)
71#define NS9360_UARTB __REG(0x90200000)
72#define NS9360_UARTC __REG(0x90300000)
73#define NS9360_UARTD __REG(0x90300040)
74
75#define NS9360_UART_ENABLED(base) \
76 (__raw_readl(NS9360_UARTA) & (1 << 31))
77
78#define A9M9750DEV_UARTA __REG(0x40000000)
79
80#define NS921XSYS_CLOCK __REG(0xa090017c)
81#define NS921X_UARTA __REG(0x90010000)
82#define NS921X_UARTB __REG(0x90018000)
83#define NS921X_UARTC __REG(0x90020000)
84#define NS921X_UARTD __REG(0x90028000)
85
86#define NS921X_UART_ENABLED(base) \
87 (__raw_readl((base) + 0x1000) & (1 << 29))
88
89static void autodetect(void (**putc)(char, void __iomem *), void __iomem **base)
90{
91 timeout = 0x10000;
92 if (((__raw_readl(MSCS) >> 16) & 0xfe) == 0x00) {
93 /* ns9360 or ns9750 */
94 if (NS9360_UART_ENABLED(NS9360_UARTA)) {
95 *putc = putc_ns9360;
96 *base = NS9360_UARTA;
97 return;
98 } else if (NS9360_UART_ENABLED(NS9360_UARTB)) {
99 *putc = putc_ns9360;
100 *base = NS9360_UARTB;
101 return;
102 } else if (NS9360_UART_ENABLED(NS9360_UARTC)) {
103 *putc = putc_ns9360;
104 *base = NS9360_UARTC;
105 return;
106 } else if (NS9360_UART_ENABLED(NS9360_UARTD)) {
107 *putc = putc_ns9360;
108 *base = NS9360_UARTD;
109 return;
110 } else if (__raw_readl(__REG(0xa09001f4)) == 0xfffff001) {
111 *putc = putc_a9m9750dev;
112 *base = A9M9750DEV_UARTA;
113 return;
114 }
115 } else if (((__raw_readl(MSCS) >> 16) & 0xfe) == 0x02) {
116 /* ns921x */
117 u32 clock = __raw_readl(NS921XSYS_CLOCK);
118
119 if ((clock & (1 << 1)) &&
120 NS921X_UART_ENABLED(NS921X_UARTA)) {
121 *putc = putc_ns921x;
122 *base = NS921X_UARTA;
123 return;
124 } else if ((clock & (1 << 2)) &&
125 NS921X_UART_ENABLED(NS921X_UARTB)) {
126 *putc = putc_ns921x;
127 *base = NS921X_UARTB;
128 return;
129 } else if ((clock & (1 << 3)) &&
130 NS921X_UART_ENABLED(NS921X_UARTC)) {
131 *putc = putc_ns921x;
132 *base = NS921X_UARTC;
133 return;
134 } else if ((clock & (1 << 4)) &&
135 NS921X_UART_ENABLED(NS921X_UARTD)) {
136 *putc = putc_ns921x;
137 *base = NS921X_UARTD;
138 return;
139 }
140 }
141
142 *putc = putc_dummy;
143}
144
145void (*myputc)(char, void __iomem *);
146void __iomem *base;
147
148static void putc(char c)
149{
150 myputc(c, base);
151}
152
153static void arch_decomp_setup(void)
154{
155 autodetect(&myputc, &base);
156}
157#define arch_decomp_wdog()
158
159static void flush(void)
160{
161 /* nothing */
162}
163
164#endif /* ifndef __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/vmalloc.h b/arch/arm/mach-ns9xxx/include/mach/vmalloc.h
deleted file mode 100644
index c8651974c4b0..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/include/mach/vmalloc.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_VMALLOC_H
12#define __ASM_ARCH_VMALLOC_H
13
14#define VMALLOC_END (0xf0000000UL)
15
16#endif /* ifndef __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c
deleted file mode 100644
index 37ab0a2b83ad..000000000000
--- a/arch/arm/mach-ns9xxx/irq.c
+++ /dev/null
@@ -1,74 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/irq.c
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <linux/interrupt.h>
12#include <linux/kernel_stat.h>
13#include <linux/io.h>
14#include <asm/mach/irq.h>
15#include <mach/regs-sys-common.h>
16#include <mach/irqs.h>
17#include <mach/board.h>
18
19#include "generic.h"
20
21/* simple interrupt prio table: prio(x) < prio(y) <=> x < y */
22#define irq2prio(i) (i)
23#define prio2irq(p) (p)
24
25static void ns9xxx_mask_irq(struct irq_data *d)
26{
27 /* XXX: better use cpp symbols */
28 int prio = irq2prio(d->irq);
29 u32 ic = __raw_readl(SYS_IC(prio / 4));
30 ic &= ~(1 << (7 + 8 * (3 - (prio & 3))));
31 __raw_writel(ic, SYS_IC(prio / 4));
32}
33
34static void ns9xxx_eoi_irq(struct irq_data *d)
35{
36 __raw_writel(0, SYS_ISRADDR);
37}
38
39static void ns9xxx_unmask_irq(struct irq_data *d)
40{
41 /* XXX: better use cpp symbols */
42 int prio = irq2prio(d->irq);
43 u32 ic = __raw_readl(SYS_IC(prio / 4));
44 ic |= 1 << (7 + 8 * (3 - (prio & 3)));
45 __raw_writel(ic, SYS_IC(prio / 4));
46}
47
48static struct irq_chip ns9xxx_chip = {
49 .irq_eoi = ns9xxx_eoi_irq,
50 .irq_mask = ns9xxx_mask_irq,
51 .irq_unmask = ns9xxx_unmask_irq,
52};
53
54void __init ns9xxx_init_irq(void)
55{
56 int i;
57
58 /* disable all IRQs */
59 for (i = 0; i < 8; ++i)
60 __raw_writel(prio2irq(4 * i) << 24 |
61 prio2irq(4 * i + 1) << 16 |
62 prio2irq(4 * i + 2) << 8 |
63 prio2irq(4 * i + 3),
64 SYS_IC(i));
65
66 for (i = 0; i < 32; ++i)
67 __raw_writel(prio2irq(i), SYS_IVA(i));
68
69 for (i = 0; i <= 31; ++i) {
70 irq_set_chip_and_handler(i, &ns9xxx_chip, handle_fasteoi_irq);
71 set_irq_flags(i, IRQF_VALID);
72 irq_set_status_flags(i, IRQ_LEVEL);
73 }
74}
diff --git a/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c b/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
deleted file mode 100644
index 2858417d8d8a..000000000000
--- a/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <asm/mach/arch.h>
12#include <asm/mach-types.h>
13
14#include <mach/processor-ns9360.h>
15
16#include "board-a9m9750dev.h"
17#include "generic.h"
18
19static void __init mach_cc9p9360dev_map_io(void)
20{
21 ns9360_map_io();
22 board_a9m9750dev_map_io();
23}
24
25static void __init mach_cc9p9360dev_init_irq(void)
26{
27 ns9xxx_init_irq();
28 board_a9m9750dev_init_irq();
29}
30
31static void __init mach_cc9p9360dev_init_machine(void)
32{
33 ns9xxx_init_machine();
34 board_a9m9750dev_init_machine();
35}
36
37MACHINE_START(CC9P9360DEV, "Digi ConnectCore 9P 9360 on an A9M9750 Devboard")
38 .map_io = mach_cc9p9360dev_map_io,
39 .init_irq = mach_cc9p9360dev_init_irq,
40 .init_machine = mach_cc9p9360dev_init_machine,
41 .timer = &ns9360_timer,
42 .boot_params = 0x100,
43MACHINE_END
diff --git a/arch/arm/mach-ns9xxx/mach-cc9p9360js.c b/arch/arm/mach-ns9xxx/mach-cc9p9360js.c
deleted file mode 100644
index 729f68da4293..000000000000
--- a/arch/arm/mach-ns9xxx/mach-cc9p9360js.c
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/mach-cc9p9360js.c
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <asm/mach/arch.h>
12#include <asm/mach-types.h>
13
14#include <mach/processor-ns9360.h>
15
16#include "board-jscc9p9360.h"
17#include "generic.h"
18
19static void __init mach_cc9p9360js_init_machine(void)
20{
21 ns9xxx_init_machine();
22 board_jscc9p9360_init_machine();
23}
24
25MACHINE_START(CC9P9360JS, "Digi ConnectCore 9P 9360 on an JSCC9P9360 Devboard")
26 .map_io = ns9360_map_io,
27 .init_irq = ns9xxx_init_irq,
28 .init_machine = mach_cc9p9360js_init_machine,
29 .timer = &ns9360_timer,
30 .boot_params = 0x100,
31MACHINE_END
diff --git a/arch/arm/mach-ns9xxx/plat-serial8250.c b/arch/arm/mach-ns9xxx/plat-serial8250.c
deleted file mode 100644
index 463e92465fda..000000000000
--- a/arch/arm/mach-ns9xxx/plat-serial8250.c
+++ /dev/null
@@ -1,70 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/plat-serial8250.c
3 *
4 * Copyright (C) 2008 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <linux/platform_device.h>
12#include <linux/serial_8250.h>
13#include <linux/slab.h>
14
15#include <mach/regs-board-a9m9750dev.h>
16#include <mach/board.h>
17
18#define DRIVER_NAME "serial8250"
19
20static int __init ns9xxx_plat_serial8250_init(void)
21{
22 struct plat_serial8250_port *pdata;
23 struct platform_device *pdev;
24 int ret = -ENOMEM;
25 int i;
26
27 if (!board_is_a9m9750dev())
28 return -ENODEV;
29
30 pdev = platform_device_alloc(DRIVER_NAME, 0);
31 if (!pdev)
32 goto err;
33
34 pdata = kzalloc(5 * sizeof(*pdata), GFP_KERNEL);
35 if (!pdata)
36 goto err;
37
38 pdev->dev.platform_data = pdata;
39
40 pdata[0].iobase = FPGA_UARTA_BASE;
41 pdata[1].iobase = FPGA_UARTB_BASE;
42 pdata[2].iobase = FPGA_UARTC_BASE;
43 pdata[3].iobase = FPGA_UARTD_BASE;
44
45 for (i = 0; i < 4; ++i) {
46 pdata[i].membase = (void __iomem *)pdata[i].iobase;
47 pdata[i].mapbase = pdata[i].iobase;
48 pdata[i].iotype = UPIO_MEM;
49 pdata[i].uartclk = 18432000;
50 pdata[i].flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
51 }
52
53 pdata[0].irq = IRQ_FPGA_UARTA;
54 pdata[1].irq = IRQ_FPGA_UARTB;
55 pdata[2].irq = IRQ_FPGA_UARTC;
56 pdata[3].irq = IRQ_FPGA_UARTD;
57
58 ret = platform_device_add(pdev);
59 if (ret) {
60err:
61 platform_device_put(pdev);
62
63 printk(KERN_WARNING "Could not add %s (errno=%d)\n",
64 DRIVER_NAME, ret);
65 }
66
67 return 0;
68}
69
70arch_initcall(ns9xxx_plat_serial8250_init);
diff --git a/arch/arm/mach-ns9xxx/processor-ns9360.c b/arch/arm/mach-ns9xxx/processor-ns9360.c
deleted file mode 100644
index aed1999d24fc..000000000000
--- a/arch/arm/mach-ns9xxx/processor-ns9360.c
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/processor-ns9360.c
3 *
4 * Copyright (C) 2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <linux/io.h>
12#include <linux/kernel.h>
13
14#include <asm/page.h>
15#include <asm/mach/map.h>
16#include <mach/processor-ns9360.h>
17#include <mach/regs-sys-ns9360.h>
18
19void ns9360_reset(char mode)
20{
21 u32 reg;
22
23 reg = __raw_readl(SYS_PLL) >> 16;
24 REGSET(reg, SYS_PLL, SWC, YES);
25 __raw_writel(reg, SYS_PLL);
26}
27
28#define CRYSTAL 29491200 /* Hz */
29unsigned long ns9360_systemclock(void)
30{
31 u32 pll = __raw_readl(SYS_PLL);
32 return CRYSTAL * (REGGETIM(pll, SYS_PLL, ND) + 1)
33 >> REGGETIM(pll, SYS_PLL, FS);
34}
35
36static struct map_desc ns9360_io_desc[] __initdata = {
37 { /* BBus */
38 .virtual = io_p2v(0x90000000),
39 .pfn = __phys_to_pfn(0x90000000),
40 .length = 0x00700000,
41 .type = MT_DEVICE,
42 }, { /* AHB */
43 .virtual = io_p2v(0xa0100000),
44 .pfn = __phys_to_pfn(0xa0100000),
45 .length = 0x00900000,
46 .type = MT_DEVICE,
47 },
48};
49
50void __init ns9360_map_io(void)
51{
52 iotable_init(ns9360_io_desc, ARRAY_SIZE(ns9360_io_desc));
53}
diff --git a/arch/arm/mach-ns9xxx/time-ns9360.c b/arch/arm/mach-ns9xxx/time-ns9360.c
deleted file mode 100644
index 9ca32f55728b..000000000000
--- a/arch/arm/mach-ns9xxx/time-ns9360.c
+++ /dev/null
@@ -1,181 +0,0 @@
1/*
2 * arch/arm/mach-ns9xxx/time-ns9360.c
3 *
4 * Copyright (C) 2006,2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <linux/jiffies.h>
12#include <linux/interrupt.h>
13#include <linux/irq.h>
14#include <linux/stringify.h>
15#include <linux/clocksource.h>
16#include <linux/clockchips.h>
17
18#include <mach/processor-ns9360.h>
19#include <mach/regs-sys-ns9360.h>
20#include <mach/irqs.h>
21#include <mach/system.h>
22#include "generic.h"
23
24#define TIMER_CLOCKSOURCE 0
25#define TIMER_CLOCKEVENT 1
26static u32 latch;
27
28static cycle_t ns9360_clocksource_read(struct clocksource *cs)
29{
30 return __raw_readl(SYS_TR(TIMER_CLOCKSOURCE));
31}
32
33static struct clocksource ns9360_clocksource = {
34 .name = "ns9360-timer" __stringify(TIMER_CLOCKSOURCE),
35 .rating = 300,
36 .read = ns9360_clocksource_read,
37 .mask = CLOCKSOURCE_MASK(32),
38 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
39};
40
41static void ns9360_clockevent_setmode(enum clock_event_mode mode,
42 struct clock_event_device *clk)
43{
44 u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
45
46 switch (mode) {
47 case CLOCK_EVT_MODE_PERIODIC:
48 __raw_writel(latch, SYS_TRC(TIMER_CLOCKEVENT));
49 REGSET(tc, SYS_TCx, REN, EN);
50 REGSET(tc, SYS_TCx, INTS, EN);
51 REGSET(tc, SYS_TCx, TEN, EN);
52 break;
53
54 case CLOCK_EVT_MODE_ONESHOT:
55 REGSET(tc, SYS_TCx, REN, DIS);
56 REGSET(tc, SYS_TCx, INTS, EN);
57
58 /* fall through */
59
60 case CLOCK_EVT_MODE_UNUSED:
61 case CLOCK_EVT_MODE_SHUTDOWN:
62 case CLOCK_EVT_MODE_RESUME:
63 default:
64 REGSET(tc, SYS_TCx, TEN, DIS);
65 break;
66 }
67
68 __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
69}
70
71static int ns9360_clockevent_setnextevent(unsigned long evt,
72 struct clock_event_device *clk)
73{
74 u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
75
76 if (REGGET(tc, SYS_TCx, TEN)) {
77 REGSET(tc, SYS_TCx, TEN, DIS);
78 __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
79 }
80
81 REGSET(tc, SYS_TCx, TEN, EN);
82
83 __raw_writel(evt, SYS_TRC(TIMER_CLOCKEVENT));
84
85 __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
86
87 return 0;
88}
89
90static struct clock_event_device ns9360_clockevent_device = {
91 .name = "ns9360-timer" __stringify(TIMER_CLOCKEVENT),
92 .shift = 20,
93 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
94 .set_mode = ns9360_clockevent_setmode,
95 .set_next_event = ns9360_clockevent_setnextevent,
96};
97
98static irqreturn_t ns9360_clockevent_handler(int irq, void *dev_id)
99{
100 int timerno = irq - IRQ_NS9360_TIMER0;
101 u32 tc;
102
103 struct clock_event_device *evt = &ns9360_clockevent_device;
104
105 /* clear irq */
106 tc = __raw_readl(SYS_TC(timerno));
107 if (REGGET(tc, SYS_TCx, REN) == SYS_TCx_REN_DIS) {
108 REGSET(tc, SYS_TCx, TEN, DIS);
109 __raw_writel(tc, SYS_TC(timerno));
110 }
111 REGSET(tc, SYS_TCx, INTC, SET);
112 __raw_writel(tc, SYS_TC(timerno));
113 REGSET(tc, SYS_TCx, INTC, UNSET);
114 __raw_writel(tc, SYS_TC(timerno));
115
116 evt->event_handler(evt);
117
118 return IRQ_HANDLED;
119}
120
121static struct irqaction ns9360_clockevent_action = {
122 .name = "ns9360-timer" __stringify(TIMER_CLOCKEVENT),
123 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
124 .handler = ns9360_clockevent_handler,
125};
126
127static void __init ns9360_timer_init(void)
128{
129 int tc;
130
131 tc = __raw_readl(SYS_TC(TIMER_CLOCKSOURCE));
132 if (REGGET(tc, SYS_TCx, TEN)) {
133 REGSET(tc, SYS_TCx, TEN, DIS);
134 __raw_writel(tc, SYS_TC(TIMER_CLOCKSOURCE));
135 }
136
137 __raw_writel(0, SYS_TRC(TIMER_CLOCKSOURCE));
138
139 REGSET(tc, SYS_TCx, TEN, EN);
140 REGSET(tc, SYS_TCx, TDBG, STOP);
141 REGSET(tc, SYS_TCx, TLCS, CPU);
142 REGSET(tc, SYS_TCx, TM, IEE);
143 REGSET(tc, SYS_TCx, INTS, DIS);
144 REGSET(tc, SYS_TCx, UDS, UP);
145 REGSET(tc, SYS_TCx, TSZ, 32);
146 REGSET(tc, SYS_TCx, REN, EN);
147
148 __raw_writel(tc, SYS_TC(TIMER_CLOCKSOURCE));
149
150 clocksource_register_hz(&ns9360_clocksource, ns9360_cpuclock());
151
152 latch = SH_DIV(ns9360_cpuclock(), HZ, 0);
153
154 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
155 REGSET(tc, SYS_TCx, TEN, DIS);
156 REGSET(tc, SYS_TCx, TDBG, STOP);
157 REGSET(tc, SYS_TCx, TLCS, CPU);
158 REGSET(tc, SYS_TCx, TM, IEE);
159 REGSET(tc, SYS_TCx, INTS, DIS);
160 REGSET(tc, SYS_TCx, UDS, DOWN);
161 REGSET(tc, SYS_TCx, TSZ, 32);
162 REGSET(tc, SYS_TCx, REN, EN);
163 __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
164
165 ns9360_clockevent_device.mult = div_sc(ns9360_cpuclock(),
166 NSEC_PER_SEC, ns9360_clockevent_device.shift);
167 ns9360_clockevent_device.max_delta_ns =
168 clockevent_delta2ns(-1, &ns9360_clockevent_device);
169 ns9360_clockevent_device.min_delta_ns =
170 clockevent_delta2ns(1, &ns9360_clockevent_device);
171
172 ns9360_clockevent_device.cpumask = cpumask_of(0);
173 clockevents_register_device(&ns9360_clockevent_device);
174
175 setup_irq(IRQ_NS9360_TIMER0 + TIMER_CLOCKEVENT,
176 &ns9360_clockevent_action);
177}
178
179struct sys_timer ns9360_timer = {
180 .init = ns9360_timer_init,
181};
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-26 20:07:59 -0500