diff options
author | Lennert Buytenhek <buytenh@wantstofly.org> | 2008-03-07 05:47:23 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-03-08 10:53:49 -0500 |
commit | 4c91363dc01310dc34f1621ef00d680b4404f71c (patch) | |
tree | 34624b7e2ebc3aad1ce8666d0288a6afe70b384b /arch/arm | |
parent | 88603f1dc1bf414dc21a0361693d1270231a6c59 (diff) |
[ARM] 4856/1: Orion: initialise the sixth PCIe MBUS mapping window as well
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-orion/addr-map.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/arm/mach-orion/addr-map.c b/arch/arm/mach-orion/addr-map.c index 2e2fd63643c3..58cc3c0333b6 100644 --- a/arch/arm/mach-orion/addr-map.c +++ b/arch/arm/mach-orion/addr-map.c | |||
@@ -97,14 +97,20 @@ | |||
97 | #define PCIE_BAR_CTRL(n) ORION_PCIE_REG(0x1804 + ((n - 1) * 4)) | 97 | #define PCIE_BAR_CTRL(n) ORION_PCIE_REG(0x1804 + ((n - 1) * 4)) |
98 | #define PCIE_BAR_LO(n) ORION_PCIE_REG(0x0010 + ((n) * 8)) | 98 | #define PCIE_BAR_LO(n) ORION_PCIE_REG(0x0010 + ((n) * 8)) |
99 | #define PCIE_BAR_HI(n) ORION_PCIE_REG(0x0014 + ((n) * 8)) | 99 | #define PCIE_BAR_HI(n) ORION_PCIE_REG(0x0014 + ((n) * 8)) |
100 | #define PCIE_WIN_CTRL(n) ORION_PCIE_REG(0x1820 + ((n) << 4)) | 100 | #define PCIE_WIN_CTRL(n) (((n) < 5) ? \ |
101 | #define PCIE_WIN_BASE(n) ORION_PCIE_REG(0x1824 + ((n) << 4)) | 101 | ORION_PCIE_REG(0x1820 + ((n) << 4)) : \ |
102 | #define PCIE_WIN_REMAP(n) ORION_PCIE_REG(0x182c + ((n) << 4)) | 102 | ORION_PCIE_REG(0x1880)) |
103 | #define PCIE_WIN_BASE(n) (((n) < 5) ? \ | ||
104 | ORION_PCIE_REG(0x1824 + ((n) << 4)) : \ | ||
105 | ORION_PCIE_REG(0x1884)) | ||
106 | #define PCIE_WIN_REMAP(n) (((n) < 5) ? \ | ||
107 | ORION_PCIE_REG(0x182c + ((n) << 4)) : \ | ||
108 | ORION_PCIE_REG(0x188c)) | ||
103 | #define PCIE_DEFWIN_CTRL ORION_PCIE_REG(0x18b0) | 109 | #define PCIE_DEFWIN_CTRL ORION_PCIE_REG(0x18b0) |
104 | #define PCIE_EXPROM_WIN_CTRL ORION_PCIE_REG(0x18c0) | 110 | #define PCIE_EXPROM_WIN_CTRL ORION_PCIE_REG(0x18c0) |
105 | #define PCIE_EXPROM_WIN_REMP ORION_PCIE_REG(0x18c4) | 111 | #define PCIE_EXPROM_WIN_REMP ORION_PCIE_REG(0x18c4) |
106 | #define PCIE_MAX_BARS 3 | 112 | #define PCIE_MAX_BARS 3 |
107 | #define PCIE_MAX_WINS 5 | 113 | #define PCIE_MAX_WINS 6 |
108 | 114 | ||
109 | /* | 115 | /* |
110 | * Use PCIE BAR '1' for all DDR banks | 116 | * Use PCIE BAR '1' for all DDR banks |