diff options
author | Dave Airlie <airlied@redhat.com> | 2010-08-03 19:51:27 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2010-08-03 19:51:27 -0400 |
commit | fa0a6024da61d96a12fab18991b9897292b43253 (patch) | |
tree | 35ba7b067863f649dc37c4b67a3ed740c0d9736d /arch/arm | |
parent | 4c70b2eae371ebe83019ac47de6088b78124ab36 (diff) | |
parent | 7b824ec2e5d7d086264ecae51e30e3c5e00cdecc (diff) |
Merge remote branch 'intel/drm-intel-next' of /ssd/git/drm-next into drm-core-next
* 'intel/drm-intel-next' of /ssd/git/drm-next: (230 commits)
drm/i915: Clear the Ironlake dithering flags when the pipe doesn't want it.
drm/agp/i915: trim stolen space to 32M
drm/i915: Unset cursor if out-of-bounds upon mode change (v4)
drm/i915: Unreference object not handle on creation
drm/i915: Attempt to uncouple object after catastrophic failure in unbind
drm/i915: Repeat unbinding during free if interrupted (v6)
drm/i915: Refactor i915_gem_retire_requests()
drm/i915: Warn if we run out of FIFO space for a mode
drm/i915: Round up the watermark entries (v3)
drm/i915: Typo in (unused) register mask for overlay.
drm/i915: Check overlay stride errata for i830 and i845
drm/i915: Validate the mode for eDP by using fixed panel size
drm/i915: Always use the fixed panel timing for eDP
drm/i915: Enable panel fitting for eDP
drm/i915: Add fixed panel mode parsed from EDID for eDP without fixed mode in VBT
drm/i915/sdvo: Set sync polarity based on actual mode
drm/i915/hdmi: Set sync polarity based on actual mode
drm/i915/pch: Set transcoder sync polarity for DP based on actual mode
drm/i915: Initialize LVDS and eDP outputs before anything else
drm/i915/dp: Correctly report eDP in the core connector type
...
Diffstat (limited to 'arch/arm')
25 files changed, 114 insertions, 83 deletions
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 53faa9063a03..864a002137fe 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile | |||
@@ -71,6 +71,9 @@ targets := vmlinux vmlinux.lds \ | |||
71 | piggy.$(suffix_y) piggy.$(suffix_y).o \ | 71 | piggy.$(suffix_y) piggy.$(suffix_y).o \ |
72 | font.o font.c head.o misc.o $(OBJS) | 72 | font.o font.c head.o misc.o $(OBJS) |
73 | 73 | ||
74 | # Make sure files are removed during clean | ||
75 | extra-y += piggy.gzip piggy.lzo piggy.lzma lib1funcs.S | ||
76 | |||
74 | ifeq ($(CONFIG_FUNCTION_TRACER),y) | 77 | ifeq ($(CONFIG_FUNCTION_TRACER),y) |
75 | ORIG_CFLAGS := $(KBUILD_CFLAGS) | 78 | ORIG_CFLAGS := $(KBUILD_CFLAGS) |
76 | KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) | 79 | KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) |
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index 6f80665f477e..9eaf65f43642 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c | |||
@@ -1028,13 +1028,12 @@ static int sa1111_remove(struct platform_device *pdev) | |||
1028 | struct sa1111 *sachip = platform_get_drvdata(pdev); | 1028 | struct sa1111 *sachip = platform_get_drvdata(pdev); |
1029 | 1029 | ||
1030 | if (sachip) { | 1030 | if (sachip) { |
1031 | __sa1111_remove(sachip); | ||
1032 | platform_set_drvdata(pdev, NULL); | ||
1033 | |||
1034 | #ifdef CONFIG_PM | 1031 | #ifdef CONFIG_PM |
1035 | kfree(sachip->saved_state); | 1032 | kfree(sachip->saved_state); |
1036 | sachip->saved_state = NULL; | 1033 | sachip->saved_state = NULL; |
1037 | #endif | 1034 | #endif |
1035 | __sa1111_remove(sachip); | ||
1036 | platform_set_drvdata(pdev, NULL); | ||
1038 | } | 1037 | } |
1039 | 1038 | ||
1040 | return 0; | 1039 | return 0; |
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index c980156f3263..1261b1f928d9 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/types.h> | 26 | #include <linux/types.h> |
27 | #include <asm/byteorder.h> | 27 | #include <asm/byteorder.h> |
28 | #include <asm/memory.h> | 28 | #include <asm/memory.h> |
29 | #include <asm/system.h> | ||
29 | 30 | ||
30 | /* | 31 | /* |
31 | * ISA I/O bus memory addresses are 1:1 with the physical address. | 32 | * ISA I/O bus memory addresses are 1:1 with the physical address. |
@@ -179,25 +180,38 @@ extern void _memset_io(volatile void __iomem *, int, size_t); | |||
179 | * IO port primitives for more information. | 180 | * IO port primitives for more information. |
180 | */ | 181 | */ |
181 | #ifdef __mem_pci | 182 | #ifdef __mem_pci |
182 | #define readb(c) ({ __u8 __v = __raw_readb(__mem_pci(c)); __v; }) | 183 | #define readb_relaxed(c) ({ u8 __v = __raw_readb(__mem_pci(c)); __v; }) |
183 | #define readw(c) ({ __u16 __v = le16_to_cpu((__force __le16) \ | 184 | #define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16) \ |
184 | __raw_readw(__mem_pci(c))); __v; }) | 185 | __raw_readw(__mem_pci(c))); __v; }) |
185 | #define readl(c) ({ __u32 __v = le32_to_cpu((__force __le32) \ | 186 | #define readl_relaxed(c) ({ u32 __v = le32_to_cpu((__force __le32) \ |
186 | __raw_readl(__mem_pci(c))); __v; }) | 187 | __raw_readl(__mem_pci(c))); __v; }) |
187 | #define readb_relaxed(addr) readb(addr) | 188 | |
188 | #define readw_relaxed(addr) readw(addr) | 189 | #define writeb_relaxed(v,c) ((void)__raw_writeb(v,__mem_pci(c))) |
189 | #define readl_relaxed(addr) readl(addr) | 190 | #define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \ |
191 | cpu_to_le16(v),__mem_pci(c))) | ||
192 | #define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \ | ||
193 | cpu_to_le32(v),__mem_pci(c))) | ||
194 | |||
195 | #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE | ||
196 | #define __iormb() rmb() | ||
197 | #define __iowmb() wmb() | ||
198 | #else | ||
199 | #define __iormb() do { } while (0) | ||
200 | #define __iowmb() do { } while (0) | ||
201 | #endif | ||
202 | |||
203 | #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) | ||
204 | #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) | ||
205 | #define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; }) | ||
206 | |||
207 | #define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); }) | ||
208 | #define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); }) | ||
209 | #define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); }) | ||
190 | 210 | ||
191 | #define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l) | 211 | #define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l) |
192 | #define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l) | 212 | #define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l) |
193 | #define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l) | 213 | #define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l) |
194 | 214 | ||
195 | #define writeb(v,c) __raw_writeb(v,__mem_pci(c)) | ||
196 | #define writew(v,c) __raw_writew((__force __u16) \ | ||
197 | cpu_to_le16(v),__mem_pci(c)) | ||
198 | #define writel(v,c) __raw_writel((__force __u32) \ | ||
199 | cpu_to_le32(v),__mem_pci(c)) | ||
200 | |||
201 | #define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l) | 215 | #define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l) |
202 | #define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l) | 216 | #define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l) |
203 | #define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l) | 217 | #define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l) |
@@ -244,13 +258,13 @@ extern void _memset_io(volatile void __iomem *, int, size_t); | |||
244 | * io{read,write}{8,16,32} macros | 258 | * io{read,write}{8,16,32} macros |
245 | */ | 259 | */ |
246 | #ifndef ioread8 | 260 | #ifndef ioread8 |
247 | #define ioread8(p) ({ unsigned int __v = __raw_readb(p); __v; }) | 261 | #define ioread8(p) ({ unsigned int __v = __raw_readb(p); __iormb(); __v; }) |
248 | #define ioread16(p) ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __v; }) | 262 | #define ioread16(p) ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __iormb(); __v; }) |
249 | #define ioread32(p) ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __v; }) | 263 | #define ioread32(p) ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __iormb(); __v; }) |
250 | 264 | ||
251 | #define iowrite8(v,p) __raw_writeb(v, p) | 265 | #define iowrite8(v,p) ({ __iowmb(); (void)__raw_writeb(v, p); }) |
252 | #define iowrite16(v,p) __raw_writew((__force __u16)cpu_to_le16(v), p) | 266 | #define iowrite16(v,p) ({ __iowmb(); (void)__raw_writew((__force __u16)cpu_to_le16(v), p); }) |
253 | #define iowrite32(v,p) __raw_writel((__force __u32)cpu_to_le32(v), p) | 267 | #define iowrite32(v,p) ({ __iowmb(); (void)__raw_writel((__force __u32)cpu_to_le32(v), p); }) |
254 | 268 | ||
255 | #define ioread8_rep(p,d,c) __raw_readsb(p,d,c) | 269 | #define ioread8_rep(p,d,c) __raw_readsb(p,d,c) |
256 | #define ioread16_rep(p,d,c) __raw_readsw(p,d,c) | 270 | #define ioread16_rep(p,d,c) __raw_readsw(p,d,c) |
diff --git a/arch/arm/lib/csumpartialcopyuser.S b/arch/arm/lib/csumpartialcopyuser.S index 59ff6fdc1e63..7d08b43d2c0e 100644 --- a/arch/arm/lib/csumpartialcopyuser.S +++ b/arch/arm/lib/csumpartialcopyuser.S | |||
@@ -71,7 +71,7 @@ | |||
71 | .pushsection .fixup,"ax" | 71 | .pushsection .fixup,"ax" |
72 | .align 4 | 72 | .align 4 |
73 | 9001: mov r4, #-EFAULT | 73 | 9001: mov r4, #-EFAULT |
74 | ldr r5, [fp, #4] @ *err_ptr | 74 | ldr r5, [sp, #8*4] @ *err_ptr |
75 | str r4, [r5] | 75 | str r4, [r5] |
76 | ldmia sp, {r1, r2} @ retrieve dst, len | 76 | ldmia sp, {r1, r2} @ retrieve dst, len |
77 | add r2, r2, r1 | 77 | add r2, r2, r1 |
diff --git a/arch/arm/mach-clps711x/include/mach/debug-macro.S b/arch/arm/mach-clps711x/include/mach/debug-macro.S index fedd8076a689..072cc6b61ba3 100644 --- a/arch/arm/mach-clps711x/include/mach/debug-macro.S +++ b/arch/arm/mach-clps711x/include/mach/debug-macro.S | |||
@@ -11,6 +11,7 @@ | |||
11 | * | 11 | * |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <mach/hardware.h> | ||
14 | #include <asm/hardware/clps7111.h> | 15 | #include <asm/hardware/clps7111.h> |
15 | 16 | ||
16 | .macro addruart, rx, tmp | 17 | .macro addruart, rx, tmp |
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index 2ec3095ffb7b..b280efb1fa12 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/mtd/partitions.h> | 25 | #include <linux/mtd/partitions.h> |
26 | #include <linux/mtd/physmap.h> | 26 | #include <linux/mtd/physmap.h> |
27 | #include <linux/regulator/machine.h> | 27 | #include <linux/regulator/machine.h> |
28 | #include <linux/regulator/tps6507x.h> | ||
28 | #include <linux/mfd/tps6507x.h> | 29 | #include <linux/mfd/tps6507x.h> |
29 | #include <linux/input/tps6507x-ts.h> | 30 | #include <linux/input/tps6507x-ts.h> |
30 | 31 | ||
@@ -469,6 +470,11 @@ struct regulator_consumer_supply tps65070_ldo2_consumers[] = { | |||
469 | }, | 470 | }, |
470 | }; | 471 | }; |
471 | 472 | ||
473 | /* We take advantage of the fact that both defdcdc{2,3} are tied high */ | ||
474 | static struct tps6507x_reg_platform_data tps6507x_platform_data = { | ||
475 | .defdcdc_default = true, | ||
476 | }; | ||
477 | |||
472 | struct regulator_init_data tps65070_regulator_data[] = { | 478 | struct regulator_init_data tps65070_regulator_data[] = { |
473 | /* dcdc1 */ | 479 | /* dcdc1 */ |
474 | { | 480 | { |
@@ -494,6 +500,7 @@ struct regulator_init_data tps65070_regulator_data[] = { | |||
494 | }, | 500 | }, |
495 | .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers), | 501 | .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers), |
496 | .consumer_supplies = tps65070_dcdc2_consumers, | 502 | .consumer_supplies = tps65070_dcdc2_consumers, |
503 | .driver_data = &tps6507x_platform_data, | ||
497 | }, | 504 | }, |
498 | 505 | ||
499 | /* dcdc3 */ | 506 | /* dcdc3 */ |
@@ -507,6 +514,7 @@ struct regulator_init_data tps65070_regulator_data[] = { | |||
507 | }, | 514 | }, |
508 | .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers), | 515 | .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers), |
509 | .consumer_supplies = tps65070_dcdc3_consumers, | 516 | .consumer_supplies = tps65070_dcdc3_consumers, |
517 | .driver_data = &tps6507x_platform_data, | ||
510 | }, | 518 | }, |
511 | 519 | ||
512 | /* ldo1 */ | 520 | /* ldo1 */ |
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c index e3bc3f6f6b10..88b3dd89be89 100644 --- a/arch/arm/mach-footbridge/common.c +++ b/arch/arm/mach-footbridge/common.c | |||
@@ -232,7 +232,7 @@ EXPORT_SYMBOL(__bus_to_virt); | |||
232 | 232 | ||
233 | unsigned long __pfn_to_bus(unsigned long pfn) | 233 | unsigned long __pfn_to_bus(unsigned long pfn) |
234 | { | 234 | { |
235 | return __pfn_to_phys(pfn) + (fb_bus_sdram_offset() - PHYS_OFFSET)); | 235 | return __pfn_to_phys(pfn) + (fb_bus_sdram_offset() - PHYS_OFFSET); |
236 | } | 236 | } |
237 | EXPORT_SYMBOL(__pfn_to_bus); | 237 | EXPORT_SYMBOL(__pfn_to_bus); |
238 | 238 | ||
diff --git a/arch/arm/mach-h720x/include/mach/debug-macro.S b/arch/arm/mach-h720x/include/mach/debug-macro.S index a9ee8f0d48b7..27cafd12f033 100644 --- a/arch/arm/mach-h720x/include/mach/debug-macro.S +++ b/arch/arm/mach-h720x/include/mach/debug-macro.S | |||
@@ -11,8 +11,10 @@ | |||
11 | * | 11 | * |
12 | */ | 12 | */ |
13 | 13 | ||
14 | .equ io_virt, IO_BASE | 14 | #include <mach/hardware.h> |
15 | .equ io_phys, IO_START | 15 | |
16 | .equ io_virt, IO_VIRT | ||
17 | .equ io_phys, IO_PHYS | ||
16 | 18 | ||
17 | .macro addruart, rx, tmp | 19 | .macro addruart, rx, tmp |
18 | mrc p15, 0, \rx, c1, c0 | 20 | mrc p15, 0, \rx, c1, c0 |
diff --git a/arch/arm/mach-kirkwood/tsx1x-common.c b/arch/arm/mach-kirkwood/tsx1x-common.c index 7221c20b2afa..f781164e623f 100644 --- a/arch/arm/mach-kirkwood/tsx1x-common.c +++ b/arch/arm/mach-kirkwood/tsx1x-common.c | |||
@@ -77,7 +77,7 @@ struct spi_board_info __initdata qnap_tsx1x_spi_slave_info[] = { | |||
77 | }, | 77 | }, |
78 | }; | 78 | }; |
79 | 79 | ||
80 | void qnap_tsx1x_register_flash(void) | 80 | void __init qnap_tsx1x_register_flash(void) |
81 | { | 81 | { |
82 | spi_register_board_info(qnap_tsx1x_spi_slave_info, | 82 | spi_register_board_info(qnap_tsx1x_spi_slave_info, |
83 | ARRAY_SIZE(qnap_tsx1x_spi_slave_info)); | 83 | ARRAY_SIZE(qnap_tsx1x_spi_slave_info)); |
diff --git a/arch/arm/mach-kirkwood/tsx1x-common.h b/arch/arm/mach-kirkwood/tsx1x-common.h index 9a592962a6ea..7fa037361b55 100644 --- a/arch/arm/mach-kirkwood/tsx1x-common.h +++ b/arch/arm/mach-kirkwood/tsx1x-common.h | |||
@@ -1,7 +1,7 @@ | |||
1 | #ifndef __ARCH_KIRKWOOD_TSX1X_COMMON_H | 1 | #ifndef __ARCH_KIRKWOOD_TSX1X_COMMON_H |
2 | #define __ARCH_KIRKWOOD_TSX1X_COMMON_H | 2 | #define __ARCH_KIRKWOOD_TSX1X_COMMON_H |
3 | 3 | ||
4 | extern void qnap_tsx1x_register_flash(void); | 4 | extern void __init qnap_tsx1x_register_flash(void); |
5 | extern void qnap_tsx1x_power_off(void); | 5 | extern void qnap_tsx1x_power_off(void); |
6 | 6 | ||
7 | #endif | 7 | #endif |
diff --git a/arch/arm/mach-ns9xxx/include/mach/debug-macro.S b/arch/arm/mach-ns9xxx/include/mach/debug-macro.S index 0859336a8e6d..5c934bdb7158 100644 --- a/arch/arm/mach-ns9xxx/include/mach/debug-macro.S +++ b/arch/arm/mach-ns9xxx/include/mach/debug-macro.S | |||
@@ -8,6 +8,7 @@ | |||
8 | * the Free Software Foundation. | 8 | * the Free Software Foundation. |
9 | */ | 9 | */ |
10 | #include <mach/hardware.h> | 10 | #include <mach/hardware.h> |
11 | #include <asm/memory.h> | ||
11 | 12 | ||
12 | #include <mach/regs-board-a9m9750dev.h> | 13 | #include <mach/regs-board-a9m9750dev.h> |
13 | 14 | ||
diff --git a/arch/arm/mach-ns9xxx/include/mach/uncompress.h b/arch/arm/mach-ns9xxx/include/mach/uncompress.h index 1b12d324b087..770a68c46e81 100644 --- a/arch/arm/mach-ns9xxx/include/mach/uncompress.h +++ b/arch/arm/mach-ns9xxx/include/mach/uncompress.h | |||
@@ -20,50 +20,49 @@ static void putc_dummy(char c, void __iomem *base) | |||
20 | /* nothing */ | 20 | /* nothing */ |
21 | } | 21 | } |
22 | 22 | ||
23 | static int timeout; | ||
24 | |||
23 | static void putc_ns9360(char c, void __iomem *base) | 25 | static void putc_ns9360(char c, void __iomem *base) |
24 | { | 26 | { |
25 | static int t = 0x10000; | ||
26 | do { | 27 | do { |
27 | if (t) | 28 | if (timeout) |
28 | --t; | 29 | --timeout; |
29 | 30 | ||
30 | if (__raw_readl(base + 8) & (1 << 3)) { | 31 | if (__raw_readl(base + 8) & (1 << 3)) { |
31 | __raw_writeb(c, base + 16); | 32 | __raw_writeb(c, base + 16); |
32 | t = 0x10000; | 33 | timeout = 0x10000; |
33 | break; | 34 | break; |
34 | } | 35 | } |
35 | } while (t); | 36 | } while (timeout); |
36 | } | 37 | } |
37 | 38 | ||
38 | static void putc_a9m9750dev(char c, void __iomem *base) | 39 | static void putc_a9m9750dev(char c, void __iomem *base) |
39 | { | 40 | { |
40 | static int t = 0x10000; | ||
41 | do { | 41 | do { |
42 | if (t) | 42 | if (timeout) |
43 | --t; | 43 | --timeout; |
44 | 44 | ||
45 | if (__raw_readb(base + 5) & (1 << 5)) { | 45 | if (__raw_readb(base + 5) & (1 << 5)) { |
46 | __raw_writeb(c, base); | 46 | __raw_writeb(c, base); |
47 | t = 0x10000; | 47 | timeout = 0x10000; |
48 | break; | 48 | break; |
49 | } | 49 | } |
50 | } while (t); | 50 | } while (timeout); |
51 | 51 | ||
52 | } | 52 | } |
53 | 53 | ||
54 | static void putc_ns921x(char c, void __iomem *base) | 54 | static void putc_ns921x(char c, void __iomem *base) |
55 | { | 55 | { |
56 | static int t = 0x10000; | ||
57 | do { | 56 | do { |
58 | if (t) | 57 | if (timeout) |
59 | --t; | 58 | --timeout; |
60 | 59 | ||
61 | if (!(__raw_readl(base) & (1 << 11))) { | 60 | if (!(__raw_readl(base) & (1 << 11))) { |
62 | __raw_writeb(c, base + 0x0028); | 61 | __raw_writeb(c, base + 0x0028); |
63 | t = 0x10000; | 62 | timeout = 0x10000; |
64 | break; | 63 | break; |
65 | } | 64 | } |
66 | } while (t); | 65 | } while (timeout); |
67 | } | 66 | } |
68 | 67 | ||
69 | #define MSCS __REG(0xA0900184) | 68 | #define MSCS __REG(0xA0900184) |
@@ -89,6 +88,7 @@ static void putc_ns921x(char c, void __iomem *base) | |||
89 | 88 | ||
90 | static void autodetect(void (**putc)(char, void __iomem *), void __iomem **base) | 89 | static void autodetect(void (**putc)(char, void __iomem *), void __iomem **base) |
91 | { | 90 | { |
91 | timeout = 0x10000; | ||
92 | if (((__raw_readl(MSCS) >> 16) & 0xfe) == 0x00) { | 92 | if (((__raw_readl(MSCS) >> 16) & 0xfe) == 0x00) { |
93 | /* ns9360 or ns9750 */ | 93 | /* ns9360 or ns9750 */ |
94 | if (NS9360_UART_ENABLED(NS9360_UARTA)) { | 94 | if (NS9360_UART_ENABLED(NS9360_UARTA)) { |
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index c5555ca13d00..03483920ed6e 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c | |||
@@ -220,10 +220,10 @@ static int board_keymap[] = { | |||
220 | KEY(4, 4, KEY_LEFTCTRL), | 220 | KEY(4, 4, KEY_LEFTCTRL), |
221 | KEY(4, 5, KEY_RIGHTALT), | 221 | KEY(4, 5, KEY_RIGHTALT), |
222 | KEY(4, 6, KEY_LEFTSHIFT), | 222 | KEY(4, 6, KEY_LEFTSHIFT), |
223 | KEY(4, 8, KEY_10), | 223 | KEY(4, 8, KEY_F10), |
224 | 224 | ||
225 | KEY(5, 0, KEY_Y), | 225 | KEY(5, 0, KEY_Y), |
226 | KEY(5, 8, KEY_11), | 226 | KEY(5, 8, KEY_F11), |
227 | 227 | ||
228 | KEY(6, 0, KEY_U), | 228 | KEY(6, 0, KEY_U), |
229 | 229 | ||
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c index 45c23fd6df31..40b6ac2de876 100644 --- a/arch/arm/mach-pxa/colibri-pxa300.c +++ b/arch/arm/mach-pxa/colibri-pxa300.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <mach/colibri.h> | 26 | #include <mach/colibri.h> |
27 | #include <mach/ohci.h> | 27 | #include <mach/ohci.h> |
28 | #include <mach/pxafb.h> | 28 | #include <mach/pxafb.h> |
29 | #include <mach/audio.h> | ||
29 | 30 | ||
30 | #include "generic.h" | 31 | #include "generic.h" |
31 | #include "devices.h" | 32 | #include "devices.h" |
@@ -145,7 +146,7 @@ static void __init colibri_pxa300_init_lcd(void) | |||
145 | static inline void colibri_pxa300_init_lcd(void) {} | 146 | static inline void colibri_pxa300_init_lcd(void) {} |
146 | #endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */ | 147 | #endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */ |
147 | 148 | ||
148 | #if defined(SND_AC97_CODEC) || defined(SND_AC97_CODEC_MODULE) | 149 | #if defined(CONFIG_SND_AC97_CODEC) || defined(CONFIG_SND_AC97_CODEC_MODULE) |
149 | static mfp_cfg_t colibri_pxa310_ac97_pin_config[] __initdata = { | 150 | static mfp_cfg_t colibri_pxa310_ac97_pin_config[] __initdata = { |
150 | GPIO24_AC97_SYSCLK, | 151 | GPIO24_AC97_SYSCLK, |
151 | GPIO23_AC97_nACRESET, | 152 | GPIO23_AC97_nACRESET, |
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 3d1dcb9ac08f..51ffa6afb675 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c | |||
@@ -446,7 +446,7 @@ static struct platform_device corgiled_device = { | |||
446 | static struct pxamci_platform_data corgi_mci_platform_data = { | 446 | static struct pxamci_platform_data corgi_mci_platform_data = { |
447 | .detect_delay_ms = 250, | 447 | .detect_delay_ms = 250, |
448 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | 448 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
449 | .gpio_card_detect = -1, | 449 | .gpio_card_detect = CORGI_GPIO_nSD_DETECT, |
450 | .gpio_card_ro = CORGI_GPIO_nSD_WP, | 450 | .gpio_card_ro = CORGI_GPIO_nSD_WP, |
451 | .gpio_power = CORGI_GPIO_SD_PWR, | 451 | .gpio_power = CORGI_GPIO_SD_PWR, |
452 | }; | 452 | }; |
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c index 9e4d9816726a..268a9bc6be8a 100644 --- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c +++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c | |||
@@ -256,13 +256,9 @@ static void init_sdram_rows(void) | |||
256 | 256 | ||
257 | static u32 mdrefr_dri(unsigned int freq) | 257 | static u32 mdrefr_dri(unsigned int freq) |
258 | { | 258 | { |
259 | u32 dri = 0; | 259 | u32 interval = freq * SDRAM_TREF / sdram_rows; |
260 | 260 | ||
261 | if (cpu_is_pxa25x()) | 261 | return (interval - (cpu_is_pxa27x() ? 31 : 0)) / 32; |
262 | dri = ((freq * SDRAM_TREF) / (sdram_rows * 32)); | ||
263 | if (cpu_is_pxa27x()) | ||
264 | dri = ((freq * SDRAM_TREF) / (sdram_rows - 31)) / 32; | ||
265 | return dri; | ||
266 | } | 262 | } |
267 | 263 | ||
268 | /* find a valid frequency point */ | 264 | /* find a valid frequency point */ |
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 0af36177ff08..c059dac02b61 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c | |||
@@ -41,10 +41,10 @@ void pxa27x_clear_otgph(void) | |||
41 | EXPORT_SYMBOL(pxa27x_clear_otgph); | 41 | EXPORT_SYMBOL(pxa27x_clear_otgph); |
42 | 42 | ||
43 | static unsigned long ac97_reset_config[] = { | 43 | static unsigned long ac97_reset_config[] = { |
44 | GPIO95_AC97_nRESET, | ||
45 | GPIO95_GPIO, | ||
46 | GPIO113_AC97_nRESET, | ||
47 | GPIO113_GPIO, | 44 | GPIO113_GPIO, |
45 | GPIO113_AC97_nRESET, | ||
46 | GPIO95_GPIO, | ||
47 | GPIO95_AC97_nRESET, | ||
48 | }; | 48 | }; |
49 | 49 | ||
50 | void pxa27x_assert_ac97reset(int reset_gpio, int on) | 50 | void pxa27x_assert_ac97reset(int reset_gpio, int on) |
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c index 595be19f8ad5..02e9fdeb8faf 100644 --- a/arch/arm/mach-realview/core.c +++ b/arch/arm/mach-realview/core.c | |||
@@ -237,7 +237,7 @@ static unsigned int realview_mmc_status(struct device *dev) | |||
237 | else | 237 | else |
238 | mask = 2; | 238 | mask = 2; |
239 | 239 | ||
240 | return !(readl(REALVIEW_SYSMCI) & mask); | 240 | return readl(REALVIEW_SYSMCI) & mask; |
241 | } | 241 | } |
242 | 242 | ||
243 | struct mmci_platform_data realview_mmc0_plat_data = { | 243 | struct mmci_platform_data realview_mmc0_plat_data = { |
diff --git a/arch/arm/mach-shark/include/mach/debug-macro.S b/arch/arm/mach-shark/include/mach/debug-macro.S index 50f071c5bf4d..5ea24d4d1ba6 100644 --- a/arch/arm/mach-shark/include/mach/debug-macro.S +++ b/arch/arm/mach-shark/include/mach/debug-macro.S | |||
@@ -20,6 +20,9 @@ | |||
20 | strb \rd, [\rx] | 20 | strb \rd, [\rx] |
21 | .endm | 21 | .endm |
22 | 22 | ||
23 | .macro waituart,rd,rx | ||
24 | .endm | ||
25 | |||
23 | .macro busyuart,rd,rx | 26 | .macro busyuart,rd,rx |
24 | mov \rd, #0 | 27 | mov \rd, #0 |
25 | 1001: add \rd, \rd, #1 | 28 | 1001: add \rd, \rd, #1 |
diff --git a/arch/arm/mach-ux500/include/mach/uncompress.h b/arch/arm/mach-ux500/include/mach/uncompress.h index 8552eb188b50..0271ca0a83df 100644 --- a/arch/arm/mach-ux500/include/mach/uncompress.h +++ b/arch/arm/mach-ux500/include/mach/uncompress.h | |||
@@ -30,22 +30,22 @@ | |||
30 | static void putc(const char c) | 30 | static void putc(const char c) |
31 | { | 31 | { |
32 | /* Do nothing if the UART is not enabled. */ | 32 | /* Do nothing if the UART is not enabled. */ |
33 | if (!(readb(U8500_UART_CR) & 0x1)) | 33 | if (!(__raw_readb(U8500_UART_CR) & 0x1)) |
34 | return; | 34 | return; |
35 | 35 | ||
36 | if (c == '\n') | 36 | if (c == '\n') |
37 | putc('\r'); | 37 | putc('\r'); |
38 | 38 | ||
39 | while (readb(U8500_UART_FR) & (1 << 5)) | 39 | while (__raw_readb(U8500_UART_FR) & (1 << 5)) |
40 | barrier(); | 40 | barrier(); |
41 | writeb(c, U8500_UART_DR); | 41 | __raw_writeb(c, U8500_UART_DR); |
42 | } | 42 | } |
43 | 43 | ||
44 | static void flush(void) | 44 | static void flush(void) |
45 | { | 45 | { |
46 | if (!(readb(U8500_UART_CR) & 0x1)) | 46 | if (!(__raw_readb(U8500_UART_CR) & 0x1)) |
47 | return; | 47 | return; |
48 | while (readb(U8500_UART_FR) & (1 << 3)) | 48 | while (__raw_readb(U8500_UART_FR) & (1 << 3)) |
49 | barrier(); | 49 | barrier(); |
50 | } | 50 | } |
51 | 51 | ||
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index d250711b8c7a..c84239761cb4 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c | |||
@@ -241,7 +241,7 @@ static struct platform_device v2m_flash_device = { | |||
241 | 241 | ||
242 | static unsigned int v2m_mmci_status(struct device *dev) | 242 | static unsigned int v2m_mmci_status(struct device *dev) |
243 | { | 243 | { |
244 | return !(readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0)); | 244 | return readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0); |
245 | } | 245 | } |
246 | 246 | ||
247 | static struct mmci_platform_data v2m_mmci_data = { | 247 | static struct mmci_platform_data v2m_mmci_data = { |
diff --git a/arch/arm/mach-w90x900/cpu.c b/arch/arm/mach-w90x900/cpu.c index 642207e18198..83c56324a472 100644 --- a/arch/arm/mach-w90x900/cpu.c +++ b/arch/arm/mach-w90x900/cpu.c | |||
@@ -93,7 +93,7 @@ static struct clk_lookup nuc900_clkregs[] = { | |||
93 | DEF_CLKLOOK(&clk_kpi, "nuc900-kpi", NULL), | 93 | DEF_CLKLOOK(&clk_kpi, "nuc900-kpi", NULL), |
94 | DEF_CLKLOOK(&clk_wdt, "nuc900-wdt", NULL), | 94 | DEF_CLKLOOK(&clk_wdt, "nuc900-wdt", NULL), |
95 | DEF_CLKLOOK(&clk_gdma, "nuc900-gdma", NULL), | 95 | DEF_CLKLOOK(&clk_gdma, "nuc900-gdma", NULL), |
96 | DEF_CLKLOOK(&clk_adc, "nuc900-adc", NULL), | 96 | DEF_CLKLOOK(&clk_adc, "nuc900-ts", NULL), |
97 | DEF_CLKLOOK(&clk_usi, "nuc900-spi", NULL), | 97 | DEF_CLKLOOK(&clk_usi, "nuc900-spi", NULL), |
98 | DEF_CLKLOOK(&clk_ext, NULL, "ext"), | 98 | DEF_CLKLOOK(&clk_ext, NULL, "ext"), |
99 | DEF_CLKLOOK(&clk_timer0, NULL, "timer0"), | 99 | DEF_CLKLOOK(&clk_timer0, NULL, "timer0"), |
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index df4955885b21..9982eb385c0f 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c | |||
@@ -32,14 +32,14 @@ static uint32_t l2x0_way_mask; /* Bitmask of active ways */ | |||
32 | static inline void cache_wait(void __iomem *reg, unsigned long mask) | 32 | static inline void cache_wait(void __iomem *reg, unsigned long mask) |
33 | { | 33 | { |
34 | /* wait for the operation to complete */ | 34 | /* wait for the operation to complete */ |
35 | while (readl(reg) & mask) | 35 | while (readl_relaxed(reg) & mask) |
36 | ; | 36 | ; |
37 | } | 37 | } |
38 | 38 | ||
39 | static inline void cache_sync(void) | 39 | static inline void cache_sync(void) |
40 | { | 40 | { |
41 | void __iomem *base = l2x0_base; | 41 | void __iomem *base = l2x0_base; |
42 | writel(0, base + L2X0_CACHE_SYNC); | 42 | writel_relaxed(0, base + L2X0_CACHE_SYNC); |
43 | cache_wait(base + L2X0_CACHE_SYNC, 1); | 43 | cache_wait(base + L2X0_CACHE_SYNC, 1); |
44 | } | 44 | } |
45 | 45 | ||
@@ -47,14 +47,14 @@ static inline void l2x0_clean_line(unsigned long addr) | |||
47 | { | 47 | { |
48 | void __iomem *base = l2x0_base; | 48 | void __iomem *base = l2x0_base; |
49 | cache_wait(base + L2X0_CLEAN_LINE_PA, 1); | 49 | cache_wait(base + L2X0_CLEAN_LINE_PA, 1); |
50 | writel(addr, base + L2X0_CLEAN_LINE_PA); | 50 | writel_relaxed(addr, base + L2X0_CLEAN_LINE_PA); |
51 | } | 51 | } |
52 | 52 | ||
53 | static inline void l2x0_inv_line(unsigned long addr) | 53 | static inline void l2x0_inv_line(unsigned long addr) |
54 | { | 54 | { |
55 | void __iomem *base = l2x0_base; | 55 | void __iomem *base = l2x0_base; |
56 | cache_wait(base + L2X0_INV_LINE_PA, 1); | 56 | cache_wait(base + L2X0_INV_LINE_PA, 1); |
57 | writel(addr, base + L2X0_INV_LINE_PA); | 57 | writel_relaxed(addr, base + L2X0_INV_LINE_PA); |
58 | } | 58 | } |
59 | 59 | ||
60 | #ifdef CONFIG_PL310_ERRATA_588369 | 60 | #ifdef CONFIG_PL310_ERRATA_588369 |
@@ -75,9 +75,9 @@ static inline void l2x0_flush_line(unsigned long addr) | |||
75 | 75 | ||
76 | /* Clean by PA followed by Invalidate by PA */ | 76 | /* Clean by PA followed by Invalidate by PA */ |
77 | cache_wait(base + L2X0_CLEAN_LINE_PA, 1); | 77 | cache_wait(base + L2X0_CLEAN_LINE_PA, 1); |
78 | writel(addr, base + L2X0_CLEAN_LINE_PA); | 78 | writel_relaxed(addr, base + L2X0_CLEAN_LINE_PA); |
79 | cache_wait(base + L2X0_INV_LINE_PA, 1); | 79 | cache_wait(base + L2X0_INV_LINE_PA, 1); |
80 | writel(addr, base + L2X0_INV_LINE_PA); | 80 | writel_relaxed(addr, base + L2X0_INV_LINE_PA); |
81 | } | 81 | } |
82 | #else | 82 | #else |
83 | 83 | ||
@@ -90,7 +90,7 @@ static inline void l2x0_flush_line(unsigned long addr) | |||
90 | { | 90 | { |
91 | void __iomem *base = l2x0_base; | 91 | void __iomem *base = l2x0_base; |
92 | cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1); | 92 | cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1); |
93 | writel(addr, base + L2X0_CLEAN_INV_LINE_PA); | 93 | writel_relaxed(addr, base + L2X0_CLEAN_INV_LINE_PA); |
94 | } | 94 | } |
95 | #endif | 95 | #endif |
96 | 96 | ||
@@ -109,7 +109,7 @@ static inline void l2x0_inv_all(void) | |||
109 | 109 | ||
110 | /* invalidate all ways */ | 110 | /* invalidate all ways */ |
111 | spin_lock_irqsave(&l2x0_lock, flags); | 111 | spin_lock_irqsave(&l2x0_lock, flags); |
112 | writel(l2x0_way_mask, l2x0_base + L2X0_INV_WAY); | 112 | writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY); |
113 | cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask); | 113 | cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask); |
114 | cache_sync(); | 114 | cache_sync(); |
115 | spin_unlock_irqrestore(&l2x0_lock, flags); | 115 | spin_unlock_irqrestore(&l2x0_lock, flags); |
@@ -215,8 +215,8 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) | |||
215 | 215 | ||
216 | l2x0_base = base; | 216 | l2x0_base = base; |
217 | 217 | ||
218 | cache_id = readl(l2x0_base + L2X0_CACHE_ID); | 218 | cache_id = readl_relaxed(l2x0_base + L2X0_CACHE_ID); |
219 | aux = readl(l2x0_base + L2X0_AUX_CTRL); | 219 | aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL); |
220 | 220 | ||
221 | aux &= aux_mask; | 221 | aux &= aux_mask; |
222 | aux |= aux_val; | 222 | aux |= aux_val; |
@@ -248,15 +248,15 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) | |||
248 | * If you are booting from non-secure mode | 248 | * If you are booting from non-secure mode |
249 | * accessing the below registers will fault. | 249 | * accessing the below registers will fault. |
250 | */ | 250 | */ |
251 | if (!(readl(l2x0_base + L2X0_CTRL) & 1)) { | 251 | if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) { |
252 | 252 | ||
253 | /* l2x0 controller is disabled */ | 253 | /* l2x0 controller is disabled */ |
254 | writel(aux, l2x0_base + L2X0_AUX_CTRL); | 254 | writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL); |
255 | 255 | ||
256 | l2x0_inv_all(); | 256 | l2x0_inv_all(); |
257 | 257 | ||
258 | /* enable L2X0 */ | 258 | /* enable L2X0 */ |
259 | writel(1, l2x0_base + L2X0_CTRL); | 259 | writel_relaxed(1, l2x0_base + L2X0_CTRL); |
260 | } | 260 | } |
261 | 261 | ||
262 | outer_cache.inv_range = l2x0_inv_range; | 262 | outer_cache.inv_range = l2x0_inv_range; |
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c index 086816b205b8..6ab244062b4a 100644 --- a/arch/arm/mm/highmem.c +++ b/arch/arm/mm/highmem.c | |||
@@ -163,19 +163,22 @@ static DEFINE_PER_CPU(int, kmap_high_l1_vipt_depth); | |||
163 | 163 | ||
164 | void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte) | 164 | void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte) |
165 | { | 165 | { |
166 | unsigned int idx, cpu = smp_processor_id(); | 166 | unsigned int idx, cpu; |
167 | int *depth = &per_cpu(kmap_high_l1_vipt_depth, cpu); | 167 | int *depth; |
168 | unsigned long vaddr, flags; | 168 | unsigned long vaddr, flags; |
169 | pte_t pte, *ptep; | 169 | pte_t pte, *ptep; |
170 | 170 | ||
171 | if (!in_interrupt()) | ||
172 | preempt_disable(); | ||
173 | |||
174 | cpu = smp_processor_id(); | ||
175 | depth = &per_cpu(kmap_high_l1_vipt_depth, cpu); | ||
176 | |||
171 | idx = KM_L1_CACHE + KM_TYPE_NR * cpu; | 177 | idx = KM_L1_CACHE + KM_TYPE_NR * cpu; |
172 | vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); | 178 | vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); |
173 | ptep = TOP_PTE(vaddr); | 179 | ptep = TOP_PTE(vaddr); |
174 | pte = mk_pte(page, kmap_prot); | 180 | pte = mk_pte(page, kmap_prot); |
175 | 181 | ||
176 | if (!in_interrupt()) | ||
177 | preempt_disable(); | ||
178 | |||
179 | raw_local_irq_save(flags); | 182 | raw_local_irq_save(flags); |
180 | (*depth)++; | 183 | (*depth)++; |
181 | if (pte_val(*ptep) == pte_val(pte)) { | 184 | if (pte_val(*ptep) == pte_val(pte)) { |
diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/plat-spear/include/plat/debug-macro.S index 1670734b7e51..37fa593884ee 100644 --- a/arch/arm/plat-spear/include/plat/debug-macro.S +++ b/arch/arm/plat-spear/include/plat/debug-macro.S | |||
@@ -17,8 +17,8 @@ | |||
17 | .macro addruart, rx | 17 | .macro addruart, rx |
18 | mrc p15, 0, \rx, c1, c0 | 18 | mrc p15, 0, \rx, c1, c0 |
19 | tst \rx, #1 @ MMU enabled? | 19 | tst \rx, #1 @ MMU enabled? |
20 | moveq \rx, =SPEAR_DBG_UART_BASE @ Physical base | 20 | moveq \rx, #SPEAR_DBG_UART_BASE @ Physical base |
21 | movne \rx, =VA_SPEAR_DBG_UART_BASE @ Virtual base | 21 | movne \rx, #VA_SPEAR_DBG_UART_BASE @ Virtual base |
22 | .endm | 22 | .endm |
23 | 23 | ||
24 | .macro senduart, rd, rx | 24 | .macro senduart, rd, rx |