Merge branch 'imx/driver' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/drivers

* 'imx/driver' of git://git.linaro.org/people/shawnguo/linux-2.6: (3 commits)
  ARM: imx6q: add cko1 clock
  ARM: mxc: make imx_dma_is_general_purpose more generic for sdma
  ARM: imx6: Rename DEBUG_IMX6Q_UART to UART4

26 files changed, 304 insertions, 126 deletions

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index b895a2a92da8..66ca8014ff3e 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -180,12 +180,12 @@ choice
                   Say Y here if you want kernel low-level debugging support
                   on i.MX50 or i.MX53.
 
-        config DEBUG_IMX6Q_UART
-                bool "i.MX6Q Debug UART"
+        config DEBUG_IMX6Q_UART4
+                bool "i.MX6Q Debug UART4"
                 depends on SOC_IMX6Q
                 help
                   Say Y here if you want kernel low-level debugging support
-                  on i.MX6Q.
+                  on i.MX6Q UART4.
 
         config DEBUG_MSM_UART1
                 bool "Kernel low-level debugging messages via MSM UART1"
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index d1bcd7b13ebc..fb1f1cfce60c 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -320,13 +320,6 @@ err0:
         return -EBUSY;
 }
 
-/*
- * If we set up a device for bus mastering, we need to check the latency
- * timer as we don't have even crappy BIOSes to set it properly.
- * The implementation is from arch/i386/pci/i386.c
- */
-unsigned int pcibios_max_latency = 255;
-
 /* ITE bridge requires setting latency timer to avoid early bus access
    termination by PCI bus master devices
 */
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
index d8e44a43047c..ff3ad2244824 100644
--- a/arch/arm/common/pl330.c
+++ b/arch/arm/common/pl330.c
@@ -1502,12 +1502,13 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
         struct pl330_thread *thrd = ch_id;
         struct pl330_dmac *pl330;
         unsigned long flags;
-        int ret = 0, active = thrd->req_running;
+        int ret = 0, active;
 
         if (!thrd || thrd->free || thrd->dmac->state == DYING)
                 return -EINVAL;
 
         pl330 = thrd->dmac;
+        active = thrd->req_running;
 
         spin_lock_irqsave(&pl330->lock, flags);
 
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 62f8095d46de..23371b17b23e 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -137,6 +137,11 @@
         disable_irq
         .endm
 
+        .macro  save_and_disable_irqs_notrace, oldcpsr
+        mrs     \oldcpsr, cpsr
+        disable_irq_notrace
+        .endm
+
 /*
  * Restore interrupt state previously stored in a register.  We don't
  * guarantee that this will preserve the flags.
diff --git a/arch/arm/include/asm/hardware/pl330.h b/arch/arm/include/asm/hardware/pl330.h
index 575fa8186ca0..c1821385abfa 100644
--- a/arch/arm/include/asm/hardware/pl330.h
+++ b/arch/arm/include/asm/hardware/pl330.h
@@ -41,7 +41,7 @@ enum pl330_dstcachectrl {
         DCCTRL1, /* Bufferable only */
         DCCTRL2, /* Cacheable, but do not allocate */
         DCCTRL3, /* Cacheable and bufferable, but do not allocate */
-        DINVALID1 = 8,
+        DINVALID1,              /* AWCACHE = 0x1000 */
         DINVALID2,
         DCCTRL6, /* Cacheable write-through, allocate on writes only */
         DCCTRL7, /* Cacheable write-back, allocate on writes only */
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index ce280b8d613c..cb8d638924fd 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -22,6 +22,7 @@
 #include <asm/hw_breakpoint.h>
 #include <asm/ptrace.h>
 #include <asm/types.h>
+#include <asm/system.h>
 
 #ifdef __KERNEL__
 #define STACK_TOP       ((current->personality & ADDR_LIMIT_32BIT) ? \
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index e33870ff0ac0..ede6443c34d9 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -23,6 +23,7 @@
 #include <linux/perf_event.h>
 #include <linux/hw_breakpoint.h>
 #include <linux/regset.h>
+#include <linux/audit.h>
 
 #include <asm/pgtable.h>
 #include <asm/system.h>
@@ -904,6 +905,12 @@ long arch_ptrace(struct task_struct *child, long request,
         return ret;
 }
 
+#ifdef __ARMEB__
+#define AUDIT_ARCH_NR AUDIT_ARCH_ARMEB
+#else
+#define AUDIT_ARCH_NR AUDIT_ARCH_ARM
+#endif
+
 asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
 {
         unsigned long ip;
@@ -918,7 +925,7 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
         if (!ip)
                 audit_syscall_exit(regs);
         else
-                audit_syscall_entry(AUDIT_ARCH_ARMEB, scno, regs->ARM_r0,
+                audit_syscall_entry(AUDIT_ARCH_NR, scno, regs->ARM_r0,
                                     regs->ARM_r1, regs->ARM_r2, regs->ARM_r3);
 
         if (!test_thread_flag(TIF_SYSCALL_TRACE))
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 4285daa077b0..7a79b24597b2 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -129,7 +129,7 @@ static struct notifier_block twd_cpufreq_nb = {
 
 static int twd_cpufreq_init(void)
 {
-        if (!IS_ERR(twd_clk))
+        if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
                 return cpufreq_register_notifier(&twd_cpufreq_nb,
                         CPUFREQ_TRANSITION_NOTIFIER);
 
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c
index 2d88f8b9a454..111c328f5420 100644
--- a/arch/arm/mach-imx/clock-imx6q.c
+++ b/arch/arm/mach-imx/clock-imx6q.c
@@ -329,6 +329,12 @@
 #define BM_CLPCR_MASK_SCU_IDLE          (0x1 << 26)
 #define BM_CLPCR_MASK_L2CC_IDLE         (0x1 << 27)
 
+#define BP_CCOSR_CKO1_EN                7
+#define BP_CCOSR_CKO1_PODF              4
+#define BM_CCOSR_CKO1_PODF              (0x7 << 4)
+#define BP_CCOSR_CKO1_SEL               0
+#define BM_CCOSR_CKO1_SEL               (0xf << 0)
+
 #define FREQ_480M       480000000
 #define FREQ_528M       528000000
 #define FREQ_594M       594000000
@@ -393,6 +399,7 @@ static struct clk ipu1_di1_clk;
 static struct clk ipu2_di0_clk;
 static struct clk ipu2_di1_clk;
 static struct clk enfc_clk;
+static struct clk cko1_clk;
 static struct clk dummy_clk = {};
 
 static unsigned long external_high_reference;
@@ -938,6 +945,24 @@ static void _clk_disable(struct clk *clk)
         writel_relaxed(reg, clk->enable_reg);
 }
 
+static int _clk_enable_1b(struct clk *clk)
+{
+        u32 reg;
+        reg = readl_relaxed(clk->enable_reg);
+        reg |= 0x1 << clk->enable_shift;
+        writel_relaxed(reg, clk->enable_reg);
+
+        return 0;
+}
+
+static void _clk_disable_1b(struct clk *clk)
+{
+        u32 reg;
+        reg = readl_relaxed(clk->enable_reg);
+        reg &= ~(0x1 << clk->enable_shift);
+        writel_relaxed(reg, clk->enable_reg);
+}
+
 struct divider {
         struct clk *clk;
         void __iomem *reg;
@@ -983,6 +1008,7 @@ DEF_CLK_DIV1(ipu2_di0_pre_div,	&ipu2_di0_pre_clk,	CSCDR2,	IPU2_DI0_PRE);
 DEF_CLK_DIV1(ipu2_di1_pre_div,  &ipu2_di1_pre_clk,      CSCDR2, IPU2_DI1_PRE);
 DEF_CLK_DIV1(ipu1_div,          &ipu1_clk,              CSCDR3, IPU1_HSP);
 DEF_CLK_DIV1(ipu2_div,          &ipu2_clk,              CSCDR3, IPU2_HSP);
+DEF_CLK_DIV1(cko1_div,          &cko1_clk,              CCOSR, CKO1);
 
 #define DEF_CLK_DIV2(d, c, r, b)                                \
         static struct divider d = {                             \
@@ -1038,6 +1064,7 @@ static struct divider *dividers[] = {
         &enfc_div,
         &spdif_div,
         &asrc_serial_div,
+        &cko1_div,
 };
 
 static unsigned long ldb_di_clk_get_rate(struct clk *clk)
@@ -1625,6 +1652,32 @@ DEF_IPU_DI_MUX(CSCDR2, 2, 1);
 DEF_IPU_MUX(1);
 DEF_IPU_MUX(2);
 
+static struct multiplexer cko1_mux = {
+        .clk = &cko1_clk,
+        .reg = CCOSR,
+        .bp = BP_CCOSR_CKO1_SEL,
+        .bm = BM_CCOSR_CKO1_SEL,
+        .parents = {
+                &pll3_usb_otg,
+                &pll2_bus,
+                &pll1_sys,
+                &pll5_video,
+                &dummy_clk,
+                &axi_clk,
+                &enfc_clk,
+                &ipu1_di0_clk,
+                &ipu1_di1_clk,
+                &ipu2_di0_clk,
+                &ipu2_di1_clk,
+                &ahb_clk,
+                &ipg_clk,
+                &ipg_perclk,
+                &ckil_clk,
+                &pll4_audio,
+                NULL
+        },
+};
+
 static struct multiplexer *multiplexers[] = {
         &axi_mux,
         &periph_mux,
@@ -1667,6 +1720,7 @@ static struct multiplexer *multiplexers[] = {
         &ipu2_di1_mux,
         &ipu1_mux,
         &ipu2_mux,
+        &cko1_mux,
 };
 
 static int _clk_set_parent(struct clk *clk, struct clk *parent)
@@ -1690,7 +1744,7 @@ static int _clk_set_parent(struct clk *clk, struct clk *parent)
                         break;
                 i++;
         }
-        if (!m->parents[i])
+        if (!m->parents[i] || m->parents[i] == &dummy_clk)
                 return -EINVAL;
 
         val = readl_relaxed(m->reg);
@@ -1745,6 +1799,20 @@ DEF_NG_CLK(asrc_serial_clk,	&pll3_usb_otg);
                 .secondary      = s,                    \
         }
 
+#define DEF_CLK_1B(name, er, es, p, s)                  \
+        static struct clk name = {                      \
+                .enable_reg     = er,                   \
+                .enable_shift   = es,                   \
+                .enable         = _clk_enable_1b,       \
+                .disable        = _clk_disable_1b,      \
+                .get_rate       = _clk_get_rate,        \
+                .set_rate       = _clk_set_rate,        \
+                .round_rate     = _clk_round_rate,      \
+                .set_parent     = _clk_set_parent,      \
+                .parent         = p,                    \
+                .secondary      = s,                    \
+        }
+
 DEF_CLK(aips_tz1_clk,     CCGR0, CG0,  &ahb_clk,          NULL);
 DEF_CLK(aips_tz2_clk,     CCGR0, CG1,  &ahb_clk,          NULL);
 DEF_CLK(apbh_dma_clk,     CCGR0, CG2,  &ahb_clk,          NULL);
@@ -1811,6 +1879,7 @@ DEF_CLK(usdhc4_clk,	  CCGR6, CG4,  &pll2_pfd_400m,	  NULL);
 DEF_CLK(emi_slow_clk,     CCGR6, CG5,  &axi_clk,          NULL);
 DEF_CLK(vdo_axi_clk,      CCGR6, CG6,  &axi_clk,          NULL);
 DEF_CLK(vpu_clk,          CCGR6, CG7,  &axi_clk,          NULL);
+DEF_CLK_1B(cko1_clk,      CCOSR, BP_CCOSR_CKO1_EN, &pll2_bus, NULL);
 
 static int pcie_clk_enable(struct clk *clk)
 {
@@ -1922,6 +1991,7 @@ static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK(NULL, "gpmi_io_clk", gpmi_io_clk),
         _REGISTER_CLOCK(NULL, "usboh3_clk", usboh3_clk),
         _REGISTER_CLOCK(NULL, "sata_clk", sata_clk),
+        _REGISTER_CLOCK(NULL, "cko1_clk", cko1_clk),
 };
 
 int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
@@ -2029,6 +2099,8 @@ int __init mx6q_clocks_init(void)
         clk_set_rate(&usdhc3_clk, 49500000);
         clk_set_rate(&usdhc4_clk, 49500000);
 
+        clk_set_parent(&cko1_clk, &ahb_clk);
+
         np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
         base = of_iomap(np, 0);
         WARN_ON(!base);
diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c
index d4ab6f29a766..0213f8dcee81 100644
--- a/arch/arm/mach-imx/lluart.c
+++ b/arch/arm/mach-imx/lluart.c
@@ -17,7 +17,7 @@
 #include <mach/hardware.h>
 
 static struct map_desc imx_lluart_desc = {
-#ifdef CONFIG_DEBUG_IMX6Q_UART
+#ifdef CONFIG_DEBUG_IMX6Q_UART4
         .virtual        = MX6Q_IO_P2V(MX6Q_UART4_BASE_ADDR),
         .pfn            = __phys_to_pfn(MX6Q_UART4_BASE_ADDR),
         .length         = MX6Q_UART4_SIZE,
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index c005e2f5e383..57db2038b23c 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -108,6 +108,7 @@ void __init omap3xxx_voltagedomains_init(void)
          * XXX Will depend on the process, validation, and binning
          * for the currently-running IC
          */
+#ifdef CONFIG_PM_OPP
         if (cpu_is_omap3630()) {
                 omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data;
                 omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data;
@@ -115,6 +116,7 @@ void __init omap3xxx_voltagedomains_init(void)
                 omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data;
                 omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data;
         }
+#endif
 
         if (cpu_is_omap3517() || cpu_is_omap3505())
                 voltdms = voltagedomains_am35xx;
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index 4e11d022595d..c3115f6853d4 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -100,9 +100,11 @@ void __init omap44xx_voltagedomains_init(void)
          * XXX Will depend on the process, validation, and binning
          * for the currently-running IC
          */
+#ifdef CONFIG_PM_OPP
         omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data;
         omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data;
         omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data;
+#endif
 
         for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++)
                 voltdm->sys_clk.name = sys_clk_name;
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index eff8a96c75ee..068b754bc348 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -30,6 +30,7 @@
 #include <linux/serial_sci.h>
 #include <linux/smsc911x.h>
 #include <linux/gpio.h>
+#include <linux/videodev2.h>
 #include <linux/input.h>
 #include <linux/input/sh_keysc.h>
 #include <linux/mmc/host.h>
@@ -37,7 +38,6 @@
 #include <linux/mmc/sh_mobile_sdhi.h>
 #include <linux/mfd/tmio.h>
 #include <linux/sh_clk.h>
-#include <linux/dma-mapping.h>
 #include <video/sh_mobile_lcdc.h>
 #include <video/sh_mipi_dsi.h>
 #include <sound/sh_fsi.h>
@@ -159,19 +159,12 @@ static struct resource sh_mmcif_resources[] = {
         },
 };
 
-static struct sh_mmcif_dma sh_mmcif_dma = {
-        .chan_priv_rx   = {
-                .slave_id       = SHDMA_SLAVE_MMCIF_RX,
-        },
-        .chan_priv_tx   = {
-                .slave_id       = SHDMA_SLAVE_MMCIF_TX,
-        },
-};
 static struct sh_mmcif_plat_data sh_mmcif_platdata = {
         .sup_pclk       = 0,
         .ocr            = MMC_VDD_165_195,
         .caps           = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
-        .dma            = &sh_mmcif_dma,
+        .slave_id_tx    = SHDMA_SLAVE_MMCIF_TX,
+        .slave_id_rx    = SHDMA_SLAVE_MMCIF_RX,
 };
 
 static struct platform_device mmc_device = {
@@ -321,12 +314,11 @@ static struct resource mipidsi0_resources[] = {
         },
 };
 
-#define DSI0PHYCR       0xe615006c
 static int sh_mipi_set_dot_clock(struct platform_device *pdev,
                                  void __iomem *base,
                                  int enable)
 {
-        struct clk *pck;
+        struct clk *pck, *phy;
         int ret;
 
         pck = clk_get(&pdev->dev, "dsip_clk");
@@ -335,18 +327,27 @@ static int sh_mipi_set_dot_clock(struct platform_device *pdev,
                 goto sh_mipi_set_dot_clock_pck_err;
         }
 
+        phy = clk_get(&pdev->dev, "dsiphy_clk");
+        if (IS_ERR(phy)) {
+                ret = PTR_ERR(phy);
+                goto sh_mipi_set_dot_clock_phy_err;
+        }
+
         if (enable) {
                 clk_set_rate(pck, clk_round_rate(pck,  24000000));
-                __raw_writel(0x2a809010, DSI0PHYCR);
+                clk_set_rate(phy, clk_round_rate(pck, 510000000));
                 clk_enable(pck);
+                clk_enable(phy);
         } else {
                 clk_disable(pck);
+                clk_disable(phy);
         }
 
         ret = 0;
 
+        clk_put(phy);
+sh_mipi_set_dot_clock_phy_err:
         clk_put(pck);
-
 sh_mipi_set_dot_clock_pck_err:
         return ret;
 }
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index aab0a349f759..eeb4d9664584 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -295,15 +295,6 @@ static struct resource sh_mmcif_resources[] = {
         },
 };
 
-static struct sh_mmcif_dma sh_mmcif_dma = {
-        .chan_priv_rx   = {
-                .slave_id       = SHDMA_SLAVE_MMCIF_RX,
-        },
-        .chan_priv_tx   = {
-                .slave_id       = SHDMA_SLAVE_MMCIF_TX,
-        },
-};
-
 static struct sh_mmcif_plat_data sh_mmcif_plat = {
         .sup_pclk       = 0,
         .ocr            = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
@@ -311,7 +302,8 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = {
                           MMC_CAP_8_BIT_DATA |
                           MMC_CAP_NEEDS_POLL,
         .get_cd         = slot_cn7_get_cd,
-        .dma            = &sh_mmcif_dma,
+        .slave_id_tx    = SHDMA_SLAVE_MMCIF_TX,
+        .slave_id_rx    = SHDMA_SLAVE_MMCIF_RX,
 };
 
 static struct platform_device sh_mmcif_device = {
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index 857ceeec1bb0..c8e7ca23fc06 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -143,11 +143,10 @@ static struct gpio_keys_button gpio_buttons[] = {
 static struct gpio_keys_platform_data gpio_key_info = {
         .buttons        = gpio_buttons,
         .nbuttons       = ARRAY_SIZE(gpio_buttons),
-        .poll_interval  = 250, /* polled for now */
 };
 
 static struct platform_device gpio_keys_device = {
-        .name   = "gpio-keys-polled", /* polled for now */
+        .name   = "gpio-keys",
         .id     = -1,
         .dev    = {
                 .platform_data  = &gpio_key_info,
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 9b42fbd10f8e..a2813247b455 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -43,7 +43,6 @@
 #include <linux/smsc911x.h>
 #include <linux/sh_intc.h>
 #include <linux/tca6416_keypad.h>
-#include <linux/usb/r8a66597.h>
 #include <linux/usb/renesas_usbhs.h>
 #include <linux/dma-mapping.h>
 
@@ -145,11 +144,6 @@
  * 1-2 short | VBUS 5V       | Host
  * open      | external VBUS | Function
  *
- * *1
- * CN31 is used as
- * CONFIG_USB_R8A66597_HCD      Host
- * CONFIG_USB_RENESAS_USBHS     Function
- *
  * CAUTION
  *
  * renesas_usbhs driver can use external interrupt mode
@@ -161,15 +155,6 @@
  * mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0",
  * because Touchscreen is using IRQ7-PORT40.
  * It is impossible to use IRQ7 demux on this board.
- *
- * We can use external interrupt mode USB-Function on "USB1".
- * USB1 can become Host by r8a66597, and become Function by renesas_usbhs.
- * But don't select both drivers in same time.
- * These uses same IRQ number for request_irq(), and aren't supporting
- * IRQF_SHARED / IORESOURCE_IRQ_SHAREABLE.
- *
- * Actually these are old/new version of USB driver.
- * This mean its register will be broken if it supports shared IRQ,
  */
 
 /*
@@ -208,6 +193,16 @@
  */
 
 /*
+ * FSI - AK4642
+ *
+ * it needs amixer settings for playing
+ *
+ * amixer set "Headphone" on
+ * amixer set "HPOUTL Mixer DACH" on
+ * amixer set "HPOUTR Mixer DACH" on
+ */
+
+/*
  * FIXME !!
  *
  * gpio_no_direction
@@ -676,51 +671,16 @@ static struct platform_device usbhs0_device = {
  * Use J30 to select between Host and Function. This setting
  * can however not be detected by software. Hotplug of USBHS1
  * is provided via IRQ8.
+ *
+ * Current USB1 works as "USB Host".
+ *  - set J30 "short"
+ *
+ * If you want to use it as "USB gadget",
+ *  - J30 "open"
+ *  - modify usbhs1_get_id() USBHS_HOST -> USBHS_GADGET
+ *  - add .get_vbus = usbhs_get_vbus in usbhs1_private
  */
 #define IRQ8 evt2irq(0x0300)
-
-/* USBHS1 USB Host support via r8a66597_hcd */
-static void usb1_host_port_power(int port, int power)
-{
-        if (!power) /* only power-on is supported for now */
-                return;
-
-        /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
-        __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
-}
-
-static struct r8a66597_platdata usb1_host_data = {
-        .on_chip        = 1,
-        .port_power     = usb1_host_port_power,
-};
-
-static struct resource usb1_host_resources[] = {
-        [0] = {
-                .name   = "USBHS1",
-                .start  = 0xe68b0000,
-                .end    = 0xe68b00e6 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = evt2irq(0x1ce0) /* USB1_USB1I0 */,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device usb1_host_device = {
-        .name   = "r8a66597_hcd",
-        .id     = 1,
-        .dev = {
-                .dma_mask               = NULL,         /*  not use dma */
-                .coherent_dma_mask      = 0xffffffff,
-                .platform_data          = &usb1_host_data,
-        },
-        .num_resources  = ARRAY_SIZE(usb1_host_resources),
-        .resource       = usb1_host_resources,
-};
-
-/* USBHS1 USB Function support via renesas_usbhs */
-
 #define USB_PHY_MODE            (1 << 4)
 #define USB_PHY_INT_EN          ((1 << 3) | (1 << 2))
 #define USB_PHY_ON              (1 << 1)
@@ -776,7 +736,7 @@ static void usbhs1_hardware_exit(struct platform_device *pdev)
 
 static int usbhs1_get_id(struct platform_device *pdev)
 {
-        return USBHS_GADGET;
+        return USBHS_HOST;
 }
 
 static u32 usbhs1_pipe_cfg[] = {
@@ -807,7 +767,6 @@ static struct usbhs_private usbhs1_private = {
                         .hardware_exit  = usbhs1_hardware_exit,
                         .get_id         = usbhs1_get_id,
                         .phy_reset      = usbhs_phy_reset,
-                        .get_vbus       = usbhs_get_vbus,
                 },
                 .driver_param = {
                         .buswait_bwait  = 4,
@@ -1184,15 +1143,6 @@ static struct resource sh_mmcif_resources[] = {
         },
 };
 
-static struct sh_mmcif_dma sh_mmcif_dma = {
-        .chan_priv_rx   = {
-                .slave_id       = SHDMA_SLAVE_MMCIF_RX,
-        },
-        .chan_priv_tx   = {
-                .slave_id       = SHDMA_SLAVE_MMCIF_TX,
-        },
-};
-
 static struct sh_mmcif_plat_data sh_mmcif_plat = {
         .sup_pclk       = 0,
         .ocr            = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
@@ -1200,7 +1150,8 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = {
                           MMC_CAP_8_BIT_DATA |
                           MMC_CAP_NEEDS_POLL,
         .get_cd         = slot_cn7_get_cd,
-        .dma            = &sh_mmcif_dma,
+        .slave_id_tx    = SHDMA_SLAVE_MMCIF_TX,
+        .slave_id_rx    = SHDMA_SLAVE_MMCIF_RX,
 };
 
 static struct platform_device sh_mmcif_device = {
@@ -1311,7 +1262,6 @@ static struct platform_device *mackerel_devices[] __initdata = {
         &nor_flash_device,
         &smc911x_device,
         &lcdc_device,
-        &usb1_host_device,
         &usbhs1_device,
         &usbhs0_device,
         &leds_device,
@@ -1473,9 +1423,6 @@ static void __init mackerel_init(void)
         gpio_pull_down(GPIO_PORT167CR); /* VBUS0_1 pull down */
         gpio_request(GPIO_FN_IDIN_1_113, NULL);
 
-        /* USB phy tweak to make the r8a66597_hcd host driver work */
-        __raw_writew(0x8a0a, 0xe6058130);       /* USBCR4 */
-
         /* enable FSI2 port A (ak4643) */
         gpio_request(GPIO_FN_FSIAIBT,   NULL);
         gpio_request(GPIO_FN_FSIAILR,   NULL);
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index afbead6a6e17..7727cca6136c 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -365,6 +365,114 @@ static struct clk div6_clks[DIV6_NR] = {
                         dsi_parent, ARRAY_SIZE(dsi_parent), 12, 3),
 };
 
+/* DSI DIV */
+static unsigned long dsiphy_recalc(struct clk *clk)
+{
+        u32 value;
+
+        value = __raw_readl(clk->mapping->base);
+
+        /* FIXME */
+        if (!(value & 0x000B8000))
+                return clk->parent->rate;
+
+        value &= 0x3f;
+        value += 1;
+
+        if ((value < 12) ||
+            (value > 33)) {
+                pr_err("DSIPHY has wrong value (%d)", value);
+                return 0;
+        }
+
+        return clk->parent->rate / value;
+}
+
+static long dsiphy_round_rate(struct clk *clk, unsigned long rate)
+{
+        return clk_rate_mult_range_round(clk, 12, 33, rate);
+}
+
+static void dsiphy_disable(struct clk *clk)
+{
+        u32 value;
+
+        value = __raw_readl(clk->mapping->base);
+        value &= ~0x000B8000;
+
+        __raw_writel(value , clk->mapping->base);
+}
+
+static int dsiphy_enable(struct clk *clk)
+{
+        u32 value;
+        int multi;
+
+        value = __raw_readl(clk->mapping->base);
+        multi = (value & 0x3f) + 1;
+
+        if ((multi < 12) || (multi > 33))
+                return -EIO;
+
+        __raw_writel(value | 0x000B8000, clk->mapping->base);
+
+        return 0;
+}
+
+static int dsiphy_set_rate(struct clk *clk, unsigned long rate)
+{
+        u32 value;
+        int idx;
+
+        idx = rate / clk->parent->rate;
+        if ((idx < 12) || (idx > 33))
+                return -EINVAL;
+
+        idx += -1;
+
+        value = __raw_readl(clk->mapping->base);
+        value = (value & ~0x3f) + idx;
+
+        __raw_writel(value, clk->mapping->base);
+
+        return 0;
+}
+
+static struct clk_ops dsiphy_clk_ops = {
+        .recalc         = dsiphy_recalc,
+        .round_rate     = dsiphy_round_rate,
+        .set_rate       = dsiphy_set_rate,
+        .enable         = dsiphy_enable,
+        .disable        = dsiphy_disable,
+};
+
+static struct clk_mapping dsi0phy_clk_mapping = {
+        .phys   = DSI0PHYCR,
+        .len    = 4,
+};
+
+static struct clk_mapping dsi1phy_clk_mapping = {
+        .phys   = DSI1PHYCR,
+        .len    = 4,
+};
+
+static struct clk dsi0phy_clk = {
+        .ops            = &dsiphy_clk_ops,
+        .parent         = &div6_clks[DIV6_DSI0P], /* late install */
+        .mapping        = &dsi0phy_clk_mapping,
+};
+
+static struct clk dsi1phy_clk = {
+        .ops            = &dsiphy_clk_ops,
+        .parent         = &div6_clks[DIV6_DSI1P], /* late install */
+        .mapping        = &dsi1phy_clk_mapping,
+};
+
+static struct clk *late_main_clks[] = {
+        &dsi0phy_clk,
+        &dsi1phy_clk,
+};
+
 enum { MSTP001,
         MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
         MSTP219,
@@ -429,6 +537,8 @@ static struct clk_lookup lookups[] = {
         CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
         CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
         CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
+        CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.0", &dsi0phy_clk),
+        CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.1", &dsi1phy_clk),
 
         /* MSTP32 clocks */
         CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
@@ -504,6 +614,9 @@ void __init sh73a0_clock_init(void)
         if (!ret)
                 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
 
+        for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
+                ret = clk_register(late_main_clks[k]);
+
         clkdev_add_table(lookups, ARRAY_SIZE(lookups));
 
         if (!ret)
diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h
index 881d515a9686..cad57578ceed 100644
--- a/arch/arm/mach-shmobile/include/mach/sh73a0.h
+++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h
@@ -515,8 +515,8 @@ enum {
         SHDMA_SLAVE_MMCIF_RX,
 };
 
-/* PINT interrupts are located at Linux IRQ 768 and up */
-#define SH73A0_PINT0_IRQ(irq) ((irq) + 768)
-#define SH73A0_PINT1_IRQ(irq) ((irq) + 800)
+/* PINT interrupts are located at Linux IRQ 800 and up */
+#define SH73A0_PINT0_IRQ(irq) ((irq) + 800)
+#define SH73A0_PINT1_IRQ(irq) ((irq) + 832)
 
 #endif /* __ASM_SH73A0_H__ */
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index 1eda6b0b69e3..9857595eaa79 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -19,6 +19,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
+#include <linux/module.h>
 #include <linux/irq.h>
 #include <linux/io.h>
 #include <linux/sh_intc.h>
@@ -445,6 +446,7 @@ void __init sh73a0_init_irq(void)
                 setup_irq(gic_spi(1 + k), &sh73a0_irq_pin_cascade[k]);
 
                 n = intcs_evt2irq(to_intc_vect(gic_spi(1 + k)));
+                WARN_ON(irq_alloc_desc_at(n, numa_node_id()) != n);
                 irq_set_chip_and_handler_name(n, &intca_gic_irq_chip,
                                               handle_level_irq, "level");
                 set_irq_flags(n, IRQF_VALID); /* yuck */
diff --git a/arch/arm/mach-shmobile/pfc-r8a7779.c b/arch/arm/mach-shmobile/pfc-r8a7779.c
index 963532f2b2c4..d14c9b048077 100644
--- a/arch/arm/mach-shmobile/pfc-r8a7779.c
+++ b/arch/arm/mach-shmobile/pfc-r8a7779.c
@@ -2120,7 +2120,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
             FN_AUDATA3, 0, 0, 0 }
         },
         { PINMUX_CFG_REG_VAR("IPSR4", 0xfffc0030, 32,
-                             3, 1, 1, 1, 1, 1, 1, 3, 3, 1,
+                             3, 1, 1, 1, 1, 1, 1, 3, 3,
                              1, 1, 1, 1, 1, 1, 3, 3, 3, 2) {
             /* IP4_31_29 [3] */
             FN_DU1_DB0, FN_VI2_DATA4_VI2_B4, FN_SCL2_B, FN_SD3_DAT0,
diff --git a/arch/arm/mach-shmobile/pfc-sh7372.c b/arch/arm/mach-shmobile/pfc-sh7372.c
index 1bd6585a6acf..336093f9210a 100644
--- a/arch/arm/mach-shmobile/pfc-sh7372.c
+++ b/arch/arm/mach-shmobile/pfc-sh7372.c
@@ -23,6 +23,7 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/gpio.h>
+#include <mach/irqs.h>
 #include <mach/sh7372.h>
 
 #define CPU_ALL_PORT(fn, pfx, sfx) \
@@ -1594,6 +1595,43 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
         { },
 };
 
+#define EXT_IRQ16L(n) evt2irq(0x200 + ((n) << 5))
+#define EXT_IRQ16H(n) evt2irq(0x3200 + (((n) - 16) << 5))
+static struct pinmux_irq pinmux_irqs[] = {
+        PINMUX_IRQ(EXT_IRQ16L(0), PORT6_FN0, PORT162_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(1), PORT12_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(2), PORT4_FN0, PORT5_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(3), PORT8_FN0, PORT16_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(4), PORT17_FN0, PORT163_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(5), PORT18_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(6), PORT39_FN0, PORT164_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(7), PORT40_FN0, PORT167_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(8), PORT41_FN0, PORT168_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(9), PORT42_FN0, PORT169_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(10), PORT65_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(11), PORT67_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(12), PORT80_FN0, PORT137_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(13), PORT81_FN0, PORT145_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(14), PORT82_FN0, PORT146_FN0),
+        PINMUX_IRQ(EXT_IRQ16L(15), PORT83_FN0, PORT147_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(16), PORT84_FN0, PORT170_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(17), PORT85_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(18), PORT86_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(19), PORT87_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(20), PORT92_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(21), PORT93_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(22), PORT94_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(23), PORT95_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(24), PORT112_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(25), PORT119_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(26), PORT121_FN0, PORT172_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(27), PORT122_FN0, PORT180_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(28), PORT123_FN0, PORT181_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(29), PORT129_FN0, PORT182_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(30), PORT130_FN0, PORT183_FN0),
+        PINMUX_IRQ(EXT_IRQ16H(31), PORT138_FN0, PORT184_FN0),
+};
+
 static struct pinmux_info sh7372_pinmux_info = {
         .name = "sh7372_pfc",
         .reserved_id = PINMUX_RESERVED,
@@ -1614,6 +1652,9 @@ static struct pinmux_info sh7372_pinmux_info = {
 
         .gpio_data = pinmux_data,
         .gpio_data_size = ARRAY_SIZE(pinmux_data),
+
+        .gpio_irq = pinmux_irqs,
+        .gpio_irq_size = ARRAY_SIZE(pinmux_irqs),
 };
 
 void sh7372_pinmux_init(void)
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index 0d159d64a345..2d0d4212be41 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -80,7 +80,7 @@ int __cpuinit sh73a0_boot_secondary(unsigned int cpu)
         /* enable cache coherency */
         modify_scu_cpu_psr(0, 3 << (cpu * 8));
 
-        if (((__raw_readw(__io(PSTR)) >> (4 * cpu)) & 3) == 3)
+        if (((__raw_readl(__io(PSTR)) >> (4 * cpu)) & 3) == 3)
                 __raw_writel(1 << cpu, __io(WUPCR));    /* wake up */
         else
                 __raw_writel(1 << cpu, __io(SRESCR));   /* reset */
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 1a3ca2488164..7edef9121632 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -631,7 +631,8 @@ comment "Processor Features"
 
 config ARM_LPAE
         bool "Support for the Large Physical Address Extension"
-        depends on MMU && CPU_V7
+        depends on MMU && CPU_32v7 && !CPU_32v6 && !CPU_32v5 && \
+                !CPU_32v4 && !CPU_32v3
         help
           Say Y if you have an ARMv7 processor supporting the LPAE page
           table format and you would like to access memory beyond the
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 7a24d39661f0..a655d3da386d 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -55,7 +55,7 @@ loop1:
         cmp     r1, #2                          @ see what cache we have at this level
         blt     skip                            @ skip if no cache, or just i-cache
 #ifdef CONFIG_PREEMPT
-        save_and_disable_irqs r9                @ make cssr&csidr read atomic
+        save_and_disable_irqs_notrace r9        @ make cssr&csidr read atomic
 #endif
         mcr     p15, 2, r10, c0, c0, 0          @ select current cache level in cssr
         isb                                     @ isb to sych the new cssr&csidr
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index 6e192c4a391a..8ddda365f1a0 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -24,7 +24,7 @@
 #define UART_PADDR      MX51_UART1_BASE_ADDR
 #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)
 #define UART_PADDR      MX53_UART1_BASE_ADDR
-#elif defined (CONFIG_DEBUG_IMX6Q_UART)
+#elif defined (CONFIG_DEBUG_IMX6Q_UART4)
 #define UART_PADDR      MX6Q_UART4_BASE_ADDR
 #endif
 
diff --git a/arch/arm/plat-mxc/include/mach/dma.h b/arch/arm/plat-mxc/include/mach/dma.h
index 233d0a5e2d68..1b9080385b46 100644
--- a/arch/arm/plat-mxc/include/mach/dma.h
+++ b/arch/arm/plat-mxc/include/mach/dma.h
@@ -60,8 +60,7 @@ static inline int imx_dma_is_ipu(struct dma_chan *chan)
 
 static inline int imx_dma_is_general_purpose(struct dma_chan *chan)
 {
-        return !strcmp(dev_name(chan->device->dev), "imx31-sdma") ||
-                !strcmp(dev_name(chan->device->dev), "imx35-sdma") ||
+        return strstr(dev_name(chan->device->dev), "sdma") ||
                 !strcmp(dev_name(chan->device->dev), "imx-dma");
 }