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authorLinus Torvalds <torvalds@linux-foundation.org>2010-03-18 19:59:10 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-03-18 19:59:10 -0400
commitc3a0bd7515c682f4529a35318b6712c9ae456edc (patch)
tree0dea8aa7f0f1e5f37c4c67faaf3aeb18f4a04701 /arch/arm
parenta41842f70d6d6b0cfde3d21e163add81c4318ebd (diff)
parent0d5e6f7ae8609b944c08e8a2f63f7d169c548134 (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (23 commits) ARM: Fix RiscPC decompressor build errors ARM: Fix sorting of platform group config options and includes ARM: 5991/1: Fix regression in restore_user_regs macro ARM: 5989/1: ARM: KGDB: add support for SMP platforms ARM: 5990/1: ARM: use __armv5tej_mmu_cache_flush for V5TEJ instead of __armv4_mmu_cache_flush ARM: Add final piece to fix XIP decompressor in read-only memory video: enable sh_mobile_lcdc on SH-Mobile ARM ARM: mach-shmobile: ap4evb SDHI0 platform data V2 ARM: mach-shmobile: sh7372 SDHI vector merge ARM: mach-shmobile: sh7377 SDHI vector merge ARM: mach-shmobile: sh7367 SDHI vector merge ARM: mach-shmobile: G4EVM KEYSC platform data mtd: enable sh_flctl on SH-Mobile ARM ARM: mach-shmobile: G3EVM FLCTL platform data ARM: mach-shmobile: G3EVM KEYSC platform data Video: ARM CLCD: Better fix for swapped IENB and CNTL registers ARM: Add L2 cache handling to smp boot support ARM: 5960/1: ARM: perf-events: fix v7 event selection mask ARM: 5959/1: ARM: perf-events: request PMU interrupts with IRQF_NOBALANCING ARM: 5988/1: pgprot_dmacoherent() for non-mmu builds ...
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig81
-rw-r--r--arch/arm/boot/compressed/decompress.c1
-rw-r--r--arch/arm/boot/compressed/head.S2
-rw-r--r--arch/arm/boot/compressed/misc.c1
-rw-r--r--arch/arm/include/asm/elf.h1
-rw-r--r--arch/arm/include/asm/pgtable-nommu.h1
-rw-r--r--arch/arm/kernel/entry-header.S2
-rw-r--r--arch/arm/kernel/kgdb.c13
-rw-r--r--arch/arm/kernel/perf_event.c5
-rw-r--r--arch/arm/kernel/smp.c4
-rw-r--r--arch/arm/mach-at91/board-sam9g20ek.c10
-rw-r--r--arch/arm/mach-rpc/include/mach/uncompress.h2
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c32
-rw-r--r--arch/arm/mach-shmobile/board-g3evm.c122
-rw-r--r--arch/arm/mach-shmobile/board-g4evm.c57
-rw-r--r--arch/arm/mach-shmobile/clock-sh7367.c7
-rw-r--r--arch/arm/mach-shmobile/intc-sh7367.c46
-rw-r--r--arch/arm/mach-shmobile/intc-sh7372.c46
-rw-r--r--arch/arm/mach-shmobile/intc-sh7377.c36
19 files changed, 360 insertions, 109 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index cadfe2ee66a5..c5408bf1bf43 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -218,6 +218,10 @@ config MMU
218 Select if you want MMU-based virtualised addressing space 218 Select if you want MMU-based virtualised addressing space
219 support by paged memory management. If unsure, say 'Y'. 219 support by paged memory management. If unsure, say 'Y'.
220 220
221#
222# The "ARM system type" choice list is ordered alphabetically by option
223# text. Please add new entries in the option alphabetic order.
224#
221choice 225choice
222 prompt "ARM system type" 226 prompt "ARM system type"
223 default ARCH_VERSATILE 227 default ARCH_VERSATILE
@@ -274,6 +278,18 @@ config ARCH_AT91
274 This enables support for systems based on the Atmel AT91RM9200, 278 This enables support for systems based on the Atmel AT91RM9200,
275 AT91SAM9 and AT91CAP9 processors. 279 AT91SAM9 and AT91CAP9 processors.
276 280
281config ARCH_BCMRING
282 bool "Broadcom BCMRING"
283 depends on MMU
284 select CPU_V6
285 select ARM_AMBA
286 select COMMON_CLKDEV
287 select GENERIC_TIME
288 select GENERIC_CLOCKEVENTS
289 select ARCH_WANT_OPTIONAL_GPIOLIB
290 help
291 Support for Broadcom's BCMRing platform.
292
277config ARCH_CLPS711X 293config ARCH_CLPS711X
278 bool "Cirrus Logic CLPS711x/EP721x-based" 294 bool "Cirrus Logic CLPS711x/EP721x-based"
279 select CPU_ARM720T 295 select CPU_ARM720T
@@ -359,20 +375,6 @@ config ARCH_H720X
359 help 375 help
360 This enables support for systems based on the Hynix HMS720x 376 This enables support for systems based on the Hynix HMS720x
361 377
362config ARCH_NOMADIK
363 bool "STMicroelectronics Nomadik"
364 select ARM_AMBA
365 select ARM_VIC
366 select CPU_ARM926T
367 select HAVE_CLK
368 select COMMON_CLKDEV
369 select GENERIC_TIME
370 select GENERIC_CLOCKEVENTS
371 select GENERIC_GPIO
372 select ARCH_REQUIRE_GPIOLIB
373 help
374 Support for the Nomadik platform by ST-Ericsson
375
376config ARCH_IOP13XX 378config ARCH_IOP13XX
377 bool "IOP13xx-based" 379 bool "IOP13xx-based"
378 depends on MMU 380 depends on MMU
@@ -747,6 +749,30 @@ config ARCH_U300
747 help 749 help
748 Support for ST-Ericsson U300 series mobile platforms. 750 Support for ST-Ericsson U300 series mobile platforms.
749 751
752config ARCH_U8500
753 bool "ST-Ericsson U8500 Series"
754 select CPU_V7
755 select ARM_AMBA
756 select GENERIC_TIME
757 select GENERIC_CLOCKEVENTS
758 select COMMON_CLKDEV
759 help
760 Support for ST-Ericsson's Ux500 architecture
761
762config ARCH_NOMADIK
763 bool "STMicroelectronics Nomadik"
764 select ARM_AMBA
765 select ARM_VIC
766 select CPU_ARM926T
767 select HAVE_CLK
768 select COMMON_CLKDEV
769 select GENERIC_TIME
770 select GENERIC_CLOCKEVENTS
771 select GENERIC_GPIO
772 select ARCH_REQUIRE_GPIOLIB
773 help
774 Support for the Nomadik platform by ST-Ericsson
775
750config ARCH_DAVINCI 776config ARCH_DAVINCI
751 bool "TI DaVinci" 777 bool "TI DaVinci"
752 select CPU_ARM926T 778 select CPU_ARM926T
@@ -775,30 +801,13 @@ config ARCH_OMAP
775 help 801 help
776 Support for TI's OMAP platform (OMAP1 and OMAP2). 802 Support for TI's OMAP platform (OMAP1 and OMAP2).
777 803
778config ARCH_BCMRING
779 bool "Broadcom BCMRING"
780 depends on MMU
781 select CPU_V6
782 select ARM_AMBA
783 select COMMON_CLKDEV
784 select GENERIC_TIME
785 select GENERIC_CLOCKEVENTS
786 select ARCH_WANT_OPTIONAL_GPIOLIB
787 help
788 Support for Broadcom's BCMRing platform.
789
790config ARCH_U8500
791 bool "ST-Ericsson U8500 Series"
792 select CPU_V7
793 select ARM_AMBA
794 select GENERIC_TIME
795 select GENERIC_CLOCKEVENTS
796 select COMMON_CLKDEV
797 help
798 Support for ST-Ericsson's Ux500 architecture
799
800endchoice 804endchoice
801 805
806#
807# This is sorted alphabetically by mach-* pathname. However, plat-*
808# Kconfigs may be included either alphabetically (according to the
809# plat- suffix) or along side the corresponding mach-* source.
810#
802source "arch/arm/mach-aaec2000/Kconfig" 811source "arch/arm/mach-aaec2000/Kconfig"
803 812
804source "arch/arm/mach-at91/Kconfig" 813source "arch/arm/mach-at91/Kconfig"
diff --git a/arch/arm/boot/compressed/decompress.c b/arch/arm/boot/compressed/decompress.c
index 0da382f33157..9c097073ce4c 100644
--- a/arch/arm/boot/compressed/decompress.c
+++ b/arch/arm/boot/compressed/decompress.c
@@ -11,6 +11,7 @@ extern unsigned long free_mem_end_ptr;
11extern void error(char *); 11extern void error(char *);
12 12
13#define STATIC static 13#define STATIC static
14#define STATIC_RW_DATA /* non-static please */
14 15
15#define ARCH_HAS_DECOMP_WDOG 16#define ARCH_HAS_DECOMP_WDOG
16 17
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 535a91daaa53..0f23009170a1 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -742,7 +742,7 @@ proc_types:
742 .word 0x000f0000 742 .word 0x000f0000
743 W(b) __armv4_mmu_cache_on 743 W(b) __armv4_mmu_cache_on
744 W(b) __armv4_mmu_cache_off 744 W(b) __armv4_mmu_cache_off
745 W(b) __armv4_mmu_cache_flush 745 W(b) __armv5tej_mmu_cache_flush
746 746
747 .word 0x0007b000 @ ARMv6 747 .word 0x0007b000 @ ARMv6
748 .word 0x000ff000 748 .word 0x000ff000
diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c
index d32bc71c1f78..d2b2ef41cd4f 100644
--- a/arch/arm/boot/compressed/misc.c
+++ b/arch/arm/boot/compressed/misc.c
@@ -33,6 +33,7 @@ unsigned int __machine_arch_type;
33#else 33#else
34 34
35static void putstr(const char *ptr); 35static void putstr(const char *ptr);
36extern void error(char *x);
36 37
37#include <mach/uncompress.h> 38#include <mach/uncompress.h>
38 39
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index a399bb5730f1..bff056489cc1 100644
--- a/arch/arm/include/asm/elf.h
+++ b/arch/arm/include/asm/elf.h
@@ -98,6 +98,7 @@ extern int elf_check_arch(const struct elf32_hdr *);
98extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int); 98extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int);
99#define elf_read_implies_exec(ex,stk) arm_elf_read_implies_exec(&(ex), stk) 99#define elf_read_implies_exec(ex,stk) arm_elf_read_implies_exec(&(ex), stk)
100 100
101struct task_struct;
101int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs); 102int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs);
102#define ELF_CORE_COPY_TASK_REGS dump_task_regs 103#define ELF_CORE_COPY_TASK_REGS dump_task_regs
103 104
diff --git a/arch/arm/include/asm/pgtable-nommu.h b/arch/arm/include/asm/pgtable-nommu.h
index 013cfcdc4839..ffc0e85775b4 100644
--- a/arch/arm/include/asm/pgtable-nommu.h
+++ b/arch/arm/include/asm/pgtable-nommu.h
@@ -67,6 +67,7 @@ static inline int pte_file(pte_t pte) { return 0; }
67 */ 67 */
68#define pgprot_noncached(prot) __pgprot(0) 68#define pgprot_noncached(prot) __pgprot(0)
69#define pgprot_writecombine(prot) __pgprot(0) 69#define pgprot_writecombine(prot) __pgprot(0)
70#define pgprot_dmacoherent(prot) __pgprot(0)
70 71
71 72
72/* 73/*
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index 7e9ed1eea40a..d93f976fb389 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -102,6 +102,8 @@
102 .else 102 .else
103 ldmdb sp, {r0 - lr}^ @ get calling r0 - lr 103 ldmdb sp, {r0 - lr}^ @ get calling r0 - lr
104 .endif 104 .endif
105 mov r0, r0 @ ARMv5T and earlier require a nop
106 @ after ldm {}^
105 add sp, sp, #S_FRAME_SIZE - S_PC 107 add sp, sp, #S_FRAME_SIZE - S_PC
106 movs pc, lr @ return & move spsr_svc into cpsr 108 movs pc, lr @ return & move spsr_svc into cpsr
107 .endm 109 .endm
diff --git a/arch/arm/kernel/kgdb.c b/arch/arm/kernel/kgdb.c
index ba8ccfede964..a5b846b9895d 100644
--- a/arch/arm/kernel/kgdb.c
+++ b/arch/arm/kernel/kgdb.c
@@ -9,6 +9,7 @@
9 * Authors: George Davis <davis_g@mvista.com> 9 * Authors: George Davis <davis_g@mvista.com>
10 * Deepak Saxena <dsaxena@plexity.net> 10 * Deepak Saxena <dsaxena@plexity.net>
11 */ 11 */
12#include <linux/irq.h>
12#include <linux/kgdb.h> 13#include <linux/kgdb.h>
13#include <asm/traps.h> 14#include <asm/traps.h>
14 15
@@ -158,6 +159,18 @@ static struct undef_hook kgdb_compiled_brkpt_hook = {
158 .fn = kgdb_compiled_brk_fn 159 .fn = kgdb_compiled_brk_fn
159}; 160};
160 161
162static void kgdb_call_nmi_hook(void *ignored)
163{
164 kgdb_nmicallback(raw_smp_processor_id(), get_irq_regs());
165}
166
167void kgdb_roundup_cpus(unsigned long flags)
168{
169 local_irq_enable();
170 smp_call_function(kgdb_call_nmi_hook, NULL, 0);
171 local_irq_disable();
172}
173
161/** 174/**
162 * kgdb_arch_init - Perform any architecture specific initalization. 175 * kgdb_arch_init - Perform any architecture specific initalization.
163 * 176 *
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 3875d99cc40f..9e70f2053f9a 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -332,7 +332,8 @@ armpmu_reserve_hardware(void)
332 332
333 for (i = 0; i < pmu_irqs->num_irqs; ++i) { 333 for (i = 0; i < pmu_irqs->num_irqs; ++i) {
334 err = request_irq(pmu_irqs->irqs[i], armpmu->handle_irq, 334 err = request_irq(pmu_irqs->irqs[i], armpmu->handle_irq,
335 IRQF_DISABLED, "armpmu", NULL); 335 IRQF_DISABLED | IRQF_NOBALANCING,
336 "armpmu", NULL);
336 if (err) { 337 if (err) {
337 pr_warning("unable to request IRQ%d for ARM " 338 pr_warning("unable to request IRQ%d for ARM "
338 "perf counters\n", pmu_irqs->irqs[i]); 339 "perf counters\n", pmu_irqs->irqs[i]);
@@ -1624,7 +1625,7 @@ enum armv7_counters {
1624/* 1625/*
1625 * EVTSEL: Event selection reg 1626 * EVTSEL: Event selection reg
1626 */ 1627 */
1627#define ARMV7_EVTSEL_MASK 0x7f /* Mask for writable bits */ 1628#define ARMV7_EVTSEL_MASK 0xff /* Mask for writable bits */
1628 1629
1629/* 1630/*
1630 * SELECT: Counter selection reg 1631 * SELECT: Counter selection reg
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 57162af53dc9..577543f3857f 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -99,6 +99,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
99 *pmd = __pmd((PHYS_OFFSET & PGDIR_MASK) | 99 *pmd = __pmd((PHYS_OFFSET & PGDIR_MASK) |
100 PMD_TYPE_SECT | PMD_SECT_AP_WRITE); 100 PMD_TYPE_SECT | PMD_SECT_AP_WRITE);
101 flush_pmd_entry(pmd); 101 flush_pmd_entry(pmd);
102 outer_clean_range(__pa(pmd), __pa(pmd + 1));
102 103
103 /* 104 /*
104 * We need to tell the secondary core where to find 105 * We need to tell the secondary core where to find
@@ -106,7 +107,8 @@ int __cpuinit __cpu_up(unsigned int cpu)
106 */ 107 */
107 secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; 108 secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
108 secondary_data.pgdir = virt_to_phys(pgd); 109 secondary_data.pgdir = virt_to_phys(pgd);
109 wmb(); 110 __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data));
111 outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1));
110 112
111 /* 113 /*
112 * Now bring the CPU into our world. 114 * Now bring the CPU into our world.
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index 29cf83177484..c11fd47aec5d 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -271,10 +271,12 @@ static void __init ek_add_device_buttons(void) {}
271 271
272 272
273static struct i2c_board_info __initdata ek_i2c_devices[] = { 273static struct i2c_board_info __initdata ek_i2c_devices[] = {
274 { 274 {
275 I2C_BOARD_INFO("24c512", 0x50), 275 I2C_BOARD_INFO("24c512", 0x50)
276 I2C_BOARD_INFO("wm8731", 0x1b), 276 },
277 }, 277 {
278 I2C_BOARD_INFO("wm8731", 0x1b)
279 },
278}; 280};
279 281
280 282
diff --git a/arch/arm/mach-rpc/include/mach/uncompress.h b/arch/arm/mach-rpc/include/mach/uncompress.h
index d5862368c4f2..8c9e2c7161c6 100644
--- a/arch/arm/mach-rpc/include/mach/uncompress.h
+++ b/arch/arm/mach-rpc/include/mach/uncompress.h
@@ -109,8 +109,6 @@ static inline void flush(void)
109{ 109{
110} 110}
111 111
112static void error(char *x);
113
114/* 112/*
115 * Setup for decompression 113 * Setup for decompression
116 */ 114 */
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index a0463d926447..1c2ec96ce261 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -206,10 +206,32 @@ static struct platform_device keysc_device = {
206 }, 206 },
207}; 207};
208 208
209/* SDHI0 */
210static struct resource sdhi0_resources[] = {
211 [0] = {
212 .name = "SDHI0",
213 .start = 0xe6850000,
214 .end = 0xe68501ff,
215 .flags = IORESOURCE_MEM,
216 },
217 [1] = {
218 .start = 96,
219 .flags = IORESOURCE_IRQ,
220 },
221};
222
223static struct platform_device sdhi0_device = {
224 .name = "sh_mobile_sdhi",
225 .num_resources = ARRAY_SIZE(sdhi0_resources),
226 .resource = sdhi0_resources,
227 .id = 0,
228};
229
209static struct platform_device *ap4evb_devices[] __initdata = { 230static struct platform_device *ap4evb_devices[] __initdata = {
210 &nor_flash_device, 231 &nor_flash_device,
211 &smc911x_device, 232 &smc911x_device,
212 &keysc_device, 233 &keysc_device,
234 &sdhi0_device,
213}; 235};
214 236
215static struct map_desc ap4evb_io_desc[] __initdata = { 237static struct map_desc ap4evb_io_desc[] __initdata = {
@@ -286,6 +308,16 @@ static void __init ap4evb_init(void)
286 gpio_request(GPIO_FN_KEYIN3_133, NULL); 308 gpio_request(GPIO_FN_KEYIN3_133, NULL);
287 gpio_request(GPIO_FN_KEYIN4, NULL); 309 gpio_request(GPIO_FN_KEYIN4, NULL);
288 310
311 /* SDHI0 */
312 gpio_request(GPIO_FN_SDHICD0, NULL);
313 gpio_request(GPIO_FN_SDHIWP0, NULL);
314 gpio_request(GPIO_FN_SDHICMD0, NULL);
315 gpio_request(GPIO_FN_SDHICLK0, NULL);
316 gpio_request(GPIO_FN_SDHID0_3, NULL);
317 gpio_request(GPIO_FN_SDHID0_2, NULL);
318 gpio_request(GPIO_FN_SDHID0_1, NULL);
319 gpio_request(GPIO_FN_SDHID0_0, NULL);
320
289 sh7372_add_standard_devices(); 321 sh7372_add_standard_devices();
290 322
291 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices)); 323 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
index f36c9a94d326..9247503296c4 100644
--- a/arch/arm/mach-shmobile/board-g3evm.c
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -26,9 +26,12 @@
26#include <linux/mtd/mtd.h> 26#include <linux/mtd/mtd.h>
27#include <linux/mtd/partitions.h> 27#include <linux/mtd/partitions.h>
28#include <linux/mtd/physmap.h> 28#include <linux/mtd/physmap.h>
29#include <linux/mtd/sh_flctl.h>
29#include <linux/usb/r8a66597.h> 30#include <linux/usb/r8a66597.h>
30#include <linux/io.h> 31#include <linux/io.h>
31#include <linux/gpio.h> 32#include <linux/gpio.h>
33#include <linux/input.h>
34#include <linux/input/sh_keysc.h>
32#include <mach/sh7367.h> 35#include <mach/sh7367.h>
33#include <mach/common.h> 36#include <mach/common.h>
34#include <asm/mach-types.h> 37#include <asm/mach-types.h>
@@ -127,9 +130,90 @@ static struct platform_device usb_host_device = {
127 .resource = usb_host_resources, 130 .resource = usb_host_resources,
128}; 131};
129 132
133/* KEYSC */
134static struct sh_keysc_info keysc_info = {
135 .mode = SH_KEYSC_MODE_5,
136 .scan_timing = 3,
137 .delay = 100,
138 .keycodes = {
139 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, KEY_G,
140 KEY_H, KEY_I, KEY_J, KEY_K, KEY_L, KEY_M, KEY_N,
141 KEY_O, KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T, KEY_U,
142 KEY_V, KEY_W, KEY_X, KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP,
143 KEY_WAKEUP, KEY_COFFEE, KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
144 KEY_5, KEY_6, KEY_7, KEY_8, KEY_9, KEY_STOP, KEY_COMPUTER,
145 },
146};
147
148static struct resource keysc_resources[] = {
149 [0] = {
150 .name = "KEYSC",
151 .start = 0xe61b0000,
152 .end = 0xe61b000f,
153 .flags = IORESOURCE_MEM,
154 },
155 [1] = {
156 .start = 79,
157 .flags = IORESOURCE_IRQ,
158 },
159};
160
161static struct platform_device keysc_device = {
162 .name = "sh_keysc",
163 .num_resources = ARRAY_SIZE(keysc_resources),
164 .resource = keysc_resources,
165 .dev = {
166 .platform_data = &keysc_info,
167 },
168};
169
170static struct mtd_partition nand_partition_info[] = {
171 {
172 .name = "system",
173 .offset = 0,
174 .size = 64 * 1024 * 1024,
175 },
176 {
177 .name = "userdata",
178 .offset = MTDPART_OFS_APPEND,
179 .size = 128 * 1024 * 1024,
180 },
181 {
182 .name = "cache",
183 .offset = MTDPART_OFS_APPEND,
184 .size = 64 * 1024 * 1024,
185 },
186};
187
188static struct resource nand_flash_resources[] = {
189 [0] = {
190 .start = 0xe6a30000,
191 .end = 0xe6a3009b,
192 .flags = IORESOURCE_MEM,
193 }
194};
195
196static struct sh_flctl_platform_data nand_flash_data = {
197 .parts = nand_partition_info,
198 .nr_parts = ARRAY_SIZE(nand_partition_info),
199 .flcmncr_val = QTSEL_E | FCKSEL_E | TYPESEL_SET | NANWF_E
200 | SHBUSSEL | SEL_16BIT,
201};
202
203static struct platform_device nand_flash_device = {
204 .name = "sh_flctl",
205 .resource = nand_flash_resources,
206 .num_resources = ARRAY_SIZE(nand_flash_resources),
207 .dev = {
208 .platform_data = &nand_flash_data,
209 },
210};
211
130static struct platform_device *g3evm_devices[] __initdata = { 212static struct platform_device *g3evm_devices[] __initdata = {
131 &nor_flash_device, 213 &nor_flash_device,
132 &usb_host_device, 214 &usb_host_device,
215 &keysc_device,
216 &nand_flash_device,
133}; 217};
134 218
135static struct map_desc g3evm_io_desc[] __initdata = { 219static struct map_desc g3evm_io_desc[] __initdata = {
@@ -196,6 +280,44 @@ static void __init g3evm_init(void)
196 __raw_writew(0x6010, 0xe60581c6); /* CGPOSR */ 280 __raw_writew(0x6010, 0xe60581c6); /* CGPOSR */
197 __raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */ 281 __raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */
198 282
283 /* KEYSC @ CN7 */
284 gpio_request(GPIO_FN_PORT42_KEYOUT0, NULL);
285 gpio_request(GPIO_FN_PORT43_KEYOUT1, NULL);
286 gpio_request(GPIO_FN_PORT44_KEYOUT2, NULL);
287 gpio_request(GPIO_FN_PORT45_KEYOUT3, NULL);
288 gpio_request(GPIO_FN_PORT46_KEYOUT4, NULL);
289 gpio_request(GPIO_FN_PORT47_KEYOUT5, NULL);
290 gpio_request(GPIO_FN_PORT48_KEYIN0_PU, NULL);
291 gpio_request(GPIO_FN_PORT49_KEYIN1_PU, NULL);
292 gpio_request(GPIO_FN_PORT50_KEYIN2_PU, NULL);
293 gpio_request(GPIO_FN_PORT55_KEYIN3_PU, NULL);
294 gpio_request(GPIO_FN_PORT56_KEYIN4_PU, NULL);
295 gpio_request(GPIO_FN_PORT57_KEYIN5_PU, NULL);
296 gpio_request(GPIO_FN_PORT58_KEYIN6_PU, NULL);
297
298 /* FLCTL */
299 gpio_request(GPIO_FN_FCE0, NULL);
300 gpio_request(GPIO_FN_D0_ED0_NAF0, NULL);
301 gpio_request(GPIO_FN_D1_ED1_NAF1, NULL);
302 gpio_request(GPIO_FN_D2_ED2_NAF2, NULL);
303 gpio_request(GPIO_FN_D3_ED3_NAF3, NULL);
304 gpio_request(GPIO_FN_D4_ED4_NAF4, NULL);
305 gpio_request(GPIO_FN_D5_ED5_NAF5, NULL);
306 gpio_request(GPIO_FN_D6_ED6_NAF6, NULL);
307 gpio_request(GPIO_FN_D7_ED7_NAF7, NULL);
308 gpio_request(GPIO_FN_D8_ED8_NAF8, NULL);
309 gpio_request(GPIO_FN_D9_ED9_NAF9, NULL);
310 gpio_request(GPIO_FN_D10_ED10_NAF10, NULL);
311 gpio_request(GPIO_FN_D11_ED11_NAF11, NULL);
312 gpio_request(GPIO_FN_D12_ED12_NAF12, NULL);
313 gpio_request(GPIO_FN_D13_ED13_NAF13, NULL);
314 gpio_request(GPIO_FN_D14_ED14_NAF14, NULL);
315 gpio_request(GPIO_FN_D15_ED15_NAF15, NULL);
316 gpio_request(GPIO_FN_WE0_XWR0_FWE, NULL);
317 gpio_request(GPIO_FN_FRB, NULL);
318 /* FOE, FCDE, FSC on dedicated pins */
319 __raw_writel(__raw_readl(0xe6158048) & ~(1 << 15), 0xe6158048);
320
199 sh7367_add_standard_devices(); 321 sh7367_add_standard_devices();
200 322
201 platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices)); 323 platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices));
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
index 5acd623f93e7..10673a90be52 100644
--- a/arch/arm/mach-shmobile/board-g4evm.c
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -28,6 +28,8 @@
28#include <linux/mtd/physmap.h> 28#include <linux/mtd/physmap.h>
29#include <linux/usb/r8a66597.h> 29#include <linux/usb/r8a66597.h>
30#include <linux/io.h> 30#include <linux/io.h>
31#include <linux/input.h>
32#include <linux/input/sh_keysc.h>
31#include <linux/gpio.h> 33#include <linux/gpio.h>
32#include <mach/sh7377.h> 34#include <mach/sh7377.h>
33#include <mach/common.h> 35#include <mach/common.h>
@@ -128,9 +130,49 @@ static struct platform_device usb_host_device = {
128 .resource = usb_host_resources, 130 .resource = usb_host_resources,
129}; 131};
130 132
133/* KEYSC */
134static struct sh_keysc_info keysc_info = {
135 .mode = SH_KEYSC_MODE_5,
136 .scan_timing = 3,
137 .delay = 100,
138 .keycodes = {
139 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
140 KEY_G, KEY_H, KEY_I, KEY_J, KEY_K, KEY_L,
141 KEY_M, KEY_N, KEY_U, KEY_P, KEY_Q, KEY_R,
142 KEY_S, KEY_T, KEY_U, KEY_V, KEY_W, KEY_X,
143 KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE,
144 KEY_0, KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
145 KEY_6, KEY_7, KEY_8, KEY_9, KEY_STOP, KEY_COMPUTER,
146 },
147};
148
149static struct resource keysc_resources[] = {
150 [0] = {
151 .name = "KEYSC",
152 .start = 0xe61b0000,
153 .end = 0xe61b000f,
154 .flags = IORESOURCE_MEM,
155 },
156 [1] = {
157 .start = 79,
158 .flags = IORESOURCE_IRQ,
159 },
160};
161
162static struct platform_device keysc_device = {
163 .name = "sh_keysc",
164 .id = 0, /* keysc0 clock */
165 .num_resources = ARRAY_SIZE(keysc_resources),
166 .resource = keysc_resources,
167 .dev = {
168 .platform_data = &keysc_info,
169 },
170};
171
131static struct platform_device *g4evm_devices[] __initdata = { 172static struct platform_device *g4evm_devices[] __initdata = {
132 &nor_flash_device, 173 &nor_flash_device,
133 &usb_host_device, 174 &usb_host_device,
175 &keysc_device,
134}; 176};
135 177
136static struct map_desc g4evm_io_desc[] __initdata = { 178static struct map_desc g4evm_io_desc[] __initdata = {
@@ -196,6 +238,21 @@ static void __init g4evm_init(void)
196 __raw_writew(0x6010, 0xe60581c6); /* CGPOSR */ 238 __raw_writew(0x6010, 0xe60581c6); /* CGPOSR */
197 __raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */ 239 __raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */
198 240
241 /* KEYSC @ CN31 */
242 gpio_request(GPIO_FN_PORT60_KEYOUT5, NULL);
243 gpio_request(GPIO_FN_PORT61_KEYOUT4, NULL);
244 gpio_request(GPIO_FN_PORT62_KEYOUT3, NULL);
245 gpio_request(GPIO_FN_PORT63_KEYOUT2, NULL);
246 gpio_request(GPIO_FN_PORT64_KEYOUT1, NULL);
247 gpio_request(GPIO_FN_PORT65_KEYOUT0, NULL);
248 gpio_request(GPIO_FN_PORT66_KEYIN0_PU, NULL);
249 gpio_request(GPIO_FN_PORT67_KEYIN1_PU, NULL);
250 gpio_request(GPIO_FN_PORT68_KEYIN2_PU, NULL);
251 gpio_request(GPIO_FN_PORT69_KEYIN3_PU, NULL);
252 gpio_request(GPIO_FN_PORT70_KEYIN4_PU, NULL);
253 gpio_request(GPIO_FN_PORT71_KEYIN5_PU, NULL);
254 gpio_request(GPIO_FN_PORT72_KEYIN6_PU, NULL);
255
199 sh7377_add_standard_devices(); 256 sh7377_add_standard_devices();
200 257
201 platform_add_devices(g4evm_devices, ARRAY_SIZE(g4evm_devices)); 258 platform_add_devices(g4evm_devices, ARRAY_SIZE(g4evm_devices));
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c
index 58bd54e1113a..bb940c6e4e6c 100644
--- a/arch/arm/mach-shmobile/clock-sh7367.c
+++ b/arch/arm/mach-shmobile/clock-sh7367.c
@@ -75,6 +75,11 @@ static struct clk usb0_clk = {
75 .name = "usb0", 75 .name = "usb0",
76}; 76};
77 77
78/* a static keysc0 clk for now - enough to get sh_keysc working */
79static struct clk keysc0_clk = {
80 .name = "keysc0",
81};
82
78static struct clk_lookup lookups[] = { 83static struct clk_lookup lookups[] = {
79 { 84 {
80 .clk = &peripheral_clk, 85 .clk = &peripheral_clk,
@@ -82,6 +87,8 @@ static struct clk_lookup lookups[] = {
82 .clk = &r_clk, 87 .clk = &r_clk,
83 }, { 88 }, {
84 .clk = &usb0_clk, 89 .clk = &usb0_clk,
90 }, {
91 .clk = &keysc0_clk,
85 } 92 }
86}; 93};
87 94
diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c
index 6a547b47aabb..5ff70cadfc32 100644
--- a/arch/arm/mach-shmobile/intc-sh7367.c
+++ b/arch/arm/mach-shmobile/intc-sh7367.c
@@ -27,6 +27,8 @@
27 27
28enum { 28enum {
29 UNUSED_INTCA = 0, 29 UNUSED_INTCA = 0,
30 ENABLED,
31 DISABLED,
30 32
31 /* interrupt sources INTCA */ 33 /* interrupt sources INTCA */
32 IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A, 34 IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A,
@@ -46,8 +48,8 @@ enum {
46 MSIOF2, MSIOF1, 48 MSIOF2, MSIOF1,
47 SCIFA4, SCIFA5, SCIFB, 49 SCIFA4, SCIFA5, SCIFB,
48 FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, 50 FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
49 SDHI0_SDHI0I0, SDHI0_SDHI0I1, SDHI0_SDHI0I2, SDHI0_SDHI0I3, 51 SDHI0,
50 SDHI1_SDHI1I0, SDHI1_SDHI1I1, SDHI1_SDHI1I2, SDHI1_SDHI1I3, 52 SDHI1,
51 MSU_MSU, MSU_MSU2, 53 MSU_MSU, MSU_MSU2,
52 IREM, 54 IREM,
53 SIU, 55 SIU,
@@ -59,7 +61,7 @@ enum {
59 TTI20, 61 TTI20,
60 MISTY, 62 MISTY,
61 DDM, 63 DDM,
62 SDHI2_SDHI2I0, SDHI2_SDHI2I1, SDHI2_SDHI2I2, SDHI2_SDHI2I3, 64 SDHI2,
63 RWDT0, RWDT1, 65 RWDT0, RWDT1,
64 DMAC_1_DEI0, DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3, 66 DMAC_1_DEI0, DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3,
65 DMAC_2_DEI4, DMAC_2_DEI5, DMAC_2_DADERR, 67 DMAC_2_DEI4, DMAC_2_DEI5, DMAC_2_DADERR,
@@ -70,7 +72,7 @@ enum {
70 72
71 /* interrupt groups INTCA */ 73 /* interrupt groups INTCA */
72 DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, 74 DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2,
73 ETM11, ARM11, USBHS, FLCTL, IIC1, SDHI0, SDHI1, SDHI2, 75 ETM11, ARM11, USBHS, FLCTL, IIC1
74}; 76};
75 77
76static struct intc_vect intca_vectors[] = { 78static struct intc_vect intca_vectors[] = {
@@ -105,10 +107,10 @@ static struct intc_vect intca_vectors[] = {
105 INTC_VECT(SCIFB, 0x0d60), 107 INTC_VECT(SCIFB, 0x0d60),
106 INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0), 108 INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
107 INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0), 109 INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
108 INTC_VECT(SDHI0_SDHI0I0, 0x0e00), INTC_VECT(SDHI0_SDHI0I1, 0x0e20), 110 INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20),
109 INTC_VECT(SDHI0_SDHI0I2, 0x0e40), INTC_VECT(SDHI0_SDHI0I3, 0x0e60), 111 INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60),
110 INTC_VECT(SDHI1_SDHI1I0, 0x0e80), INTC_VECT(SDHI1_SDHI1I1, 0x0ea0), 112 INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0),
111 INTC_VECT(SDHI1_SDHI1I2, 0x0ec0), INTC_VECT(SDHI1_SDHI1I3, 0x0ee0), 113 INTC_VECT(SDHI1, 0x0ec0), INTC_VECT(SDHI1, 0x0ee0),
112 INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40), 114 INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40),
113 INTC_VECT(IREM, 0x0f60), 115 INTC_VECT(IREM, 0x0f60),
114 INTC_VECT(SIU, 0x0fa0), 116 INTC_VECT(SIU, 0x0fa0),
@@ -122,8 +124,8 @@ static struct intc_vect intca_vectors[] = {
122 INTC_VECT(TTI20, 0x1100), 124 INTC_VECT(TTI20, 0x1100),
123 INTC_VECT(MISTY, 0x1120), 125 INTC_VECT(MISTY, 0x1120),
124 INTC_VECT(DDM, 0x1140), 126 INTC_VECT(DDM, 0x1140),
125 INTC_VECT(SDHI2_SDHI2I0, 0x1200), INTC_VECT(SDHI2_SDHI2I1, 0x1220), 127 INTC_VECT(SDHI2, 0x1200), INTC_VECT(SDHI2, 0x1220),
126 INTC_VECT(SDHI2_SDHI2I2, 0x1240), INTC_VECT(SDHI2_SDHI2I3, 0x1260), 128 INTC_VECT(SDHI2, 0x1240), INTC_VECT(SDHI2, 0x1260),
127 INTC_VECT(RWDT0, 0x1280), INTC_VECT(RWDT1, 0x12a0), 129 INTC_VECT(RWDT0, 0x1280), INTC_VECT(RWDT1, 0x12a0),
128 INTC_VECT(DMAC_1_DEI0, 0x2000), INTC_VECT(DMAC_1_DEI1, 0x2020), 130 INTC_VECT(DMAC_1_DEI0, 0x2000), INTC_VECT(DMAC_1_DEI1, 0x2020),
129 INTC_VECT(DMAC_1_DEI2, 0x2040), INTC_VECT(DMAC_1_DEI3, 0x2060), 131 INTC_VECT(DMAC_1_DEI2, 0x2040), INTC_VECT(DMAC_1_DEI3, 0x2060),
@@ -158,12 +160,6 @@ static struct intc_group intca_groups[] __initdata = {
158 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI, 160 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
159 FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), 161 FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
160 INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1), 162 INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
161 INTC_GROUP(SDHI0, SDHI0_SDHI0I0, SDHI0_SDHI0I1,
162 SDHI0_SDHI0I2, SDHI0_SDHI0I3),
163 INTC_GROUP(SDHI1, SDHI1_SDHI1I0, SDHI1_SDHI1I1,
164 SDHI1_SDHI1I2, SDHI1_SDHI1I3),
165 INTC_GROUP(SDHI2, SDHI2_SDHI2I0, SDHI2_SDHI2I1,
166 SDHI2_SDHI2I2, SDHI2_SDHI2I3),
167}; 163};
168 164
169static struct intc_mask_reg intca_mask_registers[] = { 165static struct intc_mask_reg intca_mask_registers[] = {
@@ -193,10 +189,10 @@ static struct intc_mask_reg intca_mask_registers[] = {
193 { SCIFB, SCIFA5, SCIFA4, MSIOF1, 189 { SCIFB, SCIFA5, SCIFA4, MSIOF1,
194 0, 0, MSIOF2, 0 } }, 190 0, 0, MSIOF2, 0 } },
195 { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */ 191 { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
196 { SDHI0_SDHI0I3, SDHI0_SDHI0I2, SDHI0_SDHI0I1, SDHI0_SDHI0I0, 192 { DISABLED, DISABLED, ENABLED, ENABLED,
197 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, 193 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
198 { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */ 194 { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
199 { SDHI1_SDHI1I3, SDHI1_SDHI1I2, SDHI1_SDHI1I1, SDHI1_SDHI1I0, 195 { DISABLED, DISABLED, ENABLED, ENABLED,
200 TTI20, USBDMAC_USHDMI, SPU, SIU } }, 196 TTI20, USBDMAC_USHDMI, SPU, SIU } },
201 { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */ 197 { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
202 { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10, 198 { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
@@ -211,7 +207,7 @@ static struct intc_mask_reg intca_mask_registers[] = {
211 { 0, 0, TPU0, TPU1, 207 { 0, 0, TPU0, TPU1,
212 TPU2, TPU3, TPU4, 0 } }, 208 TPU2, TPU3, TPU4, 0 } },
213 { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */ 209 { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */
214 { SDHI2_SDHI2I3, SDHI2_SDHI2I2, SDHI2_SDHI2I1, SDHI2_SDHI2I0, 210 { DISABLED, DISABLED, ENABLED, ENABLED,
215 MISTY, CMT3, RWDT1, RWDT0 } }, 211 MISTY, CMT3, RWDT1, RWDT0 } },
216}; 212};
217 213
@@ -258,10 +254,14 @@ static struct intc_mask_reg intca_ack_registers[] __initdata = {
258 { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, 254 { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
259}; 255};
260 256
261static DECLARE_INTC_DESC_ACK(intca_desc, "sh7367-intca", 257static struct intc_desc intca_desc __initdata = {
262 intca_vectors, intca_groups, 258 .name = "sh7367-intca",
263 intca_mask_registers, intca_prio_registers, 259 .force_enable = ENABLED,
264 intca_sense_registers, intca_ack_registers); 260 .force_disable = DISABLED,
261 .hw = INTC_HW_DESC(intca_vectors, intca_groups,
262 intca_mask_registers, intca_prio_registers,
263 intca_sense_registers, intca_ack_registers),
264};
265 265
266void __init sh7367_init_irq(void) 266void __init sh7367_init_irq(void)
267{ 267{
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index c57a923f97a6..3ce9d9bd5899 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -27,6 +27,8 @@
27 27
28enum { 28enum {
29 UNUSED_INTCA = 0, 29 UNUSED_INTCA = 0,
30 ENABLED,
31 DISABLED,
30 32
31 /* interrupt sources INTCA */ 33 /* interrupt sources INTCA */
32 IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A, 34 IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A,
@@ -47,14 +49,14 @@ enum {
47 MSIOF2, MSIOF1, 49 MSIOF2, MSIOF1,
48 SCIFA4, SCIFA5, SCIFB, 50 SCIFA4, SCIFA5, SCIFB,
49 FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, 51 FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
50 SDHI0_SDHI0I0, SDHI0_SDHI0I1, SDHI0_SDHI0I2, SDHI0_SDHI0I3, 52 SDHI0,
51 SDHI1_SDHI1I0, SDHI1_SDHI1I1, SDHI1_SDHI1I2, 53 SDHI1,
52 IRREM, 54 IRREM,
53 IRDA, 55 IRDA,
54 TPU0, 56 TPU0,
55 TTI20, 57 TTI20,
56 DDM, 58 DDM,
57 SDHI2_SDHI2I0, SDHI2_SDHI2I1, SDHI2_SDHI2I2, SDHI2_SDHI2I3, 59 SDHI2,
58 RWDT0, 60 RWDT0,
59 DMAC1_1_DEI0, DMAC1_1_DEI1, DMAC1_1_DEI2, DMAC1_1_DEI3, 61 DMAC1_1_DEI0, DMAC1_1_DEI1, DMAC1_1_DEI2, DMAC1_1_DEI3,
60 DMAC1_2_DEI4, DMAC1_2_DEI5, DMAC1_2_DADERR, 62 DMAC1_2_DEI4, DMAC1_2_DEI5, DMAC1_2_DADERR,
@@ -82,7 +84,7 @@ enum {
82 84
83 /* interrupt groups INTCA */ 85 /* interrupt groups INTCA */
84 DMAC1_1, DMAC1_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT, 86 DMAC1_1, DMAC1_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT,
85 AP_ARM1, AP_ARM2, SPU2, FLCTL, IIC1, SDHI0, SDHI1, SDHI2 87 AP_ARM1, AP_ARM2, SPU2, FLCTL, IIC1
86}; 88};
87 89
88static struct intc_vect intca_vectors[] __initdata = { 90static struct intc_vect intca_vectors[] __initdata = {
@@ -123,17 +125,17 @@ static struct intc_vect intca_vectors[] __initdata = {
123 INTC_VECT(SCIFB, 0x0d60), 125 INTC_VECT(SCIFB, 0x0d60),
124 INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0), 126 INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
125 INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0), 127 INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
126 INTC_VECT(SDHI0_SDHI0I0, 0x0e00), INTC_VECT(SDHI0_SDHI0I1, 0x0e20), 128 INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20),
127 INTC_VECT(SDHI0_SDHI0I2, 0x0e40), INTC_VECT(SDHI0_SDHI0I3, 0x0e60), 129 INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60),
128 INTC_VECT(SDHI1_SDHI1I0, 0x0e80), INTC_VECT(SDHI1_SDHI1I1, 0x0ea0), 130 INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0),
129 INTC_VECT(SDHI1_SDHI1I2, 0x0ec0), 131 INTC_VECT(SDHI1, 0x0ec0),
130 INTC_VECT(IRREM, 0x0f60), 132 INTC_VECT(IRREM, 0x0f60),
131 INTC_VECT(IRDA, 0x0480), 133 INTC_VECT(IRDA, 0x0480),
132 INTC_VECT(TPU0, 0x04a0), 134 INTC_VECT(TPU0, 0x04a0),
133 INTC_VECT(TTI20, 0x1100), 135 INTC_VECT(TTI20, 0x1100),
134 INTC_VECT(DDM, 0x1140), 136 INTC_VECT(DDM, 0x1140),
135 INTC_VECT(SDHI2_SDHI2I0, 0x1200), INTC_VECT(SDHI2_SDHI2I1, 0x1220), 137 INTC_VECT(SDHI2, 0x1200), INTC_VECT(SDHI2, 0x1220),
136 INTC_VECT(SDHI2_SDHI2I2, 0x1240), INTC_VECT(SDHI2_SDHI2I3, 0x1260), 138 INTC_VECT(SDHI2, 0x1240), INTC_VECT(SDHI2, 0x1260),
137 INTC_VECT(RWDT0, 0x1280), 139 INTC_VECT(RWDT0, 0x1280),
138 INTC_VECT(DMAC1_1_DEI0, 0x2000), INTC_VECT(DMAC1_1_DEI1, 0x2020), 140 INTC_VECT(DMAC1_1_DEI0, 0x2000), INTC_VECT(DMAC1_1_DEI1, 0x2020),
139 INTC_VECT(DMAC1_1_DEI2, 0x2040), INTC_VECT(DMAC1_1_DEI3, 0x2060), 141 INTC_VECT(DMAC1_1_DEI2, 0x2040), INTC_VECT(DMAC1_1_DEI3, 0x2060),
@@ -193,12 +195,6 @@ static struct intc_group intca_groups[] __initdata = {
193 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI, 195 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
194 FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), 196 FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
195 INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1), 197 INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
196 INTC_GROUP(SDHI0, SDHI0_SDHI0I0, SDHI0_SDHI0I1,
197 SDHI0_SDHI0I2, SDHI0_SDHI0I3),
198 INTC_GROUP(SDHI1, SDHI1_SDHI1I0, SDHI1_SDHI1I1,
199 SDHI1_SDHI1I2),
200 INTC_GROUP(SDHI2, SDHI2_SDHI2I0, SDHI2_SDHI2I1,
201 SDHI2_SDHI2I2, SDHI2_SDHI2I3),
202 INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM), 198 INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM),
203}; 199};
204 200
@@ -234,10 +230,10 @@ static struct intc_mask_reg intca_mask_registers[] __initdata = {
234 { SCIFB, SCIFA5, SCIFA4, MSIOF1, 230 { SCIFB, SCIFA5, SCIFA4, MSIOF1,
235 0, 0, MSIOF2, 0 } }, 231 0, 0, MSIOF2, 0 } },
236 { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */ 232 { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
237 { SDHI0_SDHI0I3, SDHI0_SDHI0I2, SDHI0_SDHI0I1, SDHI0_SDHI0I0, 233 { DISABLED, DISABLED, ENABLED, ENABLED,
238 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, 234 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
239 { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */ 235 { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
240 { 0, SDHI1_SDHI1I2, SDHI1_SDHI1I1, SDHI1_SDHI1I0, 236 { 0, DISABLED, ENABLED, ENABLED,
241 TTI20, USBHSDMAC0_USHDMI, 0, 0 } }, 237 TTI20, USBHSDMAC0_USHDMI, 0, 0 } },
242 { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */ 238 { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
243 { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10, 239 { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
@@ -252,7 +248,7 @@ static struct intc_mask_reg intca_mask_registers[] __initdata = {
252 { 0, 0, TPU0, 0, 248 { 0, 0, TPU0, 0,
253 0, 0, 0, 0 } }, 249 0, 0, 0, 0 } },
254 { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */ 250 { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */
255 { SDHI2_SDHI2I3, SDHI2_SDHI2I2, SDHI2_SDHI2I1, SDHI2_SDHI2I0, 251 { DISABLED, DISABLED, ENABLED, ENABLED,
256 0, CMT3, 0, RWDT0 } }, 252 0, CMT3, 0, RWDT0 } },
257 { 0xe6950080, 0xe69500c0, 8, /* IMR0A3 / IMCR0A3 */ 253 { 0xe6950080, 0xe69500c0, 8, /* IMR0A3 / IMCR0A3 */
258 { SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, 0, 254 { SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, 0,
@@ -358,10 +354,14 @@ static struct intc_mask_reg intca_ack_registers[] __initdata = {
358 { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } }, 354 { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
359}; 355};
360 356
361static DECLARE_INTC_DESC_ACK(intca_desc, "sh7372-intca", 357static struct intc_desc intca_desc __initdata = {
362 intca_vectors, intca_groups, 358 .name = "sh7372-intca",
363 intca_mask_registers, intca_prio_registers, 359 .force_enable = ENABLED,
364 intca_sense_registers, intca_ack_registers); 360 .force_disable = DISABLED,
361 .hw = INTC_HW_DESC(intca_vectors, intca_groups,
362 intca_mask_registers, intca_prio_registers,
363 intca_sense_registers, intca_ack_registers),
364};
365 365
366void __init sh7372_init_irq(void) 366void __init sh7372_init_irq(void)
367{ 367{
diff --git a/arch/arm/mach-shmobile/intc-sh7377.c b/arch/arm/mach-shmobile/intc-sh7377.c
index 125021cfba5c..5c781e2d1897 100644
--- a/arch/arm/mach-shmobile/intc-sh7377.c
+++ b/arch/arm/mach-shmobile/intc-sh7377.c
@@ -27,6 +27,8 @@
27 27
28enum { 28enum {
29 UNUSED_INTCA = 0, 29 UNUSED_INTCA = 0,
30 ENABLED,
31 DISABLED,
30 32
31 /* interrupt sources INTCA */ 33 /* interrupt sources INTCA */
32 IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A, 34 IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A,
@@ -49,8 +51,8 @@ enum {
49 MSIOF2, MSIOF1, 51 MSIOF2, MSIOF1,
50 SCIFA4, SCIFA5, SCIFB, 52 SCIFA4, SCIFA5, SCIFB,
51 FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, 53 FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
52 SDHI0_SDHI0I0, SDHI0_SDHI0I1, SDHI0_SDHI0I2, SDHI0_SDHI0I3, 54 SDHI0,
53 SDHI1_SDHI1I0, SDHI1_SDHI1I1, SDHI1_SDHI1I2, SDHI1_SDHI1I3, 55 SDHI1,
54 MSU_MSU, MSU_MSU2, 56 MSU_MSU, MSU_MSU2,
55 IRREM, 57 IRREM,
56 MSUG, 58 MSUG,
@@ -84,7 +86,7 @@ enum {
84 86
85 /* interrupt groups INTCA */ 87 /* interrupt groups INTCA */
86 DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT, 88 DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT,
87 AP_ARM1, AP_ARM2, USBHS, SPU2, FLCTL, IIC1, SDHI0, SDHI1, 89 AP_ARM1, AP_ARM2, USBHS, SPU2, FLCTL, IIC1,
88 ICUSB, ICUDMC 90 ICUSB, ICUDMC
89}; 91};
90 92
@@ -128,10 +130,10 @@ static struct intc_vect intca_vectors[] = {
128 INTC_VECT(SCIFB, 0x0d60), 130 INTC_VECT(SCIFB, 0x0d60),
129 INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0), 131 INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
130 INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0), 132 INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
131 INTC_VECT(SDHI0_SDHI0I0, 0x0e00), INTC_VECT(SDHI0_SDHI0I1, 0x0e20), 133 INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20),
132 INTC_VECT(SDHI0_SDHI0I2, 0x0e40), INTC_VECT(SDHI0_SDHI0I3, 0x0e60), 134 INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60),
133 INTC_VECT(SDHI1_SDHI1I0, 0x0e80), INTC_VECT(SDHI1_SDHI1I1, 0x0ea0), 135 INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0),
134 INTC_VECT(SDHI1_SDHI1I2, 0x0ec0), INTC_VECT(SDHI1_SDHI1I3, 0x0ee0), 136 INTC_VECT(SDHI1, 0x0ec0), INTC_VECT(SDHI1, 0x0ee0),
135 INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40), 137 INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40),
136 INTC_VECT(IRREM, 0x0f60), 138 INTC_VECT(IRREM, 0x0f60),
137 INTC_VECT(MSUG, 0x0fa0), 139 INTC_VECT(MSUG, 0x0fa0),
@@ -195,10 +197,6 @@ static struct intc_group intca_groups[] __initdata = {
195 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI, 197 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
196 FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), 198 FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
197 INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1), 199 INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
198 INTC_GROUP(SDHI0, SDHI0_SDHI0I0, SDHI0_SDHI0I1,
199 SDHI0_SDHI0I2, SDHI0_SDHI0I3),
200 INTC_GROUP(SDHI1, SDHI1_SDHI1I0, SDHI1_SDHI1I1,
201 SDHI1_SDHI1I2, SDHI1_SDHI1I3),
202 INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM), 200 INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM),
203 INTC_GROUP(ICUSB, ICUSB_ICUSB0, ICUSB_ICUSB1), 201 INTC_GROUP(ICUSB, ICUSB_ICUSB0, ICUSB_ICUSB1),
204 INTC_GROUP(ICUDMC, ICUDMC_ICUDMC1, ICUDMC_ICUDMC2), 202 INTC_GROUP(ICUDMC, ICUDMC_ICUDMC1, ICUDMC_ICUDMC2),
@@ -236,10 +234,10 @@ static struct intc_mask_reg intca_mask_registers[] = {
236 { SCIFB, SCIFA5, SCIFA4, MSIOF1, 234 { SCIFB, SCIFA5, SCIFA4, MSIOF1,
237 0, 0, MSIOF2, 0 } }, 235 0, 0, MSIOF2, 0 } },
238 { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */ 236 { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
239 { SDHI0_SDHI0I3, SDHI0_SDHI0I2, SDHI0_SDHI0I1, SDHI0_SDHI0I0, 237 { DISABLED, DISABLED, ENABLED, ENABLED,
240 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, 238 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
241 { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */ 239 { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
242 { SDHI1_SDHI1I3, SDHI1_SDHI1I2, SDHI1_SDHI1I1, SDHI1_SDHI1I0, 240 { DISABLED, DISABLED, ENABLED, ENABLED,
243 TTI20, USBDMAC_USHDMI, 0, MSUG } }, 241 TTI20, USBDMAC_USHDMI, 0, MSUG } },
244 { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */ 242 { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
245 { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10, 243 { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
@@ -339,10 +337,14 @@ static struct intc_mask_reg intca_ack_registers[] __initdata = {
339 { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } }, 337 { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
340}; 338};
341 339
342static DECLARE_INTC_DESC_ACK(intca_desc, "sh7377-intca", 340static struct intc_desc intca_desc __initdata = {
343 intca_vectors, intca_groups, 341 .name = "sh7377-intca",
344 intca_mask_registers, intca_prio_registers, 342 .force_enable = ENABLED,
345 intca_sense_registers, intca_ack_registers); 343 .force_disable = DISABLED,
344 .hw = INTC_HW_DESC(intca_vectors, intca_groups,
345 intca_mask_registers, intca_prio_registers,
346 intca_sense_registers, intca_ack_registers),
347};
346 348
347void __init sh7377_init_irq(void) 349void __init sh7377_init_irq(void)
348{ 350{