diff options
author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2012-06-12 05:35:15 -0400 |
---|---|---|
committer | Rafael J. Wysocki <rjw@sisk.pl> | 2012-06-20 06:27:47 -0400 |
commit | 7d7136cabcad632a81cd568a9c1135db276fe0f2 (patch) | |
tree | f2dde67c4ec14ae26f8126d382c296eb9b59ade2 /arch/arm | |
parent | 56fb523f12665974bd249a39524b75b4f5e57388 (diff) |
ARM: shmobile: r8a7740: add HDMI interrupt support
It is required from sh_mobile_hdmi driver.
This patch is based on v1.0 manual
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-shmobile/intc-r8a7740.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/arch/arm/mach-shmobile/intc-r8a7740.c b/arch/arm/mach-shmobile/intc-r8a7740.c index 09c42afcb22d..9a69a31918ba 100644 --- a/arch/arm/mach-shmobile/intc-r8a7740.c +++ b/arch/arm/mach-shmobile/intc-r8a7740.c | |||
@@ -71,10 +71,12 @@ enum { | |||
71 | DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3, | 71 | DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3, |
72 | DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR, | 72 | DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR, |
73 | SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, | 73 | SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, |
74 | HDMI, | ||
74 | USBH_INT, USBH_OHCI, USBH_EHCI, USBH_PME, USBH_BIND, | 75 | USBH_INT, USBH_OHCI, USBH_EHCI, USBH_PME, USBH_BIND, |
75 | RSPI_OVRF, RSPI_SPTEF, RSPI_SPRF, | 76 | RSPI_OVRF, RSPI_SPTEF, RSPI_SPRF, |
76 | SPU2_0, SPU2_1, | 77 | SPU2_0, SPU2_1, |
77 | FSI, FMSI, | 78 | FSI, FMSI, |
79 | HDMI_SSS, HDMI_KEY, | ||
78 | IPMMU, | 80 | IPMMU, |
79 | AP_ARM_CTIIRQ, AP_ARM_PMURQ, | 81 | AP_ARM_CTIIRQ, AP_ARM_PMURQ, |
80 | MFIS2, | 82 | MFIS2, |
@@ -182,6 +184,7 @@ static struct intc_vect intca_vectors[] __initdata = { | |||
182 | INTC_VECT(USBH_EHCI, 0x1580), | 184 | INTC_VECT(USBH_EHCI, 0x1580), |
183 | INTC_VECT(USBH_PME, 0x15A0), | 185 | INTC_VECT(USBH_PME, 0x15A0), |
184 | INTC_VECT(USBH_BIND, 0x15C0), | 186 | INTC_VECT(USBH_BIND, 0x15C0), |
187 | INTC_VECT(HDMI, 0x1700), | ||
185 | INTC_VECT(RSPI_OVRF, 0x1780), | 188 | INTC_VECT(RSPI_OVRF, 0x1780), |
186 | INTC_VECT(RSPI_SPTEF, 0x17A0), | 189 | INTC_VECT(RSPI_SPTEF, 0x17A0), |
187 | INTC_VECT(RSPI_SPRF, 0x17C0), | 190 | INTC_VECT(RSPI_SPRF, 0x17C0), |
@@ -189,6 +192,8 @@ static struct intc_vect intca_vectors[] __initdata = { | |||
189 | INTC_VECT(SPU2_1, 0x1820), | 192 | INTC_VECT(SPU2_1, 0x1820), |
190 | INTC_VECT(FSI, 0x1840), | 193 | INTC_VECT(FSI, 0x1840), |
191 | INTC_VECT(FMSI, 0x1860), | 194 | INTC_VECT(FMSI, 0x1860), |
195 | INTC_VECT(HDMI_SSS, 0x18A0), | ||
196 | INTC_VECT(HDMI_KEY, 0x18C0), | ||
192 | INTC_VECT(IPMMU, 0x1920), | 197 | INTC_VECT(IPMMU, 0x1920), |
193 | INTC_VECT(AP_ARM_CTIIRQ, 0x1980), | 198 | INTC_VECT(AP_ARM_CTIIRQ, 0x1980), |
194 | INTC_VECT(AP_ARM_PMURQ, 0x19A0), | 199 | INTC_VECT(AP_ARM_PMURQ, 0x19A0), |
@@ -304,11 +309,11 @@ static struct intc_mask_reg intca_mask_registers[] __initdata = { | |||
304 | USBH_EHCI, USBH_PME, USBH_BIND, 0 } }, | 309 | USBH_EHCI, USBH_PME, USBH_BIND, 0 } }, |
305 | /* IMR3A3 / IMCR3A3 */ | 310 | /* IMR3A3 / IMCR3A3 */ |
306 | { /* IMR4A3 / IMCR4A3 */ 0xe6950090, 0xe69500d0, 8, | 311 | { /* IMR4A3 / IMCR4A3 */ 0xe6950090, 0xe69500d0, 8, |
307 | { 0, 0, 0, 0, | 312 | { HDMI, 0, 0, 0, |
308 | RSPI_OVRF, RSPI_SPTEF, RSPI_SPRF, 0 } }, | 313 | RSPI_OVRF, RSPI_SPTEF, RSPI_SPRF, 0 } }, |
309 | { /* IMR5A3 / IMCR5A3 */ 0xe6950094, 0xe69500d4, 8, | 314 | { /* IMR5A3 / IMCR5A3 */ 0xe6950094, 0xe69500d4, 8, |
310 | { SPU2_0, SPU2_1, FSI, FMSI, | 315 | { SPU2_0, SPU2_1, FSI, FMSI, |
311 | 0, 0, 0, 0 } }, | 316 | 0, HDMI_SSS, HDMI_KEY, 0 } }, |
312 | { /* IMR6A3 / IMCR6A3 */ 0xe6950098, 0xe69500d8, 8, | 317 | { /* IMR6A3 / IMCR6A3 */ 0xe6950098, 0xe69500d8, 8, |
313 | { 0, IPMMU, 0, 0, | 318 | { 0, IPMMU, 0, 0, |
314 | AP_ARM_CTIIRQ, AP_ARM_PMURQ, 0, 0 } }, | 319 | AP_ARM_CTIIRQ, AP_ARM_PMURQ, 0, 0 } }, |
@@ -353,10 +358,10 @@ static struct intc_prio_reg intca_prio_registers[] __initdata = { | |||
353 | { 0xe6950014, 0, 16, 4, /* IPRFA3 */ { USBH2, 0, 0, 0 } }, | 358 | { 0xe6950014, 0, 16, 4, /* IPRFA3 */ { USBH2, 0, 0, 0 } }, |
354 | /* IPRGA3 */ | 359 | /* IPRGA3 */ |
355 | /* IPRHA3 */ | 360 | /* IPRHA3 */ |
356 | /* IPRIA3 */ | 361 | { 0xe6950020, 0, 16, 4, /* IPRIA3 */ { HDMI, 0, 0, 0 } }, |
357 | { 0xe6950024, 0, 16, 4, /* IPRJA3 */ { RSPI, 0, 0, 0 } }, | 362 | { 0xe6950024, 0, 16, 4, /* IPRJA3 */ { RSPI, 0, 0, 0 } }, |
358 | { 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } }, | 363 | { 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } }, |
359 | /* IPRLA3 */ | 364 | { 0xe695002c, 0, 16, 4, /* IPRLA3 */ { 0, HDMI_SSS, HDMI_KEY, 0 } }, |
360 | { 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU, 0, 0, 0 } }, | 365 | { 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU, 0, 0, 0 } }, |
361 | { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } }, | 366 | { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } }, |
362 | { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S, | 367 | { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S, |