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authorSukumar Ghorai <s-ghorai@ti.com>2010-07-09 05:14:45 -0400
committerTony Lindgren <tony@atomide.com>2010-08-02 08:30:38 -0400
commit2c01946c6b9ebaa5a89710bc42ca224a7f52f227 (patch)
tree419e5a73823ffec9a23b22334b4c5ee936272e49 /arch/arm
parent948d38e799f0ab87cf8ed9113fcdaaee61acf321 (diff)
omap3 nand: cleanup virtual address usages
This patch removes direct reference of gpmc address from generic nand platform code. Nand platform code now uses wrapper functions which are implemented in gpmc module. Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap2/gpmc-nand.c37
-rw-r--r--arch/arm/mach-omap2/gpmc.c9
-rw-r--r--arch/arm/plat-omap/include/plat/gpmc.h5
-rw-r--r--arch/arm/plat-omap/include/plat/nand.h6
4 files changed, 11 insertions, 46 deletions
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index e57fb29ff855..722209601927 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -19,8 +19,6 @@
19#include <plat/board.h> 19#include <plat/board.h>
20#include <plat/gpmc.h> 20#include <plat/gpmc.h>
21 21
22#define WR_RD_PIN_MONITORING 0x00600000
23
24static struct omap_nand_platform_data *gpmc_nand_data; 22static struct omap_nand_platform_data *gpmc_nand_data;
25 23
26static struct resource gpmc_nand_resource = { 24static struct resource gpmc_nand_resource = {
@@ -71,10 +69,10 @@ static int omap2_nand_gpmc_retime(void)
71 t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->wr_cycle); 69 t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->wr_cycle);
72 70
73 /* Configure GPMC */ 71 /* Configure GPMC */
74 gpmc_cs_write_reg(gpmc_nand_data->cs, GPMC_CS_CONFIG1, 72 gpmc_cs_configure(gpmc_nand_data->cs,
75 GPMC_CONFIG1_DEVICESIZE(gpmc_nand_data->devsize) | 73 GPMC_CONFIG_DEV_SIZE, gpmc_nand_data->devsize);
76 GPMC_CONFIG1_DEVICETYPE_NAND); 74 gpmc_cs_configure(gpmc_nand_data->cs,
77 75 GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND);
78 err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t); 76 err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t);
79 if (err) 77 if (err)
80 return err; 78 return err;
@@ -82,27 +80,13 @@ static int omap2_nand_gpmc_retime(void)
82 return 0; 80 return 0;
83} 81}
84 82
85static int gpmc_nand_setup(void)
86{
87 struct device *dev = &gpmc_nand_device.dev;
88
89 /* Set timings in GPMC */
90 if (omap2_nand_gpmc_retime() < 0) {
91 dev_err(dev, "Unable to set gpmc timings\n");
92 return -EINVAL;
93 }
94
95 return 0;
96}
97
98int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data) 83int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data)
99{ 84{
100 unsigned int val;
101 int err = 0; 85 int err = 0;
102 struct device *dev = &gpmc_nand_device.dev; 86 struct device *dev = &gpmc_nand_device.dev;
103 87
104 gpmc_nand_data = _nand_data; 88 gpmc_nand_data = _nand_data;
105 gpmc_nand_data->nand_setup = gpmc_nand_setup; 89 gpmc_nand_data->nand_setup = omap2_nand_gpmc_retime;
106 gpmc_nand_device.dev.platform_data = gpmc_nand_data; 90 gpmc_nand_device.dev.platform_data = gpmc_nand_data;
107 91
108 err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, 92 err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
@@ -112,19 +96,16 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data)
112 return err; 96 return err;
113 } 97 }
114 98
115 err = gpmc_nand_setup(); 99 /* Set timings in GPMC */
100 err = omap2_nand_gpmc_retime();
116 if (err < 0) { 101 if (err < 0) {
117 dev_err(dev, "NAND platform setup failed: %d\n", err); 102 dev_err(dev, "Unable to set gpmc timings: %d\n", err);
118 return err; 103 return err;
119 } 104 }
120 105
121 /* Enable RD PIN Monitoring Reg */ 106 /* Enable RD PIN Monitoring Reg */
122 if (gpmc_nand_data->dev_ready) { 107 if (gpmc_nand_data->dev_ready) {
123 val = gpmc_cs_read_reg(gpmc_nand_data->cs, 108 gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_RDY_BSY, 1);
124 GPMC_CS_CONFIG1);
125 val |= WR_RD_PIN_MONITORING;
126 gpmc_cs_write_reg(gpmc_nand_data->cs,
127 GPMC_CS_CONFIG1, val);
128 } 109 }
129 110
130 err = platform_device_register(&gpmc_nand_device); 111 err = platform_device_register(&gpmc_nand_device);
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 1be8f9ae8437..f46933bc9373 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -641,15 +641,6 @@ int gpmc_prefetch_reset(int cs)
641} 641}
642EXPORT_SYMBOL(gpmc_prefetch_reset); 642EXPORT_SYMBOL(gpmc_prefetch_reset);
643 643
644/**
645 * gpmc_prefetch_status - reads prefetch status of engine
646 */
647int gpmc_prefetch_status(void)
648{
649 return gpmc_read_reg(GPMC_PREFETCH_STATUS);
650}
651EXPORT_SYMBOL(gpmc_prefetch_status);
652
653static void __init gpmc_mem_init(void) 644static void __init gpmc_mem_init(void)
654{ 645{
655 int cs; 646 int cs;
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h
index 561c64f5ab50..9fd99b9e40ab 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -25,9 +25,6 @@
25#define GPMC_CS_NAND_ADDRESS 0x20 25#define GPMC_CS_NAND_ADDRESS 0x20
26#define GPMC_CS_NAND_DATA 0x24 26#define GPMC_CS_NAND_DATA 0x24
27 27
28#define GPMC_CONFIG 0x50
29#define GPMC_STATUS 0x54
30
31/* Control Commands */ 28/* Control Commands */
32#define GPMC_CONFIG_RDY_BSY 0x00000001 29#define GPMC_CONFIG_RDY_BSY 0x00000001
33#define GPMC_CONFIG_DEV_SIZE 0x00000002 30#define GPMC_CONFIG_DEV_SIZE 0x00000002
@@ -66,7 +63,6 @@
66#define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1) 63#define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1)
67#define GPMC_CONFIG1_DEVICETYPE(val) ((val & 3) << 10) 64#define GPMC_CONFIG1_DEVICETYPE(val) ((val & 3) << 10)
68#define GPMC_CONFIG1_DEVICETYPE_NOR GPMC_CONFIG1_DEVICETYPE(0) 65#define GPMC_CONFIG1_DEVICETYPE_NOR GPMC_CONFIG1_DEVICETYPE(0)
69#define GPMC_CONFIG1_DEVICETYPE_NAND GPMC_CONFIG1_DEVICETYPE(2)
70#define GPMC_CONFIG1_MUXADDDATA (1 << 9) 66#define GPMC_CONFIG1_MUXADDDATA (1 << 9)
71#define GPMC_CONFIG1_TIME_PARA_GRAN (1 << 4) 67#define GPMC_CONFIG1_TIME_PARA_GRAN (1 << 4)
72#define GPMC_CONFIG1_FCLK_DIV(val) (val & 3) 68#define GPMC_CONFIG1_FCLK_DIV(val) (val & 3)
@@ -136,7 +132,6 @@ extern int gpmc_cs_reserved(int cs);
136extern int gpmc_prefetch_enable(int cs, int dma_mode, 132extern int gpmc_prefetch_enable(int cs, int dma_mode,
137 unsigned int u32_count, int is_write); 133 unsigned int u32_count, int is_write);
138extern int gpmc_prefetch_reset(int cs); 134extern int gpmc_prefetch_reset(int cs);
139extern int gpmc_prefetch_status(void);
140extern void omap3_gpmc_save_context(void); 135extern void omap3_gpmc_save_context(void);
141extern void omap3_gpmc_restore_context(void); 136extern void omap3_gpmc_restore_context(void);
142extern void gpmc_init(void); 137extern void gpmc_init(void);
diff --git a/arch/arm/plat-omap/include/plat/nand.h b/arch/arm/plat-omap/include/plat/nand.h
index f8efd5466b1d..6562cd082bb1 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -21,13 +21,11 @@ struct omap_nand_platform_data {
21 int (*dev_ready)(struct omap_nand_platform_data *); 21 int (*dev_ready)(struct omap_nand_platform_data *);
22 int dma_channel; 22 int dma_channel;
23 unsigned long phys_base; 23 unsigned long phys_base;
24 void __iomem *gpmc_cs_baseaddr;
25 void __iomem *gpmc_baseaddr;
26 int devsize; 24 int devsize;
27}; 25};
28 26
29/* size (4 KiB) for IO mapping */ 27/* minimum size for IO mapping */
30#define NAND_IO_SIZE SZ_4K 28#define NAND_IO_SIZE 4
31 29
32#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE) 30#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
33extern int gpmc_nand_init(struct omap_nand_platform_data *d); 31extern int gpmc_nand_init(struct omap_nand_platform_data *d);