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authorFabio Estevam <fabio.estevam@freescale.com>2011-06-27 16:12:08 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2011-07-07 04:01:12 -0400
commitfce43f99631b03a65b9309d956bfca93a8fe052f (patch)
tree7679fc80ed2983c0789d2838b6f04d3d5a6b776d /arch/arm
parent2e534b21a51bad9d1fad125adac6ad49e64e1d7a (diff)
ARM: mx53: Add support for missing UARTs
MX53 has five UART ports. Add support for the missing UART4 and UART5 ports. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-mx5/clock-mx51-mx53.c10
-rw-r--r--arch/arm/mach-mx5/crm_regs.h2
-rw-r--r--arch/arm/plat-mxc/devices/platform-imx-uart.c2
-rw-r--r--arch/arm/plat-mxc/include/mach/mx53.h4
4 files changed, 16 insertions, 2 deletions
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index 7173b27265dd..e60e7bc60659 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -1254,12 +1254,20 @@ DEFINE_CLOCK(uart2_ipg_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG5_OFFSET,
1254 NULL, NULL, &ipg_clk, &aips_tz1_clk); 1254 NULL, NULL, &ipg_clk, &aips_tz1_clk);
1255DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET, 1255DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET,
1256 NULL, NULL, &ipg_clk, &spba_clk); 1256 NULL, NULL, &ipg_clk, &spba_clk);
1257DEFINE_CLOCK(uart4_ipg_clk, 3, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG4_OFFSET,
1258 NULL, NULL, &ipg_clk, &spba_clk);
1259DEFINE_CLOCK(uart5_ipg_clk, 4, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG6_OFFSET,
1260 NULL, NULL, &ipg_clk, &spba_clk);
1257DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET, 1261DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET,
1258 NULL, NULL, &uart_root_clk, &uart1_ipg_clk); 1262 NULL, NULL, &uart_root_clk, &uart1_ipg_clk);
1259DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET, 1263DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET,
1260 NULL, NULL, &uart_root_clk, &uart2_ipg_clk); 1264 NULL, NULL, &uart_root_clk, &uart2_ipg_clk);
1261DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET, 1265DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET,
1262 NULL, NULL, &uart_root_clk, &uart3_ipg_clk); 1266 NULL, NULL, &uart_root_clk, &uart3_ipg_clk);
1267DEFINE_CLOCK(uart4_clk, 3, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG5_OFFSET,
1268 NULL, NULL, &uart_root_clk, &uart4_ipg_clk);
1269DEFINE_CLOCK(uart5_clk, 4, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG7_OFFSET,
1270 NULL, NULL, &uart_root_clk, &uart5_ipg_clk);
1263 1271
1264/* GPT */ 1272/* GPT */
1265DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET, 1273DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET,
@@ -1464,6 +1472,8 @@ static struct clk_lookup mx53_lookups[] = {
1464 _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) 1472 _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
1465 _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) 1473 _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
1466 _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) 1474 _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
1475 _REGISTER_CLOCK("imx-uart.3", NULL, uart4_clk)
1476 _REGISTER_CLOCK("imx-uart.4", NULL, uart5_clk)
1467 _REGISTER_CLOCK(NULL, "gpt", gpt_clk) 1477 _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
1468 _REGISTER_CLOCK("fec.0", NULL, fec_clk) 1478 _REGISTER_CLOCK("fec.0", NULL, fec_clk)
1469 _REGISTER_CLOCK(NULL, "iim_clk", iim_clk) 1479 _REGISTER_CLOCK(NULL, "iim_clk", iim_clk)
diff --git a/arch/arm/mach-mx5/crm_regs.h b/arch/arm/mach-mx5/crm_regs.h
index 87c0c58f27a7..5e11ba7daee2 100644
--- a/arch/arm/mach-mx5/crm_regs.h
+++ b/arch/arm/mach-mx5/crm_regs.h
@@ -114,6 +114,8 @@
114#define MXC_CCM_CCGR4 (MX51_CCM_BASE + 0x78) 114#define MXC_CCM_CCGR4 (MX51_CCM_BASE + 0x78)
115#define MXC_CCM_CCGR5 (MX51_CCM_BASE + 0x7C) 115#define MXC_CCM_CCGR5 (MX51_CCM_BASE + 0x7C)
116#define MXC_CCM_CCGR6 (MX51_CCM_BASE + 0x80) 116#define MXC_CCM_CCGR6 (MX51_CCM_BASE + 0x80)
117#define MXC_CCM_CCGR7 (MX51_CCM_BASE + 0x84)
118
117#define MXC_CCM_CMEOR (MX51_CCM_BASE + 0x84) 119#define MXC_CCM_CMEOR (MX51_CCM_BASE + 0x84)
118 120
119/* Define the bits in register CCR */ 121/* Define the bits in register CCR */
diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/plat-mxc/devices/platform-imx-uart.c
index 3c854c2cc6dd..cfce8c918b73 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-uart.c
+++ b/arch/arm/plat-mxc/devices/platform-imx-uart.c
@@ -123,6 +123,8 @@ const struct imx_imx_uart_1irq_data imx53_imx_uart_data[] __initconst = {
123 imx53_imx_uart_data_entry(0, 1), 123 imx53_imx_uart_data_entry(0, 1),
124 imx53_imx_uart_data_entry(1, 2), 124 imx53_imx_uart_data_entry(1, 2),
125 imx53_imx_uart_data_entry(2, 3), 125 imx53_imx_uart_data_entry(2, 3),
126 imx53_imx_uart_data_entry(3, 4),
127 imx53_imx_uart_data_entry(4, 5),
126}; 128};
127#endif /* ifdef CONFIG_SOC_IMX53 */ 129#endif /* ifdef CONFIG_SOC_IMX53 */
128 130
diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h
index 74cd093203e0..d1d1bf38efae 100644
--- a/arch/arm/plat-mxc/include/mach/mx53.h
+++ b/arch/arm/plat-mxc/include/mach/mx53.h
@@ -241,7 +241,7 @@
241#define MX53_INT_IPU_ERR 10 241#define MX53_INT_IPU_ERR 10
242#define MX53_INT_IPU_SYN 11 242#define MX53_INT_IPU_SYN 11
243#define MX53_INT_GPU 12 243#define MX53_INT_GPU 12
244#define MX53_INT_RESV13 13 244#define MX53_INT_UART4 13
245#define MX53_INT_USB_H1 14 245#define MX53_INT_USB_H1 14
246#define MX53_INT_EMI 15 246#define MX53_INT_EMI 15
247#define MX53_INT_USB_H2 16 247#define MX53_INT_USB_H2 16
@@ -314,7 +314,7 @@
314#define MX53_INT_CAN2 83 314#define MX53_INT_CAN2 83
315#define MX53_INT_GPU2_IRQ 84 315#define MX53_INT_GPU2_IRQ 84
316#define MX53_INT_GPU2_BUSY 85 316#define MX53_INT_GPU2_BUSY 85
317#define MX53_INT_RESV86 86 317#define MX53_INT_UART5 86
318#define MX53_INT_FEC 87 318#define MX53_INT_FEC 87
319#define MX53_INT_OWIRE 88 319#define MX53_INT_OWIRE 88
320#define MX53_INT_CTI1_TG2 89 320#define MX53_INT_CTI1_TG2 89