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authorLee Jones <lee.jones@linaro.org>2012-03-07 12:22:30 -0500
committerArnd Bergmann <arnd@arndb.de>2012-03-16 15:48:31 -0400
commitdab6487e35680ac5043c58a60554c49052276f5e (patch)
treecd1a3e1985e7545ad9c5eb423a0090f8310370c2 /arch/arm
parent7e0ce270b2ef3d0d00c3f0725f48aa3127d73edf (diff)
ARM: ux500: Enable Cortex-A9 GIC (Generic Interrupt Controller) in Device Tree
This enables the embedded GIC on all u8500 based hardware using DT. Acked-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/db8500.dtsi11
-rw-r--r--arch/arm/mach-ux500/cpu.c14
2 files changed, 24 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi
index 67423e4fe107..614a471df4a7 100644
--- a/arch/arm/boot/dts/db8500.dtsi
+++ b/arch/arm/boot/dts/db8500.dtsi
@@ -16,8 +16,19 @@
16 #address-cells = <1>; 16 #address-cells = <1>;
17 #size-cells = <1>; 17 #size-cells = <1>;
18 compatible = "stericsson,db8500"; 18 compatible = "stericsson,db8500";
19 interrupt-parent = <&intc>;
19 ranges; 20 ranges;
20 21
22 intc: interrupt-controller@a0411000 {
23 compatible = "arm,cortex-a9-gic";
24 #interrupt-cells = <3>;
25 #address-cells = <1>;
26 interrupt-controller;
27 interrupt-parent;
28 reg = <0xa0411000 0x1000>,
29 <0xa0410100 0x100>;
30 };
31
21 pmu { 32 pmu {
22 compatible = "arm,cortex-a9-pmu"; 33 compatible = "arm,cortex-a9-pmu";
23 interrupts = <0 7 0x4>; 34 interrupts = <0 7 0x4>;
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index 6242e88e5fd3..d11f3892a27d 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -16,6 +16,8 @@
16#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/slab.h> 17#include <linux/slab.h>
18#include <linux/stat.h> 18#include <linux/stat.h>
19#include <linux/of.h>
20#include <linux/of_irq.h>
19 21
20#include <asm/hardware/gic.h> 22#include <asm/hardware/gic.h>
21#include <asm/mach/map.h> 23#include <asm/mach/map.h>
@@ -28,6 +30,11 @@
28 30
29void __iomem *_PRCMU_BASE; 31void __iomem *_PRCMU_BASE;
30 32
33static const struct of_device_id ux500_dt_irq_match[] = {
34 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
35 {},
36};
37
31void __init ux500_init_irq(void) 38void __init ux500_init_irq(void)
32{ 39{
33 void __iomem *dist_base; 40 void __iomem *dist_base;
@@ -42,7 +49,12 @@ void __init ux500_init_irq(void)
42 } else 49 } else
43 ux500_unknown_soc(); 50 ux500_unknown_soc();
44 51
45 gic_init(0, 29, dist_base, cpu_base); 52#ifdef CONFIG_OF
53 if (of_have_populated_dt())
54 of_irq_init(ux500_dt_irq_match);
55 else
56#endif
57 gic_init(0, 29, dist_base, cpu_base);
46 58
47 /* 59 /*
48 * Init clocks here so that they are available for system timer 60 * Init clocks here so that they are available for system timer