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authorLinus Walleij <linus.walleij@stericsson.com>2010-08-09 06:47:52 -0400
committerBen Dooks <ben-linux@fluff.org>2010-08-14 11:29:55 -0400
commitd92342df2a06baa8f5d7bf609b0bc0dc87067e82 (patch)
treed18b12db1293ae9cb3b6df6388d8ea1625d0ed93 /arch/arm
parent2d4a3b76cfc061eedec7f510e14ddc3b9399a741 (diff)
DMAENGINE: correct PL080 register header file
This PL008 among all other variables named PL080 doesn't seem right. Fix it. Also add some missing defined that I use in the new PL08x driver. Acked-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/hardware/pl080.h4
-rw-r--r--arch/arm/mach-s3c64xx/dma.c2
2 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/include/asm/hardware/pl080.h b/arch/arm/include/asm/hardware/pl080.h
index 6a6c66be7f65..f35b86e68dd5 100644
--- a/arch/arm/include/asm/hardware/pl080.h
+++ b/arch/arm/include/asm/hardware/pl080.h
@@ -43,7 +43,7 @@
43 43
44/* Per channel configuration registers */ 44/* Per channel configuration registers */
45 45
46#define PL008_Cx_STRIDE (0x20) 46#define PL080_Cx_STRIDE (0x20)
47#define PL080_Cx_BASE(x) ((0x100 + (x * 0x20))) 47#define PL080_Cx_BASE(x) ((0x100 + (x * 0x20)))
48#define PL080_Cx_SRC_ADDR(x) ((0x100 + (x * 0x20))) 48#define PL080_Cx_SRC_ADDR(x) ((0x100 + (x * 0x20)))
49#define PL080_Cx_DST_ADDR(x) ((0x104 + (x * 0x20))) 49#define PL080_Cx_DST_ADDR(x) ((0x104 + (x * 0x20)))
@@ -68,6 +68,8 @@
68#define PL080_CONTROL_TC_IRQ_EN (1 << 31) 68#define PL080_CONTROL_TC_IRQ_EN (1 << 31)
69#define PL080_CONTROL_PROT_MASK (0x7 << 28) 69#define PL080_CONTROL_PROT_MASK (0x7 << 28)
70#define PL080_CONTROL_PROT_SHIFT (28) 70#define PL080_CONTROL_PROT_SHIFT (28)
71#define PL080_CONTROL_PROT_CACHE (1 << 30)
72#define PL080_CONTROL_PROT_BUFF (1 << 29)
71#define PL080_CONTROL_PROT_SYS (1 << 28) 73#define PL080_CONTROL_PROT_SYS (1 << 28)
72#define PL080_CONTROL_DST_INCR (1 << 27) 74#define PL080_CONTROL_DST_INCR (1 << 27)
73#define PL080_CONTROL_SRC_INCR (1 << 26) 75#define PL080_CONTROL_SRC_INCR (1 << 26)
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index 5567e037b0d1..e7d03ab41d80 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -697,7 +697,7 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
697 chptr->number = chno; 697 chptr->number = chno;
698 chptr->dmac = dmac; 698 chptr->dmac = dmac;
699 chptr->regs = regptr; 699 chptr->regs = regptr;
700 regptr += PL008_Cx_STRIDE; 700 regptr += PL080_Cx_STRIDE;
701 } 701 }
702 702
703 /* for the moment, permanently enable the controller */ 703 /* for the moment, permanently enable the controller */