diff options
author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-11-14 01:24:53 -0500 |
---|---|---|
committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-11-28 09:50:39 -0500 |
commit | d28bdfc5c80fb64bf50824920bf9b554732dec74 (patch) | |
tree | 2f2ce017d27c0094a8a1561d532f73f50a4156fe /arch/arm | |
parent | be6d4321720cd56623c1d5be311bde65c2c91229 (diff) |
ARM: at91: make rm9200 rtc drivers soc independent
switch the rtc drivers to resource and pass it via platform_device
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-at91/at91rm9200_devices.c | 16 | ||||
-rw-r--r-- | arch/arm/mach-at91/at91sam9g45_devices.c | 16 | ||||
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91_rtc.h | 24 | ||||
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91rm9200.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91sam9g45.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91sam9rl.h | 2 |
6 files changed, 45 insertions, 17 deletions
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index 1007ba8ec131..ba4fefe60f62 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c | |||
@@ -665,10 +665,24 @@ static void __init at91_add_device_tc(void) { } | |||
665 | * -------------------------------------------------------------------- */ | 665 | * -------------------------------------------------------------------- */ |
666 | 666 | ||
667 | #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) | 667 | #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) |
668 | static struct resource rtc_resources[] = { | ||
669 | [0] = { | ||
670 | .start = AT91RM9200_BASE_RTC, | ||
671 | .end = AT91RM9200_BASE_RTC + SZ_256 - 1, | ||
672 | .flags = IORESOURCE_MEM, | ||
673 | }, | ||
674 | [1] = { | ||
675 | .start = AT91_ID_SYS, | ||
676 | .end = AT91_ID_SYS, | ||
677 | .flags = IORESOURCE_IRQ, | ||
678 | }, | ||
679 | }; | ||
680 | |||
668 | static struct platform_device at91rm9200_rtc_device = { | 681 | static struct platform_device at91rm9200_rtc_device = { |
669 | .name = "at91_rtc", | 682 | .name = "at91_rtc", |
670 | .id = -1, | 683 | .id = -1, |
671 | .num_resources = 0, | 684 | .resource = rtc_resources, |
685 | .num_resources = ARRAY_SIZE(rtc_resources), | ||
672 | }; | 686 | }; |
673 | 687 | ||
674 | static void __init at91_add_device_rtc(void) | 688 | static void __init at91_add_device_rtc(void) |
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index 153dad0642c6..2c64e01bbd13 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c | |||
@@ -1009,10 +1009,24 @@ static void __init at91_add_device_tc(void) { } | |||
1009 | * -------------------------------------------------------------------- */ | 1009 | * -------------------------------------------------------------------- */ |
1010 | 1010 | ||
1011 | #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) | 1011 | #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) |
1012 | static struct resource rtc_resources[] = { | ||
1013 | [0] = { | ||
1014 | .start = AT91SAM9G45_BASE_RTC, | ||
1015 | .end = AT91SAM9G45_BASE_RTC + SZ_256 - 1, | ||
1016 | .flags = IORESOURCE_MEM, | ||
1017 | }, | ||
1018 | [1] = { | ||
1019 | .start = AT91_ID_SYS, | ||
1020 | .end = AT91_ID_SYS, | ||
1021 | .flags = IORESOURCE_IRQ, | ||
1022 | }, | ||
1023 | }; | ||
1024 | |||
1012 | static struct platform_device at91sam9g45_rtc_device = { | 1025 | static struct platform_device at91sam9g45_rtc_device = { |
1013 | .name = "at91_rtc", | 1026 | .name = "at91_rtc", |
1014 | .id = -1, | 1027 | .id = -1, |
1015 | .num_resources = 0, | 1028 | .resource = rtc_resources, |
1029 | .num_resources = ARRAY_SIZE(rtc_resources), | ||
1016 | }; | 1030 | }; |
1017 | 1031 | ||
1018 | static void __init at91_add_device_rtc(void) | 1032 | static void __init at91_add_device_rtc(void) |
diff --git a/arch/arm/mach-at91/include/mach/at91_rtc.h b/arch/arm/mach-at91/include/mach/at91_rtc.h index e56f4701a3e5..da1945e5f714 100644 --- a/arch/arm/mach-at91/include/mach/at91_rtc.h +++ b/arch/arm/mach-at91/include/mach/at91_rtc.h | |||
@@ -16,7 +16,7 @@ | |||
16 | #ifndef AT91_RTC_H | 16 | #ifndef AT91_RTC_H |
17 | #define AT91_RTC_H | 17 | #define AT91_RTC_H |
18 | 18 | ||
19 | #define AT91_RTC_CR (AT91_RTC + 0x00) /* Control Register */ | 19 | #define AT91_RTC_CR 0x00 /* Control Register */ |
20 | #define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */ | 20 | #define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */ |
21 | #define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */ | 21 | #define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */ |
22 | #define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ | 22 | #define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ |
@@ -29,44 +29,44 @@ | |||
29 | #define AT91_RTC_CALEVSEL_MONTH (1 << 16) | 29 | #define AT91_RTC_CALEVSEL_MONTH (1 << 16) |
30 | #define AT91_RTC_CALEVSEL_YEAR (2 << 16) | 30 | #define AT91_RTC_CALEVSEL_YEAR (2 << 16) |
31 | 31 | ||
32 | #define AT91_RTC_MR (AT91_RTC + 0x04) /* Mode Register */ | 32 | #define AT91_RTC_MR 0x04 /* Mode Register */ |
33 | #define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ | 33 | #define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ |
34 | 34 | ||
35 | #define AT91_RTC_TIMR (AT91_RTC + 0x08) /* Time Register */ | 35 | #define AT91_RTC_TIMR 0x08 /* Time Register */ |
36 | #define AT91_RTC_SEC (0x7f << 0) /* Current Second */ | 36 | #define AT91_RTC_SEC (0x7f << 0) /* Current Second */ |
37 | #define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ | 37 | #define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ |
38 | #define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ | 38 | #define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ |
39 | #define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ | 39 | #define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ |
40 | 40 | ||
41 | #define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */ | 41 | #define AT91_RTC_CALR 0x0c /* Calendar Register */ |
42 | #define AT91_RTC_CENT (0x7f << 0) /* Current Century */ | 42 | #define AT91_RTC_CENT (0x7f << 0) /* Current Century */ |
43 | #define AT91_RTC_YEAR (0xff << 8) /* Current Year */ | 43 | #define AT91_RTC_YEAR (0xff << 8) /* Current Year */ |
44 | #define AT91_RTC_MONTH (0x1f << 16) /* Current Month */ | 44 | #define AT91_RTC_MONTH (0x1f << 16) /* Current Month */ |
45 | #define AT91_RTC_DAY (7 << 21) /* Current Day */ | 45 | #define AT91_RTC_DAY (7 << 21) /* Current Day */ |
46 | #define AT91_RTC_DATE (0x3f << 24) /* Current Date */ | 46 | #define AT91_RTC_DATE (0x3f << 24) /* Current Date */ |
47 | 47 | ||
48 | #define AT91_RTC_TIMALR (AT91_RTC + 0x10) /* Time Alarm Register */ | 48 | #define AT91_RTC_TIMALR 0x10 /* Time Alarm Register */ |
49 | #define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */ | 49 | #define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */ |
50 | #define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */ | 50 | #define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */ |
51 | #define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */ | 51 | #define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */ |
52 | 52 | ||
53 | #define AT91_RTC_CALALR (AT91_RTC + 0x14) /* Calendar Alarm Register */ | 53 | #define AT91_RTC_CALALR 0x14 /* Calendar Alarm Register */ |
54 | #define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */ | 54 | #define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */ |
55 | #define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */ | 55 | #define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */ |
56 | 56 | ||
57 | #define AT91_RTC_SR (AT91_RTC + 0x18) /* Status Register */ | 57 | #define AT91_RTC_SR 0x18 /* Status Register */ |
58 | #define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */ | 58 | #define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */ |
59 | #define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */ | 59 | #define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */ |
60 | #define AT91_RTC_SECEV (1 << 2) /* Second Event */ | 60 | #define AT91_RTC_SECEV (1 << 2) /* Second Event */ |
61 | #define AT91_RTC_TIMEV (1 << 3) /* Time Event */ | 61 | #define AT91_RTC_TIMEV (1 << 3) /* Time Event */ |
62 | #define AT91_RTC_CALEV (1 << 4) /* Calendar Event */ | 62 | #define AT91_RTC_CALEV (1 << 4) /* Calendar Event */ |
63 | 63 | ||
64 | #define AT91_RTC_SCCR (AT91_RTC + 0x1c) /* Status Clear Command Register */ | 64 | #define AT91_RTC_SCCR 0x1c /* Status Clear Command Register */ |
65 | #define AT91_RTC_IER (AT91_RTC + 0x20) /* Interrupt Enable Register */ | 65 | #define AT91_RTC_IER 0x20 /* Interrupt Enable Register */ |
66 | #define AT91_RTC_IDR (AT91_RTC + 0x24) /* Interrupt Disable Register */ | 66 | #define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */ |
67 | #define AT91_RTC_IMR (AT91_RTC + 0x28) /* Interrupt Mask Register */ | 67 | #define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */ |
68 | 68 | ||
69 | #define AT91_RTC_VER (AT91_RTC + 0x2c) /* Valid Entry Register */ | 69 | #define AT91_RTC_VER 0x2c /* Valid Entry Register */ |
70 | #define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */ | 70 | #define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */ |
71 | #define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */ | 71 | #define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */ |
72 | #define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */ | 72 | #define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */ |
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h index 90e92a8b3cb5..bacb51141819 100644 --- a/arch/arm/mach-at91/include/mach/at91rm9200.h +++ b/arch/arm/mach-at91/include/mach/at91rm9200.h | |||
@@ -81,7 +81,6 @@ | |||
81 | */ | 81 | */ |
82 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ | 82 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ |
83 | #define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ | 83 | #define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ |
84 | #define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */ | ||
85 | #define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ | 84 | #define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ |
86 | 85 | ||
87 | #define AT91RM9200_BASE_DBGU AT91_BASE_DBGU0 /* Debug Unit */ | 86 | #define AT91RM9200_BASE_DBGU AT91_BASE_DBGU0 /* Debug Unit */ |
@@ -89,6 +88,7 @@ | |||
89 | #define AT91RM9200_BASE_PIOB 0xfffff600 /* PIO Controller B */ | 88 | #define AT91RM9200_BASE_PIOB 0xfffff600 /* PIO Controller B */ |
90 | #define AT91RM9200_BASE_PIOC 0xfffff800 /* PIO Controller C */ | 89 | #define AT91RM9200_BASE_PIOC 0xfffff800 /* PIO Controller C */ |
91 | #define AT91RM9200_BASE_PIOD 0xfffffa00 /* PIO Controller D */ | 90 | #define AT91RM9200_BASE_PIOD 0xfffffa00 /* PIO Controller D */ |
91 | #define AT91RM9200_BASE_RTC 0xfffffe00 /* Real-Time Clock */ | ||
92 | 92 | ||
93 | #define AT91_USART0 AT91RM9200_BASE_US0 | 93 | #define AT91_USART0 AT91RM9200_BASE_US0 |
94 | #define AT91_USART1 AT91RM9200_BASE_US1 | 94 | #define AT91_USART1 AT91RM9200_BASE_US1 |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h index ac5c471635dc..f0c23c960dec 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9g45.h +++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h | |||
@@ -92,7 +92,6 @@ | |||
92 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 92 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
93 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 93 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
94 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) | 94 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) |
95 | #define AT91_RTC (0xfffffdb0 - AT91_BASE_SYS) | ||
96 | 95 | ||
97 | #define AT91SAM9G45_BASE_ECC 0xffffe200 | 96 | #define AT91SAM9G45_BASE_ECC 0xffffe200 |
98 | #define AT91SAM9G45_BASE_DMA 0xffffec00 | 97 | #define AT91SAM9G45_BASE_DMA 0xffffec00 |
@@ -107,6 +106,7 @@ | |||
107 | #define AT91SAM9G45_BASE_RTT 0xfffffd20 | 106 | #define AT91SAM9G45_BASE_RTT 0xfffffd20 |
108 | #define AT91SAM9G45_BASE_PIT 0xfffffd30 | 107 | #define AT91SAM9G45_BASE_PIT 0xfffffd30 |
109 | #define AT91SAM9G45_BASE_WDT 0xfffffd40 | 108 | #define AT91SAM9G45_BASE_WDT 0xfffffd40 |
109 | #define AT91SAM9G45_BASE_RTC 0xfffffdb0 | ||
110 | 110 | ||
111 | #define AT91_USART0 AT91SAM9G45_BASE_US0 | 111 | #define AT91_USART0 AT91SAM9G45_BASE_US0 |
112 | #define AT91_USART1 AT91SAM9G45_BASE_US1 | 112 | #define AT91_USART1 AT91SAM9G45_BASE_US1 |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h index c466e8c898ad..2bb359e60b97 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9rl.h +++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h | |||
@@ -75,7 +75,6 @@ | |||
75 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 75 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
76 | #define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) | 76 | #define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) |
77 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) | 77 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) |
78 | #define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) | ||
79 | 78 | ||
80 | #define AT91SAM9RL_BASE_DMA 0xffffe600 | 79 | #define AT91SAM9RL_BASE_DMA 0xffffe600 |
81 | #define AT91SAM9RL_BASE_ECC 0xffffe800 | 80 | #define AT91SAM9RL_BASE_ECC 0xffffe800 |
@@ -89,6 +88,7 @@ | |||
89 | #define AT91SAM9RL_BASE_RTT 0xfffffd20 | 88 | #define AT91SAM9RL_BASE_RTT 0xfffffd20 |
90 | #define AT91SAM9RL_BASE_PIT 0xfffffd30 | 89 | #define AT91SAM9RL_BASE_PIT 0xfffffd30 |
91 | #define AT91SAM9RL_BASE_WDT 0xfffffd40 | 90 | #define AT91SAM9RL_BASE_WDT 0xfffffd40 |
91 | #define AT91SAM9RL_BASE_RTC 0xfffffe00 | ||
92 | 92 | ||
93 | #define AT91_USART0 AT91SAM9RL_BASE_US0 | 93 | #define AT91_USART0 AT91SAM9RL_BASE_US0 |
94 | #define AT91_USART1 AT91SAM9RL_BASE_US1 | 94 | #define AT91_USART1 AT91SAM9RL_BASE_US1 |