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authorBenoît Thébaudeau <benoit.thebaudeau@advansee.com>2012-06-22 15:04:06 -0400
committerLinus Walleij <linus.walleij@linaro.org>2012-07-17 15:00:16 -0400
commitaeb27748e3bc1e89ec590713e574cb6f885cc3c6 (patch)
tree79a76bb0bd3275173fdf5840db8e0c1683fd0f8b /arch/arm
parent41920d16360ebc8c482911078a17d9994fb77612 (diff)
gpio/mxc: use the edge_sel feature if available
Some mxc processors have an edge_sel feature, which allows the IRQ to be triggered by any edge. This patch makes use of this feature if available, which skips mxc_flip_edge(). Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Sascha Hauer <kernel@pengutronix.de> Cc: <linux-arm-kernel@lists.infradead.org> Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/imx51.dtsi8
-rw-r--r--arch/arm/boot/dts/imx53.dtsi14
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi14
-rw-r--r--arch/arm/mach-imx/mm-imx25.c10
-rw-r--r--arch/arm/mach-imx/mm-imx3.c7
-rw-r--r--arch/arm/mach-imx/mm-imx5.c40
6 files changed, 46 insertions, 47 deletions
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index bfa65abe8ef2..9c95abcb3ce9 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -127,7 +127,7 @@
127 }; 127 };
128 128
129 gpio1: gpio@73f84000 { 129 gpio1: gpio@73f84000 {
130 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 130 compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
131 reg = <0x73f84000 0x4000>; 131 reg = <0x73f84000 0x4000>;
132 interrupts = <50 51>; 132 interrupts = <50 51>;
133 gpio-controller; 133 gpio-controller;
@@ -137,7 +137,7 @@
137 }; 137 };
138 138
139 gpio2: gpio@73f88000 { 139 gpio2: gpio@73f88000 {
140 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 140 compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
141 reg = <0x73f88000 0x4000>; 141 reg = <0x73f88000 0x4000>;
142 interrupts = <52 53>; 142 interrupts = <52 53>;
143 gpio-controller; 143 gpio-controller;
@@ -147,7 +147,7 @@
147 }; 147 };
148 148
149 gpio3: gpio@73f8c000 { 149 gpio3: gpio@73f8c000 {
150 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 150 compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
151 reg = <0x73f8c000 0x4000>; 151 reg = <0x73f8c000 0x4000>;
152 interrupts = <54 55>; 152 interrupts = <54 55>;
153 gpio-controller; 153 gpio-controller;
@@ -157,7 +157,7 @@
157 }; 157 };
158 158
159 gpio4: gpio@73f90000 { 159 gpio4: gpio@73f90000 {
160 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 160 compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
161 reg = <0x73f90000 0x4000>; 161 reg = <0x73f90000 0x4000>;
162 interrupts = <56 57>; 162 interrupts = <56 57>;
163 gpio-controller; 163 gpio-controller;
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index e3e869470cd3..506ed5c93642 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -129,7 +129,7 @@
129 }; 129 };
130 130
131 gpio1: gpio@53f84000 { 131 gpio1: gpio@53f84000 {
132 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 132 compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
133 reg = <0x53f84000 0x4000>; 133 reg = <0x53f84000 0x4000>;
134 interrupts = <50 51>; 134 interrupts = <50 51>;
135 gpio-controller; 135 gpio-controller;
@@ -139,7 +139,7 @@
139 }; 139 };
140 140
141 gpio2: gpio@53f88000 { 141 gpio2: gpio@53f88000 {
142 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 142 compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
143 reg = <0x53f88000 0x4000>; 143 reg = <0x53f88000 0x4000>;
144 interrupts = <52 53>; 144 interrupts = <52 53>;
145 gpio-controller; 145 gpio-controller;
@@ -149,7 +149,7 @@
149 }; 149 };
150 150
151 gpio3: gpio@53f8c000 { 151 gpio3: gpio@53f8c000 {
152 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 152 compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
153 reg = <0x53f8c000 0x4000>; 153 reg = <0x53f8c000 0x4000>;
154 interrupts = <54 55>; 154 interrupts = <54 55>;
155 gpio-controller; 155 gpio-controller;
@@ -159,7 +159,7 @@
159 }; 159 };
160 160
161 gpio4: gpio@53f90000 { 161 gpio4: gpio@53f90000 {
162 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 162 compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
163 reg = <0x53f90000 0x4000>; 163 reg = <0x53f90000 0x4000>;
164 interrupts = <56 57>; 164 interrupts = <56 57>;
165 gpio-controller; 165 gpio-controller;
@@ -197,7 +197,7 @@
197 }; 197 };
198 198
199 gpio5: gpio@53fdc000 { 199 gpio5: gpio@53fdc000 {
200 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 200 compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
201 reg = <0x53fdc000 0x4000>; 201 reg = <0x53fdc000 0x4000>;
202 interrupts = <103 104>; 202 interrupts = <103 104>;
203 gpio-controller; 203 gpio-controller;
@@ -207,7 +207,7 @@
207 }; 207 };
208 208
209 gpio6: gpio@53fe0000 { 209 gpio6: gpio@53fe0000 {
210 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 210 compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
211 reg = <0x53fe0000 0x4000>; 211 reg = <0x53fe0000 0x4000>;
212 interrupts = <105 106>; 212 interrupts = <105 106>;
213 gpio-controller; 213 gpio-controller;
@@ -217,7 +217,7 @@
217 }; 217 };
218 218
219 gpio7: gpio@53fe4000 { 219 gpio7: gpio@53fe4000 {
220 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 220 compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
221 reg = <0x53fe4000 0x4000>; 221 reg = <0x53fe4000 0x4000>;
222 interrupts = <107 108>; 222 interrupts = <107 108>;
223 gpio-controller; 223 gpio-controller;
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 8c90cbac945f..da78fd83f625 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -260,7 +260,7 @@
260 }; 260 };
261 261
262 gpio1: gpio@0209c000 { 262 gpio1: gpio@0209c000 {
263 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 263 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
264 reg = <0x0209c000 0x4000>; 264 reg = <0x0209c000 0x4000>;
265 interrupts = <0 66 0x04 0 67 0x04>; 265 interrupts = <0 66 0x04 0 67 0x04>;
266 gpio-controller; 266 gpio-controller;
@@ -270,7 +270,7 @@
270 }; 270 };
271 271
272 gpio2: gpio@020a0000 { 272 gpio2: gpio@020a0000 {
273 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 273 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
274 reg = <0x020a0000 0x4000>; 274 reg = <0x020a0000 0x4000>;
275 interrupts = <0 68 0x04 0 69 0x04>; 275 interrupts = <0 68 0x04 0 69 0x04>;
276 gpio-controller; 276 gpio-controller;
@@ -280,7 +280,7 @@
280 }; 280 };
281 281
282 gpio3: gpio@020a4000 { 282 gpio3: gpio@020a4000 {
283 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 283 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
284 reg = <0x020a4000 0x4000>; 284 reg = <0x020a4000 0x4000>;
285 interrupts = <0 70 0x04 0 71 0x04>; 285 interrupts = <0 70 0x04 0 71 0x04>;
286 gpio-controller; 286 gpio-controller;
@@ -290,7 +290,7 @@
290 }; 290 };
291 291
292 gpio4: gpio@020a8000 { 292 gpio4: gpio@020a8000 {
293 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 293 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
294 reg = <0x020a8000 0x4000>; 294 reg = <0x020a8000 0x4000>;
295 interrupts = <0 72 0x04 0 73 0x04>; 295 interrupts = <0 72 0x04 0 73 0x04>;
296 gpio-controller; 296 gpio-controller;
@@ -300,7 +300,7 @@
300 }; 300 };
301 301
302 gpio5: gpio@020ac000 { 302 gpio5: gpio@020ac000 {
303 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 303 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
304 reg = <0x020ac000 0x4000>; 304 reg = <0x020ac000 0x4000>;
305 interrupts = <0 74 0x04 0 75 0x04>; 305 interrupts = <0 74 0x04 0 75 0x04>;
306 gpio-controller; 306 gpio-controller;
@@ -310,7 +310,7 @@
310 }; 310 };
311 311
312 gpio6: gpio@020b0000 { 312 gpio6: gpio@020b0000 {
313 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 313 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
314 reg = <0x020b0000 0x4000>; 314 reg = <0x020b0000 0x4000>;
315 interrupts = <0 76 0x04 0 77 0x04>; 315 interrupts = <0 76 0x04 0 77 0x04>;
316 gpio-controller; 316 gpio-controller;
@@ -320,7 +320,7 @@
320 }; 320 };
321 321
322 gpio7: gpio@020b4000 { 322 gpio7: gpio@020b4000 {
323 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 323 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
324 reg = <0x020b4000 0x4000>; 324 reg = <0x020b4000 0x4000>;
325 interrupts = <0 78 0x04 0 79 0x04>; 325 interrupts = <0 78 0x04 0 79 0x04>;
326 gpio-controller; 326 gpio-controller;
diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c
index 6ff37140a4f8..8e8ddb81bd0b 100644
--- a/arch/arm/mach-imx/mm-imx25.c
+++ b/arch/arm/mach-imx/mm-imx25.c
@@ -90,11 +90,11 @@ static const struct resource imx25_audmux_res[] __initconst = {
90 90
91void __init imx25_soc_init(void) 91void __init imx25_soc_init(void)
92{ 92{
93 /* i.mx25 has the i.mx31 type gpio */ 93 /* i.mx25 has the i.mx35 type gpio */
94 mxc_register_gpio("imx31-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); 94 mxc_register_gpio("imx35-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0);
95 mxc_register_gpio("imx31-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); 95 mxc_register_gpio("imx35-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0);
96 mxc_register_gpio("imx31-gpio", 2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0); 96 mxc_register_gpio("imx35-gpio", 2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0);
97 mxc_register_gpio("imx31-gpio", 3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0); 97 mxc_register_gpio("imx35-gpio", 3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0);
98 98
99 pinctrl_provide_dummies(); 99 pinctrl_provide_dummies();
100 /* i.mx25 has the i.mx35 type sdma */ 100 /* i.mx25 has the i.mx35 type sdma */
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index a8983b9778d1..8e51e77b3c65 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -273,10 +273,9 @@ void __init imx35_soc_init(void)
273 273
274 imx3_init_l2x0(); 274 imx3_init_l2x0();
275 275
276 /* i.mx35 has the i.mx31 type gpio */ 276 mxc_register_gpio("imx35-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0);
277 mxc_register_gpio("imx31-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); 277 mxc_register_gpio("imx35-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0);
278 mxc_register_gpio("imx31-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); 278 mxc_register_gpio("imx35-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);
279 mxc_register_gpio("imx31-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);
280 279
281 pinctrl_provide_dummies(); 280 pinctrl_provide_dummies();
282 if (to_version == 1) { 281 if (to_version == 1) {
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index 1d003053d562..d70d16cb7eb5 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -181,13 +181,13 @@ static const struct resource imx53_audmux_res[] __initconst = {
181 181
182void __init imx50_soc_init(void) 182void __init imx50_soc_init(void)
183{ 183{
184 /* i.mx50 has the i.mx31 type gpio */ 184 /* i.mx50 has the i.mx35 type gpio */
185 mxc_register_gpio("imx31-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH); 185 mxc_register_gpio("imx35-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
186 mxc_register_gpio("imx31-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH); 186 mxc_register_gpio("imx35-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
187 mxc_register_gpio("imx31-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH); 187 mxc_register_gpio("imx35-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH);
188 mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH); 188 mxc_register_gpio("imx35-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
189 mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH); 189 mxc_register_gpio("imx35-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
190 mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH); 190 mxc_register_gpio("imx35-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
191 191
192 /* i.mx50 has the i.mx31 type audmux */ 192 /* i.mx50 has the i.mx31 type audmux */
193 platform_device_register_simple("imx31-audmux", 0, imx50_audmux_res, 193 platform_device_register_simple("imx31-audmux", 0, imx50_audmux_res,
@@ -196,11 +196,11 @@ void __init imx50_soc_init(void)
196 196
197void __init imx51_soc_init(void) 197void __init imx51_soc_init(void)
198{ 198{
199 /* i.mx51 has the i.mx31 type gpio */ 199 /* i.mx51 has the i.mx35 type gpio */
200 mxc_register_gpio("imx31-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH); 200 mxc_register_gpio("imx35-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH);
201 mxc_register_gpio("imx31-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH); 201 mxc_register_gpio("imx35-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH);
202 mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_INT_GPIO3_LOW, MX51_INT_GPIO3_HIGH); 202 mxc_register_gpio("imx35-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_INT_GPIO3_LOW, MX51_INT_GPIO3_HIGH);
203 mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_INT_GPIO4_LOW, MX51_INT_GPIO4_HIGH); 203 mxc_register_gpio("imx35-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_INT_GPIO4_LOW, MX51_INT_GPIO4_HIGH);
204 204
205 pinctrl_provide_dummies(); 205 pinctrl_provide_dummies();
206 206
@@ -218,14 +218,14 @@ void __init imx51_soc_init(void)
218 218
219void __init imx53_soc_init(void) 219void __init imx53_soc_init(void)
220{ 220{
221 /* i.mx53 has the i.mx31 type gpio */ 221 /* i.mx53 has the i.mx35 type gpio */
222 mxc_register_gpio("imx31-gpio", 0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH); 222 mxc_register_gpio("imx35-gpio", 0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH);
223 mxc_register_gpio("imx31-gpio", 1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH); 223 mxc_register_gpio("imx35-gpio", 1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH);
224 mxc_register_gpio("imx31-gpio", 2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH); 224 mxc_register_gpio("imx35-gpio", 2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH);
225 mxc_register_gpio("imx31-gpio", 3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH); 225 mxc_register_gpio("imx35-gpio", 3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH);
226 mxc_register_gpio("imx31-gpio", 4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH); 226 mxc_register_gpio("imx35-gpio", 4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH);
227 mxc_register_gpio("imx31-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH); 227 mxc_register_gpio("imx35-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH);
228 mxc_register_gpio("imx31-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH); 228 mxc_register_gpio("imx35-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH);
229 229
230 pinctrl_provide_dummies(); 230 pinctrl_provide_dummies();
231 /* i.mx53 has the i.mx35 type sdma */ 231 /* i.mx53 has the i.mx35 type sdma */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-05 10:27:43 -0500